1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Assembly Matcher Source Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9
10#ifdef GET_ASSEMBLER_HEADER
11#undef GET_ASSEMBLER_HEADER
12 // This should be included into the middle of the declaration of
13 // your subclasses implementation of MCTargetAsmParser.
14 FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const;
15 void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
16 const OperandVector &Operands);
17 void convertToMapAndConstraints(unsigned Kind,
18 const OperandVector &Operands) override;
19 unsigned MatchInstructionImpl(const OperandVector &Operands,
20 MCInst &Inst,
21 uint64_t &ErrorInfo,
22 FeatureBitset &MissingFeatures,
23 bool matchingInlineAsm,
24 unsigned VariantID = 0);
25 unsigned MatchInstructionImpl(const OperandVector &Operands,
26 MCInst &Inst,
27 uint64_t &ErrorInfo,
28 bool matchingInlineAsm,
29 unsigned VariantID = 0) {
30 FeatureBitset MissingFeatures;
31 return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures,
32 matchingInlineAsm, VariantID);
33 }
34
35#endif // GET_ASSEMBLER_HEADER_INFO
36
37
38#ifdef GET_OPERAND_DIAGNOSTIC_TYPES
39#undef GET_OPERAND_DIAGNOSTIC_TYPES
40
41 Match_InvalidImmUnsignedi4,
42 END_OPERAND_DIAGNOSTIC_TYPES
43#endif // GET_OPERAND_DIAGNOSTIC_TYPES
44
45
46#ifdef GET_REGISTER_MATCHER
47#undef GET_REGISTER_MATCHER
48
49// Bits for subtarget features that participate in instruction matching.
50enum SubtargetFeatureBits : uint8_t {
51 Feature_Not64BitModeBit = 4,
52 Feature_In64BitModeBit = 2,
53 Feature_In16BitModeBit = 0,
54 Feature_Not16BitModeBit = 3,
55 Feature_In32BitModeBit = 1,
56};
57
58static unsigned MatchRegisterName(StringRef Name) {
59 switch (Name.size()) {
60 default: break;
61 case 2: // 34 strings to match.
62 switch (Name[0]) {
63 default: break;
64 case 'a': // 3 strings to match.
65 switch (Name[1]) {
66 default: break;
67 case 'h': // 1 string to match.
68 return 1; // "ah"
69 case 'l': // 1 string to match.
70 return 2; // "al"
71 case 'x': // 1 string to match.
72 return 3; // "ax"
73 }
74 break;
75 case 'b': // 4 strings to match.
76 switch (Name[1]) {
77 default: break;
78 case 'h': // 1 string to match.
79 return 4; // "bh"
80 case 'l': // 1 string to match.
81 return 5; // "bl"
82 case 'p': // 1 string to match.
83 return 6; // "bp"
84 case 'x': // 1 string to match.
85 return 9; // "bx"
86 }
87 break;
88 case 'c': // 4 strings to match.
89 switch (Name[1]) {
90 default: break;
91 case 'h': // 1 string to match.
92 return 10; // "ch"
93 case 'l': // 1 string to match.
94 return 11; // "cl"
95 case 's': // 1 string to match.
96 return 12; // "cs"
97 case 'x': // 1 string to match.
98 return 13; // "cx"
99 }
100 break;
101 case 'd': // 5 strings to match.
102 switch (Name[1]) {
103 default: break;
104 case 'h': // 1 string to match.
105 return 15; // "dh"
106 case 'i': // 1 string to match.
107 return 16; // "di"
108 case 'l': // 1 string to match.
109 return 19; // "dl"
110 case 's': // 1 string to match.
111 return 20; // "ds"
112 case 'x': // 1 string to match.
113 return 21; // "dx"
114 }
115 break;
116 case 'e': // 1 string to match.
117 if (Name[1] != 's')
118 break;
119 return 31; // "es"
120 case 'f': // 1 string to match.
121 if (Name[1] != 's')
122 break;
123 return 36; // "fs"
124 case 'g': // 1 string to match.
125 if (Name[1] != 's')
126 break;
127 return 37; // "gs"
128 case 'i': // 1 string to match.
129 if (Name[1] != 'p')
130 break;
131 return 47; // "ip"
132 case 'k': // 8 strings to match.
133 switch (Name[1]) {
134 default: break;
135 case '0': // 1 string to match.
136 return 112; // "k0"
137 case '1': // 1 string to match.
138 return 113; // "k1"
139 case '2': // 1 string to match.
140 return 114; // "k2"
141 case '3': // 1 string to match.
142 return 115; // "k3"
143 case '4': // 1 string to match.
144 return 116; // "k4"
145 case '5': // 1 string to match.
146 return 117; // "k5"
147 case '6': // 1 string to match.
148 return 118; // "k6"
149 case '7': // 1 string to match.
150 return 119; // "k7"
151 }
152 break;
153 case 'r': // 2 strings to match.
154 switch (Name[1]) {
155 default: break;
156 case '8': // 1 string to match.
157 return 128; // "r8"
158 case '9': // 1 string to match.
159 return 129; // "r9"
160 }
161 break;
162 case 's': // 4 strings to match.
163 switch (Name[1]) {
164 default: break;
165 case 'i': // 1 string to match.
166 return 59; // "si"
167 case 'p': // 1 string to match.
168 return 62; // "sp"
169 case 's': // 1 string to match.
170 return 65; // "ss"
171 case 't': // 1 string to match.
172 return 136; // "st"
173 }
174 break;
175 }
176 break;
177 case 3: // 73 strings to match.
178 switch (Name[0]) {
179 default: break;
180 case 'b': // 1 string to match.
181 if (memcmp(Name.data()+1, "pl", 2) != 0)
182 break;
183 return 8; // "bpl"
184 case 'c': // 10 strings to match.
185 if (Name[1] != 'r')
186 break;
187 switch (Name[2]) {
188 default: break;
189 case '0': // 1 string to match.
190 return 72; // "cr0"
191 case '1': // 1 string to match.
192 return 73; // "cr1"
193 case '2': // 1 string to match.
194 return 74; // "cr2"
195 case '3': // 1 string to match.
196 return 75; // "cr3"
197 case '4': // 1 string to match.
198 return 76; // "cr4"
199 case '5': // 1 string to match.
200 return 77; // "cr5"
201 case '6': // 1 string to match.
202 return 78; // "cr6"
203 case '7': // 1 string to match.
204 return 79; // "cr7"
205 case '8': // 1 string to match.
206 return 80; // "cr8"
207 case '9': // 1 string to match.
208 return 81; // "cr9"
209 }
210 break;
211 case 'd': // 11 strings to match.
212 switch (Name[1]) {
213 default: break;
214 case 'i': // 1 string to match.
215 if (Name[2] != 'l')
216 break;
217 return 18; // "dil"
218 case 'r': // 10 strings to match.
219 switch (Name[2]) {
220 default: break;
221 case '0': // 1 string to match.
222 return 88; // "dr0"
223 case '1': // 1 string to match.
224 return 89; // "dr1"
225 case '2': // 1 string to match.
226 return 90; // "dr2"
227 case '3': // 1 string to match.
228 return 91; // "dr3"
229 case '4': // 1 string to match.
230 return 92; // "dr4"
231 case '5': // 1 string to match.
232 return 93; // "dr5"
233 case '6': // 1 string to match.
234 return 94; // "dr6"
235 case '7': // 1 string to match.
236 return 95; // "dr7"
237 case '8': // 1 string to match.
238 return 96; // "dr8"
239 case '9': // 1 string to match.
240 return 97; // "dr9"
241 }
242 break;
243 }
244 break;
245 case 'e': // 10 strings to match.
246 switch (Name[1]) {
247 default: break;
248 case 'a': // 1 string to match.
249 if (Name[2] != 'x')
250 break;
251 return 22; // "eax"
252 case 'b': // 2 strings to match.
253 switch (Name[2]) {
254 default: break;
255 case 'p': // 1 string to match.
256 return 23; // "ebp"
257 case 'x': // 1 string to match.
258 return 24; // "ebx"
259 }
260 break;
261 case 'c': // 1 string to match.
262 if (Name[2] != 'x')
263 break;
264 return 25; // "ecx"
265 case 'd': // 2 strings to match.
266 switch (Name[2]) {
267 default: break;
268 case 'i': // 1 string to match.
269 return 26; // "edi"
270 case 'x': // 1 string to match.
271 return 27; // "edx"
272 }
273 break;
274 case 'i': // 2 strings to match.
275 switch (Name[2]) {
276 default: break;
277 case 'p': // 1 string to match.
278 return 29; // "eip"
279 case 'z': // 1 string to match.
280 return 30; // "eiz"
281 }
282 break;
283 case 's': // 2 strings to match.
284 switch (Name[2]) {
285 default: break;
286 case 'i': // 1 string to match.
287 return 32; // "esi"
288 case 'p': // 1 string to match.
289 return 33; // "esp"
290 }
291 break;
292 }
293 break;
294 case 'f': // 8 strings to match.
295 if (Name[1] != 'p')
296 break;
297 switch (Name[2]) {
298 default: break;
299 case '0': // 1 string to match.
300 return 104; // "fp0"
301 case '1': // 1 string to match.
302 return 105; // "fp1"
303 case '2': // 1 string to match.
304 return 106; // "fp2"
305 case '3': // 1 string to match.
306 return 107; // "fp3"
307 case '4': // 1 string to match.
308 return 108; // "fp4"
309 case '5': // 1 string to match.
310 return 109; // "fp5"
311 case '6': // 1 string to match.
312 return 110; // "fp6"
313 case '7': // 1 string to match.
314 return 111; // "fp7"
315 }
316 break;
317 case 'm': // 8 strings to match.
318 if (Name[1] != 'm')
319 break;
320 switch (Name[2]) {
321 default: break;
322 case '0': // 1 string to match.
323 return 120; // "mm0"
324 case '1': // 1 string to match.
325 return 121; // "mm1"
326 case '2': // 1 string to match.
327 return 122; // "mm2"
328 case '3': // 1 string to match.
329 return 123; // "mm3"
330 case '4': // 1 string to match.
331 return 124; // "mm4"
332 case '5': // 1 string to match.
333 return 125; // "mm5"
334 case '6': // 1 string to match.
335 return 126; // "mm6"
336 case '7': // 1 string to match.
337 return 127; // "mm7"
338 }
339 break;
340 case 'r': // 22 strings to match.
341 switch (Name[1]) {
342 default: break;
343 case '1': // 6 strings to match.
344 switch (Name[2]) {
345 default: break;
346 case '0': // 1 string to match.
347 return 130; // "r10"
348 case '1': // 1 string to match.
349 return 131; // "r11"
350 case '2': // 1 string to match.
351 return 132; // "r12"
352 case '3': // 1 string to match.
353 return 133; // "r13"
354 case '4': // 1 string to match.
355 return 134; // "r14"
356 case '5': // 1 string to match.
357 return 135; // "r15"
358 }
359 break;
360 case '8': // 3 strings to match.
361 switch (Name[2]) {
362 default: break;
363 case 'b': // 1 string to match.
364 return 248; // "r8b"
365 case 'd': // 1 string to match.
366 return 264; // "r8d"
367 case 'w': // 1 string to match.
368 return 272; // "r8w"
369 }
370 break;
371 case '9': // 3 strings to match.
372 switch (Name[2]) {
373 default: break;
374 case 'b': // 1 string to match.
375 return 249; // "r9b"
376 case 'd': // 1 string to match.
377 return 265; // "r9d"
378 case 'w': // 1 string to match.
379 return 273; // "r9w"
380 }
381 break;
382 case 'a': // 1 string to match.
383 if (Name[2] != 'x')
384 break;
385 return 49; // "rax"
386 case 'b': // 2 strings to match.
387 switch (Name[2]) {
388 default: break;
389 case 'p': // 1 string to match.
390 return 50; // "rbp"
391 case 'x': // 1 string to match.
392 return 51; // "rbx"
393 }
394 break;
395 case 'c': // 1 string to match.
396 if (Name[2] != 'x')
397 break;
398 return 52; // "rcx"
399 case 'd': // 2 strings to match.
400 switch (Name[2]) {
401 default: break;
402 case 'i': // 1 string to match.
403 return 53; // "rdi"
404 case 'x': // 1 string to match.
405 return 54; // "rdx"
406 }
407 break;
408 case 'i': // 2 strings to match.
409 switch (Name[2]) {
410 default: break;
411 case 'p': // 1 string to match.
412 return 55; // "rip"
413 case 'z': // 1 string to match.
414 return 56; // "riz"
415 }
416 break;
417 case 's': // 2 strings to match.
418 switch (Name[2]) {
419 default: break;
420 case 'i': // 1 string to match.
421 return 57; // "rsi"
422 case 'p': // 1 string to match.
423 return 58; // "rsp"
424 }
425 break;
426 }
427 break;
428 case 's': // 3 strings to match.
429 switch (Name[1]) {
430 default: break;
431 case 'i': // 1 string to match.
432 if (Name[2] != 'l')
433 break;
434 return 61; // "sil"
435 case 'p': // 1 string to match.
436 if (Name[2] != 'l')
437 break;
438 return 64; // "spl"
439 case 's': // 1 string to match.
440 if (Name[2] != 'p')
441 break;
442 return 66; // "ssp"
443 }
444 break;
445 }
446 break;
447 case 4: // 74 strings to match.
448 switch (Name[0]) {
449 default: break;
450 case 'b': // 4 strings to match.
451 if (memcmp(Name.data()+1, "nd", 2) != 0)
452 break;
453 switch (Name[3]) {
454 default: break;
455 case '0': // 1 string to match.
456 return 68; // "bnd0"
457 case '1': // 1 string to match.
458 return 69; // "bnd1"
459 case '2': // 1 string to match.
460 return 70; // "bnd2"
461 case '3': // 1 string to match.
462 return 71; // "bnd3"
463 }
464 break;
465 case 'c': // 6 strings to match.
466 if (memcmp(Name.data()+1, "r1", 2) != 0)
467 break;
468 switch (Name[3]) {
469 default: break;
470 case '0': // 1 string to match.
471 return 82; // "cr10"
472 case '1': // 1 string to match.
473 return 83; // "cr11"
474 case '2': // 1 string to match.
475 return 84; // "cr12"
476 case '3': // 1 string to match.
477 return 85; // "cr13"
478 case '4': // 1 string to match.
479 return 86; // "cr14"
480 case '5': // 1 string to match.
481 return 87; // "cr15"
482 }
483 break;
484 case 'd': // 6 strings to match.
485 if (memcmp(Name.data()+1, "r1", 2) != 0)
486 break;
487 switch (Name[3]) {
488 default: break;
489 case '0': // 1 string to match.
490 return 98; // "dr10"
491 case '1': // 1 string to match.
492 return 99; // "dr11"
493 case '2': // 1 string to match.
494 return 100; // "dr12"
495 case '3': // 1 string to match.
496 return 101; // "dr13"
497 case '4': // 1 string to match.
498 return 102; // "dr14"
499 case '5': // 1 string to match.
500 return 103; // "dr15"
501 }
502 break;
503 case 'f': // 2 strings to match.
504 if (Name[1] != 'p')
505 break;
506 switch (Name[2]) {
507 default: break;
508 case 'c': // 1 string to match.
509 if (Name[3] != 'r')
510 break;
511 return 34; // "fpcr"
512 case 's': // 1 string to match.
513 if (Name[3] != 'r')
514 break;
515 return 35; // "fpsr"
516 }
517 break;
518 case 'r': // 18 strings to match.
519 if (Name[1] != '1')
520 break;
521 switch (Name[2]) {
522 default: break;
523 case '0': // 3 strings to match.
524 switch (Name[3]) {
525 default: break;
526 case 'b': // 1 string to match.
527 return 250; // "r10b"
528 case 'd': // 1 string to match.
529 return 266; // "r10d"
530 case 'w': // 1 string to match.
531 return 274; // "r10w"
532 }
533 break;
534 case '1': // 3 strings to match.
535 switch (Name[3]) {
536 default: break;
537 case 'b': // 1 string to match.
538 return 251; // "r11b"
539 case 'd': // 1 string to match.
540 return 267; // "r11d"
541 case 'w': // 1 string to match.
542 return 275; // "r11w"
543 }
544 break;
545 case '2': // 3 strings to match.
546 switch (Name[3]) {
547 default: break;
548 case 'b': // 1 string to match.
549 return 252; // "r12b"
550 case 'd': // 1 string to match.
551 return 268; // "r12d"
552 case 'w': // 1 string to match.
553 return 276; // "r12w"
554 }
555 break;
556 case '3': // 3 strings to match.
557 switch (Name[3]) {
558 default: break;
559 case 'b': // 1 string to match.
560 return 253; // "r13b"
561 case 'd': // 1 string to match.
562 return 269; // "r13d"
563 case 'w': // 1 string to match.
564 return 277; // "r13w"
565 }
566 break;
567 case '4': // 3 strings to match.
568 switch (Name[3]) {
569 default: break;
570 case 'b': // 1 string to match.
571 return 254; // "r14b"
572 case 'd': // 1 string to match.
573 return 270; // "r14d"
574 case 'w': // 1 string to match.
575 return 278; // "r14w"
576 }
577 break;
578 case '5': // 3 strings to match.
579 switch (Name[3]) {
580 default: break;
581 case 'b': // 1 string to match.
582 return 255; // "r15b"
583 case 'd': // 1 string to match.
584 return 271; // "r15d"
585 case 'w': // 1 string to match.
586 return 279; // "r15w"
587 }
588 break;
589 }
590 break;
591 case 't': // 8 strings to match.
592 if (memcmp(Name.data()+1, "mm", 2) != 0)
593 break;
594 switch (Name[3]) {
595 default: break;
596 case '0': // 1 string to match.
597 return 144; // "tmm0"
598 case '1': // 1 string to match.
599 return 145; // "tmm1"
600 case '2': // 1 string to match.
601 return 146; // "tmm2"
602 case '3': // 1 string to match.
603 return 147; // "tmm3"
604 case '4': // 1 string to match.
605 return 148; // "tmm4"
606 case '5': // 1 string to match.
607 return 149; // "tmm5"
608 case '6': // 1 string to match.
609 return 150; // "tmm6"
610 case '7': // 1 string to match.
611 return 151; // "tmm7"
612 }
613 break;
614 case 'x': // 10 strings to match.
615 if (memcmp(Name.data()+1, "mm", 2) != 0)
616 break;
617 switch (Name[3]) {
618 default: break;
619 case '0': // 1 string to match.
620 return 152; // "xmm0"
621 case '1': // 1 string to match.
622 return 153; // "xmm1"
623 case '2': // 1 string to match.
624 return 154; // "xmm2"
625 case '3': // 1 string to match.
626 return 155; // "xmm3"
627 case '4': // 1 string to match.
628 return 156; // "xmm4"
629 case '5': // 1 string to match.
630 return 157; // "xmm5"
631 case '6': // 1 string to match.
632 return 158; // "xmm6"
633 case '7': // 1 string to match.
634 return 159; // "xmm7"
635 case '8': // 1 string to match.
636 return 160; // "xmm8"
637 case '9': // 1 string to match.
638 return 161; // "xmm9"
639 }
640 break;
641 case 'y': // 10 strings to match.
642 if (memcmp(Name.data()+1, "mm", 2) != 0)
643 break;
644 switch (Name[3]) {
645 default: break;
646 case '0': // 1 string to match.
647 return 184; // "ymm0"
648 case '1': // 1 string to match.
649 return 185; // "ymm1"
650 case '2': // 1 string to match.
651 return 186; // "ymm2"
652 case '3': // 1 string to match.
653 return 187; // "ymm3"
654 case '4': // 1 string to match.
655 return 188; // "ymm4"
656 case '5': // 1 string to match.
657 return 189; // "ymm5"
658 case '6': // 1 string to match.
659 return 190; // "ymm6"
660 case '7': // 1 string to match.
661 return 191; // "ymm7"
662 case '8': // 1 string to match.
663 return 192; // "ymm8"
664 case '9': // 1 string to match.
665 return 193; // "ymm9"
666 }
667 break;
668 case 'z': // 10 strings to match.
669 if (memcmp(Name.data()+1, "mm", 2) != 0)
670 break;
671 switch (Name[3]) {
672 default: break;
673 case '0': // 1 string to match.
674 return 216; // "zmm0"
675 case '1': // 1 string to match.
676 return 217; // "zmm1"
677 case '2': // 1 string to match.
678 return 218; // "zmm2"
679 case '3': // 1 string to match.
680 return 219; // "zmm3"
681 case '4': // 1 string to match.
682 return 220; // "zmm4"
683 case '5': // 1 string to match.
684 return 221; // "zmm5"
685 case '6': // 1 string to match.
686 return 222; // "zmm6"
687 case '7': // 1 string to match.
688 return 223; // "zmm7"
689 case '8': // 1 string to match.
690 return 224; // "zmm8"
691 case '9': // 1 string to match.
692 return 225; // "zmm9"
693 }
694 break;
695 }
696 break;
697 case 5: // 75 strings to match.
698 switch (Name[0]) {
699 default: break;
700 case 'f': // 1 string to match.
701 if (memcmp(Name.data()+1, "lags", 4) != 0)
702 break;
703 return 28; // "flags"
704 case 'm': // 1 string to match.
705 if (memcmp(Name.data()+1, "xcsr", 4) != 0)
706 break;
707 return 48; // "mxcsr"
708 case 's': // 7 strings to match.
709 if (memcmp(Name.data()+1, "t(", 2) != 0)
710 break;
711 switch (Name[3]) {
712 default: break;
713 case '1': // 1 string to match.
714 if (Name[4] != ')')
715 break;
716 return 137; // "st(1)"
717 case '2': // 1 string to match.
718 if (Name[4] != ')')
719 break;
720 return 138; // "st(2)"
721 case '3': // 1 string to match.
722 if (Name[4] != ')')
723 break;
724 return 139; // "st(3)"
725 case '4': // 1 string to match.
726 if (Name[4] != ')')
727 break;
728 return 140; // "st(4)"
729 case '5': // 1 string to match.
730 if (Name[4] != ')')
731 break;
732 return 141; // "st(5)"
733 case '6': // 1 string to match.
734 if (Name[4] != ')')
735 break;
736 return 142; // "st(6)"
737 case '7': // 1 string to match.
738 if (Name[4] != ')')
739 break;
740 return 143; // "st(7)"
741 }
742 break;
743 case 'x': // 22 strings to match.
744 if (memcmp(Name.data()+1, "mm", 2) != 0)
745 break;
746 switch (Name[3]) {
747 default: break;
748 case '1': // 10 strings to match.
749 switch (Name[4]) {
750 default: break;
751 case '0': // 1 string to match.
752 return 162; // "xmm10"
753 case '1': // 1 string to match.
754 return 163; // "xmm11"
755 case '2': // 1 string to match.
756 return 164; // "xmm12"
757 case '3': // 1 string to match.
758 return 165; // "xmm13"
759 case '4': // 1 string to match.
760 return 166; // "xmm14"
761 case '5': // 1 string to match.
762 return 167; // "xmm15"
763 case '6': // 1 string to match.
764 return 168; // "xmm16"
765 case '7': // 1 string to match.
766 return 169; // "xmm17"
767 case '8': // 1 string to match.
768 return 170; // "xmm18"
769 case '9': // 1 string to match.
770 return 171; // "xmm19"
771 }
772 break;
773 case '2': // 10 strings to match.
774 switch (Name[4]) {
775 default: break;
776 case '0': // 1 string to match.
777 return 172; // "xmm20"
778 case '1': // 1 string to match.
779 return 173; // "xmm21"
780 case '2': // 1 string to match.
781 return 174; // "xmm22"
782 case '3': // 1 string to match.
783 return 175; // "xmm23"
784 case '4': // 1 string to match.
785 return 176; // "xmm24"
786 case '5': // 1 string to match.
787 return 177; // "xmm25"
788 case '6': // 1 string to match.
789 return 178; // "xmm26"
790 case '7': // 1 string to match.
791 return 179; // "xmm27"
792 case '8': // 1 string to match.
793 return 180; // "xmm28"
794 case '9': // 1 string to match.
795 return 181; // "xmm29"
796 }
797 break;
798 case '3': // 2 strings to match.
799 switch (Name[4]) {
800 default: break;
801 case '0': // 1 string to match.
802 return 182; // "xmm30"
803 case '1': // 1 string to match.
804 return 183; // "xmm31"
805 }
806 break;
807 }
808 break;
809 case 'y': // 22 strings to match.
810 if (memcmp(Name.data()+1, "mm", 2) != 0)
811 break;
812 switch (Name[3]) {
813 default: break;
814 case '1': // 10 strings to match.
815 switch (Name[4]) {
816 default: break;
817 case '0': // 1 string to match.
818 return 194; // "ymm10"
819 case '1': // 1 string to match.
820 return 195; // "ymm11"
821 case '2': // 1 string to match.
822 return 196; // "ymm12"
823 case '3': // 1 string to match.
824 return 197; // "ymm13"
825 case '4': // 1 string to match.
826 return 198; // "ymm14"
827 case '5': // 1 string to match.
828 return 199; // "ymm15"
829 case '6': // 1 string to match.
830 return 200; // "ymm16"
831 case '7': // 1 string to match.
832 return 201; // "ymm17"
833 case '8': // 1 string to match.
834 return 202; // "ymm18"
835 case '9': // 1 string to match.
836 return 203; // "ymm19"
837 }
838 break;
839 case '2': // 10 strings to match.
840 switch (Name[4]) {
841 default: break;
842 case '0': // 1 string to match.
843 return 204; // "ymm20"
844 case '1': // 1 string to match.
845 return 205; // "ymm21"
846 case '2': // 1 string to match.
847 return 206; // "ymm22"
848 case '3': // 1 string to match.
849 return 207; // "ymm23"
850 case '4': // 1 string to match.
851 return 208; // "ymm24"
852 case '5': // 1 string to match.
853 return 209; // "ymm25"
854 case '6': // 1 string to match.
855 return 210; // "ymm26"
856 case '7': // 1 string to match.
857 return 211; // "ymm27"
858 case '8': // 1 string to match.
859 return 212; // "ymm28"
860 case '9': // 1 string to match.
861 return 213; // "ymm29"
862 }
863 break;
864 case '3': // 2 strings to match.
865 switch (Name[4]) {
866 default: break;
867 case '0': // 1 string to match.
868 return 214; // "ymm30"
869 case '1': // 1 string to match.
870 return 215; // "ymm31"
871 }
872 break;
873 }
874 break;
875 case 'z': // 22 strings to match.
876 if (memcmp(Name.data()+1, "mm", 2) != 0)
877 break;
878 switch (Name[3]) {
879 default: break;
880 case '1': // 10 strings to match.
881 switch (Name[4]) {
882 default: break;
883 case '0': // 1 string to match.
884 return 226; // "zmm10"
885 case '1': // 1 string to match.
886 return 227; // "zmm11"
887 case '2': // 1 string to match.
888 return 228; // "zmm12"
889 case '3': // 1 string to match.
890 return 229; // "zmm13"
891 case '4': // 1 string to match.
892 return 230; // "zmm14"
893 case '5': // 1 string to match.
894 return 231; // "zmm15"
895 case '6': // 1 string to match.
896 return 232; // "zmm16"
897 case '7': // 1 string to match.
898 return 233; // "zmm17"
899 case '8': // 1 string to match.
900 return 234; // "zmm18"
901 case '9': // 1 string to match.
902 return 235; // "zmm19"
903 }
904 break;
905 case '2': // 10 strings to match.
906 switch (Name[4]) {
907 default: break;
908 case '0': // 1 string to match.
909 return 236; // "zmm20"
910 case '1': // 1 string to match.
911 return 237; // "zmm21"
912 case '2': // 1 string to match.
913 return 238; // "zmm22"
914 case '3': // 1 string to match.
915 return 239; // "zmm23"
916 case '4': // 1 string to match.
917 return 240; // "zmm24"
918 case '5': // 1 string to match.
919 return 241; // "zmm25"
920 case '6': // 1 string to match.
921 return 242; // "zmm26"
922 case '7': // 1 string to match.
923 return 243; // "zmm27"
924 case '8': // 1 string to match.
925 return 244; // "zmm28"
926 case '9': // 1 string to match.
927 return 245; // "zmm29"
928 }
929 break;
930 case '3': // 2 strings to match.
931 switch (Name[4]) {
932 default: break;
933 case '0': // 1 string to match.
934 return 246; // "zmm30"
935 case '1': // 1 string to match.
936 return 247; // "zmm31"
937 }
938 break;
939 }
940 break;
941 }
942 break;
943 case 6: // 1 string to match.
944 if (memcmp(Name.data()+0, "tmmcfg", 6) != 0)
945 break;
946 return 67; // "tmmcfg"
947 case 7: // 1 string to match.
948 if (memcmp(Name.data()+0, "dirflag", 7) != 0)
949 break;
950 return 14; // "dirflag"
951 }
952 return 0;
953}
954
955#endif // GET_REGISTER_MATCHER
956
957
958#ifdef GET_SUBTARGET_FEATURE_NAME
959#undef GET_SUBTARGET_FEATURE_NAME
960
961// User-level names for subtarget features that participate in
962// instruction matching.
963static const char *getSubtargetFeatureName(uint64_t Val) {
964 switch(Val) {
965 case Feature_Not64BitModeBit: return "Not 64-bit mode";
966 case Feature_In64BitModeBit: return "64-bit mode";
967 case Feature_In16BitModeBit: return "16-bit mode";
968 case Feature_Not16BitModeBit: return "Not 16-bit mode";
969 case Feature_In32BitModeBit: return "32-bit mode";
970 default: return "(unknown)";
971 }
972}
973
974#endif // GET_SUBTARGET_FEATURE_NAME
975
976
977#ifdef GET_MATCHER_IMPLEMENTATION
978#undef GET_MATCHER_IMPLEMENTATION
979
980static void applyMnemonicAliases(StringRef &Mnemonic, const FeatureBitset &Features, unsigned VariantID) {
981 switch (VariantID) {
982 case 0:
983 switch (Mnemonic.size()) {
984 default: break;
985 case 3: // 6 strings to match.
986 switch (Mnemonic[0]) {
987 default: break;
988 case 'c': // 4 strings to match.
989 switch (Mnemonic[1]) {
990 default: break;
991 case 'b': // 1 string to match.
992 if (Mnemonic[2] != 'w')
993 break;
994 Mnemonic = "cbtw"; // "cbw"
995 return;
996 case 'd': // 1 string to match.
997 if (Mnemonic[2] != 'q')
998 break;
999 Mnemonic = "cltd"; // "cdq"
1000 return;
1001 case 'q': // 1 string to match.
1002 if (Mnemonic[2] != 'o')
1003 break;
1004 Mnemonic = "cqto"; // "cqo"
1005 return;
1006 case 'w': // 1 string to match.
1007 if (Mnemonic[2] != 'd')
1008 break;
1009 Mnemonic = "cwtd"; // "cwd"
1010 return;
1011 }
1012 break;
1013 case 'p': // 1 string to match.
1014 if (memcmp(Mnemonic.data()+1, "op", 2) != 0)
1015 break;
1016 if (Features.test(Feature_In16BitModeBit)) // "pop"
1017 Mnemonic = "popw";
1018 else if (Features.test(Feature_In32BitModeBit))
1019 Mnemonic = "popl";
1020 else if (Features.test(Feature_In64BitModeBit))
1021 Mnemonic = "popq";
1022 return;
1023 case 'r': // 1 string to match.
1024 if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
1025 break;
1026 if (Features.test(Feature_In16BitModeBit)) // "ret"
1027 Mnemonic = "retw";
1028 else if (Features.test(Feature_In32BitModeBit))
1029 Mnemonic = "retl";
1030 else if (Features.test(Feature_In64BitModeBit))
1031 Mnemonic = "retq";
1032 return;
1033 }
1034 break;
1035 case 4: // 18 strings to match.
1036 switch (Mnemonic[0]) {
1037 default: break;
1038 case 'c': // 3 strings to match.
1039 switch (Mnemonic[1]) {
1040 default: break;
1041 case 'a': // 1 string to match.
1042 if (memcmp(Mnemonic.data()+2, "ll", 2) != 0)
1043 break;
1044 if (Features.test(Feature_In16BitModeBit)) // "call"
1045 Mnemonic = "callw";
1046 else if (Features.test(Feature_In32BitModeBit))
1047 Mnemonic = "calll";
1048 else if (Features.test(Feature_In64BitModeBit))
1049 Mnemonic = "callq";
1050 return;
1051 case 'd': // 1 string to match.
1052 if (memcmp(Mnemonic.data()+2, "qe", 2) != 0)
1053 break;
1054 Mnemonic = "cltq"; // "cdqe"
1055 return;
1056 case 'w': // 1 string to match.
1057 if (memcmp(Mnemonic.data()+2, "de", 2) != 0)
1058 break;
1059 Mnemonic = "cwtl"; // "cwde"
1060 return;
1061 }
1062 break;
1063 case 'i': // 1 string to match.
1064 if (memcmp(Mnemonic.data()+1, "ret", 3) != 0)
1065 break;
1066 if (Features.test(Feature_In16BitModeBit)) // "iret"
1067 Mnemonic = "iretw";
1068 else if (Features.test(Feature_Not16BitModeBit))
1069 Mnemonic = "iretl";
1070 return;
1071 case 'l': // 3 strings to match.
1072 switch (Mnemonic[1]) {
1073 default: break;
1074 case 'g': // 1 string to match.
1075 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1076 break;
1077 if (Features.test(Feature_In16BitModeBit)) // "lgdt"
1078 Mnemonic = "lgdtw";
1079 else if (Features.test(Feature_In32BitModeBit))
1080 Mnemonic = "lgdtl";
1081 else if (Features.test(Feature_In64BitModeBit))
1082 Mnemonic = "lgdtq";
1083 return;
1084 case 'i': // 1 string to match.
1085 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1086 break;
1087 if (Features.test(Feature_In16BitModeBit)) // "lidt"
1088 Mnemonic = "lidtw";
1089 else if (Features.test(Feature_In32BitModeBit))
1090 Mnemonic = "lidtl";
1091 else if (Features.test(Feature_In64BitModeBit))
1092 Mnemonic = "lidtq";
1093 return;
1094 case 'r': // 1 string to match.
1095 if (memcmp(Mnemonic.data()+2, "et", 2) != 0)
1096 break;
1097 if (Features.test(Feature_In16BitModeBit)) // "lret"
1098 Mnemonic = "lretw";
1099 else if (Features.test(Feature_Not16BitModeBit))
1100 Mnemonic = "lretl";
1101 return;
1102 }
1103 break;
1104 case 'p': // 3 strings to match.
1105 switch (Mnemonic[1]) {
1106 default: break;
1107 case 'o': // 2 strings to match.
1108 if (Mnemonic[2] != 'p')
1109 break;
1110 switch (Mnemonic[3]) {
1111 default: break;
1112 case 'a': // 1 string to match.
1113 if (Features.test(Feature_In16BitModeBit)) // "popa"
1114 Mnemonic = "popaw";
1115 else if (Features.test(Feature_In32BitModeBit))
1116 Mnemonic = "popal";
1117 return;
1118 case 'f': // 1 string to match.
1119 if (Features.test(Feature_In16BitModeBit)) // "popf"
1120 Mnemonic = "popfw";
1121 else if (Features.test(Feature_In32BitModeBit))
1122 Mnemonic = "popfl";
1123 else if (Features.test(Feature_In64BitModeBit))
1124 Mnemonic = "popfq";
1125 return;
1126 }
1127 break;
1128 case 'u': // 1 string to match.
1129 if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
1130 break;
1131 if (Features.test(Feature_In16BitModeBit)) // "push"
1132 Mnemonic = "pushw";
1133 else if (Features.test(Feature_In32BitModeBit))
1134 Mnemonic = "pushl";
1135 else if (Features.test(Feature_In64BitModeBit))
1136 Mnemonic = "pushq";
1137 return;
1138 }
1139 break;
1140 case 'r': // 1 string to match.
1141 if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
1142 break;
1143 if (Features.test(Feature_In16BitModeBit)) // "retn"
1144 Mnemonic = "retw";
1145 else if (Features.test(Feature_In32BitModeBit))
1146 Mnemonic = "retl";
1147 else if (Features.test(Feature_In64BitModeBit))
1148 Mnemonic = "retq";
1149 return;
1150 case 's': // 6 strings to match.
1151 switch (Mnemonic[1]) {
1152 default: break;
1153 case 'a': // 4 strings to match.
1154 if (Mnemonic[2] != 'l')
1155 break;
1156 switch (Mnemonic[3]) {
1157 default: break;
1158 case 'b': // 1 string to match.
1159 Mnemonic = "shlb"; // "salb"
1160 return;
1161 case 'l': // 1 string to match.
1162 Mnemonic = "shll"; // "sall"
1163 return;
1164 case 'q': // 1 string to match.
1165 Mnemonic = "shlq"; // "salq"
1166 return;
1167 case 'w': // 1 string to match.
1168 Mnemonic = "shlw"; // "salw"
1169 return;
1170 }
1171 break;
1172 case 'g': // 1 string to match.
1173 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1174 break;
1175 if (Features.test(Feature_In16BitModeBit)) // "sgdt"
1176 Mnemonic = "sgdtw";
1177 else if (Features.test(Feature_In32BitModeBit))
1178 Mnemonic = "sgdtl";
1179 else if (Features.test(Feature_In64BitModeBit))
1180 Mnemonic = "sgdtq";
1181 return;
1182 case 'i': // 1 string to match.
1183 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1184 break;
1185 if (Features.test(Feature_In16BitModeBit)) // "sidt"
1186 Mnemonic = "sidtw";
1187 else if (Features.test(Feature_In32BitModeBit))
1188 Mnemonic = "sidtl";
1189 else if (Features.test(Feature_In64BitModeBit))
1190 Mnemonic = "sidtq";
1191 return;
1192 }
1193 break;
1194 case 'u': // 1 string to match.
1195 if (memcmp(Mnemonic.data()+1, "d2a", 3) != 0)
1196 break;
1197 Mnemonic = "ud2"; // "ud2a"
1198 return;
1199 }
1200 break;
1201 case 5: // 12 strings to match.
1202 switch (Mnemonic[0]) {
1203 default: break;
1204 case 'f': // 1 string to match.
1205 if (memcmp(Mnemonic.data()+1, "ildq", 4) != 0)
1206 break;
1207 Mnemonic = "fildll"; // "fildq"
1208 return;
1209 case 'p': // 3 strings to match.
1210 switch (Mnemonic[1]) {
1211 default: break;
1212 case 'o': // 1 string to match.
1213 if (memcmp(Mnemonic.data()+2, "pfd", 3) != 0)
1214 break;
1215 Mnemonic = "popfl"; // "popfd"
1216 return;
1217 case 'u': // 2 strings to match.
1218 if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
1219 break;
1220 switch (Mnemonic[4]) {
1221 default: break;
1222 case 'a': // 1 string to match.
1223 if (Features.test(Feature_In16BitModeBit)) // "pusha"
1224 Mnemonic = "pushaw";
1225 else if (Features.test(Feature_In32BitModeBit))
1226 Mnemonic = "pushal";
1227 return;
1228 case 'f': // 1 string to match.
1229 if (Features.test(Feature_In16BitModeBit)) // "pushf"
1230 Mnemonic = "pushfw";
1231 else if (Features.test(Feature_In32BitModeBit))
1232 Mnemonic = "pushfl";
1233 else if (Features.test(Feature_In64BitModeBit))
1234 Mnemonic = "pushfq";
1235 return;
1236 }
1237 break;
1238 }
1239 break;
1240 case 's': // 4 strings to match.
1241 if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1242 break;
1243 switch (Mnemonic[4]) {
1244 default: break;
1245 case 'b': // 1 string to match.
1246 Mnemonic = "movsb"; // "smovb"
1247 return;
1248 case 'l': // 1 string to match.
1249 Mnemonic = "movsl"; // "smovl"
1250 return;
1251 case 'q': // 1 string to match.
1252 Mnemonic = "movsq"; // "smovq"
1253 return;
1254 case 'w': // 1 string to match.
1255 Mnemonic = "movsw"; // "smovw"
1256 return;
1257 }
1258 break;
1259 case 'u': // 3 strings to match.
1260 if (memcmp(Mnemonic.data()+1, "d2b", 3) != 0)
1261 break;
1262 switch (Mnemonic[4]) {
1263 default: break;
1264 case 'l': // 1 string to match.
1265 Mnemonic = "ud1l"; // "ud2bl"
1266 return;
1267 case 'q': // 1 string to match.
1268 Mnemonic = "ud1q"; // "ud2bq"
1269 return;
1270 case 'w': // 1 string to match.
1271 Mnemonic = "ud1w"; // "ud2bw"
1272 return;
1273 }
1274 break;
1275 case 'v': // 1 string to match.
1276 if (memcmp(Mnemonic.data()+1, "errw", 4) != 0)
1277 break;
1278 Mnemonic = "verr"; // "verrw"
1279 return;
1280 }
1281 break;
1282 case 6: // 15 strings to match.
1283 switch (Mnemonic[0]) {
1284 default: break;
1285 case 'c': // 6 strings to match.
1286 if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1287 break;
1288 switch (Mnemonic[4]) {
1289 default: break;
1290 case 'c': // 3 strings to match.
1291 switch (Mnemonic[5]) {
1292 default: break;
1293 case 'l': // 1 string to match.
1294 Mnemonic = "cmovbl"; // "cmovcl"
1295 return;
1296 case 'q': // 1 string to match.
1297 Mnemonic = "cmovbq"; // "cmovcq"
1298 return;
1299 case 'w': // 1 string to match.
1300 Mnemonic = "cmovbw"; // "cmovcw"
1301 return;
1302 }
1303 break;
1304 case 'z': // 3 strings to match.
1305 switch (Mnemonic[5]) {
1306 default: break;
1307 case 'l': // 1 string to match.
1308 Mnemonic = "cmovel"; // "cmovzl"
1309 return;
1310 case 'q': // 1 string to match.
1311 Mnemonic = "cmoveq"; // "cmovzq"
1312 return;
1313 case 'w': // 1 string to match.
1314 Mnemonic = "cmovew"; // "cmovzw"
1315 return;
1316 }
1317 break;
1318 }
1319 break;
1320 case 'f': // 4 strings to match.
1321 switch (Mnemonic[1]) {
1322 default: break;
1323 case 'c': // 2 strings to match.
1324 if (memcmp(Mnemonic.data()+2, "mov", 3) != 0)
1325 break;
1326 switch (Mnemonic[5]) {
1327 default: break;
1328 case 'a': // 1 string to match.
1329 Mnemonic = "fcmovnbe"; // "fcmova"
1330 return;
1331 case 'z': // 1 string to match.
1332 Mnemonic = "fcmove"; // "fcmovz"
1333 return;
1334 }
1335 break;
1336 case 'i': // 1 string to match.
1337 if (memcmp(Mnemonic.data()+2, "stpq", 4) != 0)
1338 break;
1339 Mnemonic = "fistpll"; // "fistpq"
1340 return;
1341 case 'l': // 1 string to match.
1342 if (memcmp(Mnemonic.data()+2, "dcww", 4) != 0)
1343 break;
1344 Mnemonic = "fldcw"; // "fldcww"
1345 return;
1346 }
1347 break;
1348 case 'l': // 2 strings to match.
1349 if (memcmp(Mnemonic.data()+1, "eave", 4) != 0)
1350 break;
1351 switch (Mnemonic[5]) {
1352 default: break;
1353 case 'l': // 1 string to match.
1354 if (Features.test(Feature_Not64BitModeBit)) // "leavel"
1355 Mnemonic = "leave";
1356 return;
1357 case 'q': // 1 string to match.
1358 if (Features.test(Feature_In64BitModeBit)) // "leaveq"
1359 Mnemonic = "leave";
1360 return;
1361 }
1362 break;
1363 case 'p': // 1 string to match.
1364 if (memcmp(Mnemonic.data()+1, "ushfd", 5) != 0)
1365 break;
1366 Mnemonic = "pushfl"; // "pushfd"
1367 return;
1368 case 's': // 1 string to match.
1369 if (memcmp(Mnemonic.data()+1, "ysret", 5) != 0)
1370 break;
1371 Mnemonic = "sysretl"; // "sysret"
1372 return;
1373 case 'x': // 1 string to match.
1374 if (memcmp(Mnemonic.data()+1, "saveq", 5) != 0)
1375 break;
1376 Mnemonic = "xsave64"; // "xsaveq"
1377 return;
1378 }
1379 break;
1380 case 7: // 34 strings to match.
1381 switch (Mnemonic[0]) {
1382 default: break;
1383 case 'c': // 24 strings to match.
1384 if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1385 break;
1386 switch (Mnemonic[4]) {
1387 default: break;
1388 case 'n': // 18 strings to match.
1389 switch (Mnemonic[5]) {
1390 default: break;
1391 case 'a': // 3 strings to match.
1392 switch (Mnemonic[6]) {
1393 default: break;
1394 case 'l': // 1 string to match.
1395 Mnemonic = "cmovbel"; // "cmovnal"
1396 return;
1397 case 'q': // 1 string to match.
1398 Mnemonic = "cmovbeq"; // "cmovnaq"
1399 return;
1400 case 'w': // 1 string to match.
1401 Mnemonic = "cmovbew"; // "cmovnaw"
1402 return;
1403 }
1404 break;
1405 case 'b': // 3 strings to match.
1406 switch (Mnemonic[6]) {
1407 default: break;
1408 case 'l': // 1 string to match.
1409 Mnemonic = "cmovael"; // "cmovnbl"
1410 return;
1411 case 'q': // 1 string to match.
1412 Mnemonic = "cmovaeq"; // "cmovnbq"
1413 return;
1414 case 'w': // 1 string to match.
1415 Mnemonic = "cmovaew"; // "cmovnbw"
1416 return;
1417 }
1418 break;
1419 case 'c': // 3 strings to match.
1420 switch (Mnemonic[6]) {
1421 default: break;
1422 case 'l': // 1 string to match.
1423 Mnemonic = "cmovael"; // "cmovncl"
1424 return;
1425 case 'q': // 1 string to match.
1426 Mnemonic = "cmovaeq"; // "cmovncq"
1427 return;
1428 case 'w': // 1 string to match.
1429 Mnemonic = "cmovaew"; // "cmovncw"
1430 return;
1431 }
1432 break;
1433 case 'g': // 3 strings to match.
1434 switch (Mnemonic[6]) {
1435 default: break;
1436 case 'l': // 1 string to match.
1437 Mnemonic = "cmovlel"; // "cmovngl"
1438 return;
1439 case 'q': // 1 string to match.
1440 Mnemonic = "cmovleq"; // "cmovngq"
1441 return;
1442 case 'w': // 1 string to match.
1443 Mnemonic = "cmovlew"; // "cmovngw"
1444 return;
1445 }
1446 break;
1447 case 'l': // 3 strings to match.
1448 switch (Mnemonic[6]) {
1449 default: break;
1450 case 'l': // 1 string to match.
1451 Mnemonic = "cmovgel"; // "cmovnll"
1452 return;
1453 case 'q': // 1 string to match.
1454 Mnemonic = "cmovgeq"; // "cmovnlq"
1455 return;
1456 case 'w': // 1 string to match.
1457 Mnemonic = "cmovgew"; // "cmovnlw"
1458 return;
1459 }
1460 break;
1461 case 'z': // 3 strings to match.
1462 switch (Mnemonic[6]) {
1463 default: break;
1464 case 'l': // 1 string to match.
1465 Mnemonic = "cmovnel"; // "cmovnzl"
1466 return;
1467 case 'q': // 1 string to match.
1468 Mnemonic = "cmovneq"; // "cmovnzq"
1469 return;
1470 case 'w': // 1 string to match.
1471 Mnemonic = "cmovnew"; // "cmovnzw"
1472 return;
1473 }
1474 break;
1475 }
1476 break;
1477 case 'p': // 6 strings to match.
1478 switch (Mnemonic[5]) {
1479 default: break;
1480 case 'e': // 3 strings to match.
1481 switch (Mnemonic[6]) {
1482 default: break;
1483 case 'l': // 1 string to match.
1484 Mnemonic = "cmovpl"; // "cmovpel"
1485 return;
1486 case 'q': // 1 string to match.
1487 Mnemonic = "cmovpq"; // "cmovpeq"
1488 return;
1489 case 'w': // 1 string to match.
1490 Mnemonic = "cmovpw"; // "cmovpew"
1491 return;
1492 }
1493 break;
1494 case 'o': // 3 strings to match.
1495 switch (Mnemonic[6]) {
1496 default: break;
1497 case 'l': // 1 string to match.
1498 Mnemonic = "cmovnpl"; // "cmovpol"
1499 return;
1500 case 'q': // 1 string to match.
1501 Mnemonic = "cmovnpq"; // "cmovpoq"
1502 return;
1503 case 'w': // 1 string to match.
1504 Mnemonic = "cmovnpw"; // "cmovpow"
1505 return;
1506 }
1507 break;
1508 }
1509 break;
1510 }
1511 break;
1512 case 'f': // 6 strings to match.
1513 switch (Mnemonic[1]) {
1514 default: break;
1515 case 'c': // 2 strings to match.
1516 if (memcmp(Mnemonic.data()+2, "mov", 3) != 0)
1517 break;
1518 switch (Mnemonic[5]) {
1519 default: break;
1520 case 'a': // 1 string to match.
1521 if (Mnemonic[6] != 'e')
1522 break;
1523 Mnemonic = "fcmovnb"; // "fcmovae"
1524 return;
1525 case 'n': // 1 string to match.
1526 if (Mnemonic[6] != 'a')
1527 break;
1528 Mnemonic = "fcmovbe"; // "fcmovna"
1529 return;
1530 }
1531 break;
1532 case 'i': // 1 string to match.
1533 if (memcmp(Mnemonic.data()+2, "sttpq", 5) != 0)
1534 break;
1535 Mnemonic = "fisttpll"; // "fisttpq"
1536 return;
1537 case 'n': // 2 strings to match.
1538 if (memcmp(Mnemonic.data()+2, "st", 2) != 0)
1539 break;
1540 switch (Mnemonic[4]) {
1541 default: break;
1542 case 'c': // 1 string to match.
1543 if (memcmp(Mnemonic.data()+5, "ww", 2) != 0)
1544 break;
1545 Mnemonic = "fnstcw"; // "fnstcww"
1546 return;
1547 case 's': // 1 string to match.
1548 if (memcmp(Mnemonic.data()+5, "ww", 2) != 0)
1549 break;
1550 Mnemonic = "fnstsw"; // "fnstsww"
1551 return;
1552 }
1553 break;
1554 case 'x': // 1 string to match.
1555 if (memcmp(Mnemonic.data()+2, "saveq", 5) != 0)
1556 break;
1557 Mnemonic = "fxsave64"; // "fxsaveq"
1558 return;
1559 }
1560 break;
1561 case 's': // 1 string to match.
1562 if (memcmp(Mnemonic.data()+1, "ysexit", 6) != 0)
1563 break;
1564 Mnemonic = "sysexitl"; // "sysexit"
1565 return;
1566 case 'x': // 3 strings to match.
1567 switch (Mnemonic[1]) {
1568 default: break;
1569 case 'r': // 1 string to match.
1570 if (memcmp(Mnemonic.data()+2, "storq", 5) != 0)
1571 break;
1572 Mnemonic = "xrstor64"; // "xrstorq"
1573 return;
1574 case 's': // 2 strings to match.
1575 if (memcmp(Mnemonic.data()+2, "ave", 3) != 0)
1576 break;
1577 switch (Mnemonic[5]) {
1578 default: break;
1579 case 'c': // 1 string to match.
1580 if (Mnemonic[6] != 'q')
1581 break;
1582 Mnemonic = "xsavec64"; // "xsavecq"
1583 return;
1584 case 's': // 1 string to match.
1585 if (Mnemonic[6] != 'q')
1586 break;
1587 Mnemonic = "xsaves64"; // "xsavesq"
1588 return;
1589 }
1590 break;
1591 }
1592 break;
1593 }
1594 break;
1595 case 8: // 15 strings to match.
1596 switch (Mnemonic[0]) {
1597 default: break;
1598 case 'c': // 12 strings to match.
1599 if (memcmp(Mnemonic.data()+1, "movn", 4) != 0)
1600 break;
1601 switch (Mnemonic[5]) {
1602 default: break;
1603 case 'a': // 3 strings to match.
1604 if (Mnemonic[6] != 'e')
1605 break;
1606 switch (Mnemonic[7]) {
1607 default: break;
1608 case 'l': // 1 string to match.
1609 Mnemonic = "cmovbl"; // "cmovnael"
1610 return;
1611 case 'q': // 1 string to match.
1612 Mnemonic = "cmovbq"; // "cmovnaeq"
1613 return;
1614 case 'w': // 1 string to match.
1615 Mnemonic = "cmovbw"; // "cmovnaew"
1616 return;
1617 }
1618 break;
1619 case 'b': // 3 strings to match.
1620 if (Mnemonic[6] != 'e')
1621 break;
1622 switch (Mnemonic[7]) {
1623 default: break;
1624 case 'l': // 1 string to match.
1625 Mnemonic = "cmoval"; // "cmovnbel"
1626 return;
1627 case 'q': // 1 string to match.
1628 Mnemonic = "cmovaq"; // "cmovnbeq"
1629 return;
1630 case 'w': // 1 string to match.
1631 Mnemonic = "cmovaw"; // "cmovnbew"
1632 return;
1633 }
1634 break;
1635 case 'g': // 3 strings to match.
1636 if (Mnemonic[6] != 'e')
1637 break;
1638 switch (Mnemonic[7]) {
1639 default: break;
1640 case 'l': // 1 string to match.
1641 Mnemonic = "cmovll"; // "cmovngel"
1642 return;
1643 case 'q': // 1 string to match.
1644 Mnemonic = "cmovlq"; // "cmovngeq"
1645 return;
1646 case 'w': // 1 string to match.
1647 Mnemonic = "cmovlw"; // "cmovngew"
1648 return;
1649 }
1650 break;
1651 case 'l': // 3 strings to match.
1652 if (Mnemonic[6] != 'e')
1653 break;
1654 switch (Mnemonic[7]) {
1655 default: break;
1656 case 'l': // 1 string to match.
1657 Mnemonic = "cmovgl"; // "cmovnlel"
1658 return;
1659 case 'q': // 1 string to match.
1660 Mnemonic = "cmovgq"; // "cmovnleq"
1661 return;
1662 case 'w': // 1 string to match.
1663 Mnemonic = "cmovgw"; // "cmovnlew"
1664 return;
1665 }
1666 break;
1667 }
1668 break;
1669 case 'f': // 2 strings to match.
1670 switch (Mnemonic[1]) {
1671 default: break;
1672 case 'c': // 1 string to match.
1673 if (memcmp(Mnemonic.data()+2, "movnae", 6) != 0)
1674 break;
1675 Mnemonic = "fcmovb"; // "fcmovnae"
1676 return;
1677 case 'x': // 1 string to match.
1678 if (memcmp(Mnemonic.data()+2, "rstorq", 6) != 0)
1679 break;
1680 Mnemonic = "fxrstor64"; // "fxrstorq"
1681 return;
1682 }
1683 break;
1684 case 'x': // 1 string to match.
1685 if (memcmp(Mnemonic.data()+1, "rstorsq", 7) != 0)
1686 break;
1687 Mnemonic = "xrstors64"; // "xrstorsq"
1688 return;
1689 }
1690 break;
1691 case 9: // 1 string to match.
1692 if (memcmp(Mnemonic.data()+0, "xsaveoptq", 9) != 0)
1693 break;
1694 Mnemonic = "xsaveopt64"; // "xsaveoptq"
1695 return;
1696 }
1697 break;
1698 case 1:
1699 switch (Mnemonic.size()) {
1700 default: break;
1701 case 3: // 1 string to match.
1702 if (memcmp(Mnemonic.data()+0, "sal", 3) != 0)
1703 break;
1704 Mnemonic = "shl"; // "sal"
1705 return;
1706 case 4: // 7 strings to match.
1707 switch (Mnemonic[0]) {
1708 default: break;
1709 case 'l': // 2 strings to match.
1710 switch (Mnemonic[1]) {
1711 default: break;
1712 case 'g': // 1 string to match.
1713 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1714 break;
1715 if (Features.test(Feature_In16BitModeBit)) // "lgdt"
1716 Mnemonic = "lgdtw";
1717 else if (Features.test(Feature_In32BitModeBit))
1718 Mnemonic = "lgdtd";
1719 return;
1720 case 'i': // 1 string to match.
1721 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1722 break;
1723 if (Features.test(Feature_In16BitModeBit)) // "lidt"
1724 Mnemonic = "lidtw";
1725 else if (Features.test(Feature_In32BitModeBit))
1726 Mnemonic = "lidtd";
1727 return;
1728 }
1729 break;
1730 case 'p': // 2 strings to match.
1731 if (memcmp(Mnemonic.data()+1, "op", 2) != 0)
1732 break;
1733 switch (Mnemonic[3]) {
1734 default: break;
1735 case 'a': // 1 string to match.
1736 if (Features.test(Feature_In16BitModeBit)) // "popa"
1737 Mnemonic = "popaw";
1738 else if (Features.test(Feature_In32BitModeBit))
1739 Mnemonic = "popal";
1740 return;
1741 case 'f': // 1 string to match.
1742 if (Features.test(Feature_In64BitModeBit)) // "popf"
1743 Mnemonic = "popfq";
1744 return;
1745 }
1746 break;
1747 case 'r': // 1 string to match.
1748 if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
1749 break;
1750 Mnemonic = "ret"; // "retn"
1751 return;
1752 case 's': // 2 strings to match.
1753 switch (Mnemonic[1]) {
1754 default: break;
1755 case 'g': // 1 string to match.
1756 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1757 break;
1758 if (Features.test(Feature_In16BitModeBit)) // "sgdt"
1759 Mnemonic = "sgdtw";
1760 else if (Features.test(Feature_In32BitModeBit))
1761 Mnemonic = "sgdtd";
1762 return;
1763 case 'i': // 1 string to match.
1764 if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1765 break;
1766 if (Features.test(Feature_In16BitModeBit)) // "sidt"
1767 Mnemonic = "sidtw";
1768 else if (Features.test(Feature_In32BitModeBit))
1769 Mnemonic = "sidtd";
1770 return;
1771 }
1772 break;
1773 }
1774 break;
1775 case 5: // 6 strings to match.
1776 switch (Mnemonic[0]) {
1777 default: break;
1778 case 'c': // 2 strings to match.
1779 if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1780 break;
1781 switch (Mnemonic[4]) {
1782 default: break;
1783 case 'c': // 1 string to match.
1784 Mnemonic = "cmovb"; // "cmovc"
1785 return;
1786 case 'z': // 1 string to match.
1787 Mnemonic = "cmove"; // "cmovz"
1788 return;
1789 }
1790 break;
1791 case 'p': // 4 strings to match.
1792 switch (Mnemonic[1]) {
1793 default: break;
1794 case 'o': // 2 strings to match.
1795 if (Mnemonic[2] != 'p')
1796 break;
1797 switch (Mnemonic[3]) {
1798 default: break;
1799 case 'a': // 1 string to match.
1800 if (Mnemonic[4] != 'd')
1801 break;
1802 if (Features.test(Feature_Not64BitModeBit)) // "popad"
1803 Mnemonic = "popal";
1804 return;
1805 case 'f': // 1 string to match.
1806 if (Mnemonic[4] != 'w')
1807 break;
1808 if (Features.test(Feature_In32BitModeBit)) // "popfw"
1809 Mnemonic = "popf";
1810 else if (Features.test(Feature_In64BitModeBit))
1811 Mnemonic = "popf";
1812 return;
1813 }
1814 break;
1815 case 'u': // 2 strings to match.
1816 if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
1817 break;
1818 switch (Mnemonic[4]) {
1819 default: break;
1820 case 'a': // 1 string to match.
1821 if (Features.test(Feature_In16BitModeBit)) // "pusha"
1822 Mnemonic = "pushaw";
1823 else if (Features.test(Feature_In32BitModeBit))
1824 Mnemonic = "pushal";
1825 return;
1826 case 'f': // 1 string to match.
1827 if (Features.test(Feature_In64BitModeBit)) // "pushf"
1828 Mnemonic = "pushfq";
1829 return;
1830 }
1831 break;
1832 }
1833 break;
1834 }
1835 break;
1836 case 6: // 10 strings to match.
1837 switch (Mnemonic[0]) {
1838 default: break;
1839 case 'c': // 8 strings to match.
1840 if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1841 break;
1842 switch (Mnemonic[4]) {
1843 default: break;
1844 case 'n': // 6 strings to match.
1845 switch (Mnemonic[5]) {
1846 default: break;
1847 case 'a': // 1 string to match.
1848 Mnemonic = "cmovbe"; // "cmovna"
1849 return;
1850 case 'b': // 1 string to match.
1851 Mnemonic = "cmovae"; // "cmovnb"
1852 return;
1853 case 'c': // 1 string to match.
1854 Mnemonic = "cmovae"; // "cmovnc"
1855 return;
1856 case 'g': // 1 string to match.
1857 Mnemonic = "cmovle"; // "cmovng"
1858 return;
1859 case 'l': // 1 string to match.
1860 Mnemonic = "cmovge"; // "cmovnl"
1861 return;
1862 case 'z': // 1 string to match.
1863 Mnemonic = "cmovne"; // "cmovnz"
1864 return;
1865 }
1866 break;
1867 case 'p': // 2 strings to match.
1868 switch (Mnemonic[5]) {
1869 default: break;
1870 case 'e': // 1 string to match.
1871 Mnemonic = "cmovp"; // "cmovpe"
1872 return;
1873 case 'o': // 1 string to match.
1874 Mnemonic = "cmovnp"; // "cmovpo"
1875 return;
1876 }
1877 break;
1878 }
1879 break;
1880 case 'p': // 2 strings to match.
1881 if (memcmp(Mnemonic.data()+1, "ush", 3) != 0)
1882 break;
1883 switch (Mnemonic[4]) {
1884 default: break;
1885 case 'a': // 1 string to match.
1886 if (Mnemonic[5] != 'd')
1887 break;
1888 if (Features.test(Feature_Not64BitModeBit)) // "pushad"
1889 Mnemonic = "pushal";
1890 return;
1891 case 'f': // 1 string to match.
1892 if (Mnemonic[5] != 'w')
1893 break;
1894 if (Features.test(Feature_In32BitModeBit)) // "pushfw"
1895 Mnemonic = "pushf";
1896 else if (Features.test(Feature_In64BitModeBit))
1897 Mnemonic = "pushf";
1898 return;
1899 }
1900 break;
1901 }
1902 break;
1903 case 7: // 6 strings to match.
1904 switch (Mnemonic[0]) {
1905 default: break;
1906 case 'a': // 1 string to match.
1907 if (memcmp(Mnemonic.data()+1, "cquire", 6) != 0)
1908 break;
1909 Mnemonic = "xacquire"; // "acquire"
1910 return;
1911 case 'c': // 4 strings to match.
1912 if (memcmp(Mnemonic.data()+1, "movn", 4) != 0)
1913 break;
1914 switch (Mnemonic[5]) {
1915 default: break;
1916 case 'a': // 1 string to match.
1917 if (Mnemonic[6] != 'e')
1918 break;
1919 Mnemonic = "cmovb"; // "cmovnae"
1920 return;
1921 case 'b': // 1 string to match.
1922 if (Mnemonic[6] != 'e')
1923 break;
1924 Mnemonic = "cmova"; // "cmovnbe"
1925 return;
1926 case 'g': // 1 string to match.
1927 if (Mnemonic[6] != 'e')
1928 break;
1929 Mnemonic = "cmovl"; // "cmovnge"
1930 return;
1931 case 'l': // 1 string to match.
1932 if (Mnemonic[6] != 'e')
1933 break;
1934 Mnemonic = "cmovg"; // "cmovnle"
1935 return;
1936 }
1937 break;
1938 case 'r': // 1 string to match.
1939 if (memcmp(Mnemonic.data()+1, "elease", 6) != 0)
1940 break;
1941 Mnemonic = "xrelease"; // "release"
1942 return;
1943 }
1944 break;
1945 }
1946 break;
1947 }
1948 switch (Mnemonic.size()) {
1949 default: break;
1950 case 2: // 2 strings to match.
1951 if (Mnemonic[0] != 'j')
1952 break;
1953 switch (Mnemonic[1]) {
1954 default: break;
1955 case 'c': // 1 string to match.
1956 Mnemonic = "jb"; // "jc"
1957 return;
1958 case 'z': // 1 string to match.
1959 Mnemonic = "je"; // "jz"
1960 return;
1961 }
1962 break;
1963 case 3: // 8 strings to match.
1964 if (Mnemonic[0] != 'j')
1965 break;
1966 switch (Mnemonic[1]) {
1967 default: break;
1968 case 'n': // 6 strings to match.
1969 switch (Mnemonic[2]) {
1970 default: break;
1971 case 'a': // 1 string to match.
1972 Mnemonic = "jbe"; // "jna"
1973 return;
1974 case 'b': // 1 string to match.
1975 Mnemonic = "jae"; // "jnb"
1976 return;
1977 case 'c': // 1 string to match.
1978 Mnemonic = "jae"; // "jnc"
1979 return;
1980 case 'g': // 1 string to match.
1981 Mnemonic = "jle"; // "jng"
1982 return;
1983 case 'l': // 1 string to match.
1984 Mnemonic = "jge"; // "jnl"
1985 return;
1986 case 'z': // 1 string to match.
1987 Mnemonic = "jne"; // "jnz"
1988 return;
1989 }
1990 break;
1991 case 'p': // 2 strings to match.
1992 switch (Mnemonic[2]) {
1993 default: break;
1994 case 'e': // 1 string to match.
1995 Mnemonic = "jp"; // "jpe"
1996 return;
1997 case 'o': // 1 string to match.
1998 Mnemonic = "jnp"; // "jpo"
1999 return;
2000 }
2001 break;
2002 }
2003 break;
2004 case 4: // 8 strings to match.
2005 switch (Mnemonic[0]) {
2006 default: break;
2007 case 'j': // 4 strings to match.
2008 if (Mnemonic[1] != 'n')
2009 break;
2010 switch (Mnemonic[2]) {
2011 default: break;
2012 case 'a': // 1 string to match.
2013 if (Mnemonic[3] != 'e')
2014 break;
2015 Mnemonic = "jb"; // "jnae"
2016 return;
2017 case 'b': // 1 string to match.
2018 if (Mnemonic[3] != 'e')
2019 break;
2020 Mnemonic = "ja"; // "jnbe"
2021 return;
2022 case 'g': // 1 string to match.
2023 if (Mnemonic[3] != 'e')
2024 break;
2025 Mnemonic = "jl"; // "jnge"
2026 return;
2027 case 'l': // 1 string to match.
2028 if (Mnemonic[3] != 'e')
2029 break;
2030 Mnemonic = "jg"; // "jnle"
2031 return;
2032 }
2033 break;
2034 case 'r': // 2 strings to match.
2035 if (memcmp(Mnemonic.data()+1, "ep", 2) != 0)
2036 break;
2037 switch (Mnemonic[3]) {
2038 default: break;
2039 case 'e': // 1 string to match.
2040 Mnemonic = "rep"; // "repe"
2041 return;
2042 case 'z': // 1 string to match.
2043 Mnemonic = "rep"; // "repz"
2044 return;
2045 }
2046 break;
2047 case 's': // 2 strings to match.
2048 if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
2049 break;
2050 switch (Mnemonic[3]) {
2051 default: break;
2052 case 'c': // 1 string to match.
2053 Mnemonic = "setb"; // "setc"
2054 return;
2055 case 'z': // 1 string to match.
2056 Mnemonic = "sete"; // "setz"
2057 return;
2058 }
2059 break;
2060 }
2061 break;
2062 case 5: // 11 strings to match.
2063 switch (Mnemonic[0]) {
2064 default: break;
2065 case 'f': // 1 string to match.
2066 if (memcmp(Mnemonic.data()+1, "wait", 4) != 0)
2067 break;
2068 Mnemonic = "wait"; // "fwait"
2069 return;
2070 case 'l': // 1 string to match.
2071 if (memcmp(Mnemonic.data()+1, "oopz", 4) != 0)
2072 break;
2073 Mnemonic = "loope"; // "loopz"
2074 return;
2075 case 'r': // 1 string to match.
2076 if (memcmp(Mnemonic.data()+1, "epnz", 4) != 0)
2077 break;
2078 Mnemonic = "repne"; // "repnz"
2079 return;
2080 case 's': // 8 strings to match.
2081 if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
2082 break;
2083 switch (Mnemonic[3]) {
2084 default: break;
2085 case 'n': // 6 strings to match.
2086 switch (Mnemonic[4]) {
2087 default: break;
2088 case 'a': // 1 string to match.
2089 Mnemonic = "setbe"; // "setna"
2090 return;
2091 case 'b': // 1 string to match.
2092 Mnemonic = "setae"; // "setnb"
2093 return;
2094 case 'c': // 1 string to match.
2095 Mnemonic = "setae"; // "setnc"
2096 return;
2097 case 'g': // 1 string to match.
2098 Mnemonic = "setle"; // "setng"
2099 return;
2100 case 'l': // 1 string to match.
2101 Mnemonic = "setge"; // "setnl"
2102 return;
2103 case 'z': // 1 string to match.
2104 Mnemonic = "setne"; // "setnz"
2105 return;
2106 }
2107 break;
2108 case 'p': // 2 strings to match.
2109 switch (Mnemonic[4]) {
2110 default: break;
2111 case 'e': // 1 string to match.
2112 Mnemonic = "setp"; // "setpe"
2113 return;
2114 case 'o': // 1 string to match.
2115 Mnemonic = "setnp"; // "setpo"
2116 return;
2117 }
2118 break;
2119 }
2120 break;
2121 }
2122 break;
2123 case 6: // 6 strings to match.
2124 switch (Mnemonic[0]) {
2125 default: break;
2126 case 'f': // 1 string to match.
2127 if (memcmp(Mnemonic.data()+1, "comip", 5) != 0)
2128 break;
2129 Mnemonic = "fcompi"; // "fcomip"
2130 return;
2131 case 'l': // 1 string to match.
2132 if (memcmp(Mnemonic.data()+1, "oopnz", 5) != 0)
2133 break;
2134 Mnemonic = "loopne"; // "loopnz"
2135 return;
2136 case 's': // 4 strings to match.
2137 if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
2138 break;
2139 switch (Mnemonic[4]) {
2140 default: break;
2141 case 'a': // 1 string to match.
2142 if (Mnemonic[5] != 'e')
2143 break;
2144 Mnemonic = "setb"; // "setnae"
2145 return;
2146 case 'b': // 1 string to match.
2147 if (Mnemonic[5] != 'e')
2148 break;
2149 Mnemonic = "seta"; // "setnbe"
2150 return;
2151 case 'g': // 1 string to match.
2152 if (Mnemonic[5] != 'e')
2153 break;
2154 Mnemonic = "setl"; // "setnge"
2155 return;
2156 case 'l': // 1 string to match.
2157 if (Mnemonic[5] != 'e')
2158 break;
2159 Mnemonic = "setg"; // "setnle"
2160 return;
2161 }
2162 break;
2163 }
2164 break;
2165 case 7: // 1 string to match.
2166 if (memcmp(Mnemonic.data()+0, "fucomip", 7) != 0)
2167 break;
2168 Mnemonic = "fucompi"; // "fucomip"
2169 return;
2170 }
2171}
2172
2173enum {
2174 Tie0_1_1,
2175 Tie0_2_2,
2176 Tie0_3_3,
2177 Tie0_4_4,
2178 Tie1_1_1,
2179 Tie1_2_2,
2180 Tie1_3_3,
2181 Tie1_4_4,
2182};
2183
2184static const uint8_t TiedAsmOperandTable[][3] = {
2185 /* Tie0_1_1 */ { 0, 1, 1 },
2186 /* Tie0_2_2 */ { 0, 2, 2 },
2187 /* Tie0_3_3 */ { 0, 3, 3 },
2188 /* Tie0_4_4 */ { 0, 4, 4 },
2189 /* Tie1_1_1 */ { 1, 1, 1 },
2190 /* Tie1_2_2 */ { 1, 2, 2 },
2191 /* Tie1_3_3 */ { 1, 3, 3 },
2192 /* Tie1_4_4 */ { 1, 4, 4 },
2193};
2194
2195namespace {
2196enum OperatorConversionKind {
2197 CVT_Done,
2198 CVT_Reg,
2199 CVT_Tied,
2200 CVT_imm_95_10,
2201 CVT_95_addImmOperands,
2202 CVT_regAX,
2203 CVT_regEAX,
2204 CVT_regRAX,
2205 CVT_95_Reg,
2206 CVT_95_addMemOperands,
2207 CVT_95_addAbsMemOperands,
2208 CVT_imm_95_7,
2209 CVT_imm_95_3,
2210 CVT_imm_95_2,
2211 CVT_imm_95_6,
2212 CVT_imm_95_4,
2213 CVT_imm_95_15,
2214 CVT_imm_95_13,
2215 CVT_imm_95_12,
2216 CVT_imm_95_14,
2217 CVT_imm_95_5,
2218 CVT_imm_95_1,
2219 CVT_imm_95_11,
2220 CVT_imm_95_9,
2221 CVT_imm_95_0,
2222 CVT_imm_95_8,
2223 CVT_95_addDstIdxOperands,
2224 CVT_95_addSrcIdxOperands,
2225 CVT_95_addGR32orGR64Operands,
2226 CVT_regST1,
2227 CVT_regST0,
2228 CVT_95_addGR16orGR32orGR64Operands,
2229 CVT_95_addMemOffsOperands,
2230 CVT_imm_95_17,
2231 CVT_imm_95_16,
2232 CVT_95_addAVX512RCOperands,
2233 CVT_95_addMaskPairOperands,
2234 CVT_NUM_CONVERTERS
2235};
2236
2237enum InstructionConversionKind {
2238 Convert_NoOperands,
2239 Convert__imm_95_10,
2240 Convert__Imm1_0,
2241 Convert__Imm1_1,
2242 Convert__regAX__Tie0_1_1__ImmSExti16i81_1,
2243 Convert__regEAX__Tie0_1_1__ImmSExti32i81_1,
2244 Convert__regRAX__Tie0_1_1__ImmSExti64i81_1,
2245 Convert__ImmSExti64i321_1,
2246 Convert__Reg1_0__Tie0_1_1__Reg1_1,
2247 Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1,
2248 Convert__Reg1_0__Tie0_1_1__Imm1_1,
2249 Convert__Reg1_0__Tie0_1_1__Mem165_1,
2250 Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1,
2251 Convert__Reg1_0__Tie0_1_1__Mem325_1,
2252 Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1,
2253 Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1,
2254 Convert__Reg1_0__Tie0_1_1__Mem645_1,
2255 Convert__Reg1_0__Tie0_1_1__Mem85_1,
2256 Convert__Mem165_0__Reg1_1,
2257 Convert__Mem165_0__ImmSExti16i81_1,
2258 Convert__Mem165_0__Imm1_1,
2259 Convert__Mem325_0__Reg1_1,
2260 Convert__Mem325_0__ImmSExti32i81_1,
2261 Convert__Mem325_0__Imm1_1,
2262 Convert__Mem645_0__Reg1_1,
2263 Convert__Mem645_0__ImmSExti64i81_1,
2264 Convert__Mem645_0__ImmSExti64i321_1,
2265 Convert__Mem85_0__Reg1_1,
2266 Convert__Mem85_0__Imm1_1,
2267 Convert__Reg1_1__Tie0_2_2__Reg1_0,
2268 Convert__Mem85_1__Reg1_0,
2269 Convert__Reg1_1__Tie0_2_2__Imm1_0,
2270 Convert__Mem85_1__Imm1_0,
2271 Convert__Reg1_1__Tie0_2_2__Mem85_0,
2272 Convert__Mem325_1__Reg1_0,
2273 Convert__regEAX__Tie0_1_1__ImmSExti32i81_0,
2274 Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0,
2275 Convert__Mem325_1__ImmSExti32i81_0,
2276 Convert__Mem325_1__Imm1_0,
2277 Convert__Reg1_1__Tie0_2_2__Mem325_0,
2278 Convert__Mem645_1__Reg1_0,
2279 Convert__regRAX__Tie0_1_1__ImmSExti64i81_0,
2280 Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0,
2281 Convert__Mem645_1__ImmSExti64i81_0,
2282 Convert__ImmSExti64i321_0,
2283 Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0,
2284 Convert__Mem645_1__ImmSExti64i321_0,
2285 Convert__Reg1_1__Tie0_2_2__Mem645_0,
2286 Convert__Mem165_1__Reg1_0,
2287 Convert__regAX__Tie0_1_1__ImmSExti16i81_0,
2288 Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0,
2289 Convert__Mem165_1__ImmSExti16i81_0,
2290 Convert__Mem165_1__Imm1_0,
2291 Convert__Reg1_1__Tie0_2_2__Mem165_0,
2292 Convert__Reg1_1__Tie0_1_1__Reg1_0,
2293 Convert__Reg1_1__Tie0_1_1__Mem325_0,
2294 Convert__Reg1_1__Tie0_1_1__Mem645_0,
2295 Convert__Reg1_0__Tie0_1_1__Mem1285_1,
2296 Convert__Reg1_1__Tie0_1_1__Mem1285_0,
2297 Convert__Reg1_0__Tie0_1_1__Mem5_1,
2298 Convert__Reg1_1__Tie0_2_2__Mem5_0,
2299 Convert__Mem5_0,
2300 Convert__Reg1_1__Reg1_0,
2301 Convert__Reg1_0__Reg1_1,
2302 Convert__Reg1_0__Mem1285_1,
2303 Convert__Reg1_1__Mem1285_0,
2304 Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2,
2305 Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2,
2306 Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2307 Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2308 Convert__Reg1_0__Reg1_1__Reg1_2,
2309 Convert__Reg1_0__Reg1_1__Mem325_2,
2310 Convert__Reg1_0__Reg1_1__Mem645_2,
2311 Convert__Reg1_2__Reg1_1__Reg1_0,
2312 Convert__Reg1_2__Reg1_1__Mem325_0,
2313 Convert__Reg1_2__Reg1_1__Mem645_0,
2314 Convert__Reg1_0__Reg1_1__Imm1_2,
2315 Convert__Reg1_0__Mem325_1__Reg1_2,
2316 Convert__Reg1_0__Mem325_1__Imm1_2,
2317 Convert__Reg1_0__Reg1_1__ImmSExti64i321_2,
2318 Convert__Reg1_0__Mem645_1__Reg1_2,
2319 Convert__Reg1_0__Mem645_1__ImmSExti64i321_2,
2320 Convert__Reg1_2__Mem325_1__Reg1_0,
2321 Convert__Reg1_2__Reg1_1__Imm1_0,
2322 Convert__Reg1_2__Mem325_1__Imm1_0,
2323 Convert__Reg1_2__Mem645_1__Reg1_0,
2324 Convert__Reg1_2__Reg1_1__ImmSExti64i321_0,
2325 Convert__Reg1_2__Mem645_1__ImmSExti64i321_0,
2326 Convert__Reg1_0__Mem325_1,
2327 Convert__Reg1_0__Mem645_1,
2328 Convert__Reg1_1__Mem325_0,
2329 Convert__Reg1_1__Mem645_0,
2330 Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2,
2331 Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2,
2332 Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0,
2333 Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0,
2334 Convert__Reg1_1__Tie0_2_2__Mem1285_0,
2335 Convert__Reg1_2__Tie0_1_1__Reg1_1,
2336 Convert__Reg1_2__Tie0_1_1__Mem1285_1,
2337 Convert__Reg1_0__Mem5_1,
2338 Convert__Reg1_1__Mem5_0,
2339 Convert__Mem1285_1__Reg1_0,
2340 Convert__Mem1285_0__Reg1_1,
2341 Convert__Mem5_1__Reg1_0,
2342 Convert__Mem5_0__Reg1_1,
2343 Convert__Reg1_0__Mem165_1,
2344 Convert__Reg1_1__Mem165_0,
2345 Convert__Reg1_0__Tie0_1_1,
2346 Convert__Reg1_0__ImmUnsignedi81_1,
2347 Convert__Mem325_1__ImmUnsignedi81_0,
2348 Convert__Mem165_0__ImmUnsignedi81_1,
2349 Convert__Mem325_0__ImmUnsignedi81_1,
2350 Convert__Mem645_0__ImmUnsignedi81_1,
2351 Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1,
2352 Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0,
2353 Convert__Mem645_1__ImmUnsignedi81_0,
2354 Convert__Mem165_1__ImmUnsignedi81_0,
2355 Convert__Reg1_1__ImmUnsignedi81_0,
2356 Convert__Reg1_0,
2357 Convert__AbsMem1_0,
2358 Convert__Mem165_0,
2359 Convert__Mem325_0,
2360 Convert__Mem645_0,
2361 Convert__Imm1_1__Imm1_0,
2362 Convert__Reg1_1,
2363 Convert__Mem325_1,
2364 Convert__Mem645_1,
2365 Convert__Mem165_1,
2366 Convert__Mem85_0,
2367 Convert__Reg1_0__Tie0_1_1__Reg1_0,
2368 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_7,
2369 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_7,
2370 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_7,
2371 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_7,
2372 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_3,
2373 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_3,
2374 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_3,
2375 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_3,
2376 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_3,
2377 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_3,
2378 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_3,
2379 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_3,
2380 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_7,
2381 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_7,
2382 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_7,
2383 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_7,
2384 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_2,
2385 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_2,
2386 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_2,
2387 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_2,
2388 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_6,
2389 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_6,
2390 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_6,
2391 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_6,
2392 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_6,
2393 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_6,
2394 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_6,
2395 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_6,
2396 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_2,
2397 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_2,
2398 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_2,
2399 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_2,
2400 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_4,
2401 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_4,
2402 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_4,
2403 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_4,
2404 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_4,
2405 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_4,
2406 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_4,
2407 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_4,
2408 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_15,
2409 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_15,
2410 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_15,
2411 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_15,
2412 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_13,
2413 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_13,
2414 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_13,
2415 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_13,
2416 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_13,
2417 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_13,
2418 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_13,
2419 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_13,
2420 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_15,
2421 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_15,
2422 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_15,
2423 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_15,
2424 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_12,
2425 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_12,
2426 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_12,
2427 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_12,
2428 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_14,
2429 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_14,
2430 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_14,
2431 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_14,
2432 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_14,
2433 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_14,
2434 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_14,
2435 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_14,
2436 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_12,
2437 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_12,
2438 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_12,
2439 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_12,
2440 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_5,
2441 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_5,
2442 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_5,
2443 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_5,
2444 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_5,
2445 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_5,
2446 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_5,
2447 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_5,
2448 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1,
2449 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_1,
2450 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_1,
2451 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_1,
2452 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1,
2453 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_1,
2454 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_1,
2455 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_1,
2456 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_11,
2457 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_11,
2458 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_11,
2459 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_11,
2460 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_11,
2461 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_11,
2462 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_11,
2463 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_11,
2464 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_9,
2465 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_9,
2466 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_9,
2467 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_9,
2468 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_9,
2469 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_9,
2470 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_9,
2471 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_9,
2472 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0,
2473 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_0,
2474 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_0,
2475 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_0,
2476 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0,
2477 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_0,
2478 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_0,
2479 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_0,
2480 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_10,
2481 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_10,
2482 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_10,
2483 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_10,
2484 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_10,
2485 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_10,
2486 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_10,
2487 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_10,
2488 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_8,
2489 Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_8,
2490 Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_8,
2491 Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_8,
2492 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_8,
2493 Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_8,
2494 Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_8,
2495 Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_8,
2496 Convert__regAX__ImmSExti16i81_1,
2497 Convert__regEAX__ImmSExti32i81_1,
2498 Convert__regRAX__ImmSExti64i81_1,
2499 Convert__Reg1_0__ImmSExti16i81_1,
2500 Convert__Reg1_0__Imm1_1,
2501 Convert__Reg1_0__ImmSExti32i81_1,
2502 Convert__Reg1_0__ImmSExti64i81_1,
2503 Convert__Reg1_0__ImmSExti64i321_1,
2504 Convert__Reg1_0__Mem85_1,
2505 Convert__Reg1_1__Imm1_0,
2506 Convert__Reg1_1__Mem85_0,
2507 Convert__regEAX__ImmSExti32i81_0,
2508 Convert__Reg1_1__ImmSExti32i81_0,
2509 Convert__regRAX__ImmSExti64i81_0,
2510 Convert__Reg1_1__ImmSExti64i81_0,
2511 Convert__Reg1_1__ImmSExti64i321_0,
2512 Convert__DstIdx161_1__SrcIdx162_0,
2513 Convert__DstIdx321_1__SrcIdx322_0,
2514 Convert__DstIdx641_1__SrcIdx642_0,
2515 Convert__DstIdx81_1__SrcIdx82_0,
2516 Convert__DstIdx81_0__SrcIdx82_1,
2517 Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2,
2518 Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0,
2519 Convert__DstIdx321_0__SrcIdx322_1,
2520 Convert__DstIdx641_0__SrcIdx642_1,
2521 Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2,
2522 Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0,
2523 Convert__DstIdx161_0__SrcIdx162_1,
2524 Convert__regAX__ImmSExti16i81_0,
2525 Convert__Reg1_1__ImmSExti16i81_0,
2526 Convert__Mem1285_0,
2527 Convert__Mem85_1,
2528 Convert__Reg1_0__Mem5125_1,
2529 Convert__Reg1_1__Mem5125_0,
2530 Convert__Imm1_0__Imm1_1,
2531 Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0,
2532 Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0,
2533 Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2,
2534 Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2,
2535 Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1__ImmUnsignedi81_2,
2536 Convert__Reg1_2__Tie0_3_3__ImmUnsignedi81_1__ImmUnsignedi81_0,
2537 Convert__regST1,
2538 Convert__regST0,
2539 Convert__Mem805_0,
2540 Convert__ImmUnsignedi81_0,
2541 Convert__Reg1_0__Reg1_0__ImmSExti16i81_1,
2542 Convert__Reg1_0__Reg1_0__Imm1_1,
2543 Convert__Reg1_0__Reg1_0__ImmSExti32i81_1,
2544 Convert__Reg1_0__Reg1_0__ImmSExti64i81_1,
2545 Convert__Reg1_0__Reg1_0__ImmSExti64i321_1,
2546 Convert__Reg1_0__Reg1_1__ImmSExti16i81_2,
2547 Convert__Reg1_0__Mem165_1__ImmSExti16i81_2,
2548 Convert__Reg1_0__Mem165_1__Imm1_2,
2549 Convert__Reg1_0__Reg1_1__ImmSExti32i81_2,
2550 Convert__Reg1_0__Mem325_1__ImmSExti32i81_2,
2551 Convert__Reg1_0__Reg1_1__ImmSExti64i81_2,
2552 Convert__Reg1_0__Mem645_1__ImmSExti64i81_2,
2553 Convert__Reg1_1__Reg1_1__ImmSExti32i81_0,
2554 Convert__Reg1_1__Reg1_1__Imm1_0,
2555 Convert__Reg1_2__Reg1_1__ImmSExti32i81_0,
2556 Convert__Reg1_2__Mem325_1__ImmSExti32i81_0,
2557 Convert__Reg1_1__Reg1_1__ImmSExti64i81_0,
2558 Convert__Reg1_1__Reg1_1__ImmSExti64i321_0,
2559 Convert__Reg1_2__Reg1_1__ImmSExti64i81_0,
2560 Convert__Reg1_2__Mem645_1__ImmSExti64i81_0,
2561 Convert__Reg1_1__Reg1_1__ImmSExti16i81_0,
2562 Convert__Reg1_1__Tie0_1_1__Mem165_0,
2563 Convert__Reg1_2__Reg1_1__ImmSExti16i81_0,
2564 Convert__Reg1_2__Mem165_1__ImmSExti16i81_0,
2565 Convert__Reg1_2__Mem165_1__Imm1_0,
2566 Convert__ImmUnsignedi81_1,
2567 Convert__DstIdx161_0,
2568 Convert__DstIdx321_0,
2569 Convert__DstIdx81_0,
2570 Convert__DstIdx81_1,
2571 Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3,
2572 Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0,
2573 Convert__DstIdx321_1,
2574 Convert__DstIdx161_1,
2575 Convert__AbsMem1_0__imm_95_7,
2576 Convert__AbsMem1_0__imm_95_3,
2577 Convert__AbsMem1_0__imm_95_2,
2578 Convert__AbsMem1_0__imm_95_6,
2579 Convert__AbsMem1_0__imm_95_4,
2580 Convert__AbsMem1_0__imm_95_15,
2581 Convert__AbsMem1_0__imm_95_13,
2582 Convert__AbsMem1_0__imm_95_12,
2583 Convert__AbsMem1_0__imm_95_14,
2584 Convert__AbsMem1_0__imm_95_5,
2585 Convert__AbsMem1_0__imm_95_1,
2586 Convert__AbsMem1_0__imm_95_11,
2587 Convert__AbsMem1_0__imm_95_9,
2588 Convert__AbsMem1_0__imm_95_0,
2589 Convert__AbsMem1_0__imm_95_10,
2590 Convert__AbsMem1_0__imm_95_8,
2591 Convert__Reg1_0__GR16orGR32orGR641_1,
2592 Convert__Reg1_1__GR16orGR32orGR641_0,
2593 Convert__Mem5_1,
2594 Convert__SrcIdx162_0,
2595 Convert__SrcIdx322_0,
2596 Convert__SrcIdx642_0,
2597 Convert__SrcIdx82_0,
2598 Convert__SrcIdx82_1,
2599 Convert__SrcIdx162_1,
2600 Convert__SrcIdx322_1,
2601 Convert__SrcIdx642_1,
2602 Convert__MemOffs16_82_1,
2603 Convert__MemOffs32_82_1,
2604 Convert__MemOffs16_162_1,
2605 Convert__MemOffs32_162_1,
2606 Convert__MemOffs16_322_1,
2607 Convert__MemOffs32_322_1,
2608 Convert__MemOffs32_642_1,
2609 Convert__MemOffs16_162_0,
2610 Convert__MemOffs16_322_0,
2611 Convert__MemOffs16_82_0,
2612 Convert__MemOffs32_162_0,
2613 Convert__MemOffs32_322_0,
2614 Convert__MemOffs32_642_0,
2615 Convert__MemOffs32_82_0,
2616 Convert__MemOffs64_82_1,
2617 Convert__MemOffs64_162_1,
2618 Convert__MemOffs64_322_1,
2619 Convert__MemOffs64_642_1,
2620 Convert__MemOffs64_162_0,
2621 Convert__MemOffs64_322_0,
2622 Convert__MemOffs64_642_0,
2623 Convert__MemOffs64_82_0,
2624 Convert__GR32orGR641_1__Reg1_0,
2625 Convert__GR32orGR641_0__Reg1_1,
2626 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17,
2627 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_17,
2628 Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_17,
2629 Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_17,
2630 Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_1,
2631 Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_1,
2632 Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16,
2633 Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_16,
2634 Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_16,
2635 Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_16,
2636 Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_0,
2637 Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_0,
2638 Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0,
2639 Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2,
2640 Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0,
2641 Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2,
2642 Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0,
2643 Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2,
2644 Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2,
2645 Convert__Reg1_0__Tie0_1_1__Mem85_1__ImmUnsignedi81_2,
2646 Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0,
2647 Convert__Reg1_2__Tie0_1_1__Mem85_1__ImmUnsignedi81_0,
2648 Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2,
2649 Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0,
2650 Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2,
2651 Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2652 Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0,
2653 Convert__ImmSExti64i81_0,
2654 Convert__ImmSExti16i81_0,
2655 Convert__ImmSExti32i81_0,
2656 Convert__Mem85_0__ImmUnsignedi81_1,
2657 Convert__Reg1_1__Tie0_1_1,
2658 Convert__Mem85_1__ImmUnsignedi81_0,
2659 Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2,
2660 Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2661 Convert__DstIdx641_0,
2662 Convert__DstIdx641_1,
2663 Convert__Reg1_0__imm_95_7,
2664 Convert__Mem85_0__imm_95_7,
2665 Convert__Reg1_0__imm_95_3,
2666 Convert__Mem85_0__imm_95_3,
2667 Convert__Reg1_0__imm_95_2,
2668 Convert__Mem85_0__imm_95_2,
2669 Convert__Reg1_0__imm_95_6,
2670 Convert__Mem85_0__imm_95_6,
2671 Convert__Reg1_0__imm_95_4,
2672 Convert__Mem85_0__imm_95_4,
2673 Convert__Reg1_0__imm_95_15,
2674 Convert__Mem85_0__imm_95_15,
2675 Convert__Reg1_0__imm_95_13,
2676 Convert__Mem85_0__imm_95_13,
2677 Convert__Reg1_0__imm_95_12,
2678 Convert__Mem85_0__imm_95_12,
2679 Convert__Reg1_0__imm_95_14,
2680 Convert__Mem85_0__imm_95_14,
2681 Convert__Reg1_0__imm_95_5,
2682 Convert__Mem85_0__imm_95_5,
2683 Convert__Reg1_0__imm_95_1,
2684 Convert__Mem85_0__imm_95_1,
2685 Convert__Reg1_0__imm_95_11,
2686 Convert__Mem85_0__imm_95_11,
2687 Convert__Reg1_0__imm_95_9,
2688 Convert__Mem85_0__imm_95_9,
2689 Convert__Reg1_0__imm_95_0,
2690 Convert__Mem85_0__imm_95_0,
2691 Convert__Reg1_0__imm_95_10,
2692 Convert__Mem85_0__imm_95_10,
2693 Convert__Reg1_0__imm_95_8,
2694 Convert__Mem85_0__imm_95_8,
2695 Convert__Mem325_2__Reg1_1,
2696 Convert__Mem645_2__Reg1_1,
2697 Convert__Mem165_2__Reg1_1,
2698 Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0,
2699 Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2,
2700 Convert__Reg1_0__SibMem5_1,
2701 Convert__Reg1_1__SibMem5_0,
2702 Convert__SibMem5_1__Reg1_0,
2703 Convert__SibMem5_0__Reg1_1,
2704 Convert__GR32orGR641_0,
2705 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2,
2706 Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0,
2707 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5,
2708 Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0,
2709 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6,
2710 Convert__Reg1_0__Reg1_1__Mem1285_2,
2711 Convert__Reg1_0__Reg1_1__Mem2565_2,
2712 Convert__Reg1_0__Reg1_1__Mem5125_2,
2713 Convert__Reg1_2__Reg1_1__Mem1285_0,
2714 Convert__Reg1_2__Reg1_1__Mem2565_0,
2715 Convert__Reg1_2__Reg1_1__Mem5125_0,
2716 Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3,
2717 Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0,
2718 Convert__Reg1_3__Reg1_2__Mem645_0,
2719 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5,
2720 Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0,
2721 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5,
2722 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5,
2723 Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0,
2724 Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0,
2725 Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6,
2726 Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6,
2727 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5,
2728 Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0,
2729 Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6,
2730 Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6,
2731 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6,
2732 Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0,
2733 Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0,
2734 Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0,
2735 Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0,
2736 Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0,
2737 Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6,
2738 Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7,
2739 Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0,
2740 Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0,
2741 Convert__Reg1_3__Reg1_2__Mem325_0,
2742 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5,
2743 Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0,
2744 Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6,
2745 Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0,
2746 Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0,
2747 Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0,
2748 Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0,
2749 Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0,
2750 Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3,
2751 Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3,
2752 Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3,
2753 Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3,
2754 Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2755 Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2756 Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2757 Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2758 Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4,
2759 Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2760 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6,
2761 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6,
2762 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6,
2763 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6,
2764 Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2765 Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2766 Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2767 Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2768 Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7,
2769 Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7,
2770 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7,
2771 Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7,
2772 Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7,
2773 Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2774 Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2775 Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2776 Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2777 Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2778 Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8,
2779 Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2780 Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4,
2781 Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2782 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7,
2783 Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2784 Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8,
2785 Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2786 Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5,
2787 Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5,
2788 Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5,
2789 Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5,
2790 Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5,
2791 Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5,
2792 Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0,
2793 Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3,
2794 Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3,
2795 Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0,
2796 Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3,
2797 Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0,
2798 Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0,
2799 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4,
2800 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4,
2801 Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0,
2802 Convert__Reg1_1__Reg1_3__Reg1_0,
2803 Convert__Reg1_0__Reg1_2__Reg1_5,
2804 Convert__Reg1_0__Reg1_2__Mem645_5,
2805 Convert__Reg1_1__Reg1_3__Mem645_0,
2806 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4,
2807 Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0,
2808 Convert__Reg1_0__Reg1_2__Mem1285_5,
2809 Convert__Reg1_1__Reg1_3__Mem1285_0,
2810 Convert__Reg1_0__Mem2565_1,
2811 Convert__Reg1_1__Mem2565_0,
2812 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4,
2813 Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0,
2814 Convert__Reg1_0__Reg1_2__Mem2565_5,
2815 Convert__Reg1_1__Reg1_3__Mem2565_0,
2816 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4,
2817 Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0,
2818 Convert__Reg1_0__Reg1_2__Mem325_5,
2819 Convert__Reg1_1__Reg1_3__Mem325_0,
2820 Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4,
2821 Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2822 Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6,
2823 Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6,
2824 Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6,
2825 Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6,
2826 Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7,
2827 Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7,
2828 Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2829 Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7,
2830 Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3,
2831 Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2832 Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6,
2833 Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2834 Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3,
2835 Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2836 Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6,
2837 Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2838 Convert__Reg1_2__Reg1_1,
2839 Convert__Mem2565_1__Reg1_0,
2840 Convert__Mem5125_1__Reg1_0,
2841 Convert__Mem2565_0__Reg1_1,
2842 Convert__Mem5125_0__Reg1_1,
2843 Convert__Mem1285_1__Reg1_3__Reg1_0,
2844 Convert__Mem2565_1__Reg1_3__Reg1_0,
2845 Convert__Mem5125_1__Reg1_3__Reg1_0,
2846 Convert__Mem1285_0__Reg1_2__Reg1_4,
2847 Convert__Mem2565_0__Reg1_2__Reg1_4,
2848 Convert__Mem5125_0__Reg1_2__Reg1_4,
2849 Convert__Reg1_2__Mem325_0,
2850 Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0,
2851 Convert__Reg1_2__Reg1_4__Mem325_0,
2852 Convert__Reg1_0__Reg1_1__AVX512RC1_2,
2853 Convert__Reg1_2__Reg1_1__AVX512RC1_0,
2854 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4,
2855 Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0,
2856 Convert__Reg1_0__Reg1_2__Mem5125_5,
2857 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5,
2858 Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0,
2859 Convert__Reg1_1__Reg1_3__Mem5125_0,
2860 Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6,
2861 Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0,
2862 Convert__Reg1_2__Mem645_0,
2863 Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0,
2864 Convert__Reg1_2__Reg1_4__Mem645_0,
2865 Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0,
2866 Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0,
2867 Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1,
2868 Convert__Reg1_2__Reg1_4__Reg1_1,
2869 Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0,
2870 Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0,
2871 Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2,
2872 Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2,
2873 Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3,
2874 Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2875 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2876 Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2877 Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2878 Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2879 Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2880 Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2881 Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2882 Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2883 Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6,
2884 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6,
2885 Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0,
2886 Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2887 Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7,
2888 Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0,
2889 Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1,
2890 Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2,
2891 Convert__Reg1_3__Reg1_2__Reg1_1,
2892 Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1,
2893 Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1,
2894 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2,
2895 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2,
2896 Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0,
2897 Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0,
2898 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2,
2899 Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0,
2900 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6,
2901 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6,
2902 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6,
2903 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6,
2904 Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3,
2905 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3,
2906 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3,
2907 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3,
2908 Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2909 Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2910 Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2911 Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2912 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4,
2913 Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4,
2914 Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2915 Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2916 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7,
2917 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7,
2918 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7,
2919 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7,
2920 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7,
2921 Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2922 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8,
2923 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8,
2924 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4,
2925 Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2926 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8,
2927 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_3,
2928 Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2929 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6,
2930 Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2931 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7,
2932 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_3,
2933 Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2934 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6,
2935 Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2936 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7,
2937 Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2,
2938 Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3,
2939 Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0,
2940 Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0,
2941 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6,
2942 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7,
2943 Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0,
2944 Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0,
2945 Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3,
2946 Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3,
2947 Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0,
2948 Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0,
2949 Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3,
2950 Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3,
2951 Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0,
2952 Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0,
2953 Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3,
2954 Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3,
2955 Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0,
2956 Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0,
2957 Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2,
2958 Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2,
2959 Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3,
2960 Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2961 Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2962 Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5,
2963 Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5,
2964 Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5,
2965 Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6,
2966 Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0,
2967 Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0,
2968 Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2969 Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0,
2970 Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2971 Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0,
2972 Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3,
2973 Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2974 Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6,
2975 Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0,
2976 Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5,
2977 Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0,
2978 Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5,
2979 Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0,
2980 Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1,
2981 Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3,
2982 Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1,
2983 Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3,
2984 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4,
2985 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4,
2986 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4,
2987 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0,
2988 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0,
2989 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0,
2990 Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1,
2991 Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3,
2992 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4,
2993 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4,
2994 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0,
2995 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0,
2996 Convert__Reg1_1__Mem512_RC256X5_3,
2997 Convert__Reg1_2__Mem512_RC256X5_0,
2998 Convert__Reg1_1__Mem512_RC5125_3,
2999 Convert__Reg1_2__Mem512_RC5125_0,
3000 Convert__Reg1_1__Mem256_RC5125_3,
3001 Convert__Reg1_2__Mem256_RC5125_0,
3002 Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1,
3003 Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3,
3004 Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1,
3005 Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3,
3006 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4,
3007 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4,
3008 Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4,
3009 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0,
3010 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0,
3011 Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0,
3012 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5,
3013 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5,
3014 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5,
3015 Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0,
3016 Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0,
3017 Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0,
3018 Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6,
3019 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6,
3020 Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6,
3021 Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6,
3022 Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0,
3023 Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7,
3024 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6,
3025 Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0,
3026 Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7,
3027 Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7,
3028 Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8,
3029 Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7,
3030 Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4,
3031 Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0,
3032 Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7,
3033 Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0,
3034 Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8,
3035 Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0,
3036 Convert__Mem1285_2__Reg1_1__Reg1_0,
3037 Convert__Mem2565_2__Reg1_1__Reg1_0,
3038 Convert__Mem1285_0__Reg1_1__Reg1_2,
3039 Convert__Mem2565_0__Reg1_1__Reg1_2,
3040 Convert__Reg1_0__Reg1_2__Reg1_4,
3041 Convert__Mem645_1__Reg1_3__Reg1_0,
3042 Convert__Mem645_0__Reg1_2__Reg1_4,
3043 Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0,
3044 Convert__Mem325_1__Reg1_3__Reg1_0,
3045 Convert__Mem325_0__Reg1_2__Reg1_4,
3046 Convert__VK4Pair1_2__Reg1_1__Reg1_0,
3047 Convert__VK8Pair1_2__Reg1_1__Reg1_0,
3048 Convert__VK16Pair1_2__Reg1_1__Reg1_0,
3049 Convert__VK16Pair1_0__Reg1_1__Reg1_2,
3050 Convert__VK16Pair1_0__Reg1_1__Mem5125_2,
3051 Convert__VK4Pair1_0__Reg1_1__Reg1_2,
3052 Convert__VK4Pair1_0__Reg1_1__Mem1285_2,
3053 Convert__VK8Pair1_0__Reg1_1__Reg1_2,
3054 Convert__VK8Pair1_0__Reg1_1__Mem2565_2,
3055 Convert__VK4Pair1_2__Reg1_1__Mem1285_0,
3056 Convert__VK8Pair1_2__Reg1_1__Mem2565_0,
3057 Convert__VK16Pair1_2__Reg1_1__Mem5125_0,
3058 Convert__VK16Pair1_0__Reg1_1__Mem325_2,
3059 Convert__VK4Pair1_0__Reg1_1__Mem325_2,
3060 Convert__VK8Pair1_0__Reg1_1__Mem325_2,
3061 Convert__VK16Pair1_3__Reg1_2__Mem325_0,
3062 Convert__VK4Pair1_3__Reg1_2__Mem325_0,
3063 Convert__VK8Pair1_3__Reg1_2__Mem325_0,
3064 Convert__VK2Pair1_2__Reg1_1__Reg1_0,
3065 Convert__VK2Pair1_0__Reg1_1__Reg1_2,
3066 Convert__VK2Pair1_0__Reg1_1__Mem1285_2,
3067 Convert__VK4Pair1_0__Reg1_1__Mem2565_2,
3068 Convert__VK8Pair1_0__Reg1_1__Mem5125_2,
3069 Convert__VK2Pair1_2__Reg1_1__Mem1285_0,
3070 Convert__VK4Pair1_2__Reg1_1__Mem2565_0,
3071 Convert__VK8Pair1_2__Reg1_1__Mem5125_0,
3072 Convert__VK2Pair1_0__Reg1_1__Mem645_2,
3073 Convert__VK4Pair1_0__Reg1_1__Mem645_2,
3074 Convert__VK8Pair1_0__Reg1_1__Mem645_2,
3075 Convert__VK2Pair1_3__Reg1_2__Mem645_0,
3076 Convert__VK4Pair1_3__Reg1_2__Mem645_0,
3077 Convert__VK8Pair1_3__Reg1_2__Mem645_0,
3078 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4,
3079 Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0,
3080 Convert__Reg1_0__Reg1_2__Mem85_5,
3081 Convert__Reg1_1__Reg1_3__Mem85_0,
3082 Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4,
3083 Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0,
3084 Convert__Reg1_0__Reg1_2__Mem165_5,
3085 Convert__Reg1_1__Reg1_3__Mem165_0,
3086 Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17,
3087 Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17,
3088 Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17,
3089 Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17,
3090 Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17,
3091 Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17,
3092 Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17,
3093 Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17,
3094 Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1,
3095 Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1,
3096 Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1,
3097 Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1,
3098 Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1,
3099 Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1,
3100 Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1,
3101 Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1,
3102 Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16,
3103 Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16,
3104 Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16,
3105 Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16,
3106 Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16,
3107 Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16,
3108 Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16,
3109 Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16,
3110 Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0,
3111 Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0,
3112 Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0,
3113 Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0,
3114 Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0,
3115 Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0,
3116 Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0,
3117 Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0,
3118 Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4,
3119 Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi41_4,
3120 Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi41_4,
3121 Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi41_4,
3122 Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi41_4,
3123 Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0,
3124 Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi41_0,
3125 Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi41_0,
3126 Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi41_0,
3127 Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi41_0,
3128 Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3,
3129 Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3,
3130 Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0,
3131 Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0,
3132 Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3,
3133 Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0,
3134 Convert__Mem165_1__Reg1_3__Reg1_0,
3135 Convert__Mem165_0__Reg1_2__Reg1_4,
3136 Convert__Reg1_2__Mem1285_1__Reg1_0,
3137 Convert__Reg1_0__Mem1285_1__Reg1_2,
3138 Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0,
3139 Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0,
3140 Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0,
3141 Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4,
3142 Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4,
3143 Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4,
3144 Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0,
3145 Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0,
3146 Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4,
3147 Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4,
3148 Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0,
3149 Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0,
3150 Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0,
3151 Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4,
3152 Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4,
3153 Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4,
3154 Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2,
3155 Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1,
3156 Convert__AbsMem161_0,
3157 Convert__Reg1_1__Tie0_2_2,
3158 Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1,
3159 CVT_NUM_SIGNATURES
3160};
3161
3162} // end anonymous namespace
3163
3164static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][13] = {
3165 // Convert_NoOperands
3166 { CVT_Done },
3167 // Convert__imm_95_10
3168 { CVT_imm_95_10, 0, CVT_Done },
3169 // Convert__Imm1_0
3170 { CVT_95_addImmOperands, 1, CVT_Done },
3171 // Convert__Imm1_1
3172 { CVT_95_addImmOperands, 2, CVT_Done },
3173 // Convert__regAX__Tie0_1_1__ImmSExti16i81_1
3174 { CVT_regAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
3175 // Convert__regEAX__Tie0_1_1__ImmSExti32i81_1
3176 { CVT_regEAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
3177 // Convert__regRAX__Tie0_1_1__ImmSExti64i81_1
3178 { CVT_regRAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
3179 // Convert__ImmSExti64i321_1
3180 { CVT_95_addImmOperands, 2, CVT_Done },
3181 // Convert__Reg1_0__Tie0_1_1__Reg1_1
3182 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_Done },
3183 // Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1
3184 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
3185 // Convert__Reg1_0__Tie0_1_1__Imm1_1
3186 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
3187 // Convert__Reg1_0__Tie0_1_1__Mem165_1
3188 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
3189 // Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1
3190 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
3191 // Convert__Reg1_0__Tie0_1_1__Mem325_1
3192 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
3193 // Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1
3194 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
3195 // Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1
3196 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
3197 // Convert__Reg1_0__Tie0_1_1__Mem645_1
3198 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
3199 // Convert__Reg1_0__Tie0_1_1__Mem85_1
3200 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
3201 // Convert__Mem165_0__Reg1_1
3202 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3203 // Convert__Mem165_0__ImmSExti16i81_1
3204 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3205 // Convert__Mem165_0__Imm1_1
3206 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3207 // Convert__Mem325_0__Reg1_1
3208 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3209 // Convert__Mem325_0__ImmSExti32i81_1
3210 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3211 // Convert__Mem325_0__Imm1_1
3212 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3213 // Convert__Mem645_0__Reg1_1
3214 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3215 // Convert__Mem645_0__ImmSExti64i81_1
3216 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3217 // Convert__Mem645_0__ImmSExti64i321_1
3218 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3219 // Convert__Mem85_0__Reg1_1
3220 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3221 // Convert__Mem85_0__Imm1_1
3222 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3223 // Convert__Reg1_1__Tie0_2_2__Reg1_0
3224 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_Done },
3225 // Convert__Mem85_1__Reg1_0
3226 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3227 // Convert__Reg1_1__Tie0_2_2__Imm1_0
3228 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
3229 // Convert__Mem85_1__Imm1_0
3230 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3231 // Convert__Reg1_1__Tie0_2_2__Mem85_0
3232 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
3233 // Convert__Mem325_1__Reg1_0
3234 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3235 // Convert__regEAX__Tie0_1_1__ImmSExti32i81_0
3236 { CVT_regEAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
3237 // Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0
3238 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
3239 // Convert__Mem325_1__ImmSExti32i81_0
3240 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3241 // Convert__Mem325_1__Imm1_0
3242 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3243 // Convert__Reg1_1__Tie0_2_2__Mem325_0
3244 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
3245 // Convert__Mem645_1__Reg1_0
3246 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3247 // Convert__regRAX__Tie0_1_1__ImmSExti64i81_0
3248 { CVT_regRAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
3249 // Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0
3250 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
3251 // Convert__Mem645_1__ImmSExti64i81_0
3252 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3253 // Convert__ImmSExti64i321_0
3254 { CVT_95_addImmOperands, 1, CVT_Done },
3255 // Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0
3256 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
3257 // Convert__Mem645_1__ImmSExti64i321_0
3258 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3259 // Convert__Reg1_1__Tie0_2_2__Mem645_0
3260 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
3261 // Convert__Mem165_1__Reg1_0
3262 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3263 // Convert__regAX__Tie0_1_1__ImmSExti16i81_0
3264 { CVT_regAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
3265 // Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0
3266 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
3267 // Convert__Mem165_1__ImmSExti16i81_0
3268 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3269 // Convert__Mem165_1__Imm1_0
3270 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3271 // Convert__Reg1_1__Tie0_2_2__Mem165_0
3272 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
3273 // Convert__Reg1_1__Tie0_1_1__Reg1_0
3274 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 1, CVT_Done },
3275 // Convert__Reg1_1__Tie0_1_1__Mem325_0
3276 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
3277 // Convert__Reg1_1__Tie0_1_1__Mem645_0
3278 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
3279 // Convert__Reg1_0__Tie0_1_1__Mem1285_1
3280 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
3281 // Convert__Reg1_1__Tie0_1_1__Mem1285_0
3282 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
3283 // Convert__Reg1_0__Tie0_1_1__Mem5_1
3284 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
3285 // Convert__Reg1_1__Tie0_2_2__Mem5_0
3286 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
3287 // Convert__Mem5_0
3288 { CVT_95_addMemOperands, 1, CVT_Done },
3289 // Convert__Reg1_1__Reg1_0
3290 { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3291 // Convert__Reg1_0__Reg1_1
3292 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
3293 // Convert__Reg1_0__Mem1285_1
3294 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3295 // Convert__Reg1_1__Mem1285_0
3296 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3297 // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2
3298 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3299 // Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2
3300 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3301 // Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0
3302 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3303 // Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0
3304 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3305 // Convert__Reg1_0__Reg1_1__Reg1_2
3306 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
3307 // Convert__Reg1_0__Reg1_1__Mem325_2
3308 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3309 // Convert__Reg1_0__Reg1_1__Mem645_2
3310 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3311 // Convert__Reg1_2__Reg1_1__Reg1_0
3312 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3313 // Convert__Reg1_2__Reg1_1__Mem325_0
3314 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3315 // Convert__Reg1_2__Reg1_1__Mem645_0
3316 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3317 // Convert__Reg1_0__Reg1_1__Imm1_2
3318 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3319 // Convert__Reg1_0__Mem325_1__Reg1_2
3320 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
3321 // Convert__Reg1_0__Mem325_1__Imm1_2
3322 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3323 // Convert__Reg1_0__Reg1_1__ImmSExti64i321_2
3324 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3325 // Convert__Reg1_0__Mem645_1__Reg1_2
3326 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
3327 // Convert__Reg1_0__Mem645_1__ImmSExti64i321_2
3328 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3329 // Convert__Reg1_2__Mem325_1__Reg1_0
3330 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3331 // Convert__Reg1_2__Reg1_1__Imm1_0
3332 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3333 // Convert__Reg1_2__Mem325_1__Imm1_0
3334 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3335 // Convert__Reg1_2__Mem645_1__Reg1_0
3336 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3337 // Convert__Reg1_2__Reg1_1__ImmSExti64i321_0
3338 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3339 // Convert__Reg1_2__Mem645_1__ImmSExti64i321_0
3340 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3341 // Convert__Reg1_0__Mem325_1
3342 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3343 // Convert__Reg1_0__Mem645_1
3344 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3345 // Convert__Reg1_1__Mem325_0
3346 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3347 // Convert__Reg1_1__Mem645_0
3348 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3349 // Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2
3350 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3351 // Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2
3352 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3353 // Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0
3354 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3355 // Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0
3356 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3357 // Convert__Reg1_1__Tie0_2_2__Mem1285_0
3358 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
3359 // Convert__Reg1_2__Tie0_1_1__Reg1_1
3360 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_Done },
3361 // Convert__Reg1_2__Tie0_1_1__Mem1285_1
3362 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
3363 // Convert__Reg1_0__Mem5_1
3364 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3365 // Convert__Reg1_1__Mem5_0
3366 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3367 // Convert__Mem1285_1__Reg1_0
3368 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3369 // Convert__Mem1285_0__Reg1_1
3370 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3371 // Convert__Mem5_1__Reg1_0
3372 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3373 // Convert__Mem5_0__Reg1_1
3374 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3375 // Convert__Reg1_0__Mem165_1
3376 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3377 // Convert__Reg1_1__Mem165_0
3378 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3379 // Convert__Reg1_0__Tie0_1_1
3380 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_Done },
3381 // Convert__Reg1_0__ImmUnsignedi81_1
3382 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3383 // Convert__Mem325_1__ImmUnsignedi81_0
3384 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3385 // Convert__Mem165_0__ImmUnsignedi81_1
3386 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3387 // Convert__Mem325_0__ImmUnsignedi81_1
3388 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3389 // Convert__Mem645_0__ImmUnsignedi81_1
3390 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3391 // Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1
3392 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
3393 // Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0
3394 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
3395 // Convert__Mem645_1__ImmUnsignedi81_0
3396 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3397 // Convert__Mem165_1__ImmUnsignedi81_0
3398 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3399 // Convert__Reg1_1__ImmUnsignedi81_0
3400 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3401 // Convert__Reg1_0
3402 { CVT_95_Reg, 1, CVT_Done },
3403 // Convert__AbsMem1_0
3404 { CVT_95_addAbsMemOperands, 1, CVT_Done },
3405 // Convert__Mem165_0
3406 { CVT_95_addMemOperands, 1, CVT_Done },
3407 // Convert__Mem325_0
3408 { CVT_95_addMemOperands, 1, CVT_Done },
3409 // Convert__Mem645_0
3410 { CVT_95_addMemOperands, 1, CVT_Done },
3411 // Convert__Imm1_1__Imm1_0
3412 { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3413 // Convert__Reg1_1
3414 { CVT_95_Reg, 2, CVT_Done },
3415 // Convert__Mem325_1
3416 { CVT_95_addMemOperands, 2, CVT_Done },
3417 // Convert__Mem645_1
3418 { CVT_95_addMemOperands, 2, CVT_Done },
3419 // Convert__Mem165_1
3420 { CVT_95_addMemOperands, 2, CVT_Done },
3421 // Convert__Mem85_0
3422 { CVT_95_addMemOperands, 1, CVT_Done },
3423 // Convert__Reg1_0__Tie0_1_1__Reg1_0
3424 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 1, CVT_Done },
3425 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_7
3426 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_7, 0, CVT_Done },
3427 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_7
3428 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_7, 0, CVT_Done },
3429 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_7
3430 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_7, 0, CVT_Done },
3431 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_7
3432 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_7, 0, CVT_Done },
3433 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_3
3434 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_3, 0, CVT_Done },
3435 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_3
3436 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_3, 0, CVT_Done },
3437 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_3
3438 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_3, 0, CVT_Done },
3439 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_3
3440 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_3, 0, CVT_Done },
3441 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_3
3442 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_3, 0, CVT_Done },
3443 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_3
3444 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_3, 0, CVT_Done },
3445 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_3
3446 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_3, 0, CVT_Done },
3447 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_3
3448 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_3, 0, CVT_Done },
3449 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_7
3450 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_7, 0, CVT_Done },
3451 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_7
3452 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_7, 0, CVT_Done },
3453 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_7
3454 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_7, 0, CVT_Done },
3455 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_7
3456 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_7, 0, CVT_Done },
3457 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_2
3458 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_2, 0, CVT_Done },
3459 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_2
3460 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_2, 0, CVT_Done },
3461 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_2
3462 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_2, 0, CVT_Done },
3463 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_2
3464 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_2, 0, CVT_Done },
3465 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_6
3466 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_6, 0, CVT_Done },
3467 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_6
3468 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_6, 0, CVT_Done },
3469 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_6
3470 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_6, 0, CVT_Done },
3471 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_6
3472 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_6, 0, CVT_Done },
3473 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_6
3474 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_6, 0, CVT_Done },
3475 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_6
3476 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_6, 0, CVT_Done },
3477 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_6
3478 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_6, 0, CVT_Done },
3479 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_6
3480 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_6, 0, CVT_Done },
3481 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_2
3482 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_2, 0, CVT_Done },
3483 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_2
3484 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_2, 0, CVT_Done },
3485 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_2
3486 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_2, 0, CVT_Done },
3487 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_2
3488 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_2, 0, CVT_Done },
3489 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_4
3490 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_4, 0, CVT_Done },
3491 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_4
3492 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_4, 0, CVT_Done },
3493 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_4
3494 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_4, 0, CVT_Done },
3495 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_4
3496 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_4, 0, CVT_Done },
3497 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_4
3498 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_4, 0, CVT_Done },
3499 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_4
3500 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_4, 0, CVT_Done },
3501 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_4
3502 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_4, 0, CVT_Done },
3503 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_4
3504 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_4, 0, CVT_Done },
3505 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_15
3506 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_15, 0, CVT_Done },
3507 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_15
3508 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_15, 0, CVT_Done },
3509 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_15
3510 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_15, 0, CVT_Done },
3511 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_15
3512 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_15, 0, CVT_Done },
3513 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_13
3514 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_13, 0, CVT_Done },
3515 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_13
3516 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_13, 0, CVT_Done },
3517 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_13
3518 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_13, 0, CVT_Done },
3519 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_13
3520 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_13, 0, CVT_Done },
3521 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_13
3522 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_13, 0, CVT_Done },
3523 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_13
3524 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_13, 0, CVT_Done },
3525 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_13
3526 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_13, 0, CVT_Done },
3527 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_13
3528 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_13, 0, CVT_Done },
3529 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_15
3530 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_15, 0, CVT_Done },
3531 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_15
3532 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_15, 0, CVT_Done },
3533 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_15
3534 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_15, 0, CVT_Done },
3535 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_15
3536 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_15, 0, CVT_Done },
3537 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_12
3538 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_12, 0, CVT_Done },
3539 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_12
3540 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_12, 0, CVT_Done },
3541 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_12
3542 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_12, 0, CVT_Done },
3543 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_12
3544 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_12, 0, CVT_Done },
3545 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_14
3546 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_14, 0, CVT_Done },
3547 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_14
3548 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_14, 0, CVT_Done },
3549 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_14
3550 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_14, 0, CVT_Done },
3551 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_14
3552 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_14, 0, CVT_Done },
3553 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_14
3554 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_14, 0, CVT_Done },
3555 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_14
3556 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_14, 0, CVT_Done },
3557 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_14
3558 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_14, 0, CVT_Done },
3559 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_14
3560 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_14, 0, CVT_Done },
3561 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_12
3562 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_12, 0, CVT_Done },
3563 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_12
3564 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_12, 0, CVT_Done },
3565 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_12
3566 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_12, 0, CVT_Done },
3567 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_12
3568 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_12, 0, CVT_Done },
3569 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_5
3570 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_5, 0, CVT_Done },
3571 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_5
3572 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_5, 0, CVT_Done },
3573 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_5
3574 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_5, 0, CVT_Done },
3575 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_5
3576 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_5, 0, CVT_Done },
3577 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_5
3578 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_5, 0, CVT_Done },
3579 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_5
3580 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_5, 0, CVT_Done },
3581 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_5
3582 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_5, 0, CVT_Done },
3583 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_5
3584 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_5, 0, CVT_Done },
3585 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1
3586 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_1, 0, CVT_Done },
3587 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_1
3588 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_1, 0, CVT_Done },
3589 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_1
3590 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_1, 0, CVT_Done },
3591 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_1
3592 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_1, 0, CVT_Done },
3593 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1
3594 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
3595 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_1
3596 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
3597 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_1
3598 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
3599 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_1
3600 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
3601 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_11
3602 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_11, 0, CVT_Done },
3603 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_11
3604 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_11, 0, CVT_Done },
3605 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_11
3606 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_11, 0, CVT_Done },
3607 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_11
3608 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_11, 0, CVT_Done },
3609 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_11
3610 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_11, 0, CVT_Done },
3611 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_11
3612 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_11, 0, CVT_Done },
3613 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_11
3614 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_11, 0, CVT_Done },
3615 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_11
3616 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_11, 0, CVT_Done },
3617 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_9
3618 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_9, 0, CVT_Done },
3619 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_9
3620 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_9, 0, CVT_Done },
3621 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_9
3622 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_9, 0, CVT_Done },
3623 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_9
3624 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_9, 0, CVT_Done },
3625 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_9
3626 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_9, 0, CVT_Done },
3627 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_9
3628 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_9, 0, CVT_Done },
3629 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_9
3630 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_9, 0, CVT_Done },
3631 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_9
3632 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_9, 0, CVT_Done },
3633 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0
3634 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done },
3635 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_0
3636 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_0, 0, CVT_Done },
3637 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_0
3638 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_0, 0, CVT_Done },
3639 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_0
3640 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_0, 0, CVT_Done },
3641 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0
3642 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
3643 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_0
3644 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
3645 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_0
3646 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
3647 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_0
3648 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
3649 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_10
3650 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_10, 0, CVT_Done },
3651 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_10
3652 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_10, 0, CVT_Done },
3653 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_10
3654 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_10, 0, CVT_Done },
3655 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_10
3656 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_10, 0, CVT_Done },
3657 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_10
3658 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_10, 0, CVT_Done },
3659 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_10
3660 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_10, 0, CVT_Done },
3661 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_10
3662 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_10, 0, CVT_Done },
3663 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_10
3664 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_10, 0, CVT_Done },
3665 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_8
3666 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_8, 0, CVT_Done },
3667 // Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_8
3668 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_8, 0, CVT_Done },
3669 // Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_8
3670 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_8, 0, CVT_Done },
3671 // Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_8
3672 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_8, 0, CVT_Done },
3673 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_8
3674 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_8, 0, CVT_Done },
3675 // Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_8
3676 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_8, 0, CVT_Done },
3677 // Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_8
3678 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_8, 0, CVT_Done },
3679 // Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_8
3680 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_8, 0, CVT_Done },
3681 // Convert__regAX__ImmSExti16i81_1
3682 { CVT_regAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
3683 // Convert__regEAX__ImmSExti32i81_1
3684 { CVT_regEAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
3685 // Convert__regRAX__ImmSExti64i81_1
3686 { CVT_regRAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
3687 // Convert__Reg1_0__ImmSExti16i81_1
3688 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3689 // Convert__Reg1_0__Imm1_1
3690 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3691 // Convert__Reg1_0__ImmSExti32i81_1
3692 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3693 // Convert__Reg1_0__ImmSExti64i81_1
3694 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3695 // Convert__Reg1_0__ImmSExti64i321_1
3696 { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3697 // Convert__Reg1_0__Mem85_1
3698 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3699 // Convert__Reg1_1__Imm1_0
3700 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3701 // Convert__Reg1_1__Mem85_0
3702 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3703 // Convert__regEAX__ImmSExti32i81_0
3704 { CVT_regEAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
3705 // Convert__Reg1_1__ImmSExti32i81_0
3706 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3707 // Convert__regRAX__ImmSExti64i81_0
3708 { CVT_regRAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
3709 // Convert__Reg1_1__ImmSExti64i81_0
3710 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3711 // Convert__Reg1_1__ImmSExti64i321_0
3712 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3713 // Convert__DstIdx161_1__SrcIdx162_0
3714 { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3715 // Convert__DstIdx321_1__SrcIdx322_0
3716 { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3717 // Convert__DstIdx641_1__SrcIdx642_0
3718 { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3719 // Convert__DstIdx81_1__SrcIdx82_0
3720 { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3721 // Convert__DstIdx81_0__SrcIdx82_1
3722 { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3723 // Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2
3724 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3725 // Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0
3726 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3727 // Convert__DstIdx321_0__SrcIdx322_1
3728 { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3729 // Convert__DstIdx641_0__SrcIdx642_1
3730 { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3731 // Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2
3732 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3733 // Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0
3734 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3735 // Convert__DstIdx161_0__SrcIdx162_1
3736 { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3737 // Convert__regAX__ImmSExti16i81_0
3738 { CVT_regAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
3739 // Convert__Reg1_1__ImmSExti16i81_0
3740 { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3741 // Convert__Mem1285_0
3742 { CVT_95_addMemOperands, 1, CVT_Done },
3743 // Convert__Mem85_1
3744 { CVT_95_addMemOperands, 2, CVT_Done },
3745 // Convert__Reg1_0__Mem5125_1
3746 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3747 // Convert__Reg1_1__Mem5125_0
3748 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3749 // Convert__Imm1_0__Imm1_1
3750 { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3751 // Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0
3752 { CVT_95_addGR32orGR64Operands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3753 // Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0
3754 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3755 // Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2
3756 { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3757 // Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2
3758 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3759 // Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1__ImmUnsignedi81_2
3760 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3761 // Convert__Reg1_2__Tie0_3_3__ImmUnsignedi81_1__ImmUnsignedi81_0
3762 { CVT_95_Reg, 3, CVT_Tied, Tie0_3_3, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3763 // Convert__regST1
3764 { CVT_regST1, 0, CVT_Done },
3765 // Convert__regST0
3766 { CVT_regST0, 0, CVT_Done },
3767 // Convert__Mem805_0
3768 { CVT_95_addMemOperands, 1, CVT_Done },
3769 // Convert__ImmUnsignedi81_0
3770 { CVT_95_addImmOperands, 1, CVT_Done },
3771 // Convert__Reg1_0__Reg1_0__ImmSExti16i81_1
3772 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3773 // Convert__Reg1_0__Reg1_0__Imm1_1
3774 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3775 // Convert__Reg1_0__Reg1_0__ImmSExti32i81_1
3776 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3777 // Convert__Reg1_0__Reg1_0__ImmSExti64i81_1
3778 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3779 // Convert__Reg1_0__Reg1_0__ImmSExti64i321_1
3780 { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3781 // Convert__Reg1_0__Reg1_1__ImmSExti16i81_2
3782 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3783 // Convert__Reg1_0__Mem165_1__ImmSExti16i81_2
3784 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3785 // Convert__Reg1_0__Mem165_1__Imm1_2
3786 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3787 // Convert__Reg1_0__Reg1_1__ImmSExti32i81_2
3788 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3789 // Convert__Reg1_0__Mem325_1__ImmSExti32i81_2
3790 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3791 // Convert__Reg1_0__Reg1_1__ImmSExti64i81_2
3792 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3793 // Convert__Reg1_0__Mem645_1__ImmSExti64i81_2
3794 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3795 // Convert__Reg1_1__Reg1_1__ImmSExti32i81_0
3796 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3797 // Convert__Reg1_1__Reg1_1__Imm1_0
3798 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3799 // Convert__Reg1_2__Reg1_1__ImmSExti32i81_0
3800 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3801 // Convert__Reg1_2__Mem325_1__ImmSExti32i81_0
3802 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3803 // Convert__Reg1_1__Reg1_1__ImmSExti64i81_0
3804 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3805 // Convert__Reg1_1__Reg1_1__ImmSExti64i321_0
3806 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3807 // Convert__Reg1_2__Reg1_1__ImmSExti64i81_0
3808 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3809 // Convert__Reg1_2__Mem645_1__ImmSExti64i81_0
3810 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3811 // Convert__Reg1_1__Reg1_1__ImmSExti16i81_0
3812 { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3813 // Convert__Reg1_1__Tie0_1_1__Mem165_0
3814 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
3815 // Convert__Reg1_2__Reg1_1__ImmSExti16i81_0
3816 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3817 // Convert__Reg1_2__Mem165_1__ImmSExti16i81_0
3818 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3819 // Convert__Reg1_2__Mem165_1__Imm1_0
3820 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3821 // Convert__ImmUnsignedi81_1
3822 { CVT_95_addImmOperands, 2, CVT_Done },
3823 // Convert__DstIdx161_0
3824 { CVT_95_addDstIdxOperands, 1, CVT_Done },
3825 // Convert__DstIdx321_0
3826 { CVT_95_addDstIdxOperands, 1, CVT_Done },
3827 // Convert__DstIdx81_0
3828 { CVT_95_addDstIdxOperands, 1, CVT_Done },
3829 // Convert__DstIdx81_1
3830 { CVT_95_addDstIdxOperands, 2, CVT_Done },
3831 // Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3
3832 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3833 // Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0
3834 { CVT_95_Reg, 4, CVT_Tied, Tie0_4_4, CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3835 // Convert__DstIdx321_1
3836 { CVT_95_addDstIdxOperands, 2, CVT_Done },
3837 // Convert__DstIdx161_1
3838 { CVT_95_addDstIdxOperands, 2, CVT_Done },
3839 // Convert__AbsMem1_0__imm_95_7
3840 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_7, 0, CVT_Done },
3841 // Convert__AbsMem1_0__imm_95_3
3842 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_3, 0, CVT_Done },
3843 // Convert__AbsMem1_0__imm_95_2
3844 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_2, 0, CVT_Done },
3845 // Convert__AbsMem1_0__imm_95_6
3846 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_6, 0, CVT_Done },
3847 // Convert__AbsMem1_0__imm_95_4
3848 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_4, 0, CVT_Done },
3849 // Convert__AbsMem1_0__imm_95_15
3850 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_15, 0, CVT_Done },
3851 // Convert__AbsMem1_0__imm_95_13
3852 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_13, 0, CVT_Done },
3853 // Convert__AbsMem1_0__imm_95_12
3854 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_12, 0, CVT_Done },
3855 // Convert__AbsMem1_0__imm_95_14
3856 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_14, 0, CVT_Done },
3857 // Convert__AbsMem1_0__imm_95_5
3858 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_5, 0, CVT_Done },
3859 // Convert__AbsMem1_0__imm_95_1
3860 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
3861 // Convert__AbsMem1_0__imm_95_11
3862 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_11, 0, CVT_Done },
3863 // Convert__AbsMem1_0__imm_95_9
3864 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_9, 0, CVT_Done },
3865 // Convert__AbsMem1_0__imm_95_0
3866 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
3867 // Convert__AbsMem1_0__imm_95_10
3868 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_10, 0, CVT_Done },
3869 // Convert__AbsMem1_0__imm_95_8
3870 { CVT_95_addAbsMemOperands, 1, CVT_imm_95_8, 0, CVT_Done },
3871 // Convert__Reg1_0__GR16orGR32orGR641_1
3872 { CVT_95_Reg, 1, CVT_95_addGR16orGR32orGR64Operands, 2, CVT_Done },
3873 // Convert__Reg1_1__GR16orGR32orGR641_0
3874 { CVT_95_Reg, 2, CVT_95_addGR16orGR32orGR64Operands, 1, CVT_Done },
3875 // Convert__Mem5_1
3876 { CVT_95_addMemOperands, 2, CVT_Done },
3877 // Convert__SrcIdx162_0
3878 { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3879 // Convert__SrcIdx322_0
3880 { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3881 // Convert__SrcIdx642_0
3882 { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3883 // Convert__SrcIdx82_0
3884 { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3885 // Convert__SrcIdx82_1
3886 { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3887 // Convert__SrcIdx162_1
3888 { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3889 // Convert__SrcIdx322_1
3890 { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3891 // Convert__SrcIdx642_1
3892 { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3893 // Convert__MemOffs16_82_1
3894 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3895 // Convert__MemOffs32_82_1
3896 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3897 // Convert__MemOffs16_162_1
3898 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3899 // Convert__MemOffs32_162_1
3900 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3901 // Convert__MemOffs16_322_1
3902 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3903 // Convert__MemOffs32_322_1
3904 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3905 // Convert__MemOffs32_642_1
3906 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3907 // Convert__MemOffs16_162_0
3908 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3909 // Convert__MemOffs16_322_0
3910 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3911 // Convert__MemOffs16_82_0
3912 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3913 // Convert__MemOffs32_162_0
3914 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3915 // Convert__MemOffs32_322_0
3916 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3917 // Convert__MemOffs32_642_0
3918 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3919 // Convert__MemOffs32_82_0
3920 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3921 // Convert__MemOffs64_82_1
3922 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3923 // Convert__MemOffs64_162_1
3924 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3925 // Convert__MemOffs64_322_1
3926 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3927 // Convert__MemOffs64_642_1
3928 { CVT_95_addMemOffsOperands, 2, CVT_Done },
3929 // Convert__MemOffs64_162_0
3930 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3931 // Convert__MemOffs64_322_0
3932 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3933 // Convert__MemOffs64_642_0
3934 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3935 // Convert__MemOffs64_82_0
3936 { CVT_95_addMemOffsOperands, 1, CVT_Done },
3937 // Convert__GR32orGR641_1__Reg1_0
3938 { CVT_95_addGR32orGR64Operands, 2, CVT_95_Reg, 1, CVT_Done },
3939 // Convert__GR32orGR641_0__Reg1_1
3940 { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_Done },
3941 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17
3942 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done },
3943 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_17
3944 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_17, 0, CVT_Done },
3945 // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_17
3946 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_17, 0, CVT_Done },
3947 // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_17
3948 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
3949 // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_1
3950 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_1, 0, CVT_Done },
3951 // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_1
3952 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
3953 // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16
3954 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done },
3955 // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_16
3956 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_16, 0, CVT_Done },
3957 // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_16
3958 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_16, 0, CVT_Done },
3959 // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_16
3960 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
3961 // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_0
3962 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_0, 0, CVT_Done },
3963 // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_0
3964 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
3965 // Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0
3966 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3967 // Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2
3968 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3969 // Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0
3970 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3971 // Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2
3972 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3973 // Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0
3974 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3975 // Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2
3976 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3977 // Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2
3978 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3979 // Convert__Reg1_0__Tie0_1_1__Mem85_1__ImmUnsignedi81_2
3980 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3981 // Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0
3982 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3983 // Convert__Reg1_2__Tie0_1_1__Mem85_1__ImmUnsignedi81_0
3984 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3985 // Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2
3986 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3987 // Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0
3988 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3989 // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2
3990 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3991 // Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0
3992 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3993 // Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0
3994 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
3995 // Convert__ImmSExti64i81_0
3996 { CVT_95_addImmOperands, 1, CVT_Done },
3997 // Convert__ImmSExti16i81_0
3998 { CVT_95_addImmOperands, 1, CVT_Done },
3999 // Convert__ImmSExti32i81_0
4000 { CVT_95_addImmOperands, 1, CVT_Done },
4001 // Convert__Mem85_0__ImmUnsignedi81_1
4002 { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
4003 // Convert__Reg1_1__Tie0_1_1
4004 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_Done },
4005 // Convert__Mem85_1__ImmUnsignedi81_0
4006 { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4007 // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2
4008 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
4009 // Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0
4010 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4011 // Convert__DstIdx641_0
4012 { CVT_95_addDstIdxOperands, 1, CVT_Done },
4013 // Convert__DstIdx641_1
4014 { CVT_95_addDstIdxOperands, 2, CVT_Done },
4015 // Convert__Reg1_0__imm_95_7
4016 { CVT_95_Reg, 1, CVT_imm_95_7, 0, CVT_Done },
4017 // Convert__Mem85_0__imm_95_7
4018 { CVT_95_addMemOperands, 1, CVT_imm_95_7, 0, CVT_Done },
4019 // Convert__Reg1_0__imm_95_3
4020 { CVT_95_Reg, 1, CVT_imm_95_3, 0, CVT_Done },
4021 // Convert__Mem85_0__imm_95_3
4022 { CVT_95_addMemOperands, 1, CVT_imm_95_3, 0, CVT_Done },
4023 // Convert__Reg1_0__imm_95_2
4024 { CVT_95_Reg, 1, CVT_imm_95_2, 0, CVT_Done },
4025 // Convert__Mem85_0__imm_95_2
4026 { CVT_95_addMemOperands, 1, CVT_imm_95_2, 0, CVT_Done },
4027 // Convert__Reg1_0__imm_95_6
4028 { CVT_95_Reg, 1, CVT_imm_95_6, 0, CVT_Done },
4029 // Convert__Mem85_0__imm_95_6
4030 { CVT_95_addMemOperands, 1, CVT_imm_95_6, 0, CVT_Done },
4031 // Convert__Reg1_0__imm_95_4
4032 { CVT_95_Reg, 1, CVT_imm_95_4, 0, CVT_Done },
4033 // Convert__Mem85_0__imm_95_4
4034 { CVT_95_addMemOperands, 1, CVT_imm_95_4, 0, CVT_Done },
4035 // Convert__Reg1_0__imm_95_15
4036 { CVT_95_Reg, 1, CVT_imm_95_15, 0, CVT_Done },
4037 // Convert__Mem85_0__imm_95_15
4038 { CVT_95_addMemOperands, 1, CVT_imm_95_15, 0, CVT_Done },
4039 // Convert__Reg1_0__imm_95_13
4040 { CVT_95_Reg, 1, CVT_imm_95_13, 0, CVT_Done },
4041 // Convert__Mem85_0__imm_95_13
4042 { CVT_95_addMemOperands, 1, CVT_imm_95_13, 0, CVT_Done },
4043 // Convert__Reg1_0__imm_95_12
4044 { CVT_95_Reg, 1, CVT_imm_95_12, 0, CVT_Done },
4045 // Convert__Mem85_0__imm_95_12
4046 { CVT_95_addMemOperands, 1, CVT_imm_95_12, 0, CVT_Done },
4047 // Convert__Reg1_0__imm_95_14
4048 { CVT_95_Reg, 1, CVT_imm_95_14, 0, CVT_Done },
4049 // Convert__Mem85_0__imm_95_14
4050 { CVT_95_addMemOperands, 1, CVT_imm_95_14, 0, CVT_Done },
4051 // Convert__Reg1_0__imm_95_5
4052 { CVT_95_Reg, 1, CVT_imm_95_5, 0, CVT_Done },
4053 // Convert__Mem85_0__imm_95_5
4054 { CVT_95_addMemOperands, 1, CVT_imm_95_5, 0, CVT_Done },
4055 // Convert__Reg1_0__imm_95_1
4056 { CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
4057 // Convert__Mem85_0__imm_95_1
4058 { CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
4059 // Convert__Reg1_0__imm_95_11
4060 { CVT_95_Reg, 1, CVT_imm_95_11, 0, CVT_Done },
4061 // Convert__Mem85_0__imm_95_11
4062 { CVT_95_addMemOperands, 1, CVT_imm_95_11, 0, CVT_Done },
4063 // Convert__Reg1_0__imm_95_9
4064 { CVT_95_Reg, 1, CVT_imm_95_9, 0, CVT_Done },
4065 // Convert__Mem85_0__imm_95_9
4066 { CVT_95_addMemOperands, 1, CVT_imm_95_9, 0, CVT_Done },
4067 // Convert__Reg1_0__imm_95_0
4068 { CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
4069 // Convert__Mem85_0__imm_95_0
4070 { CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
4071 // Convert__Reg1_0__imm_95_10
4072 { CVT_95_Reg, 1, CVT_imm_95_10, 0, CVT_Done },
4073 // Convert__Mem85_0__imm_95_10
4074 { CVT_95_addMemOperands, 1, CVT_imm_95_10, 0, CVT_Done },
4075 // Convert__Reg1_0__imm_95_8
4076 { CVT_95_Reg, 1, CVT_imm_95_8, 0, CVT_Done },
4077 // Convert__Mem85_0__imm_95_8
4078 { CVT_95_addMemOperands, 1, CVT_imm_95_8, 0, CVT_Done },
4079 // Convert__Mem325_2__Reg1_1
4080 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
4081 // Convert__Mem645_2__Reg1_1
4082 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
4083 // Convert__Mem165_2__Reg1_1
4084 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
4085 // Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0
4086 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4087 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2
4088 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
4089 // Convert__Reg1_0__SibMem5_1
4090 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
4091 // Convert__Reg1_1__SibMem5_0
4092 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4093 // Convert__SibMem5_1__Reg1_0
4094 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
4095 // Convert__SibMem5_0__Reg1_1
4096 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
4097 // Convert__GR32orGR641_0
4098 { CVT_95_addGR32orGR64Operands, 1, CVT_Done },
4099 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2
4100 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4101 // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0
4102 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4103 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5
4104 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
4105 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0
4106 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4107 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6
4108 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
4109 // Convert__Reg1_0__Reg1_1__Mem1285_2
4110 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4111 // Convert__Reg1_0__Reg1_1__Mem2565_2
4112 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4113 // Convert__Reg1_0__Reg1_1__Mem5125_2
4114 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4115 // Convert__Reg1_2__Reg1_1__Mem1285_0
4116 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4117 // Convert__Reg1_2__Reg1_1__Mem2565_0
4118 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4119 // Convert__Reg1_2__Reg1_1__Mem5125_0
4120 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4121 // Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3
4122 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done },
4123 // Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0
4124 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
4125 // Convert__Reg1_3__Reg1_2__Mem645_0
4126 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4127 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5
4128 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done },
4129 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0
4130 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4131 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5
4132 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
4133 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5
4134 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
4135 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0
4136 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4137 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0
4138 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4139 // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6
4140 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
4141 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6
4142 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
4143 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5
4144 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
4145 // Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0
4146 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4147 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6
4148 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
4149 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6
4150 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
4151 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6
4152 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done },
4153 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0
4154 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
4155 // Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0
4156 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4157 // Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0
4158 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4159 // Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0
4160 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4161 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0
4162 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4163 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6
4164 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
4165 // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7
4166 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done },
4167 // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0
4168 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
4169 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0
4170 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4171 // Convert__Reg1_3__Reg1_2__Mem325_0
4172 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4173 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5
4174 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
4175 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0
4176 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4177 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6
4178 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
4179 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0
4180 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4181 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0
4182 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4183 // Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0
4184 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4185 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0
4186 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4187 // Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0
4188 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4189 // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3
4190 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
4191 // Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3
4192 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4193 // Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3
4194 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4195 // Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3
4196 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4197 // Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0
4198 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4199 // Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0
4200 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4201 // Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0
4202 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4203 // Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0
4204 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4205 // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4
4206 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
4207 // Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0
4208 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4209 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6
4210 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
4211 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6
4212 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4213 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6
4214 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4215 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6
4216 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4217 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0
4218 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4219 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0
4220 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4221 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0
4222 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4223 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0
4224 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4225 // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7
4226 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done },
4227 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7
4228 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4229 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7
4230 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4231 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7
4232 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4233 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7
4234 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4235 // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0
4236 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4237 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0
4238 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4239 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0
4240 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4241 // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0
4242 { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4243 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0
4244 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4245 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8
4246 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
4247 // Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0
4248 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4249 // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4
4250 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
4251 // Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0
4252 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4253 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7
4254 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4255 // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0
4256 { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4257 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8
4258 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
4259 // Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0
4260 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4261 // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5
4262 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done },
4263 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5
4264 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
4265 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5
4266 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
4267 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5
4268 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
4269 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5
4270 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
4271 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5
4272 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
4273 // Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0
4274 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4275 // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3
4276 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
4277 // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3
4278 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
4279 // Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0
4280 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
4281 // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3
4282 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
4283 // Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0
4284 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
4285 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0
4286 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4287 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4
4288 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4289 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4
4290 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
4291 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0
4292 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4293 // Convert__Reg1_1__Reg1_3__Reg1_0
4294 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4295 // Convert__Reg1_0__Reg1_2__Reg1_5
4296 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_Done },
4297 // Convert__Reg1_0__Reg1_2__Mem645_5
4298 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
4299 // Convert__Reg1_1__Reg1_3__Mem645_0
4300 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4301 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4
4302 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
4303 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0
4304 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4305 // Convert__Reg1_0__Reg1_2__Mem1285_5
4306 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
4307 // Convert__Reg1_1__Reg1_3__Mem1285_0
4308 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4309 // Convert__Reg1_0__Mem2565_1
4310 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
4311 // Convert__Reg1_1__Mem2565_0
4312 { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4313 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4
4314 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
4315 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0
4316 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4317 // Convert__Reg1_0__Reg1_2__Mem2565_5
4318 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
4319 // Convert__Reg1_1__Reg1_3__Mem2565_0
4320 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4321 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4
4322 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
4323 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0
4324 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4325 // Convert__Reg1_0__Reg1_2__Mem325_5
4326 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
4327 // Convert__Reg1_1__Reg1_3__Mem325_0
4328 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4329 // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4
4330 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done },
4331 // Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0
4332 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
4333 // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6
4334 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
4335 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6
4336 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4337 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6
4338 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4339 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6
4340 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4341 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7
4342 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4343 // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7
4344 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
4345 // Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0
4346 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
4347 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7
4348 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4349 // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3
4350 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4351 // Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0
4352 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4353 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6
4354 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4355 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0
4356 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4357 // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3
4358 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4359 // Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0
4360 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4361 // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6
4362 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4363 // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0
4364 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4365 // Convert__Reg1_2__Reg1_1
4366 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
4367 // Convert__Mem2565_1__Reg1_0
4368 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
4369 // Convert__Mem5125_1__Reg1_0
4370 { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
4371 // Convert__Mem2565_0__Reg1_1
4372 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
4373 // Convert__Mem5125_0__Reg1_1
4374 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
4375 // Convert__Mem1285_1__Reg1_3__Reg1_0
4376 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4377 // Convert__Mem2565_1__Reg1_3__Reg1_0
4378 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4379 // Convert__Mem5125_1__Reg1_3__Reg1_0
4380 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4381 // Convert__Mem1285_0__Reg1_2__Reg1_4
4382 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4383 // Convert__Mem2565_0__Reg1_2__Reg1_4
4384 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4385 // Convert__Mem5125_0__Reg1_2__Reg1_4
4386 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4387 // Convert__Reg1_2__Mem325_0
4388 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4389 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0
4390 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
4391 // Convert__Reg1_2__Reg1_4__Mem325_0
4392 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
4393 // Convert__Reg1_0__Reg1_1__AVX512RC1_2
4394 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 3, CVT_Done },
4395 // Convert__Reg1_2__Reg1_1__AVX512RC1_0
4396 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
4397 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4
4398 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
4399 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0
4400 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4401 // Convert__Reg1_0__Reg1_2__Mem5125_5
4402 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
4403 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5
4404 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addAVX512RCOperands, 6, CVT_Done },
4405 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0
4406 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
4407 // Convert__Reg1_1__Reg1_3__Mem5125_0
4408 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4409 // Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6
4410 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done },
4411 // Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0
4412 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
4413 // Convert__Reg1_2__Mem645_0
4414 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4415 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0
4416 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
4417 // Convert__Reg1_2__Reg1_4__Mem645_0
4418 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
4419 // Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0
4420 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4421 // Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0
4422 { CVT_95_Reg, 3, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
4423 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1
4424 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done },
4425 // Convert__Reg1_2__Reg1_4__Reg1_1
4426 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done },
4427 // Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0
4428 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4429 // Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0
4430 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4431 // Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2
4432 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
4433 // Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2
4434 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
4435 // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3
4436 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_Done },
4437 // Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0
4438 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
4439 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5
4440 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
4441 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0
4442 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4443 // Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
4444 { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4445 // Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
4446 { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4447 // Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
4448 { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4449 // Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
4450 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
4451 // Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
4452 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
4453 // Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
4454 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
4455 // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6
4456 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
4457 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6
4458 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done },
4459 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0
4460 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
4461 // Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
4462 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4463 // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7
4464 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
4465 // Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0
4466 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
4467 // Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1
4468 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addAVX512RCOperands, 2, CVT_Done },
4469 // Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2
4470 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addAVX512RCOperands, 3, CVT_Done },
4471 // Convert__Reg1_3__Reg1_2__Reg1_1
4472 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
4473 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1
4474 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
4475 // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1
4476 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
4477 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2
4478 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4479 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2
4480 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4481 // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0
4482 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4483 // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0
4484 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4485 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2
4486 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4487 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0
4488 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4489 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6
4490 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
4491 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6
4492 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
4493 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6
4494 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
4495 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6
4496 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
4497 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3
4498 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
4499 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3
4500 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4501 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3
4502 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4503 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3
4504 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4505 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0
4506 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4507 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0
4508 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4509 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0
4510 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4511 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0
4512 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4513 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4
4514 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
4515 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4
4516 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done },
4517 // Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0
4518 { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
4519 // Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0
4520 { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4521 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7
4522 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done },
4523 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7
4524 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4525 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7
4526 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4527 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7
4528 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4529 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7
4530 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
4531 // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0
4532 { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
4533 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8
4534 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
4535 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8
4536 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done },
4537 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4
4538 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
4539 // Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0
4540 { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4541 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8
4542 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
4543 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_3
4544 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4545 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_1__ImmUnsignedi81_0
4546 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4547 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6
4548 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4549 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0
4550 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4551 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7
4552 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4553 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_3
4554 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4555 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_1__ImmUnsignedi81_0
4556 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4557 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6
4558 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4559 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0
4560 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4561 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7
4562 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4563 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2
4564 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4565 // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3
4566 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done },
4567 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0
4568 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
4569 // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0
4570 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4571 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6
4572 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
4573 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7
4574 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done },
4575 // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0
4576 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4577 // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0
4578 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4579 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3
4580 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
4581 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3
4582 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
4583 // Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0
4584 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4585 // Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0
4586 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4587 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3
4588 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
4589 // Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3
4590 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
4591 // Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0
4592 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
4593 // Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0
4594 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4595 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3
4596 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
4597 // Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3
4598 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
4599 // Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0
4600 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
4601 // Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0
4602 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4603 // Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2
4604 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
4605 // Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2
4606 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
4607 // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3
4608 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
4609 // Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0
4610 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4611 // Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
4612 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
4613 // Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5
4614 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4615 // Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5
4616 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4617 // Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5
4618 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4619 // Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6
4620 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
4621 // Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0
4622 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4623 // Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0
4624 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4625 // Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0
4626 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4627 // Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0
4628 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4629 // Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0
4630 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4631 // Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0
4632 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4633 // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3
4634 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
4635 // Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0
4636 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4637 // Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6
4638 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
4639 // Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0
4640 { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4641 // Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5
4642 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4643 // Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0
4644 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4645 // Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5
4646 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4647 // Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0
4648 { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4649 // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1
4650 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
4651 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3
4652 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
4653 // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1
4654 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
4655 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3
4656 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
4657 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4
4658 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4659 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4
4660 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4661 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4
4662 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4663 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0
4664 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4665 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0
4666 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4667 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0
4668 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4669 // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1
4670 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
4671 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3
4672 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
4673 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4
4674 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4675 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4
4676 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4677 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0
4678 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4679 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0
4680 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4681 // Convert__Reg1_1__Mem512_RC256X5_3
4682 { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
4683 // Convert__Reg1_2__Mem512_RC256X5_0
4684 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4685 // Convert__Reg1_1__Mem512_RC5125_3
4686 { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
4687 // Convert__Reg1_2__Mem512_RC5125_0
4688 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4689 // Convert__Reg1_1__Mem256_RC5125_3
4690 { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
4691 // Convert__Reg1_2__Mem256_RC5125_0
4692 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4693 // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1
4694 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
4695 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3
4696 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
4697 // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1
4698 { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
4699 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3
4700 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
4701 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4
4702 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4703 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4
4704 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4705 // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4
4706 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4707 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0
4708 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4709 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0
4710 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4711 // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0
4712 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4713 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5
4714 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4715 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5
4716 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4717 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5
4718 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4719 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0
4720 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4721 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0
4722 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4723 // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0
4724 { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4725 // Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6
4726 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4727 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6
4728 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
4729 // Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6
4730 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4731 // Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6
4732 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4733 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0
4734 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4735 // Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7
4736 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4737 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6
4738 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
4739 // Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0
4740 { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4741 // Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7
4742 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4743 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7
4744 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4745 // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8
4746 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done },
4747 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7
4748 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4749 // Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4
4750 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
4751 // Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0
4752 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4753 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7
4754 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4755 // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0
4756 { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4757 // Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8
4758 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
4759 // Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0
4760 { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4761 // Convert__Mem1285_2__Reg1_1__Reg1_0
4762 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4763 // Convert__Mem2565_2__Reg1_1__Reg1_0
4764 { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4765 // Convert__Mem1285_0__Reg1_1__Reg1_2
4766 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
4767 // Convert__Mem2565_0__Reg1_1__Reg1_2
4768 { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
4769 // Convert__Reg1_0__Reg1_2__Reg1_4
4770 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4771 // Convert__Mem645_1__Reg1_3__Reg1_0
4772 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4773 // Convert__Mem645_0__Reg1_2__Reg1_4
4774 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4775 // Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0
4776 { CVT_95_Reg, 3, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4777 // Convert__Mem325_1__Reg1_3__Reg1_0
4778 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4779 // Convert__Mem325_0__Reg1_2__Reg1_4
4780 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4781 // Convert__VK4Pair1_2__Reg1_1__Reg1_0
4782 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4783 // Convert__VK8Pair1_2__Reg1_1__Reg1_0
4784 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4785 // Convert__VK16Pair1_2__Reg1_1__Reg1_0
4786 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4787 // Convert__VK16Pair1_0__Reg1_1__Reg1_2
4788 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
4789 // Convert__VK16Pair1_0__Reg1_1__Mem5125_2
4790 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4791 // Convert__VK4Pair1_0__Reg1_1__Reg1_2
4792 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
4793 // Convert__VK4Pair1_0__Reg1_1__Mem1285_2
4794 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4795 // Convert__VK8Pair1_0__Reg1_1__Reg1_2
4796 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
4797 // Convert__VK8Pair1_0__Reg1_1__Mem2565_2
4798 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4799 // Convert__VK4Pair1_2__Reg1_1__Mem1285_0
4800 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4801 // Convert__VK8Pair1_2__Reg1_1__Mem2565_0
4802 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4803 // Convert__VK16Pair1_2__Reg1_1__Mem5125_0
4804 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4805 // Convert__VK16Pair1_0__Reg1_1__Mem325_2
4806 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4807 // Convert__VK4Pair1_0__Reg1_1__Mem325_2
4808 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4809 // Convert__VK8Pair1_0__Reg1_1__Mem325_2
4810 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4811 // Convert__VK16Pair1_3__Reg1_2__Mem325_0
4812 { CVT_95_addMaskPairOperands, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4813 // Convert__VK4Pair1_3__Reg1_2__Mem325_0
4814 { CVT_95_addMaskPairOperands, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4815 // Convert__VK8Pair1_3__Reg1_2__Mem325_0
4816 { CVT_95_addMaskPairOperands, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4817 // Convert__VK2Pair1_2__Reg1_1__Reg1_0
4818 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4819 // Convert__VK2Pair1_0__Reg1_1__Reg1_2
4820 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
4821 // Convert__VK2Pair1_0__Reg1_1__Mem1285_2
4822 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4823 // Convert__VK4Pair1_0__Reg1_1__Mem2565_2
4824 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4825 // Convert__VK8Pair1_0__Reg1_1__Mem5125_2
4826 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4827 // Convert__VK2Pair1_2__Reg1_1__Mem1285_0
4828 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4829 // Convert__VK4Pair1_2__Reg1_1__Mem2565_0
4830 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4831 // Convert__VK8Pair1_2__Reg1_1__Mem5125_0
4832 { CVT_95_addMaskPairOperands, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4833 // Convert__VK2Pair1_0__Reg1_1__Mem645_2
4834 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4835 // Convert__VK4Pair1_0__Reg1_1__Mem645_2
4836 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4837 // Convert__VK8Pair1_0__Reg1_1__Mem645_2
4838 { CVT_95_addMaskPairOperands, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
4839 // Convert__VK2Pair1_3__Reg1_2__Mem645_0
4840 { CVT_95_addMaskPairOperands, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4841 // Convert__VK4Pair1_3__Reg1_2__Mem645_0
4842 { CVT_95_addMaskPairOperands, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4843 // Convert__VK8Pair1_3__Reg1_2__Mem645_0
4844 { CVT_95_addMaskPairOperands, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4845 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4
4846 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
4847 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0
4848 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4849 // Convert__Reg1_0__Reg1_2__Mem85_5
4850 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
4851 // Convert__Reg1_1__Reg1_3__Mem85_0
4852 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4853 // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4
4854 { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
4855 // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0
4856 { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4857 // Convert__Reg1_0__Reg1_2__Mem165_5
4858 { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
4859 // Convert__Reg1_1__Reg1_3__Mem165_0
4860 { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4861 // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17
4862 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done },
4863 // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17
4864 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_17, 0, CVT_Done },
4865 // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17
4866 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
4867 // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17
4868 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
4869 // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17
4870 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
4871 // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17
4872 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
4873 // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17
4874 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
4875 // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17
4876 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
4877 // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1
4878 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
4879 // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1
4880 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_1, 0, CVT_Done },
4881 // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1
4882 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
4883 // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1
4884 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
4885 // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1
4886 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
4887 // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1
4888 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
4889 // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1
4890 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
4891 // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1
4892 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
4893 // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16
4894 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done },
4895 // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16
4896 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_16, 0, CVT_Done },
4897 // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16
4898 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
4899 // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16
4900 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
4901 // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16
4902 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
4903 // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16
4904 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
4905 // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16
4906 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
4907 // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16
4908 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
4909 // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0
4910 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
4911 // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0
4912 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_Done },
4913 // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0
4914 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
4915 // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0
4916 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
4917 // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0
4918 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
4919 // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0
4920 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
4921 // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0
4922 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
4923 // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0
4924 { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
4925 // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4
4926 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
4927 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi41_4
4928 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
4929 // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi41_4
4930 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
4931 // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi41_4
4932 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
4933 // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi41_4
4934 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
4935 // Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0
4936 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4937 // Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi41_0
4938 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4939 // Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi41_0
4940 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4941 // Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi41_0
4942 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4943 // Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi41_0
4944 { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4945 // Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3
4946 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addGR32orGR64Operands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4947 // Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3
4948 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4949 // Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0
4950 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4951 // Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0
4952 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4953 // Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3
4954 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4955 // Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0
4956 { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4957 // Convert__Mem165_1__Reg1_3__Reg1_0
4958 { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4959 // Convert__Mem165_0__Reg1_2__Reg1_4
4960 { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4961 // Convert__Reg1_2__Mem1285_1__Reg1_0
4962 { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
4963 // Convert__Reg1_0__Mem1285_1__Reg1_2
4964 { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
4965 // Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0
4966 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4967 // Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0
4968 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4969 // Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0
4970 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4971 // Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4
4972 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4973 // Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4
4974 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4975 // Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4
4976 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4977 // Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0
4978 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4979 // Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0
4980 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4981 // Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4
4982 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4983 // Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4
4984 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4985 // Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0
4986 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4987 // Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0
4988 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4989 // Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0
4990 { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4991 // Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4
4992 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4993 // Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4
4994 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4995 // Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4
4996 { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4997 // Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2
4998 { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_2_2, CVT_Done },
4999 // Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1
5000 { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Tied, Tie0_2_2, CVT_Tied, Tie1_1_1, CVT_Done },
5001 // Convert__AbsMem161_0
5002 { CVT_95_addAbsMemOperands, 1, CVT_Done },
5003 // Convert__Reg1_1__Tie0_2_2
5004 { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_Done },
5005 // Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1
5006 { CVT_regEAX, 0, CVT_regEAX, 0, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_1_1, CVT_Done },
5007};
5008
5009void X86AsmParser::
5010convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
5011 const OperandVector &Operands) {
5012 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
5013 const uint8_t *Converter = ConversionTable[Kind];
5014 unsigned OpIdx;
5015 Inst.setOpcode(Opcode);
5016 for (const uint8_t *p = Converter; *p; p += 2) {
5017 OpIdx = *(p + 1);
5018 switch (*p) {
5019 default: llvm_unreachable("invalid conversion entry!");
5020 case CVT_Reg:
5021 static_cast<X86Operand &>(*Operands[OpIdx]).addRegOperands(Inst, 1);
5022 break;
5023 case CVT_Tied: {
5024 assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
5025 std::begin(TiedAsmOperandTable)) &&
5026 "Tied operand not found");
5027 unsigned TiedResOpnd = TiedAsmOperandTable[OpIdx][0];
5028 if (TiedResOpnd != (uint8_t)-1)
5029 Inst.addOperand(Inst.getOperand(TiedResOpnd));
5030 break;
5031 }
5032 case CVT_imm_95_10:
5033 Inst.addOperand(MCOperand::createImm(10));
5034 break;
5035 case CVT_95_addImmOperands:
5036 static_cast<X86Operand &>(*Operands[OpIdx]).addImmOperands(Inst, 1);
5037 break;
5038 case CVT_regAX:
5039 Inst.addOperand(MCOperand::createReg(X86::AX));
5040 break;
5041 case CVT_regEAX:
5042 Inst.addOperand(MCOperand::createReg(X86::EAX));
5043 break;
5044 case CVT_regRAX:
5045 Inst.addOperand(MCOperand::createReg(X86::RAX));
5046 break;
5047 case CVT_95_Reg:
5048 static_cast<X86Operand &>(*Operands[OpIdx]).addRegOperands(Inst, 1);
5049 break;
5050 case CVT_95_addMemOperands:
5051 static_cast<X86Operand &>(*Operands[OpIdx]).addMemOperands(Inst, 5);
5052 break;
5053 case CVT_95_addAbsMemOperands:
5054 static_cast<X86Operand &>(*Operands[OpIdx]).addAbsMemOperands(Inst, 1);
5055 break;
5056 case CVT_imm_95_7:
5057 Inst.addOperand(MCOperand::createImm(7));
5058 break;
5059 case CVT_imm_95_3:
5060 Inst.addOperand(MCOperand::createImm(3));
5061 break;
5062 case CVT_imm_95_2:
5063 Inst.addOperand(MCOperand::createImm(2));
5064 break;
5065 case CVT_imm_95_6:
5066 Inst.addOperand(MCOperand::createImm(6));
5067 break;
5068 case CVT_imm_95_4:
5069 Inst.addOperand(MCOperand::createImm(4));
5070 break;
5071 case CVT_imm_95_15:
5072 Inst.addOperand(MCOperand::createImm(15));
5073 break;
5074 case CVT_imm_95_13:
5075 Inst.addOperand(MCOperand::createImm(13));
5076 break;
5077 case CVT_imm_95_12:
5078 Inst.addOperand(MCOperand::createImm(12));
5079 break;
5080 case CVT_imm_95_14:
5081 Inst.addOperand(MCOperand::createImm(14));
5082 break;
5083 case CVT_imm_95_5:
5084 Inst.addOperand(MCOperand::createImm(5));
5085 break;
5086 case CVT_imm_95_1:
5087 Inst.addOperand(MCOperand::createImm(1));
5088 break;
5089 case CVT_imm_95_11:
5090 Inst.addOperand(MCOperand::createImm(11));
5091 break;
5092 case CVT_imm_95_9:
5093 Inst.addOperand(MCOperand::createImm(9));
5094 break;
5095 case CVT_imm_95_0:
5096 Inst.addOperand(MCOperand::createImm(0));
5097 break;
5098 case CVT_imm_95_8:
5099 Inst.addOperand(MCOperand::createImm(8));
5100 break;
5101 case CVT_95_addDstIdxOperands:
5102 static_cast<X86Operand &>(*Operands[OpIdx]).addDstIdxOperands(Inst, 1);
5103 break;
5104 case CVT_95_addSrcIdxOperands:
5105 static_cast<X86Operand &>(*Operands[OpIdx]).addSrcIdxOperands(Inst, 2);
5106 break;
5107 case CVT_95_addGR32orGR64Operands:
5108 static_cast<X86Operand &>(*Operands[OpIdx]).addGR32orGR64Operands(Inst, 1);
5109 break;
5110 case CVT_regST1:
5111 Inst.addOperand(MCOperand::createReg(X86::ST1));
5112 break;
5113 case CVT_regST0:
5114 Inst.addOperand(MCOperand::createReg(X86::ST0));
5115 break;
5116 case CVT_95_addGR16orGR32orGR64Operands:
5117 static_cast<X86Operand &>(*Operands[OpIdx]).addGR16orGR32orGR64Operands(Inst, 1);
5118 break;
5119 case CVT_95_addMemOffsOperands:
5120 static_cast<X86Operand &>(*Operands[OpIdx]).addMemOffsOperands(Inst, 2);
5121 break;
5122 case CVT_imm_95_17:
5123 Inst.addOperand(MCOperand::createImm(17));
5124 break;
5125 case CVT_imm_95_16:
5126 Inst.addOperand(MCOperand::createImm(16));
5127 break;
5128 case CVT_95_addAVX512RCOperands:
5129 static_cast<X86Operand &>(*Operands[OpIdx]).addAVX512RCOperands(Inst, 1);
5130 break;
5131 case CVT_95_addMaskPairOperands:
5132 static_cast<X86Operand &>(*Operands[OpIdx]).addMaskPairOperands(Inst, 1);
5133 break;
5134 }
5135 }
5136}
5137
5138void X86AsmParser::
5139convertToMapAndConstraints(unsigned Kind,
5140 const OperandVector &Operands) {
5141 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
5142 unsigned NumMCOperands = 0;
5143 const uint8_t *Converter = ConversionTable[Kind];
5144 for (const uint8_t *p = Converter; *p; p += 2) {
5145 switch (*p) {
5146 default: llvm_unreachable("invalid conversion entry!");
5147 case CVT_Reg:
5148 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5149 Operands[*(p + 1)]->setConstraint("r");
5150 ++NumMCOperands;
5151 break;
5152 case CVT_Tied:
5153 ++NumMCOperands;
5154 break;
5155 case CVT_imm_95_10:
5156 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5157 Operands[*(p + 1)]->setConstraint("");
5158 ++NumMCOperands;
5159 break;
5160 case CVT_95_addImmOperands:
5161 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5162 Operands[*(p + 1)]->setConstraint("m");
5163 NumMCOperands += 1;
5164 break;
5165 case CVT_regAX:
5166 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5167 Operands[*(p + 1)]->setConstraint("m");
5168 ++NumMCOperands;
5169 break;
5170 case CVT_regEAX:
5171 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5172 Operands[*(p + 1)]->setConstraint("m");
5173 ++NumMCOperands;
5174 break;
5175 case CVT_regRAX:
5176 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5177 Operands[*(p + 1)]->setConstraint("m");
5178 ++NumMCOperands;
5179 break;
5180 case CVT_95_Reg:
5181 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5182 Operands[*(p + 1)]->setConstraint("r");
5183 NumMCOperands += 1;
5184 break;
5185 case CVT_95_addMemOperands:
5186 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5187 Operands[*(p + 1)]->setConstraint("m");
5188 NumMCOperands += 5;
5189 break;
5190 case CVT_95_addAbsMemOperands:
5191 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5192 Operands[*(p + 1)]->setConstraint("m");
5193 NumMCOperands += 1;
5194 break;
5195 case CVT_imm_95_7:
5196 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5197 Operands[*(p + 1)]->setConstraint("");
5198 ++NumMCOperands;
5199 break;
5200 case CVT_imm_95_3:
5201 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5202 Operands[*(p + 1)]->setConstraint("");
5203 ++NumMCOperands;
5204 break;
5205 case CVT_imm_95_2:
5206 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5207 Operands[*(p + 1)]->setConstraint("");
5208 ++NumMCOperands;
5209 break;
5210 case CVT_imm_95_6:
5211 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5212 Operands[*(p + 1)]->setConstraint("");
5213 ++NumMCOperands;
5214 break;
5215 case CVT_imm_95_4:
5216 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5217 Operands[*(p + 1)]->setConstraint("");
5218 ++NumMCOperands;
5219 break;
5220 case CVT_imm_95_15:
5221 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5222 Operands[*(p + 1)]->setConstraint("");
5223 ++NumMCOperands;
5224 break;
5225 case CVT_imm_95_13:
5226 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5227 Operands[*(p + 1)]->setConstraint("");
5228 ++NumMCOperands;
5229 break;
5230 case CVT_imm_95_12:
5231 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5232 Operands[*(p + 1)]->setConstraint("");
5233 ++NumMCOperands;
5234 break;
5235 case CVT_imm_95_14:
5236 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5237 Operands[*(p + 1)]->setConstraint("");
5238 ++NumMCOperands;
5239 break;
5240 case CVT_imm_95_5:
5241 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5242 Operands[*(p + 1)]->setConstraint("");
5243 ++NumMCOperands;
5244 break;
5245 case CVT_imm_95_1:
5246 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5247 Operands[*(p + 1)]->setConstraint("");
5248 ++NumMCOperands;
5249 break;
5250 case CVT_imm_95_11:
5251 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5252 Operands[*(p + 1)]->setConstraint("");
5253 ++NumMCOperands;
5254 break;
5255 case CVT_imm_95_9:
5256 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5257 Operands[*(p + 1)]->setConstraint("");
5258 ++NumMCOperands;
5259 break;
5260 case CVT_imm_95_0:
5261 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5262 Operands[*(p + 1)]->setConstraint("");
5263 ++NumMCOperands;
5264 break;
5265 case CVT_imm_95_8:
5266 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5267 Operands[*(p + 1)]->setConstraint("");
5268 ++NumMCOperands;
5269 break;
5270 case CVT_95_addDstIdxOperands:
5271 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5272 Operands[*(p + 1)]->setConstraint("m");
5273 NumMCOperands += 1;
5274 break;
5275 case CVT_95_addSrcIdxOperands:
5276 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5277 Operands[*(p + 1)]->setConstraint("m");
5278 NumMCOperands += 2;
5279 break;
5280 case CVT_95_addGR32orGR64Operands:
5281 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5282 Operands[*(p + 1)]->setConstraint("m");
5283 NumMCOperands += 1;
5284 break;
5285 case CVT_regST1:
5286 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5287 Operands[*(p + 1)]->setConstraint("m");
5288 ++NumMCOperands;
5289 break;
5290 case CVT_regST0:
5291 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5292 Operands[*(p + 1)]->setConstraint("m");
5293 ++NumMCOperands;
5294 break;
5295 case CVT_95_addGR16orGR32orGR64Operands:
5296 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5297 Operands[*(p + 1)]->setConstraint("m");
5298 NumMCOperands += 1;
5299 break;
5300 case CVT_95_addMemOffsOperands:
5301 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5302 Operands[*(p + 1)]->setConstraint("m");
5303 NumMCOperands += 2;
5304 break;
5305 case CVT_imm_95_17:
5306 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5307 Operands[*(p + 1)]->setConstraint("");
5308 ++NumMCOperands;
5309 break;
5310 case CVT_imm_95_16:
5311 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5312 Operands[*(p + 1)]->setConstraint("");
5313 ++NumMCOperands;
5314 break;
5315 case CVT_95_addAVX512RCOperands:
5316 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5317 Operands[*(p + 1)]->setConstraint("m");
5318 NumMCOperands += 1;
5319 break;
5320 case CVT_95_addMaskPairOperands:
5321 Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
5322 Operands[*(p + 1)]->setConstraint("m");
5323 NumMCOperands += 1;
5324 break;
5325 }
5326 }
5327}
5328
5329namespace {
5330
5331/// MatchClassKind - The kinds of classes which participate in
5332/// instruction matching.
5333enum MatchClassKind {
5334 InvalidMatchClass = 0,
5335 OptionalMatchClass = 1,
5336 MCK__STAR_, // '*'
5337 MCK__123_, // '{'
5338 MCK__123_1to16_125_, // '{1to16}'
5339 MCK__123_1to2_125_, // '{1to2}'
5340 MCK__123_1to4_125_, // '{1to4}'
5341 MCK__123_1to8_125_, // '{1to8}'
5342 MCK__123_sae_125_, // '{sae}'
5343 MCK__123_z_125_, // '{z}'
5344 MCK__125_, // '}'
5345 MCK_LAST_TOKEN = MCK__125_,
5346 MCK_Reg77, // derived register class
5347 MCK_Reg76, // derived register class
5348 MCK_Reg73, // derived register class
5349 MCK_Reg71, // derived register class
5350 MCK_Reg69, // derived register class
5351 MCK_Reg38, // derived register class
5352 MCK_Reg36, // derived register class
5353 MCK_Reg34, // derived register class
5354 MCK_Reg32, // derived register class
5355 MCK_AL, // register class 'AL'
5356 MCK_AX, // register class 'AX'
5357 MCK_CCR, // register class 'CCR'
5358 MCK_CL, // register class 'CL'
5359 MCK_CS, // register class 'CS'
5360 MCK_DFCCR, // register class 'DFCCR'
5361 MCK_DS, // register class 'DS'
5362 MCK_DX, // register class 'DX'
5363 MCK_EAX, // register class 'EAX'
5364 MCK_EBX, // register class 'EBX'
5365 MCK_ECX, // register class 'ECX'
5366 MCK_EDX, // register class 'EDX'
5367 MCK_ES, // register class 'ES'
5368 MCK_FPCCR, // register class 'FPCCR'
5369 MCK_FS, // register class 'FS'
5370 MCK_GS, // register class 'GS'
5371 MCK_RAX, // register class 'RAX'
5372 MCK_RBX, // register class 'RBX'
5373 MCK_RCX, // register class 'RCX'
5374 MCK_RDX, // register class 'RDX'
5375 MCK_RFP80_7, // register class 'RFP80_7'
5376 MCK_SS, // register class 'SS'
5377 MCK_ST0, // register class 'ST0'
5378 MCK_TILECFG, // register class 'TILECFG'
5379 MCK_XMM0, // register class 'XMM0'
5380 MCK_Reg75, // derived register class
5381 MCK_Reg74, // derived register class
5382 MCK_Reg72, // derived register class
5383 MCK_Reg70, // derived register class
5384 MCK_Reg68, // derived register class
5385 MCK_Reg66, // derived register class
5386 MCK_Reg64, // derived register class
5387 MCK_GR32_AD, // register class 'GR32_AD'
5388 MCK_GR32_BPSP, // register class 'GR32_BPSP'
5389 MCK_GR32_BSI, // register class 'GR32_BSI'
5390 MCK_GR32_CB, // register class 'GR32_CB'
5391 MCK_GR32_DC, // register class 'GR32_DC'
5392 MCK_GR32_DIBP, // register class 'GR32_DIBP'
5393 MCK_GR32_SIDI, // register class 'GR32_SIDI'
5394 MCK_GR64_AD, // register class 'GR64_AD'
5395 MCK_Reg108, // derived register class
5396 MCK_Reg41, // derived register class
5397 MCK_Reg15, // derived register class
5398 MCK_Reg55, // derived register class
5399 MCK_BNDR, // register class 'BNDR'
5400 MCK_GR16_ABCD, // register class 'GR16_ABCD'
5401 MCK_GR32_ABCD, // register class 'GR32_ABCD'
5402 MCK_GR32_TC, // register class 'GR32_TC'
5403 MCK_GR64_ABCD, // register class 'GR64_ABCD'
5404 MCK_GR8_ABCD_H, // register class 'GR8_ABCD_H'
5405 MCK_GR8_ABCD_L, // register class 'GR8_ABCD_L'
5406 MCK_VK16PAIR, // register class 'VK16PAIR,VK1PAIR,VK2PAIR,VK4PAIR,VK8PAIR'
5407 MCK_Reg60, // derived register class
5408 MCK_Reg49, // derived register class
5409 MCK_Reg62, // derived register class
5410 MCK_Reg50, // derived register class
5411 MCK_SEGMENT_REG, // register class 'SEGMENT_REG'
5412 MCK_Reg61, // derived register class
5413 MCK_Reg58, // derived register class
5414 MCK_Reg53, // derived register class
5415 MCK_GR32_NOREX_NOSP, // register class 'GR32_NOREX_NOSP'
5416 MCK_GR64_NOREX_NOSP, // register class 'GR64_NOREX_NOSP'
5417 MCK_RFP32, // register class 'RFP32,RFP64,RFP80'
5418 MCK_VK16WM, // register class 'VK16WM,VK1WM,VK2WM,VK4WM,VK8WM,VK32WM,VK64WM'
5419 MCK_Reg59, // derived register class
5420 MCK_Reg56, // derived register class
5421 MCK_Reg54, // derived register class
5422 MCK_Reg44, // derived register class
5423 MCK_GR16_NOREX, // register class 'GR16_NOREX'
5424 MCK_GR32_NOREX, // register class 'GR32_NOREX'
5425 MCK_GR8_NOREX, // register class 'GR8_NOREX'
5426 MCK_RST, // register class 'RST'
5427 MCK_TILE, // register class 'TILE'
5428 MCK_VK1, // register class 'VK1,VK16,VK2,VK4,VK8,VK32,VK64'
5429 MCK_VR64, // register class 'VR64'
5430 MCK_Reg51, // derived register class
5431 MCK_Reg23, // derived register class
5432 MCK_GR64_NOREX, // register class 'GR64_NOREX'
5433 MCK_GR64_TCW64, // register class 'GR64_TCW64'
5434 MCK_GR64_TC, // register class 'GR64_TC'
5435 MCK_GRH8, // register class 'GRH8'
5436 MCK_GR32_NOSP, // register class 'GR32_NOSP'
5437 MCK_GR64_NOSP, // register class 'GR64_NOSP'
5438 MCK_Reg45, // derived register class
5439 MCK_CONTROL_REG, // register class 'CONTROL_REG'
5440 MCK_DEBUG_REG, // register class 'DEBUG_REG'
5441 MCK_FR32, // register class 'FR32,FR64,VR128'
5442 MCK_GR16, // register class 'GR16'
5443 MCK_GR32, // register class 'GR32'
5444 MCK_VR256, // register class 'VR256'
5445 MCK_VR512_0_15, // register class 'VR512_0_15'
5446 MCK_Reg20, // derived register class
5447 MCK_GR64, // register class 'GR64'
5448 MCK_GRH16, // register class 'GRH16'
5449 MCK_LOW32_ADDR_ACCESS, // register class 'LOW32_ADDR_ACCESS'
5450 MCK_LOW32_ADDR_ACCESS_RBP, // register class 'LOW32_ADDR_ACCESS_RBP'
5451 MCK_GR8, // register class 'GR8'
5452 MCK_FR32X, // register class 'FR32X,FR64X,VR128X'
5453 MCK_VR256X, // register class 'VR256X'
5454 MCK_VR512, // register class 'VR512'
5455 MCK_LAST_REGISTER = MCK_VR512,
5456 MCK_AVX512RC, // user defined class 'AVX512RCOperand'
5457 MCK_ImmSExti64i8, // user defined class 'ImmSExti64i8AsmOperand'
5458 MCK_ImmSExti16i8, // user defined class 'ImmSExti16i8AsmOperand'
5459 MCK_ImmSExti32i8, // user defined class 'ImmSExti32i8AsmOperand'
5460 MCK_ImmSExti64i32, // user defined class 'ImmSExti64i32AsmOperand'
5461 MCK_Imm, // user defined class 'ImmAsmOperand'
5462 MCK_ImmUnsignedi4, // user defined class 'ImmUnsignedi4AsmOperand'
5463 MCK_ImmUnsignedi8, // user defined class 'ImmUnsignedi8AsmOperand'
5464 MCK_VK16Pair, // user defined class 'VK16PairAsmOperand'
5465 MCK_VK1Pair, // user defined class 'VK1PairAsmOperand'
5466 MCK_VK2Pair, // user defined class 'VK2PairAsmOperand'
5467 MCK_VK4Pair, // user defined class 'VK4PairAsmOperand'
5468 MCK_VK8Pair, // user defined class 'VK8PairAsmOperand'
5469 MCK_GR16orGR32orGR64, // user defined class 'X86GR16orGR32orGR64AsmOperand'
5470 MCK_GR32orGR64, // user defined class 'X86GR32orGR64AsmOperand'
5471 MCK_AbsMem16, // user defined class 'X86AbsMem16AsmOperand'
5472 MCK_DstIdx16, // user defined class 'X86DstIdx16Operand'
5473 MCK_DstIdx32, // user defined class 'X86DstIdx32Operand'
5474 MCK_DstIdx64, // user defined class 'X86DstIdx64Operand'
5475 MCK_DstIdx8, // user defined class 'X86DstIdx8Operand'
5476 MCK_MemOffs16_16, // user defined class 'X86MemOffs16_16AsmOperand'
5477 MCK_MemOffs16_32, // user defined class 'X86MemOffs16_32AsmOperand'
5478 MCK_MemOffs16_8, // user defined class 'X86MemOffs16_8AsmOperand'
5479 MCK_MemOffs32_16, // user defined class 'X86MemOffs32_16AsmOperand'
5480 MCK_MemOffs32_32, // user defined class 'X86MemOffs32_32AsmOperand'
5481 MCK_MemOffs32_64, // user defined class 'X86MemOffs32_64AsmOperand'
5482 MCK_MemOffs32_8, // user defined class 'X86MemOffs32_8AsmOperand'
5483 MCK_MemOffs64_16, // user defined class 'X86MemOffs64_16AsmOperand'
5484 MCK_MemOffs64_32, // user defined class 'X86MemOffs64_32AsmOperand'
5485 MCK_MemOffs64_64, // user defined class 'X86MemOffs64_64AsmOperand'
5486 MCK_MemOffs64_8, // user defined class 'X86MemOffs64_8AsmOperand'
5487 MCK_SrcIdx16, // user defined class 'X86SrcIdx16Operand'
5488 MCK_SrcIdx32, // user defined class 'X86SrcIdx32Operand'
5489 MCK_SrcIdx64, // user defined class 'X86SrcIdx64Operand'
5490 MCK_SrcIdx8, // user defined class 'X86SrcIdx8Operand'
5491 MCK_AbsMem, // user defined class 'X86AbsMemAsmOperand'
5492 MCK_Mem128, // user defined class 'X86Mem128AsmOperand'
5493 MCK_Mem128_RC128, // user defined class 'X86Mem128_RC128Operand'
5494 MCK_Mem128_RC128X, // user defined class 'X86Mem128_RC128XOperand'
5495 MCK_Mem128_RC256, // user defined class 'X86Mem128_RC256Operand'
5496 MCK_Mem128_RC256X, // user defined class 'X86Mem128_RC256XOperand'
5497 MCK_Mem16, // user defined class 'X86Mem16AsmOperand'
5498 MCK_Mem256, // user defined class 'X86Mem256AsmOperand'
5499 MCK_Mem256_RC128, // user defined class 'X86Mem256_RC128Operand'
5500 MCK_Mem256_RC128X, // user defined class 'X86Mem256_RC128XOperand'
5501 MCK_Mem256_RC256, // user defined class 'X86Mem256_RC256Operand'
5502 MCK_Mem256_RC256X, // user defined class 'X86Mem256_RC256XOperand'
5503 MCK_Mem256_RC512, // user defined class 'X86Mem256_RC512Operand'
5504 MCK_Mem32, // user defined class 'X86Mem32AsmOperand'
5505 MCK_Mem512, // user defined class 'X86Mem512AsmOperand'
5506 MCK_Mem512_RC256X, // user defined class 'X86Mem512_RC256XOperand'
5507 MCK_Mem512_RC512, // user defined class 'X86Mem512_RC512Operand'
5508 MCK_Mem64, // user defined class 'X86Mem64AsmOperand'
5509 MCK_Mem64_RC128, // user defined class 'X86Mem64_RC128Operand'
5510 MCK_Mem64_RC128X, // user defined class 'X86Mem64_RC128XOperand'
5511 MCK_Mem80, // user defined class 'X86Mem80AsmOperand'
5512 MCK_Mem8, // user defined class 'X86Mem8AsmOperand'
5513 MCK_SibMem, // user defined class 'X86SibMemOperand'
5514 MCK_Mem, // user defined class 'X86MemAsmOperand'
5515 NumMatchClassKinds
5516};
5517
5518} // end anonymous namespace
5519
5520static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) {
5521 return MCTargetAsmParser::Match_InvalidOperand;
5522}
5523
5524static MatchClassKind matchTokenString(StringRef Name) {
5525 switch (Name.size()) {
5526 default: break;
5527 case 1: // 3 strings to match.
5528 switch (Name[0]) {
5529 default: break;
5530 case '*': // 1 string to match.
5531 return MCK__STAR_; // "*"
5532 case '{': // 1 string to match.
5533 return MCK__123_; // "{"
5534 case '}': // 1 string to match.
5535 return MCK__125_; // "}"
5536 }
5537 break;
5538 case 3: // 1 string to match.
5539 if (memcmp(Name.data()+0, "{z}", 3) != 0)
5540 break;
5541 return MCK__123_z_125_; // "{z}"
5542 case 5: // 1 string to match.
5543 if (memcmp(Name.data()+0, "{sae}", 5) != 0)
5544 break;
5545 return MCK__123_sae_125_; // "{sae}"
5546 case 6: // 3 strings to match.
5547 if (memcmp(Name.data()+0, "{1to", 4) != 0)
5548 break;
5549 switch (Name[4]) {
5550 default: break;
5551 case '2': // 1 string to match.
5552 if (Name[5] != '}')
5553 break;
5554 return MCK__123_1to2_125_; // "{1to2}"
5555 case '4': // 1 string to match.
5556 if (Name[5] != '}')
5557 break;
5558 return MCK__123_1to4_125_; // "{1to4}"
5559 case '8': // 1 string to match.
5560 if (Name[5] != '}')
5561 break;
5562 return MCK__123_1to8_125_; // "{1to8}"
5563 }
5564 break;
5565 case 7: // 1 string to match.
5566 if (memcmp(Name.data()+0, "{1to16}", 7) != 0)
5567 break;
5568 return MCK__123_1to16_125_; // "{1to16}"
5569 }
5570 return InvalidMatchClass;
5571}
5572
5573/// isSubclass - Compute whether \p A is a subclass of \p B.
5574static bool isSubclass(MatchClassKind A, MatchClassKind B) {
5575 if (A == B)
5576 return true;
5577
5578 switch (A) {
5579 default:
5580 return false;
5581
5582 case MCK_Reg77:
5583 switch (B) {
5584 default: return false;
5585 case MCK_Reg75: return true;
5586 case MCK_Reg60: return true;
5587 case MCK_Reg53: return true;
5588 case MCK_Reg59: return true;
5589 case MCK_GR64_NOREX: return true;
5590 case MCK_GR64_TCW64: return true;
5591 case MCK_GR64_TC: return true;
5592 case MCK_GR64: return true;
5593 case MCK_LOW32_ADDR_ACCESS: return true;
5594 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5595 }
5596
5597 case MCK_Reg76:
5598 switch (B) {
5599 default: return false;
5600 case MCK_Reg74: return true;
5601 case MCK_Reg55: return true;
5602 case MCK_Reg60: return true;
5603 case MCK_Reg50: return true;
5604 case MCK_Reg58: return true;
5605 case MCK_Reg53: return true;
5606 case MCK_Reg59: return true;
5607 case MCK_Reg56: return true;
5608 case MCK_Reg44: return true;
5609 case MCK_Reg51: return true;
5610 case MCK_GR64_NOREX: return true;
5611 case MCK_GR64_TCW64: return true;
5612 case MCK_GR64_TC: return true;
5613 case MCK_Reg45: return true;
5614 case MCK_GR64: return true;
5615 }
5616
5617 case MCK_Reg73:
5618 switch (B) {
5619 default: return false;
5620 case MCK_Reg75: return true;
5621 case MCK_Reg74: return true;
5622 case MCK_Reg72: return true;
5623 case MCK_GR64_NOREX_NOSP: return true;
5624 case MCK_Reg44: return true;
5625 case MCK_Reg23: return true;
5626 case MCK_GR64_NOREX: return true;
5627 case MCK_GR64_NOSP: return true;
5628 case MCK_Reg45: return true;
5629 case MCK_Reg20: return true;
5630 case MCK_GR64: return true;
5631 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5632 }
5633
5634 case MCK_Reg71:
5635 switch (B) {
5636 default: return false;
5637 case MCK_Reg72: return true;
5638 case MCK_Reg70: return true;
5639 case MCK_Reg49: return true;
5640 case MCK_Reg50: return true;
5641 case MCK_Reg53: return true;
5642 case MCK_GR64_NOREX_NOSP: return true;
5643 case MCK_Reg54: return true;
5644 case MCK_Reg44: return true;
5645 case MCK_Reg51: return true;
5646 case MCK_GR64_NOREX: return true;
5647 case MCK_GR64_TC: return true;
5648 case MCK_GR64_NOSP: return true;
5649 case MCK_Reg45: return true;
5650 case MCK_GR64: return true;
5651 }
5652
5653 case MCK_Reg69:
5654 switch (B) {
5655 default: return false;
5656 case MCK_Reg70: return true;
5657 case MCK_Reg68: return true;
5658 case MCK_Reg49: return true;
5659 case MCK_Reg50: return true;
5660 case MCK_Reg53: return true;
5661 case MCK_GR64_NOREX_NOSP: return true;
5662 case MCK_Reg54: return true;
5663 case MCK_Reg44: return true;
5664 case MCK_Reg51: return true;
5665 case MCK_GR64_NOREX: return true;
5666 case MCK_GR64_TC: return true;
5667 case MCK_GR64_NOSP: return true;
5668 case MCK_Reg45: return true;
5669 case MCK_GR64: return true;
5670 }
5671
5672 case MCK_Reg38:
5673 switch (B) {
5674 default: return false;
5675 case MCK_GR32_BPSP: return true;
5676 case MCK_GR32_TC: return true;
5677 case MCK_GR32_NOREX: return true;
5678 case MCK_Reg23: return true;
5679 case MCK_GR32: return true;
5680 case MCK_Reg20: return true;
5681 case MCK_LOW32_ADDR_ACCESS: return true;
5682 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5683 }
5684
5685 case MCK_Reg36:
5686 switch (B) {
5687 default: return false;
5688 case MCK_GR32_BPSP: return true;
5689 case MCK_GR32_DIBP: return true;
5690 case MCK_GR32_NOREX_NOSP: return true;
5691 case MCK_GR32_NOREX: return true;
5692 case MCK_Reg23: return true;
5693 case MCK_GR32_NOSP: return true;
5694 case MCK_GR32: return true;
5695 case MCK_Reg20: return true;
5696 case MCK_LOW32_ADDR_ACCESS: return true;
5697 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5698 }
5699
5700 case MCK_Reg34:
5701 switch (B) {
5702 default: return false;
5703 case MCK_GR32_DIBP: return true;
5704 case MCK_GR32_SIDI: return true;
5705 case MCK_GR32_NOREX_NOSP: return true;
5706 case MCK_GR32_NOREX: return true;
5707 case MCK_Reg23: return true;
5708 case MCK_GR32_NOSP: return true;
5709 case MCK_GR32: return true;
5710 case MCK_Reg20: return true;
5711 case MCK_LOW32_ADDR_ACCESS: return true;
5712 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5713 }
5714
5715 case MCK_Reg32:
5716 switch (B) {
5717 default: return false;
5718 case MCK_GR32_BSI: return true;
5719 case MCK_GR32_SIDI: return true;
5720 case MCK_GR32_NOREX_NOSP: return true;
5721 case MCK_GR32_NOREX: return true;
5722 case MCK_Reg23: return true;
5723 case MCK_GR32_NOSP: return true;
5724 case MCK_GR32: return true;
5725 case MCK_Reg20: return true;
5726 case MCK_LOW32_ADDR_ACCESS: return true;
5727 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5728 }
5729
5730 case MCK_AL:
5731 switch (B) {
5732 default: return false;
5733 case MCK_GR8_ABCD_L: return true;
5734 case MCK_GR8_NOREX: return true;
5735 case MCK_GR8: return true;
5736 }
5737
5738 case MCK_AX:
5739 switch (B) {
5740 default: return false;
5741 case MCK_GR16_ABCD: return true;
5742 case MCK_GR16_NOREX: return true;
5743 case MCK_GR16: return true;
5744 }
5745
5746 case MCK_CL:
5747 switch (B) {
5748 default: return false;
5749 case MCK_GR8_ABCD_L: return true;
5750 case MCK_GR8_NOREX: return true;
5751 case MCK_GR8: return true;
5752 }
5753
5754 case MCK_CS:
5755 return B == MCK_SEGMENT_REG;
5756
5757 case MCK_DS:
5758 return B == MCK_SEGMENT_REG;
5759
5760 case MCK_DX:
5761 switch (B) {
5762 default: return false;
5763 case MCK_GR16_ABCD: return true;
5764 case MCK_GR16_NOREX: return true;
5765 case MCK_GR16: return true;
5766 }
5767
5768 case MCK_EAX:
5769 switch (B) {
5770 default: return false;
5771 case MCK_GR32_AD: return true;
5772 case MCK_Reg15: return true;
5773 case MCK_GR32_ABCD: return true;
5774 case MCK_GR32_TC: return true;
5775 case MCK_GR32_NOREX_NOSP: return true;
5776 case MCK_GR32_NOREX: return true;
5777 case MCK_Reg23: return true;
5778 case MCK_GR32_NOSP: return true;
5779 case MCK_GR32: return true;
5780 case MCK_Reg20: return true;
5781 case MCK_LOW32_ADDR_ACCESS: return true;
5782 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5783 }
5784
5785 case MCK_EBX:
5786 switch (B) {
5787 default: return false;
5788 case MCK_GR32_BSI: return true;
5789 case MCK_GR32_CB: return true;
5790 case MCK_GR32_ABCD: return true;
5791 case MCK_GR32_NOREX_NOSP: return true;
5792 case MCK_GR32_NOREX: return true;
5793 case MCK_Reg23: return true;
5794 case MCK_GR32_NOSP: return true;
5795 case MCK_GR32: return true;
5796 case MCK_Reg20: return true;
5797 case MCK_LOW32_ADDR_ACCESS: return true;
5798 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5799 }
5800
5801 case MCK_ECX:
5802 switch (B) {
5803 default: return false;
5804 case MCK_GR32_CB: return true;
5805 case MCK_GR32_DC: return true;
5806 case MCK_Reg15: return true;
5807 case MCK_GR32_ABCD: return true;
5808 case MCK_GR32_TC: return true;
5809 case MCK_GR32_NOREX_NOSP: return true;
5810 case MCK_GR32_NOREX: return true;
5811 case MCK_Reg23: return true;
5812 case MCK_GR32_NOSP: return true;
5813 case MCK_GR32: return true;
5814 case MCK_Reg20: return true;
5815 case MCK_LOW32_ADDR_ACCESS: return true;
5816 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5817 }
5818
5819 case MCK_EDX:
5820 switch (B) {
5821 default: return false;
5822 case MCK_GR32_AD: return true;
5823 case MCK_GR32_DC: return true;
5824 case MCK_Reg15: return true;
5825 case MCK_GR32_ABCD: return true;
5826 case MCK_GR32_TC: return true;
5827 case MCK_GR32_NOREX_NOSP: return true;
5828 case MCK_GR32_NOREX: return true;
5829 case MCK_Reg23: return true;
5830 case MCK_GR32_NOSP: return true;
5831 case MCK_GR32: return true;
5832 case MCK_Reg20: return true;
5833 case MCK_LOW32_ADDR_ACCESS: return true;
5834 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5835 }
5836
5837 case MCK_ES:
5838 return B == MCK_SEGMENT_REG;
5839
5840 case MCK_FS:
5841 return B == MCK_SEGMENT_REG;
5842
5843 case MCK_GS:
5844 return B == MCK_SEGMENT_REG;
5845
5846 case MCK_RAX:
5847 switch (B) {
5848 default: return false;
5849 case MCK_GR64_AD: return true;
5850 case MCK_Reg41: return true;
5851 case MCK_Reg55: return true;
5852 case MCK_GR64_ABCD: return true;
5853 case MCK_Reg60: return true;
5854 case MCK_Reg49: return true;
5855 case MCK_Reg62: return true;
5856 case MCK_Reg50: return true;
5857 case MCK_Reg61: return true;
5858 case MCK_Reg58: return true;
5859 case MCK_Reg53: return true;
5860 case MCK_GR64_NOREX_NOSP: return true;
5861 case MCK_Reg59: return true;
5862 case MCK_Reg56: return true;
5863 case MCK_Reg54: return true;
5864 case MCK_Reg44: return true;
5865 case MCK_Reg51: return true;
5866 case MCK_GR64_NOREX: return true;
5867 case MCK_GR64_TCW64: return true;
5868 case MCK_GR64_TC: return true;
5869 case MCK_GR64_NOSP: return true;
5870 case MCK_Reg45: return true;
5871 case MCK_GR64: return true;
5872 }
5873
5874 case MCK_RBX:
5875 switch (B) {
5876 default: return false;
5877 case MCK_Reg68: return true;
5878 case MCK_Reg66: return true;
5879 case MCK_GR64_ABCD: return true;
5880 case MCK_GR64_NOREX_NOSP: return true;
5881 case MCK_Reg44: return true;
5882 case MCK_GR64_NOREX: return true;
5883 case MCK_GR64_NOSP: return true;
5884 case MCK_Reg45: return true;
5885 case MCK_GR64: return true;
5886 }
5887
5888 case MCK_RCX:
5889 switch (B) {
5890 default: return false;
5891 case MCK_Reg66: return true;
5892 case MCK_Reg64: return true;
5893 case MCK_Reg41: return true;
5894 case MCK_Reg55: return true;
5895 case MCK_GR64_ABCD: return true;
5896 case MCK_Reg60: return true;
5897 case MCK_Reg49: return true;
5898 case MCK_Reg62: return true;
5899 case MCK_Reg50: return true;
5900 case MCK_Reg61: return true;
5901 case MCK_Reg58: return true;
5902 case MCK_Reg53: return true;
5903 case MCK_GR64_NOREX_NOSP: return true;
5904 case MCK_Reg59: return true;
5905 case MCK_Reg56: return true;
5906 case MCK_Reg54: return true;
5907 case MCK_Reg44: return true;
5908 case MCK_Reg51: return true;
5909 case MCK_GR64_NOREX: return true;
5910 case MCK_GR64_TCW64: return true;
5911 case MCK_GR64_TC: return true;
5912 case MCK_GR64_NOSP: return true;
5913 case MCK_Reg45: return true;
5914 case MCK_GR64: return true;
5915 }
5916
5917 case MCK_RDX:
5918 switch (B) {
5919 default: return false;
5920 case MCK_Reg64: return true;
5921 case MCK_GR64_AD: return true;
5922 case MCK_Reg41: return true;
5923 case MCK_Reg55: return true;
5924 case MCK_GR64_ABCD: return true;
5925 case MCK_Reg60: return true;
5926 case MCK_Reg49: return true;
5927 case MCK_Reg62: return true;
5928 case MCK_Reg50: return true;
5929 case MCK_Reg61: return true;
5930 case MCK_Reg58: return true;
5931 case MCK_Reg53: return true;
5932 case MCK_GR64_NOREX_NOSP: return true;
5933 case MCK_Reg59: return true;
5934 case MCK_Reg56: return true;
5935 case MCK_Reg54: return true;
5936 case MCK_Reg44: return true;
5937 case MCK_Reg51: return true;
5938 case MCK_GR64_NOREX: return true;
5939 case MCK_GR64_TCW64: return true;
5940 case MCK_GR64_TC: return true;
5941 case MCK_GR64_NOSP: return true;
5942 case MCK_Reg45: return true;
5943 case MCK_GR64: return true;
5944 }
5945
5946 case MCK_SS:
5947 return B == MCK_SEGMENT_REG;
5948
5949 case MCK_ST0:
5950 return B == MCK_RST;
5951
5952 case MCK_XMM0:
5953 switch (B) {
5954 default: return false;
5955 case MCK_FR32: return true;
5956 case MCK_FR32X: return true;
5957 }
5958
5959 case MCK_Reg75:
5960 switch (B) {
5961 default: return false;
5962 case MCK_GR64_NOREX: return true;
5963 case MCK_GR64: return true;
5964 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5965 }
5966
5967 case MCK_Reg74:
5968 switch (B) {
5969 default: return false;
5970 case MCK_Reg44: return true;
5971 case MCK_GR64_NOREX: return true;
5972 case MCK_Reg45: return true;
5973 case MCK_GR64: return true;
5974 }
5975
5976 case MCK_Reg72:
5977 switch (B) {
5978 default: return false;
5979 case MCK_GR64_NOREX_NOSP: return true;
5980 case MCK_Reg44: return true;
5981 case MCK_GR64_NOREX: return true;
5982 case MCK_GR64_NOSP: return true;
5983 case MCK_Reg45: return true;
5984 case MCK_GR64: return true;
5985 }
5986
5987 case MCK_Reg70:
5988 switch (B) {
5989 default: return false;
5990 case MCK_Reg49: return true;
5991 case MCK_Reg50: return true;
5992 case MCK_Reg53: return true;
5993 case MCK_GR64_NOREX_NOSP: return true;
5994 case MCK_Reg54: return true;
5995 case MCK_Reg44: return true;
5996 case MCK_Reg51: return true;
5997 case MCK_GR64_NOREX: return true;
5998 case MCK_GR64_TC: return true;
5999 case MCK_GR64_NOSP: return true;
6000 case MCK_Reg45: return true;
6001 case MCK_GR64: return true;
6002 }
6003
6004 case MCK_Reg68:
6005 switch (B) {
6006 default: return false;
6007 case MCK_GR64_NOREX_NOSP: return true;
6008 case MCK_Reg44: return true;
6009 case MCK_GR64_NOREX: return true;
6010 case MCK_GR64_NOSP: return true;
6011 case MCK_Reg45: return true;
6012 case MCK_GR64: return true;
6013 }
6014
6015 case MCK_Reg66:
6016 switch (B) {
6017 default: return false;
6018 case MCK_GR64_ABCD: return true;
6019 case MCK_GR64_NOREX_NOSP: return true;
6020 case MCK_Reg44: return true;
6021 case MCK_GR64_NOREX: return true;
6022 case MCK_GR64_NOSP: return true;
6023 case MCK_Reg45: return true;
6024 case MCK_GR64: return true;
6025 }
6026
6027 case MCK_Reg64:
6028 switch (B) {
6029 default: return false;
6030 case MCK_Reg41: return true;
6031 case MCK_Reg55: return true;
6032 case MCK_GR64_ABCD: return true;
6033 case MCK_Reg60: return true;
6034 case MCK_Reg49: return true;
6035 case MCK_Reg62: return true;
6036 case MCK_Reg50: return true;
6037 case MCK_Reg61: return true;
6038 case MCK_Reg58: return true;
6039 case MCK_Reg53: return true;
6040 case MCK_GR64_NOREX_NOSP: return true;
6041 case MCK_Reg59: return true;
6042 case MCK_Reg56: return true;
6043 case MCK_Reg54: return true;
6044 case MCK_Reg44: return true;
6045 case MCK_Reg51: return true;
6046 case MCK_GR64_NOREX: return true;
6047 case MCK_GR64_TCW64: return true;
6048 case MCK_GR64_TC: return true;
6049 case MCK_GR64_NOSP: return true;
6050 case MCK_Reg45: return true;
6051 case MCK_GR64: return true;
6052 }
6053
6054 case MCK_GR32_AD:
6055 switch (B) {
6056 default: return false;
6057 case MCK_Reg15: return true;
6058 case MCK_GR32_ABCD: return true;
6059 case MCK_GR32_TC: return true;
6060 case MCK_GR32_NOREX_NOSP: return true;
6061 case MCK_GR32_NOREX: return true;
6062 case MCK_Reg23: return true;
6063 case MCK_GR32_NOSP: return true;
6064 case MCK_GR32: return true;
6065 case MCK_Reg20: return true;
6066 case MCK_LOW32_ADDR_ACCESS: return true;
6067 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
6068 }
6069
6070 case MCK_GR32_BPSP:
6071 switch (B) {
6072 default: return false;
6073 case MCK_GR32_NOREX: return true;
6074 case MCK_Reg23: return true;
6075 case MCK_GR32: return true;
6076 case MCK_Reg20: return true;
6077 case MCK_LOW32_ADDR_ACCESS: return true;
6078 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
6079 }
6080
6081 case MCK_GR32_BSI:
6082 switch (B) {
6083 default: return false;
6084 case MCK_GR32_NOREX_NOSP: return true;
6085 case MCK_GR32_NOREX: return true;
6086 case MCK_Reg23: return true;
6087 case MCK_GR32_NOSP: return true;
6088 case MCK_GR32: return true;
6089 case MCK_Reg20: return true;
6090 case MCK_LOW32_ADDR_ACCESS: return true;
6091 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
6092 }
6093
6094 case MCK_GR32_CB:
6095 switch (B) {
6096 default: return false;
6097 case MCK_GR32_ABCD: return true;
6098 case MCK_GR32_NOREX_NOSP: return true;
6099 case MCK_GR32_NOREX: return true;
6100 case MCK_Reg23: return true;
6101 case MCK_GR32_NOSP: return true;
6102 case MCK_GR32: return true;
6103 case MCK_Reg20: return true;
6104 case MCK_LOW32_ADDR_ACCESS: return true;
6105 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
6106 }
6107
6108 case MCK_GR32_DC:
6109 switch (B) {
6110 default: return false;
6111 case MCK_Reg15: return true;
6112 case MCK_GR32_ABCD: return true;
6113 case MCK_GR32_TC: return true;
6114 case MCK_GR32_NOREX_NOSP: return true;
6115 case MCK_GR32_NOREX: return true;
6116 case MCK_Reg23: return true;
6117 case MCK_GR32_NOSP: return true;
6118 case MCK_GR32: return true;
6119 case MCK_Reg20: return true;
6120 case MCK_LOW32_ADDR_ACCESS: return true;
6121 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
6122 }
6123
6124 case MCK_GR32_DIBP:
6125 switch (B) {
6126 default: return false;
6127 case MCK_GR32_NOREX_NOSP: return true;
6128 case MCK_GR32_NOREX: return true;
6129 case MCK_Reg23: return true;
6130 case MCK_GR32_NOSP: return true;
6131 case MCK_GR32: return true;
6132 case MCK_Reg20: return true;
6133 case MCK_LOW32_ADDR_ACCESS: return true;
6134 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
6135 }
6136
6137 case MCK_GR32_SIDI:
6138 switch (B) {
6139 default: return false;
6140 case MCK_GR32_NOREX_NOSP: return true;
6141 case MCK_GR32_NOREX: return true;
6142 case MCK_Reg23: return true;
6143 case MCK_GR32_NOSP: return true;
6144 case MCK_GR32: return true;
6145 case MCK_Reg20: return true;
6146 case MCK_LOW32_ADDR_ACCESS: return true;
6147 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
6148 }
6149
6150 case MCK_GR64_AD:
6151 switch (B) {
6152 default: return false;
6153 case MCK_Reg41: return true;
6154 case MCK_Reg55: return true;
6155 case MCK_GR64_ABCD: return true;
6156 case MCK_Reg60: return true;
6157 case MCK_Reg49: return true;
6158 case MCK_Reg62: return true;
6159 case MCK_Reg50: return true;
6160 case MCK_Reg61: return true;
6161 case MCK_Reg58: return true;
6162 case MCK_Reg53: return true;
6163 case MCK_GR64_NOREX_NOSP: return true;
6164 case MCK_Reg59: return true;
6165 case MCK_Reg56: return true;
6166 case MCK_Reg54: return true;
6167 case MCK_Reg44: return true;
6168 case MCK_Reg51: return true;
6169 case MCK_GR64_NOREX: return true;
6170 case MCK_GR64_TCW64: return true;
6171 case MCK_GR64_TC: return true;
6172 case MCK_GR64_NOSP: return true;
6173 case MCK_Reg45: return true;
6174 case MCK_GR64: return true;
6175 }
6176
6177 case MCK_Reg108:
6178 return B == MCK_VK16PAIR;
6179
6180 case MCK_Reg41:
6181 switch (B) {
6182 default: return false;
6183 case MCK_Reg55: return true;
6184 case MCK_GR64_ABCD: return true;
6185 case MCK_Reg60: return true;
6186 case MCK_Reg49: return true;
6187 case MCK_Reg62: return true;
6188 case MCK_Reg50: return true;
6189 case MCK_Reg61: return true;
6190 case MCK_Reg58: return true;
6191 case MCK_Reg53: return true;
6192 case MCK_GR64_NOREX_NOSP: return true;
6193 case MCK_Reg59: return true;
6194 case MCK_Reg56: return true;
6195 case MCK_Reg54: return true;
6196 case MCK_Reg44: return true;
6197 case MCK_Reg51: return true;
6198 case MCK_GR64_NOREX: return true;
6199 case MCK_GR64_TCW64: return true;
6200 case MCK_GR64_TC: return true;
6201 case MCK_GR64_NOSP: return true;
6202 case MCK_Reg45: return true;
6203 case MCK_GR64: return true;
6204 }
6205
6206 case MCK_Reg15:
6207 switch (B) {
6208 default: return false;
6209 case MCK_GR32_ABCD: return true;
6210 case MCK_GR32_TC: return true;
6211 case MCK_GR32_NOREX_NOSP: return true;
6212 case MCK_GR32_NOREX: return true;
6213 case MCK_Reg23: return true;
6214 case MCK_GR32_NOSP: return true;
6215 case MCK_GR32: return true;
6216 case MCK_Reg20: return true;
6217 case MCK_LOW32_ADDR_ACCESS: return true;
6218 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
6219 }
6220
6221 case MCK_Reg55:
6222 switch (B) {
6223 default: return false;
6224 case MCK_Reg60: return true;
6225 case MCK_Reg50: return true;
6226 case MCK_Reg58: return true;
6227 case MCK_Reg53: return true;
6228 case MCK_Reg59: return true;
6229 case MCK_Reg56: return true;
6230 case MCK_Reg44: return true;
6231 case MCK_Reg51: return true;
6232 case MCK_GR64_NOREX: return true;
6233 case MCK_GR64_TCW64: return true;
6234 case MCK_GR64_TC: return true;
6235 case MCK_Reg45: return true;
6236 case MCK_GR64: return true;
6237 }
6238
6239 case MCK_GR16_ABCD:
6240 switch (B) {
6241 default: return false;
6242 case MCK_GR16_NOREX: return true;
6243 case MCK_GR16: return true;
6244 }
6245
6246 case MCK_GR32_ABCD:
6247 switch (B) {
6248 default: return false;
6249 case MCK_GR32_NOREX_NOSP: return true;
6250 case MCK_GR32_NOREX: return true;
6251 case MCK_Reg23: return true;
6252 case MCK_GR32_NOSP: return true;
6253 case MCK_GR32: return true;
6254 case MCK_Reg20: return true;
6255 case MCK_LOW32_ADDR_ACCESS: return true;
6256 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
6257 }
6258
6259 case MCK_GR32_TC:
6260 switch (B) {
6261 default: return false;
6262 case MCK_GR32_NOREX: return true;
6263 case MCK_Reg23: return true;
6264 case MCK_GR32: return true;
6265 case MCK_Reg20: return true;
6266 case MCK_LOW32_ADDR_ACCESS: return true;
6267 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
6268 }
6269
6270 case MCK_GR64_ABCD:
6271 switch (B) {
6272 default: return false;
6273 case MCK_GR64_NOREX_NOSP: return true;
6274 case MCK_Reg44: return true;
6275 case MCK_GR64_NOREX: return true;
6276 case MCK_GR64_NOSP: return true;
6277 case MCK_Reg45: return true;
6278 case MCK_GR64: return true;
6279 }
6280
6281 case MCK_GR8_ABCD_H:
6282 switch (B) {
6283 default: return false;
6284 case MCK_GR8_NOREX: return true;
6285 case MCK_GR8: return true;
6286 }
6287
6288 case MCK_GR8_ABCD_L:
6289 switch (B) {
6290 default: return false;
6291 case MCK_GR8_NOREX: return true;
6292 case MCK_GR8: return true;
6293 }
6294
6295 case MCK_Reg60:
6296 switch (B) {
6297 default: return false;
6298 case MCK_Reg53: return true;
6299 case MCK_Reg59: return true;
6300 case MCK_GR64_NOREX: return true;
6301 case MCK_GR64_TCW64: return true;
6302 case MCK_GR64_TC: return true;
6303 case MCK_GR64: return true;
6304 }
6305
6306 case MCK_Reg49:
6307 switch (B) {
6308 default: return false;
6309 case MCK_Reg50: return true;
6310 case MCK_Reg53: return true;
6311 case MCK_GR64_NOREX_NOSP: return true;
6312 case MCK_Reg54: return true;
6313 case MCK_Reg44: return true;
6314 case MCK_Reg51: return true;
6315 case MCK_GR64_NOREX: return true;
6316 case MCK_GR64_TC: return true;
6317 case MCK_GR64_NOSP: return true;
6318 case MCK_Reg45: return true;
6319 case MCK_GR64: return true;
6320 }
6321
6322 case MCK_Reg62:
6323 switch (B) {
6324 default: return false;
6325 case MCK_Reg61: return true;
6326 case MCK_Reg58: return true;
6327 case MCK_Reg59: return true;
6328 case MCK_Reg56: return true;
6329 case MCK_Reg54: return true;
6330 case MCK_Reg51: return true;
6331 case MCK_GR64_TCW64: return true;
6332 case MCK_GR64_TC: return true;
6333 case MCK_GR64_NOSP: return true;
6334 case MCK_Reg45: return true;
6335 case MCK_GR64: return true;
6336 }
6337
6338 case MCK_Reg50:
6339 switch (B) {
6340 default: return false;
6341 case MCK_Reg53: return true;
6342 case MCK_Reg44: return true;
6343 case MCK_Reg51: return true;
6344 case MCK_GR64_NOREX: return true;
6345 case MCK_GR64_TC: return true;
6346 case MCK_Reg45: return true;
6347 case MCK_GR64: return true;
6348 }
6349
6350 case MCK_Reg61:
6351 switch (B) {
6352 default: return false;
6353 case MCK_Reg56: return true;
6354 case MCK_GR64_TCW64: return true;
6355 case MCK_GR64_NOSP: return true;
6356 case MCK_Reg45: return true;
6357 case MCK_GR64: return true;
6358 }
6359
6360 case MCK_Reg58:
6361 switch (B) {
6362 default: return false;
6363 case MCK_Reg59: return true;
6364 case MCK_Reg56: return true;
6365 case MCK_Reg51: return true;
6366 case MCK_GR64_TCW64: return true;
6367 case MCK_GR64_TC: return true;
6368 case MCK_Reg45: return true;
6369 case MCK_GR64: return true;
6370 }
6371
6372 case MCK_Reg53:
6373 switch (B) {
6374 default: return false;
6375 case MCK_GR64_NOREX: return true;
6376 case MCK_GR64_TC: return true;
6377 case MCK_GR64: return true;
6378 }
6379
6380 case MCK_GR32_NOREX_NOSP:
6381 switch (B) {
6382 default: return false;
6383 case MCK_GR32_NOREX: return true;
6384 case MCK_Reg23: return true;
6385 case MCK_GR32_NOSP: return true;
6386 case MCK_GR32: return true;
6387 case MCK_Reg20: return true;
6388 case MCK_LOW32_ADDR_ACCESS: return true;
6389 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
6390 }
6391
6392 case MCK_GR64_NOREX_NOSP:
6393 switch (B) {
6394 default: return false;
6395 case MCK_Reg44: return true;
6396 case MCK_GR64_NOREX: return true;
6397 case MCK_GR64_NOSP: return true;
6398 case MCK_Reg45: return true;
6399 case MCK_GR64: return true;
6400 }
6401
6402 case MCK_VK16WM:
6403 return B == MCK_VK1;
6404
6405 case MCK_Reg59:
6406 switch (B) {
6407 default: return false;
6408 case MCK_GR64_TCW64: return true;
6409 case MCK_GR64_TC: return true;
6410 case MCK_GR64: return true;
6411 }
6412
6413 case MCK_Reg56:
6414 switch (B) {
6415 default: return false;
6416 case MCK_GR64_TCW64: return true;
6417 case MCK_Reg45: return true;
6418 case MCK_GR64: return true;
6419 }
6420
6421 case MCK_Reg54:
6422 switch (B) {
6423 default: return false;
6424 case MCK_Reg51: return true;
6425 case MCK_GR64_TC: return true;
6426 case MCK_GR64_NOSP: return true;
6427 case MCK_Reg45: return true;
6428 case MCK_GR64: return true;
6429 }
6430
6431 case MCK_Reg44:
6432 switch (B) {
6433 default: return false;
6434 case MCK_GR64_NOREX: return true;
6435 case MCK_Reg45: return true;
6436 case MCK_GR64: return true;
6437 }
6438
6439 case MCK_GR16_NOREX:
6440 return B == MCK_GR16;
6441
6442 case MCK_GR32_NOREX:
6443 switch (B) {
6444 default: return false;
6445 case MCK_Reg23: return true;
6446 case MCK_GR32: return true;
6447 case MCK_Reg20: return true;
6448 case MCK_LOW32_ADDR_ACCESS: return true;
6449 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
6450 }
6451
6452 case MCK_GR8_NOREX:
6453 return B == MCK_GR8;
6454
6455 case MCK_Reg51:
6456 switch (B) {
6457 default: return false;
6458 case MCK_GR64_TC: return true;
6459 case MCK_Reg45: return true;
6460 case MCK_GR64: return true;
6461 }
6462
6463 case MCK_Reg23:
6464 switch (B) {
6465 default: return false;
6466 case MCK_Reg20: return true;
6467 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
6468 }
6469
6470 case MCK_GR64_NOREX:
6471 return B == MCK_GR64;
6472
6473 case MCK_GR64_TCW64:
6474 return B == MCK_GR64;
6475
6476 case MCK_GR64_TC:
6477 return B == MCK_GR64;
6478
6479 case MCK_GR32_NOSP:
6480 switch (B) {
6481 default: return false;
6482 case MCK_GR32: return true;
6483 case MCK_Reg20: return true;
6484 case MCK_LOW32_ADDR_ACCESS: return true;
6485 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
6486 }
6487
6488 case MCK_GR64_NOSP:
6489 switch (B) {
6490 default: return false;
6491 case MCK_Reg45: return true;
6492 case MCK_GR64: return true;
6493 }
6494
6495 case MCK_Reg45:
6496 return B == MCK_GR64;
6497
6498 case MCK_FR32:
6499 return B == MCK_FR32X;
6500
6501 case MCK_GR32:
6502 switch (B) {
6503 default: return false;
6504 case MCK_Reg20: return true;
6505 case MCK_LOW32_ADDR_ACCESS: return true;
6506 case MCK_LOW32_ADDR_ACCESS_RBP: return true;
6507 }
6508
6509 case MCK_VR256:
6510 return B == MCK_VR256X;
6511
6512 case MCK_VR512_0_15:
6513 return B == MCK_VR512;
6514
6515 case MCK_Reg20:
6516 return B == MCK_LOW32_ADDR_ACCESS_RBP;
6517
6518 case MCK_LOW32_ADDR_ACCESS:
6519 return B == MCK_LOW32_ADDR_ACCESS_RBP;
6520
6521 case MCK_ImmSExti64i8:
6522 switch (B) {
6523 default: return false;
6524 case MCK_ImmSExti16i8: return true;
6525 case MCK_ImmSExti32i8: return true;
6526 case MCK_ImmSExti64i32: return true;
6527 case MCK_Imm: return true;
6528 }
6529
6530 case MCK_ImmSExti16i8:
6531 switch (B) {
6532 default: return false;
6533 case MCK_ImmSExti64i32: return true;
6534 case MCK_Imm: return true;
6535 }
6536
6537 case MCK_ImmSExti32i8:
6538 return B == MCK_Imm;
6539
6540 case MCK_ImmSExti64i32:
6541 return B == MCK_Imm;
6542
6543 case MCK_AbsMem16:
6544 switch (B) {
6545 default: return false;
6546 case MCK_AbsMem: return true;
6547 case MCK_Mem: return true;
6548 }
6549
6550 case MCK_DstIdx16:
6551 switch (B) {
6552 default: return false;
6553 case MCK_Mem16: return true;
6554 case MCK_Mem: return true;
6555 }
6556
6557 case MCK_DstIdx32:
6558 switch (B) {
6559 default: return false;
6560 case MCK_Mem32: return true;
6561 case MCK_Mem: return true;
6562 }
6563
6564 case MCK_DstIdx64:
6565 switch (B) {
6566 default: return false;
6567 case MCK_Mem64: return true;
6568 case MCK_Mem: return true;
6569 }
6570
6571 case MCK_DstIdx8:
6572 switch (B) {
6573 default: return false;
6574 case MCK_Mem8: return true;
6575 case MCK_Mem: return true;
6576 }
6577
6578 case MCK_MemOffs16_16:
6579 switch (B) {
6580 default: return false;
6581 case MCK_Mem16: return true;
6582 case MCK_Mem: return true;
6583 }
6584
6585 case MCK_MemOffs16_32:
6586 switch (B) {
6587 default: return false;
6588 case MCK_Mem32: return true;
6589 case MCK_Mem: return true;
6590 }
6591
6592 case MCK_MemOffs16_8:
6593 switch (B) {
6594 default: return false;
6595 case MCK_Mem8: return true;
6596 case MCK_Mem: return true;
6597 }
6598
6599 case MCK_MemOffs32_16:
6600 switch (B) {
6601 default: return false;
6602 case MCK_Mem16: return true;
6603 case MCK_Mem: return true;
6604 }
6605
6606 case MCK_MemOffs32_32:
6607 switch (B) {
6608 default: return false;
6609 case MCK_Mem32: return true;
6610 case MCK_Mem: return true;
6611 }
6612
6613 case MCK_MemOffs32_64:
6614 switch (B) {
6615 default: return false;
6616 case MCK_Mem64: return true;
6617 case MCK_Mem: return true;
6618 }
6619
6620 case MCK_MemOffs32_8:
6621 switch (B) {
6622 default: return false;
6623 case MCK_Mem8: return true;
6624 case MCK_Mem: return true;
6625 }
6626
6627 case MCK_MemOffs64_16:
6628 switch (B) {
6629 default: return false;
6630 case MCK_Mem16: return true;
6631 case MCK_Mem: return true;
6632 }
6633
6634 case MCK_MemOffs64_32:
6635 switch (B) {
6636 default: return false;
6637 case MCK_Mem32: return true;
6638 case MCK_Mem: return true;
6639 }
6640
6641 case MCK_MemOffs64_64:
6642 switch (B) {
6643 default: return false;
6644 case MCK_Mem64: return true;
6645 case MCK_Mem: return true;
6646 }
6647
6648 case MCK_MemOffs64_8:
6649 switch (B) {
6650 default: return false;
6651 case MCK_Mem8: return true;
6652 case MCK_Mem: return true;
6653 }
6654
6655 case MCK_SrcIdx16:
6656 switch (B) {
6657 default: return false;
6658 case MCK_Mem16: return true;
6659 case MCK_Mem: return true;
6660 }
6661
6662 case MCK_SrcIdx32:
6663 switch (B) {
6664 default: return false;
6665 case MCK_Mem32: return true;
6666 case MCK_Mem: return true;
6667 }
6668
6669 case MCK_SrcIdx64:
6670 switch (B) {
6671 default: return false;
6672 case MCK_Mem64: return true;
6673 case MCK_Mem: return true;
6674 }
6675
6676 case MCK_SrcIdx8:
6677 switch (B) {
6678 default: return false;
6679 case MCK_Mem8: return true;
6680 case MCK_Mem: return true;
6681 }
6682
6683 case MCK_AbsMem:
6684 return B == MCK_Mem;
6685
6686 case MCK_Mem128:
6687 return B == MCK_Mem;
6688
6689 case MCK_Mem128_RC128:
6690 return B == MCK_Mem;
6691
6692 case MCK_Mem128_RC128X:
6693 return B == MCK_Mem;
6694
6695 case MCK_Mem128_RC256:
6696 return B == MCK_Mem;
6697
6698 case MCK_Mem128_RC256X:
6699 return B == MCK_Mem;
6700
6701 case MCK_Mem16:
6702 return B == MCK_Mem;
6703
6704 case MCK_Mem256:
6705 return B == MCK_Mem;
6706
6707 case MCK_Mem256_RC128:
6708 return B == MCK_Mem;
6709
6710 case MCK_Mem256_RC128X:
6711 return B == MCK_Mem;
6712
6713 case MCK_Mem256_RC256:
6714 return B == MCK_Mem;
6715
6716 case MCK_Mem256_RC256X:
6717 return B == MCK_Mem;
6718
6719 case MCK_Mem256_RC512:
6720 return B == MCK_Mem;
6721
6722 case MCK_Mem32:
6723 return B == MCK_Mem;
6724
6725 case MCK_Mem512:
6726 return B == MCK_Mem;
6727
6728 case MCK_Mem512_RC256X:
6729 return B == MCK_Mem;
6730
6731 case MCK_Mem512_RC512:
6732 return B == MCK_Mem;
6733
6734 case MCK_Mem64:
6735 return B == MCK_Mem;
6736
6737 case MCK_Mem64_RC128:
6738 return B == MCK_Mem;
6739
6740 case MCK_Mem64_RC128X:
6741 return B == MCK_Mem;
6742
6743 case MCK_Mem80:
6744 return B == MCK_Mem;
6745
6746 case MCK_Mem8:
6747 return B == MCK_Mem;
6748
6749 case MCK_SibMem:
6750 return B == MCK_Mem;
6751 }
6752}
6753
6754static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
6755 X86Operand &Operand = (X86Operand &)GOp;
6756 if (Kind == InvalidMatchClass)
6757 return MCTargetAsmParser::Match_InvalidOperand;
6758
6759 if (Operand.isToken() && Kind <= MCK_LAST_TOKEN)
6760 return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
6761 MCTargetAsmParser::Match_Success :
6762 MCTargetAsmParser::Match_InvalidOperand;
6763
6764 switch (Kind) {
6765 default: break;
6766 // 'AVX512RC' class
6767 case MCK_AVX512RC: {
6768 DiagnosticPredicate DP(Operand.isAVX512RC());
6769 if (DP.isMatch())
6770 return MCTargetAsmParser::Match_Success;
6771 break;
6772 }
6773 // 'ImmSExti64i8' class
6774 case MCK_ImmSExti64i8: {
6775 DiagnosticPredicate DP(Operand.isImmSExti64i8());
6776 if (DP.isMatch())
6777 return MCTargetAsmParser::Match_Success;
6778 break;
6779 }
6780 // 'ImmSExti16i8' class
6781 case MCK_ImmSExti16i8: {
6782 DiagnosticPredicate DP(Operand.isImmSExti16i8());
6783 if (DP.isMatch())
6784 return MCTargetAsmParser::Match_Success;
6785 break;
6786 }
6787 // 'ImmSExti32i8' class
6788 case MCK_ImmSExti32i8: {
6789 DiagnosticPredicate DP(Operand.isImmSExti32i8());
6790 if (DP.isMatch())
6791 return MCTargetAsmParser::Match_Success;
6792 break;
6793 }
6794 // 'ImmSExti64i32' class
6795 case MCK_ImmSExti64i32: {
6796 DiagnosticPredicate DP(Operand.isImmSExti64i32());
6797 if (DP.isMatch())
6798 return MCTargetAsmParser::Match_Success;
6799 break;
6800 }
6801 // 'Imm' class
6802 case MCK_Imm: {
6803 DiagnosticPredicate DP(Operand.isImm());
6804 if (DP.isMatch())
6805 return MCTargetAsmParser::Match_Success;
6806 break;
6807 }
6808 // 'ImmUnsignedi4' class
6809 case MCK_ImmUnsignedi4: {
6810 DiagnosticPredicate DP(Operand.isImmUnsignedi4());
6811 if (DP.isMatch())
6812 return MCTargetAsmParser::Match_Success;
6813 if (DP.isNearMatch())
6814 return X86AsmParser::Match_InvalidImmUnsignedi4;
6815 break;
6816 }
6817 // 'ImmUnsignedi8' class
6818 case MCK_ImmUnsignedi8: {
6819 DiagnosticPredicate DP(Operand.isImmUnsignedi8());
6820 if (DP.isMatch())
6821 return MCTargetAsmParser::Match_Success;
6822 break;
6823 }
6824 // 'VK16Pair' class
6825 case MCK_VK16Pair: {
6826 DiagnosticPredicate DP(Operand.isVK16Pair());
6827 if (DP.isMatch())
6828 return MCTargetAsmParser::Match_Success;
6829 break;
6830 }
6831 // 'VK1Pair' class
6832 case MCK_VK1Pair: {
6833 DiagnosticPredicate DP(Operand.isVK1Pair());
6834 if (DP.isMatch())
6835 return MCTargetAsmParser::Match_Success;
6836 break;
6837 }
6838 // 'VK2Pair' class
6839 case MCK_VK2Pair: {
6840 DiagnosticPredicate DP(Operand.isVK2Pair());
6841 if (DP.isMatch())
6842 return MCTargetAsmParser::Match_Success;
6843 break;
6844 }
6845 // 'VK4Pair' class
6846 case MCK_VK4Pair: {
6847 DiagnosticPredicate DP(Operand.isVK4Pair());
6848 if (DP.isMatch())
6849 return MCTargetAsmParser::Match_Success;
6850 break;
6851 }
6852 // 'VK8Pair' class
6853 case MCK_VK8Pair: {
6854 DiagnosticPredicate DP(Operand.isVK8Pair());
6855 if (DP.isMatch())
6856 return MCTargetAsmParser::Match_Success;
6857 break;
6858 }
6859 // 'GR16orGR32orGR64' class
6860 case MCK_GR16orGR32orGR64: {
6861 DiagnosticPredicate DP(Operand.isGR16orGR32orGR64());
6862 if (DP.isMatch())
6863 return MCTargetAsmParser::Match_Success;
6864 break;
6865 }
6866 // 'GR32orGR64' class
6867 case MCK_GR32orGR64: {
6868 DiagnosticPredicate DP(Operand.isGR32orGR64());
6869 if (DP.isMatch())
6870 return MCTargetAsmParser::Match_Success;
6871 break;
6872 }
6873 // 'AbsMem16' class
6874 case MCK_AbsMem16: {
6875 DiagnosticPredicate DP(Operand.isAbsMem16());
6876 if (DP.isMatch())
6877 return MCTargetAsmParser::Match_Success;
6878 break;
6879 }
6880 // 'DstIdx16' class
6881 case MCK_DstIdx16: {
6882 DiagnosticPredicate DP(Operand.isDstIdx16());
6883 if (DP.isMatch())
6884 return MCTargetAsmParser::Match_Success;
6885 break;
6886 }
6887 // 'DstIdx32' class
6888 case MCK_DstIdx32: {
6889 DiagnosticPredicate DP(Operand.isDstIdx32());
6890 if (DP.isMatch())
6891 return MCTargetAsmParser::Match_Success;
6892 break;
6893 }
6894 // 'DstIdx64' class
6895 case MCK_DstIdx64: {
6896 DiagnosticPredicate DP(Operand.isDstIdx64());
6897 if (DP.isMatch())
6898 return MCTargetAsmParser::Match_Success;
6899 break;
6900 }
6901 // 'DstIdx8' class
6902 case MCK_DstIdx8: {
6903 DiagnosticPredicate DP(Operand.isDstIdx8());
6904 if (DP.isMatch())
6905 return MCTargetAsmParser::Match_Success;
6906 break;
6907 }
6908 // 'MemOffs16_16' class
6909 case MCK_MemOffs16_16: {
6910 DiagnosticPredicate DP(Operand.isMemOffs16_16());
6911 if (DP.isMatch())
6912 return MCTargetAsmParser::Match_Success;
6913 break;
6914 }
6915 // 'MemOffs16_32' class
6916 case MCK_MemOffs16_32: {
6917 DiagnosticPredicate DP(Operand.isMemOffs16_32());
6918 if (DP.isMatch())
6919 return MCTargetAsmParser::Match_Success;
6920 break;
6921 }
6922 // 'MemOffs16_8' class
6923 case MCK_MemOffs16_8: {
6924 DiagnosticPredicate DP(Operand.isMemOffs16_8());
6925 if (DP.isMatch())
6926 return MCTargetAsmParser::Match_Success;
6927 break;
6928 }
6929 // 'MemOffs32_16' class
6930 case MCK_MemOffs32_16: {
6931 DiagnosticPredicate DP(Operand.isMemOffs32_16());
6932 if (DP.isMatch())
6933 return MCTargetAsmParser::Match_Success;
6934 break;
6935 }
6936 // 'MemOffs32_32' class
6937 case MCK_MemOffs32_32: {
6938 DiagnosticPredicate DP(Operand.isMemOffs32_32());
6939 if (DP.isMatch())
6940 return MCTargetAsmParser::Match_Success;
6941 break;
6942 }
6943 // 'MemOffs32_64' class
6944 case MCK_MemOffs32_64: {
6945 DiagnosticPredicate DP(Operand.isMemOffs32_64());
6946 if (DP.isMatch())
6947 return MCTargetAsmParser::Match_Success;
6948 break;
6949 }
6950 // 'MemOffs32_8' class
6951 case MCK_MemOffs32_8: {
6952 DiagnosticPredicate DP(Operand.isMemOffs32_8());
6953 if (DP.isMatch())
6954 return MCTargetAsmParser::Match_Success;
6955 break;
6956 }
6957 // 'MemOffs64_16' class
6958 case MCK_MemOffs64_16: {
6959 DiagnosticPredicate DP(Operand.isMemOffs64_16());
6960 if (DP.isMatch())
6961 return MCTargetAsmParser::Match_Success;
6962 break;
6963 }
6964 // 'MemOffs64_32' class
6965 case MCK_MemOffs64_32: {
6966 DiagnosticPredicate DP(Operand.isMemOffs64_32());
6967 if (DP.isMatch())
6968 return MCTargetAsmParser::Match_Success;
6969 break;
6970 }
6971 // 'MemOffs64_64' class
6972 case MCK_MemOffs64_64: {
6973 DiagnosticPredicate DP(Operand.isMemOffs64_64());
6974 if (DP.isMatch())
6975 return MCTargetAsmParser::Match_Success;
6976 break;
6977 }
6978 // 'MemOffs64_8' class
6979 case MCK_MemOffs64_8: {
6980 DiagnosticPredicate DP(Operand.isMemOffs64_8());
6981 if (DP.isMatch())
6982 return MCTargetAsmParser::Match_Success;
6983 break;
6984 }
6985 // 'SrcIdx16' class
6986 case MCK_SrcIdx16: {
6987 DiagnosticPredicate DP(Operand.isSrcIdx16());
6988 if (DP.isMatch())
6989 return MCTargetAsmParser::Match_Success;
6990 break;
6991 }
6992 // 'SrcIdx32' class
6993 case MCK_SrcIdx32: {
6994 DiagnosticPredicate DP(Operand.isSrcIdx32());
6995 if (DP.isMatch())
6996 return MCTargetAsmParser::Match_Success;
6997 break;
6998 }
6999 // 'SrcIdx64' class
7000 case MCK_SrcIdx64: {
7001 DiagnosticPredicate DP(Operand.isSrcIdx64());
7002 if (DP.isMatch())
7003 return MCTargetAsmParser::Match_Success;
7004 break;
7005 }
7006 // 'SrcIdx8' class
7007 case MCK_SrcIdx8: {
7008 DiagnosticPredicate DP(Operand.isSrcIdx8());
7009 if (DP.isMatch())
7010 return MCTargetAsmParser::Match_Success;
7011 break;
7012 }
7013 // 'AbsMem' class
7014 case MCK_AbsMem: {
7015 DiagnosticPredicate DP(Operand.isAbsMem());
7016 if (DP.isMatch())
7017 return MCTargetAsmParser::Match_Success;
7018 break;
7019 }
7020 // 'Mem128' class
7021 case MCK_Mem128: {
7022 DiagnosticPredicate DP(Operand.isMem128());
7023 if (DP.isMatch())
7024 return MCTargetAsmParser::Match_Success;
7025 break;
7026 }
7027 // 'Mem128_RC128' class
7028 case MCK_Mem128_RC128: {
7029 DiagnosticPredicate DP(Operand.isMem128_RC128());
7030 if (DP.isMatch())
7031 return MCTargetAsmParser::Match_Success;
7032 break;
7033 }
7034 // 'Mem128_RC128X' class
7035 case MCK_Mem128_RC128X: {
7036 DiagnosticPredicate DP(Operand.isMem128_RC128X());
7037 if (DP.isMatch())
7038 return MCTargetAsmParser::Match_Success;
7039 break;
7040 }
7041 // 'Mem128_RC256' class
7042 case MCK_Mem128_RC256: {
7043 DiagnosticPredicate DP(Operand.isMem128_RC256());
7044 if (DP.isMatch())
7045 return MCTargetAsmParser::Match_Success;
7046 break;
7047 }
7048 // 'Mem128_RC256X' class
7049 case MCK_Mem128_RC256X: {
7050 DiagnosticPredicate DP(Operand.isMem128_RC256X());
7051 if (DP.isMatch())
7052 return MCTargetAsmParser::Match_Success;
7053 break;
7054 }
7055 // 'Mem16' class
7056 case MCK_Mem16: {
7057 DiagnosticPredicate DP(Operand.isMem16());
7058 if (DP.isMatch())
7059 return MCTargetAsmParser::Match_Success;
7060 break;
7061 }
7062 // 'Mem256' class
7063 case MCK_Mem256: {
7064 DiagnosticPredicate DP(Operand.isMem256());
7065 if (DP.isMatch())
7066 return MCTargetAsmParser::Match_Success;
7067 break;
7068 }
7069 // 'Mem256_RC128' class
7070 case MCK_Mem256_RC128: {
7071 DiagnosticPredicate DP(Operand.isMem256_RC128());
7072 if (DP.isMatch())
7073 return MCTargetAsmParser::Match_Success;
7074 break;
7075 }
7076 // 'Mem256_RC128X' class
7077 case MCK_Mem256_RC128X: {
7078 DiagnosticPredicate DP(Operand.isMem256_RC128X());
7079 if (DP.isMatch())
7080 return MCTargetAsmParser::Match_Success;
7081 break;
7082 }
7083 // 'Mem256_RC256' class
7084 case MCK_Mem256_RC256: {
7085 DiagnosticPredicate DP(Operand.isMem256_RC256());
7086 if (DP.isMatch())
7087 return MCTargetAsmParser::Match_Success;
7088 break;
7089 }
7090 // 'Mem256_RC256X' class
7091 case MCK_Mem256_RC256X: {
7092 DiagnosticPredicate DP(Operand.isMem256_RC256X());
7093 if (DP.isMatch())
7094 return MCTargetAsmParser::Match_Success;
7095 break;
7096 }
7097 // 'Mem256_RC512' class
7098 case MCK_Mem256_RC512: {
7099 DiagnosticPredicate DP(Operand.isMem256_RC512());
7100 if (DP.isMatch())
7101 return MCTargetAsmParser::Match_Success;
7102 break;
7103 }
7104 // 'Mem32' class
7105 case MCK_Mem32: {
7106 DiagnosticPredicate DP(Operand.isMem32());
7107 if (DP.isMatch())
7108 return MCTargetAsmParser::Match_Success;
7109 break;
7110 }
7111 // 'Mem512' class
7112 case MCK_Mem512: {
7113 DiagnosticPredicate DP(Operand.isMem512());
7114 if (DP.isMatch())
7115 return MCTargetAsmParser::Match_Success;
7116 break;
7117 }
7118 // 'Mem512_RC256X' class
7119 case MCK_Mem512_RC256X: {
7120 DiagnosticPredicate DP(Operand.isMem512_RC256X());
7121 if (DP.isMatch())
7122 return MCTargetAsmParser::Match_Success;
7123 break;
7124 }
7125 // 'Mem512_RC512' class
7126 case MCK_Mem512_RC512: {
7127 DiagnosticPredicate DP(Operand.isMem512_RC512());
7128 if (DP.isMatch())
7129 return MCTargetAsmParser::Match_Success;
7130 break;
7131 }
7132 // 'Mem64' class
7133 case MCK_Mem64: {
7134 DiagnosticPredicate DP(Operand.isMem64());
7135 if (DP.isMatch())
7136 return MCTargetAsmParser::Match_Success;
7137 break;
7138 }
7139 // 'Mem64_RC128' class
7140 case MCK_Mem64_RC128: {
7141 DiagnosticPredicate DP(Operand.isMem64_RC128());
7142 if (DP.isMatch())
7143 return MCTargetAsmParser::Match_Success;
7144 break;
7145 }
7146 // 'Mem64_RC128X' class
7147 case MCK_Mem64_RC128X: {
7148 DiagnosticPredicate DP(Operand.isMem64_RC128X());
7149 if (DP.isMatch())
7150 return MCTargetAsmParser::Match_Success;
7151 break;
7152 }
7153 // 'Mem80' class
7154 case MCK_Mem80: {
7155 DiagnosticPredicate DP(Operand.isMem80());
7156 if (DP.isMatch())
7157 return MCTargetAsmParser::Match_Success;
7158 break;
7159 }
7160 // 'Mem8' class
7161 case MCK_Mem8: {
7162 DiagnosticPredicate DP(Operand.isMem8());
7163 if (DP.isMatch())
7164 return MCTargetAsmParser::Match_Success;
7165 break;
7166 }
7167 // 'SibMem' class
7168 case MCK_SibMem: {
7169 DiagnosticPredicate DP(Operand.isSibMem());
7170 if (DP.isMatch())
7171 return MCTargetAsmParser::Match_Success;
7172 break;
7173 }
7174 // 'Mem' class
7175 case MCK_Mem: {
7176 DiagnosticPredicate DP(Operand.isMem());
7177 if (DP.isMatch())
7178 return MCTargetAsmParser::Match_Success;
7179 break;
7180 }
7181 } // end switch (Kind)
7182
7183 if (Operand.isReg()) {
7184 MatchClassKind OpKind;
7185 switch (Operand.getReg()) {
7186 default: OpKind = InvalidMatchClass; break;
7187 case X86::AL: OpKind = MCK_AL; break;
7188 case X86::DL: OpKind = MCK_GR8_ABCD_L; break;
7189 case X86::CL: OpKind = MCK_CL; break;
7190 case X86::BL: OpKind = MCK_GR8_ABCD_L; break;
7191 case X86::AH: OpKind = MCK_GR8_ABCD_H; break;
7192 case X86::DH: OpKind = MCK_GR8_ABCD_H; break;
7193 case X86::CH: OpKind = MCK_GR8_ABCD_H; break;
7194 case X86::BH: OpKind = MCK_GR8_ABCD_H; break;
7195 case X86::SIL: OpKind = MCK_GR8; break;
7196 case X86::DIL: OpKind = MCK_GR8; break;
7197 case X86::BPL: OpKind = MCK_GR8; break;
7198 case X86::SPL: OpKind = MCK_GR8; break;
7199 case X86::R8B: OpKind = MCK_GR8; break;
7200 case X86::R9B: OpKind = MCK_GR8; break;
7201 case X86::R10B: OpKind = MCK_GR8; break;
7202 case X86::R11B: OpKind = MCK_GR8; break;
7203 case X86::R12B: OpKind = MCK_GR8; break;
7204 case X86::R13B: OpKind = MCK_GR8; break;
7205 case X86::R14B: OpKind = MCK_GR8; break;
7206 case X86::R15B: OpKind = MCK_GR8; break;
7207 case X86::SIH: OpKind = MCK_GRH8; break;
7208 case X86::DIH: OpKind = MCK_GRH8; break;
7209 case X86::BPH: OpKind = MCK_GRH8; break;
7210 case X86::SPH: OpKind = MCK_GRH8; break;
7211 case X86::R8BH: OpKind = MCK_GRH8; break;
7212 case X86::R9BH: OpKind = MCK_GRH8; break;
7213 case X86::R10BH: OpKind = MCK_GRH8; break;
7214 case X86::R11BH: OpKind = MCK_GRH8; break;
7215 case X86::R12BH: OpKind = MCK_GRH8; break;
7216 case X86::R13BH: OpKind = MCK_GRH8; break;
7217 case X86::R14BH: OpKind = MCK_GRH8; break;
7218 case X86::R15BH: OpKind = MCK_GRH8; break;
7219 case X86::HAX: OpKind = MCK_GRH16; break;
7220 case X86::HDX: OpKind = MCK_GRH16; break;
7221 case X86::HCX: OpKind = MCK_GRH16; break;
7222 case X86::HBX: OpKind = MCK_GRH16; break;
7223 case X86::HSI: OpKind = MCK_GRH16; break;
7224 case X86::HDI: OpKind = MCK_GRH16; break;
7225 case X86::HBP: OpKind = MCK_GRH16; break;
7226 case X86::HSP: OpKind = MCK_GRH16; break;
7227 case X86::HIP: OpKind = MCK_GRH16; break;
7228 case X86::R8WH: OpKind = MCK_GRH16; break;
7229 case X86::R9WH: OpKind = MCK_GRH16; break;
7230 case X86::R10WH: OpKind = MCK_GRH16; break;
7231 case X86::R11WH: OpKind = MCK_GRH16; break;
7232 case X86::R12WH: OpKind = MCK_GRH16; break;
7233 case X86::R13WH: OpKind = MCK_GRH16; break;
7234 case X86::R14WH: OpKind = MCK_GRH16; break;
7235 case X86::R15WH: OpKind = MCK_GRH16; break;
7236 case X86::AX: OpKind = MCK_AX; break;
7237 case X86::DX: OpKind = MCK_DX; break;
7238 case X86::CX: OpKind = MCK_GR16_ABCD; break;
7239 case X86::BX: OpKind = MCK_GR16_ABCD; break;
7240 case X86::SI: OpKind = MCK_GR16_NOREX; break;
7241 case X86::DI: OpKind = MCK_GR16_NOREX; break;
7242 case X86::BP: OpKind = MCK_GR16_NOREX; break;
7243 case X86::SP: OpKind = MCK_GR16_NOREX; break;
7244 case X86::R8W: OpKind = MCK_GR16; break;
7245 case X86::R9W: OpKind = MCK_GR16; break;
7246 case X86::R10W: OpKind = MCK_GR16; break;
7247 case X86::R11W: OpKind = MCK_GR16; break;
7248 case X86::R12W: OpKind = MCK_GR16; break;
7249 case X86::R13W: OpKind = MCK_GR16; break;
7250 case X86::R14W: OpKind = MCK_GR16; break;
7251 case X86::R15W: OpKind = MCK_GR16; break;
7252 case X86::EAX: OpKind = MCK_EAX; break;
7253 case X86::EDX: OpKind = MCK_EDX; break;
7254 case X86::ECX: OpKind = MCK_ECX; break;
7255 case X86::EBX: OpKind = MCK_EBX; break;
7256 case X86::ESI: OpKind = MCK_Reg32; break;
7257 case X86::EDI: OpKind = MCK_Reg34; break;
7258 case X86::EBP: OpKind = MCK_Reg36; break;
7259 case X86::ESP: OpKind = MCK_Reg38; break;
7260 case X86::R8D: OpKind = MCK_GR32_NOSP; break;
7261 case X86::R9D: OpKind = MCK_GR32_NOSP; break;
7262 case X86::R10D: OpKind = MCK_GR32_NOSP; break;
7263 case X86::R11D: OpKind = MCK_GR32_NOSP; break;
7264 case X86::R12D: OpKind = MCK_GR32_NOSP; break;
7265 case X86::R13D: OpKind = MCK_GR32_NOSP; break;
7266 case X86::R14D: OpKind = MCK_GR32_NOSP; break;
7267 case X86::R15D: OpKind = MCK_GR32_NOSP; break;
7268 case X86::RAX: OpKind = MCK_RAX; break;
7269 case X86::RDX: OpKind = MCK_RDX; break;
7270 case X86::RCX: OpKind = MCK_RCX; break;
7271 case X86::RBX: OpKind = MCK_RBX; break;
7272 case X86::RSI: OpKind = MCK_Reg69; break;
7273 case X86::RDI: OpKind = MCK_Reg71; break;
7274 case X86::RBP: OpKind = MCK_Reg73; break;
7275 case X86::RSP: OpKind = MCK_Reg76; break;
7276 case X86::R8: OpKind = MCK_Reg62; break;
7277 case X86::R9: OpKind = MCK_Reg62; break;
7278 case X86::R10: OpKind = MCK_Reg61; break;
7279 case X86::R11: OpKind = MCK_Reg62; break;
7280 case X86::R12: OpKind = MCK_GR64_NOSP; break;
7281 case X86::R13: OpKind = MCK_GR64_NOSP; break;
7282 case X86::R14: OpKind = MCK_GR64_NOSP; break;
7283 case X86::R15: OpKind = MCK_GR64_NOSP; break;
7284 case X86::RIP: OpKind = MCK_Reg77; break;
7285 case X86::MM0: OpKind = MCK_VR64; break;
7286 case X86::MM1: OpKind = MCK_VR64; break;
7287 case X86::MM2: OpKind = MCK_VR64; break;
7288 case X86::MM3: OpKind = MCK_VR64; break;
7289 case X86::MM4: OpKind = MCK_VR64; break;
7290 case X86::MM5: OpKind = MCK_VR64; break;
7291 case X86::MM6: OpKind = MCK_VR64; break;
7292 case X86::MM7: OpKind = MCK_VR64; break;
7293 case X86::FP0: OpKind = MCK_RFP32; break;
7294 case X86::FP1: OpKind = MCK_RFP32; break;
7295 case X86::FP2: OpKind = MCK_RFP32; break;
7296 case X86::FP3: OpKind = MCK_RFP32; break;
7297 case X86::FP4: OpKind = MCK_RFP32; break;
7298 case X86::FP5: OpKind = MCK_RFP32; break;
7299 case X86::FP6: OpKind = MCK_RFP32; break;
7300 case X86::FP7: OpKind = MCK_RFP80_7; break;
7301 case X86::XMM0: OpKind = MCK_XMM0; break;
7302 case X86::XMM1: OpKind = MCK_FR32; break;
7303 case X86::XMM2: OpKind = MCK_FR32; break;
7304 case X86::XMM3: OpKind = MCK_FR32; break;
7305 case X86::XMM4: OpKind = MCK_FR32; break;
7306 case X86::XMM5: OpKind = MCK_FR32; break;
7307 case X86::XMM6: OpKind = MCK_FR32; break;
7308 case X86::XMM7: OpKind = MCK_FR32; break;
7309 case X86::XMM8: OpKind = MCK_FR32; break;
7310 case X86::XMM9: OpKind = MCK_FR32; break;
7311 case X86::XMM10: OpKind = MCK_FR32; break;
7312 case X86::XMM11: OpKind = MCK_FR32; break;
7313 case X86::XMM12: OpKind = MCK_FR32; break;
7314 case X86::XMM13: OpKind = MCK_FR32; break;
7315 case X86::XMM14: OpKind = MCK_FR32; break;
7316 case X86::XMM15: OpKind = MCK_FR32; break;
7317 case X86::XMM16: OpKind = MCK_FR32X; break;
7318 case X86::XMM17: OpKind = MCK_FR32X; break;
7319 case X86::XMM18: OpKind = MCK_FR32X; break;
7320 case X86::XMM19: OpKind = MCK_FR32X; break;
7321 case X86::XMM20: OpKind = MCK_FR32X; break;
7322 case X86::XMM21: OpKind = MCK_FR32X; break;
7323 case X86::XMM22: OpKind = MCK_FR32X; break;
7324 case X86::XMM23: OpKind = MCK_FR32X; break;
7325 case X86::XMM24: OpKind = MCK_FR32X; break;
7326 case X86::XMM25: OpKind = MCK_FR32X; break;
7327 case X86::XMM26: OpKind = MCK_FR32X; break;
7328 case X86::XMM27: OpKind = MCK_FR32X; break;
7329 case X86::XMM28: OpKind = MCK_FR32X; break;
7330 case X86::XMM29: OpKind = MCK_FR32X; break;
7331 case X86::XMM30: OpKind = MCK_FR32X; break;
7332 case X86::XMM31: OpKind = MCK_FR32X; break;
7333 case X86::YMM0: OpKind = MCK_VR256; break;
7334 case X86::YMM1: OpKind = MCK_VR256; break;
7335 case X86::YMM2: OpKind = MCK_VR256; break;
7336 case X86::YMM3: OpKind = MCK_VR256; break;
7337 case X86::YMM4: OpKind = MCK_VR256; break;
7338 case X86::YMM5: OpKind = MCK_VR256; break;
7339 case X86::YMM6: OpKind = MCK_VR256; break;
7340 case X86::YMM7: OpKind = MCK_VR256; break;
7341 case X86::YMM8: OpKind = MCK_VR256; break;
7342 case X86::YMM9: OpKind = MCK_VR256; break;
7343 case X86::YMM10: OpKind = MCK_VR256; break;
7344 case X86::YMM11: OpKind = MCK_VR256; break;
7345 case X86::YMM12: OpKind = MCK_VR256; break;
7346 case X86::YMM13: OpKind = MCK_VR256; break;
7347 case X86::YMM14: OpKind = MCK_VR256; break;
7348 case X86::YMM15: OpKind = MCK_VR256; break;
7349 case X86::YMM16: OpKind = MCK_VR256X; break;
7350 case X86::YMM17: OpKind = MCK_VR256X; break;
7351 case X86::YMM18: OpKind = MCK_VR256X; break;
7352 case X86::YMM19: OpKind = MCK_VR256X; break;
7353 case X86::YMM20: OpKind = MCK_VR256X; break;
7354 case X86::YMM21: OpKind = MCK_VR256X; break;
7355 case X86::YMM22: OpKind = MCK_VR256X; break;
7356 case X86::YMM23: OpKind = MCK_VR256X; break;
7357 case X86::YMM24: OpKind = MCK_VR256X; break;
7358 case X86::YMM25: OpKind = MCK_VR256X; break;
7359 case X86::YMM26: OpKind = MCK_VR256X; break;
7360 case X86::YMM27: OpKind = MCK_VR256X; break;
7361 case X86::YMM28: OpKind = MCK_VR256X; break;
7362 case X86::YMM29: OpKind = MCK_VR256X; break;
7363 case X86::YMM30: OpKind = MCK_VR256X; break;
7364 case X86::YMM31: OpKind = MCK_VR256X; break;
7365 case X86::ZMM0: OpKind = MCK_VR512_0_15; break;
7366 case X86::ZMM1: OpKind = MCK_VR512_0_15; break;
7367 case X86::ZMM2: OpKind = MCK_VR512_0_15; break;
7368 case X86::ZMM3: OpKind = MCK_VR512_0_15; break;
7369 case X86::ZMM4: OpKind = MCK_VR512_0_15; break;
7370 case X86::ZMM5: OpKind = MCK_VR512_0_15; break;
7371 case X86::ZMM6: OpKind = MCK_VR512_0_15; break;
7372 case X86::ZMM7: OpKind = MCK_VR512_0_15; break;
7373 case X86::ZMM8: OpKind = MCK_VR512_0_15; break;
7374 case X86::ZMM9: OpKind = MCK_VR512_0_15; break;
7375 case X86::ZMM10: OpKind = MCK_VR512_0_15; break;
7376 case X86::ZMM11: OpKind = MCK_VR512_0_15; break;
7377 case X86::ZMM12: OpKind = MCK_VR512_0_15; break;
7378 case X86::ZMM13: OpKind = MCK_VR512_0_15; break;
7379 case X86::ZMM14: OpKind = MCK_VR512_0_15; break;
7380 case X86::ZMM15: OpKind = MCK_VR512_0_15; break;
7381 case X86::ZMM16: OpKind = MCK_VR512; break;
7382 case X86::ZMM17: OpKind = MCK_VR512; break;
7383 case X86::ZMM18: OpKind = MCK_VR512; break;
7384 case X86::ZMM19: OpKind = MCK_VR512; break;
7385 case X86::ZMM20: OpKind = MCK_VR512; break;
7386 case X86::ZMM21: OpKind = MCK_VR512; break;
7387 case X86::ZMM22: OpKind = MCK_VR512; break;
7388 case X86::ZMM23: OpKind = MCK_VR512; break;
7389 case X86::ZMM24: OpKind = MCK_VR512; break;
7390 case X86::ZMM25: OpKind = MCK_VR512; break;
7391 case X86::ZMM26: OpKind = MCK_VR512; break;
7392 case X86::ZMM27: OpKind = MCK_VR512; break;
7393 case X86::ZMM28: OpKind = MCK_VR512; break;
7394 case X86::ZMM29: OpKind = MCK_VR512; break;
7395 case X86::ZMM30: OpKind = MCK_VR512; break;
7396 case X86::ZMM31: OpKind = MCK_VR512; break;
7397 case X86::TMMCFG: OpKind = MCK_TILECFG; break;
7398 case X86::TMM0: OpKind = MCK_TILE; break;
7399 case X86::TMM1: OpKind = MCK_TILE; break;
7400 case X86::TMM2: OpKind = MCK_TILE; break;
7401 case X86::TMM3: OpKind = MCK_TILE; break;
7402 case X86::TMM4: OpKind = MCK_TILE; break;
7403 case X86::TMM5: OpKind = MCK_TILE; break;
7404 case X86::TMM6: OpKind = MCK_TILE; break;
7405 case X86::TMM7: OpKind = MCK_TILE; break;
7406 case X86::K0: OpKind = MCK_VK1; break;
7407 case X86::K1: OpKind = MCK_VK16WM; break;
7408 case X86::K2: OpKind = MCK_VK16WM; break;
7409 case X86::K3: OpKind = MCK_VK16WM; break;
7410 case X86::K4: OpKind = MCK_VK16WM; break;
7411 case X86::K5: OpKind = MCK_VK16WM; break;
7412 case X86::K6: OpKind = MCK_VK16WM; break;
7413 case X86::K7: OpKind = MCK_VK16WM; break;
7414 case X86::ST0: OpKind = MCK_ST0; break;
7415 case X86::ST1: OpKind = MCK_RST; break;
7416 case X86::ST2: OpKind = MCK_RST; break;
7417 case X86::ST3: OpKind = MCK_RST; break;
7418 case X86::ST4: OpKind = MCK_RST; break;
7419 case X86::ST5: OpKind = MCK_RST; break;
7420 case X86::ST6: OpKind = MCK_RST; break;
7421 case X86::ST7: OpKind = MCK_RST; break;
7422 case X86::FPSW: OpKind = MCK_FPCCR; break;
7423 case X86::EFLAGS: OpKind = MCK_CCR; break;
7424 case X86::DF: OpKind = MCK_DFCCR; break;
7425 case X86::CS: OpKind = MCK_CS; break;
7426 case X86::DS: OpKind = MCK_DS; break;
7427 case X86::SS: OpKind = MCK_SS; break;
7428 case X86::ES: OpKind = MCK_ES; break;
7429 case X86::FS: OpKind = MCK_FS; break;
7430 case X86::GS: OpKind = MCK_GS; break;
7431 case X86::DR0: OpKind = MCK_DEBUG_REG; break;
7432 case X86::DR1: OpKind = MCK_DEBUG_REG; break;
7433 case X86::DR2: OpKind = MCK_DEBUG_REG; break;
7434 case X86::DR3: OpKind = MCK_DEBUG_REG; break;
7435 case X86::DR4: OpKind = MCK_DEBUG_REG; break;
7436 case X86::DR5: OpKind = MCK_DEBUG_REG; break;
7437 case X86::DR6: OpKind = MCK_DEBUG_REG; break;
7438 case X86::DR7: OpKind = MCK_DEBUG_REG; break;
7439 case X86::DR8: OpKind = MCK_DEBUG_REG; break;
7440 case X86::DR9: OpKind = MCK_DEBUG_REG; break;
7441 case X86::DR10: OpKind = MCK_DEBUG_REG; break;
7442 case X86::DR11: OpKind = MCK_DEBUG_REG; break;
7443 case X86::DR12: OpKind = MCK_DEBUG_REG; break;
7444 case X86::DR13: OpKind = MCK_DEBUG_REG; break;
7445 case X86::DR14: OpKind = MCK_DEBUG_REG; break;
7446 case X86::DR15: OpKind = MCK_DEBUG_REG; break;
7447 case X86::CR0: OpKind = MCK_CONTROL_REG; break;
7448 case X86::CR1: OpKind = MCK_CONTROL_REG; break;
7449 case X86::CR2: OpKind = MCK_CONTROL_REG; break;
7450 case X86::CR3: OpKind = MCK_CONTROL_REG; break;
7451 case X86::CR4: OpKind = MCK_CONTROL_REG; break;
7452 case X86::CR5: OpKind = MCK_CONTROL_REG; break;
7453 case X86::CR6: OpKind = MCK_CONTROL_REG; break;
7454 case X86::CR7: OpKind = MCK_CONTROL_REG; break;
7455 case X86::CR8: OpKind = MCK_CONTROL_REG; break;
7456 case X86::CR9: OpKind = MCK_CONTROL_REG; break;
7457 case X86::CR10: OpKind = MCK_CONTROL_REG; break;
7458 case X86::CR11: OpKind = MCK_CONTROL_REG; break;
7459 case X86::CR12: OpKind = MCK_CONTROL_REG; break;
7460 case X86::CR13: OpKind = MCK_CONTROL_REG; break;
7461 case X86::CR14: OpKind = MCK_CONTROL_REG; break;
7462 case X86::CR15: OpKind = MCK_CONTROL_REG; break;
7463 case X86::BND0: OpKind = MCK_BNDR; break;
7464 case X86::BND1: OpKind = MCK_BNDR; break;
7465 case X86::BND2: OpKind = MCK_BNDR; break;
7466 case X86::BND3: OpKind = MCK_BNDR; break;
7467 case X86::K0_K1: OpKind = MCK_VK16PAIR; break;
7468 case X86::K2_K3: OpKind = MCK_Reg108; break;
7469 case X86::K4_K5: OpKind = MCK_Reg108; break;
7470 case X86::K6_K7: OpKind = MCK_Reg108; break;
7471 }
7472 return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success :
7473 getDiagKindFromRegisterClass(Kind);
7474 }
7475
7476 if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER)
7477 return getDiagKindFromRegisterClass(Kind);
7478
7479 return MCTargetAsmParser::Match_InvalidOperand;
7480}
7481
7482#ifndef NDEBUG
7483const char *getMatchClassName(MatchClassKind Kind) {
7484 switch (Kind) {
7485 case InvalidMatchClass: return "InvalidMatchClass";
7486 case OptionalMatchClass: return "OptionalMatchClass";
7487 case MCK__STAR_: return "MCK__STAR_";
7488 case MCK__123_: return "MCK__123_";
7489 case MCK__123_1to16_125_: return "MCK__123_1to16_125_";
7490 case MCK__123_1to2_125_: return "MCK__123_1to2_125_";
7491 case MCK__123_1to4_125_: return "MCK__123_1to4_125_";
7492 case MCK__123_1to8_125_: return "MCK__123_1to8_125_";
7493 case MCK__123_sae_125_: return "MCK__123_sae_125_";
7494 case MCK__123_z_125_: return "MCK__123_z_125_";
7495 case MCK__125_: return "MCK__125_";
7496 case MCK_Reg77: return "MCK_Reg77";
7497 case MCK_Reg76: return "MCK_Reg76";
7498 case MCK_Reg73: return "MCK_Reg73";
7499 case MCK_Reg71: return "MCK_Reg71";
7500 case MCK_Reg69: return "MCK_Reg69";
7501 case MCK_Reg38: return "MCK_Reg38";
7502 case MCK_Reg36: return "MCK_Reg36";
7503 case MCK_Reg34: return "MCK_Reg34";
7504 case MCK_Reg32: return "MCK_Reg32";
7505 case MCK_AL: return "MCK_AL";
7506 case MCK_AX: return "MCK_AX";
7507 case MCK_CCR: return "MCK_CCR";
7508 case MCK_CL: return "MCK_CL";
7509 case MCK_CS: return "MCK_CS";
7510 case MCK_DFCCR: return "MCK_DFCCR";
7511 case MCK_DS: return "MCK_DS";
7512 case MCK_DX: return "MCK_DX";
7513 case MCK_EAX: return "MCK_EAX";
7514 case MCK_EBX: return "MCK_EBX";
7515 case MCK_ECX: return "MCK_ECX";
7516 case MCK_EDX: return "MCK_EDX";
7517 case MCK_ES: return "MCK_ES";
7518 case MCK_FPCCR: return "MCK_FPCCR";
7519 case MCK_FS: return "MCK_FS";
7520 case MCK_GS: return "MCK_GS";
7521 case MCK_RAX: return "MCK_RAX";
7522 case MCK_RBX: return "MCK_RBX";
7523 case MCK_RCX: return "MCK_RCX";
7524 case MCK_RDX: return "MCK_RDX";
7525 case MCK_RFP80_7: return "MCK_RFP80_7";
7526 case MCK_SS: return "MCK_SS";
7527 case MCK_ST0: return "MCK_ST0";
7528 case MCK_TILECFG: return "MCK_TILECFG";
7529 case MCK_XMM0: return "MCK_XMM0";
7530 case MCK_Reg75: return "MCK_Reg75";
7531 case MCK_Reg74: return "MCK_Reg74";
7532 case MCK_Reg72: return "MCK_Reg72";
7533 case MCK_Reg70: return "MCK_Reg70";
7534 case MCK_Reg68: return "MCK_Reg68";
7535 case MCK_Reg66: return "MCK_Reg66";
7536 case MCK_Reg64: return "MCK_Reg64";
7537 case MCK_GR32_AD: return "MCK_GR32_AD";
7538 case MCK_GR32_BPSP: return "MCK_GR32_BPSP";
7539 case MCK_GR32_BSI: return "MCK_GR32_BSI";
7540 case MCK_GR32_CB: return "MCK_GR32_CB";
7541 case MCK_GR32_DC: return "MCK_GR32_DC";
7542 case MCK_GR32_DIBP: return "MCK_GR32_DIBP";
7543 case MCK_GR32_SIDI: return "MCK_GR32_SIDI";
7544 case MCK_GR64_AD: return "MCK_GR64_AD";
7545 case MCK_Reg108: return "MCK_Reg108";
7546 case MCK_Reg41: return "MCK_Reg41";
7547 case MCK_Reg15: return "MCK_Reg15";
7548 case MCK_Reg55: return "MCK_Reg55";
7549 case MCK_BNDR: return "MCK_BNDR";
7550 case MCK_GR16_ABCD: return "MCK_GR16_ABCD";
7551 case MCK_GR32_ABCD: return "MCK_GR32_ABCD";
7552 case MCK_GR32_TC: return "MCK_GR32_TC";
7553 case MCK_GR64_ABCD: return "MCK_GR64_ABCD";
7554 case MCK_GR8_ABCD_H: return "MCK_GR8_ABCD_H";
7555 case MCK_GR8_ABCD_L: return "MCK_GR8_ABCD_L";
7556 case MCK_VK16PAIR: return "MCK_VK16PAIR";
7557 case MCK_Reg60: return "MCK_Reg60";
7558 case MCK_Reg49: return "MCK_Reg49";
7559 case MCK_Reg62: return "MCK_Reg62";
7560 case MCK_Reg50: return "MCK_Reg50";
7561 case MCK_SEGMENT_REG: return "MCK_SEGMENT_REG";
7562 case MCK_Reg61: return "MCK_Reg61";
7563 case MCK_Reg58: return "MCK_Reg58";
7564 case MCK_Reg53: return "MCK_Reg53";
7565 case MCK_GR32_NOREX_NOSP: return "MCK_GR32_NOREX_NOSP";
7566 case MCK_GR64_NOREX_NOSP: return "MCK_GR64_NOREX_NOSP";
7567 case MCK_RFP32: return "MCK_RFP32";
7568 case MCK_VK16WM: return "MCK_VK16WM";
7569 case MCK_Reg59: return "MCK_Reg59";
7570 case MCK_Reg56: return "MCK_Reg56";
7571 case MCK_Reg54: return "MCK_Reg54";
7572 case MCK_Reg44: return "MCK_Reg44";
7573 case MCK_GR16_NOREX: return "MCK_GR16_NOREX";
7574 case MCK_GR32_NOREX: return "MCK_GR32_NOREX";
7575 case MCK_GR8_NOREX: return "MCK_GR8_NOREX";
7576 case MCK_RST: return "MCK_RST";
7577 case MCK_TILE: return "MCK_TILE";
7578 case MCK_VK1: return "MCK_VK1";
7579 case MCK_VR64: return "MCK_VR64";
7580 case MCK_Reg51: return "MCK_Reg51";
7581 case MCK_Reg23: return "MCK_Reg23";
7582 case MCK_GR64_NOREX: return "MCK_GR64_NOREX";
7583 case MCK_GR64_TCW64: return "MCK_GR64_TCW64";
7584 case MCK_GR64_TC: return "MCK_GR64_TC";
7585 case MCK_GRH8: return "MCK_GRH8";
7586 case MCK_GR32_NOSP: return "MCK_GR32_NOSP";
7587 case MCK_GR64_NOSP: return "MCK_GR64_NOSP";
7588 case MCK_Reg45: return "MCK_Reg45";
7589 case MCK_CONTROL_REG: return "MCK_CONTROL_REG";
7590 case MCK_DEBUG_REG: return "MCK_DEBUG_REG";
7591 case MCK_FR32: return "MCK_FR32";
7592 case MCK_GR16: return "MCK_GR16";
7593 case MCK_GR32: return "MCK_GR32";
7594 case MCK_VR256: return "MCK_VR256";
7595 case MCK_VR512_0_15: return "MCK_VR512_0_15";
7596 case MCK_Reg20: return "MCK_Reg20";
7597 case MCK_GR64: return "MCK_GR64";
7598 case MCK_GRH16: return "MCK_GRH16";
7599 case MCK_LOW32_ADDR_ACCESS: return "MCK_LOW32_ADDR_ACCESS";
7600 case MCK_LOW32_ADDR_ACCESS_RBP: return "MCK_LOW32_ADDR_ACCESS_RBP";
7601 case MCK_GR8: return "MCK_GR8";
7602 case MCK_FR32X: return "MCK_FR32X";
7603 case MCK_VR256X: return "MCK_VR256X";
7604 case MCK_VR512: return "MCK_VR512";
7605 case MCK_AVX512RC: return "MCK_AVX512RC";
7606 case MCK_ImmSExti64i8: return "MCK_ImmSExti64i8";
7607 case MCK_ImmSExti16i8: return "MCK_ImmSExti16i8";
7608 case MCK_ImmSExti32i8: return "MCK_ImmSExti32i8";
7609 case MCK_ImmSExti64i32: return "MCK_ImmSExti64i32";
7610 case MCK_Imm: return "MCK_Imm";
7611 case MCK_ImmUnsignedi4: return "MCK_ImmUnsignedi4";
7612 case MCK_ImmUnsignedi8: return "MCK_ImmUnsignedi8";
7613 case MCK_VK16Pair: return "MCK_VK16Pair";
7614 case MCK_VK1Pair: return "MCK_VK1Pair";
7615 case MCK_VK2Pair: return "MCK_VK2Pair";
7616 case MCK_VK4Pair: return "MCK_VK4Pair";
7617 case MCK_VK8Pair: return "MCK_VK8Pair";
7618 case MCK_GR16orGR32orGR64: return "MCK_GR16orGR32orGR64";
7619 case MCK_GR32orGR64: return "MCK_GR32orGR64";
7620 case MCK_AbsMem16: return "MCK_AbsMem16";
7621 case MCK_DstIdx16: return "MCK_DstIdx16";
7622 case MCK_DstIdx32: return "MCK_DstIdx32";
7623 case MCK_DstIdx64: return "MCK_DstIdx64";
7624 case MCK_DstIdx8: return "MCK_DstIdx8";
7625 case MCK_MemOffs16_16: return "MCK_MemOffs16_16";
7626 case MCK_MemOffs16_32: return "MCK_MemOffs16_32";
7627 case MCK_MemOffs16_8: return "MCK_MemOffs16_8";
7628 case MCK_MemOffs32_16: return "MCK_MemOffs32_16";
7629 case MCK_MemOffs32_32: return "MCK_MemOffs32_32";
7630 case MCK_MemOffs32_64: return "MCK_MemOffs32_64";
7631 case MCK_MemOffs32_8: return "MCK_MemOffs32_8";
7632 case MCK_MemOffs64_16: return "MCK_MemOffs64_16";
7633 case MCK_MemOffs64_32: return "MCK_MemOffs64_32";
7634 case MCK_MemOffs64_64: return "MCK_MemOffs64_64";
7635 case MCK_MemOffs64_8: return "MCK_MemOffs64_8";
7636 case MCK_SrcIdx16: return "MCK_SrcIdx16";
7637 case MCK_SrcIdx32: return "MCK_SrcIdx32";
7638 case MCK_SrcIdx64: return "MCK_SrcIdx64";
7639 case MCK_SrcIdx8: return "MCK_SrcIdx8";
7640 case MCK_AbsMem: return "MCK_AbsMem";
7641 case MCK_Mem128: return "MCK_Mem128";
7642 case MCK_Mem128_RC128: return "MCK_Mem128_RC128";
7643 case MCK_Mem128_RC128X: return "MCK_Mem128_RC128X";
7644 case MCK_Mem128_RC256: return "MCK_Mem128_RC256";
7645 case MCK_Mem128_RC256X: return "MCK_Mem128_RC256X";
7646 case MCK_Mem16: return "MCK_Mem16";
7647 case MCK_Mem256: return "MCK_Mem256";
7648 case MCK_Mem256_RC128: return "MCK_Mem256_RC128";
7649 case MCK_Mem256_RC128X: return "MCK_Mem256_RC128X";
7650 case MCK_Mem256_RC256: return "MCK_Mem256_RC256";
7651 case MCK_Mem256_RC256X: return "MCK_Mem256_RC256X";
7652 case MCK_Mem256_RC512: return "MCK_Mem256_RC512";
7653 case MCK_Mem32: return "MCK_Mem32";
7654 case MCK_Mem512: return "MCK_Mem512";
7655 case MCK_Mem512_RC256X: return "MCK_Mem512_RC256X";
7656 case MCK_Mem512_RC512: return "MCK_Mem512_RC512";
7657 case MCK_Mem64: return "MCK_Mem64";
7658 case MCK_Mem64_RC128: return "MCK_Mem64_RC128";
7659 case MCK_Mem64_RC128X: return "MCK_Mem64_RC128X";
7660 case MCK_Mem80: return "MCK_Mem80";
7661 case MCK_Mem8: return "MCK_Mem8";
7662 case MCK_SibMem: return "MCK_SibMem";
7663 case MCK_Mem: return "MCK_Mem";
7664 case NumMatchClassKinds: return "NumMatchClassKinds";
7665 }
7666 llvm_unreachable("unhandled MatchClassKind!");
7667}
7668
7669#endif // NDEBUG
7670FeatureBitset X86AsmParser::
7671ComputeAvailableFeatures(const FeatureBitset &FB) const {
7672 FeatureBitset Features;
7673 if (!FB[X86::Mode64Bit])
7674 Features.set(Feature_Not64BitModeBit);
7675 if (FB[X86::Mode64Bit])
7676 Features.set(Feature_In64BitModeBit);
7677 if (FB[X86::Mode16Bit])
7678 Features.set(Feature_In16BitModeBit);
7679 if (!FB[X86::Mode16Bit])
7680 Features.set(Feature_Not16BitModeBit);
7681 if (FB[X86::Mode32Bit])
7682 Features.set(Feature_In32BitModeBit);
7683 return Features;
7684}
7685
7686static bool checkAsmTiedOperandConstraints(const X86AsmParser&AsmParser,
7687 unsigned Kind,
7688 const OperandVector &Operands,
7689 uint64_t &ErrorInfo) {
7690 assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
7691 const uint8_t *Converter = ConversionTable[Kind];
7692 for (const uint8_t *p = Converter; *p; p += 2) {
7693 switch (*p) {
7694 case CVT_Tied: {
7695 unsigned OpIdx = *(p + 1);
7696 assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
7697 std::begin(TiedAsmOperandTable)) &&
7698 "Tied operand not found");
7699 unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1];
7700 unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2];
7701 if (OpndNum1 != OpndNum2) {
7702 auto &SrcOp1 = Operands[OpndNum1];
7703 auto &SrcOp2 = Operands[OpndNum2];
7704 if (SrcOp1->isReg() && SrcOp2->isReg()) {
7705 if (!AsmParser.regsEqual(*SrcOp1, *SrcOp2)) {
7706 ErrorInfo = OpndNum2;
7707 return false;
7708 }
7709 }
7710 }
7711 break;
7712 }
7713 default:
7714 break;
7715 }
7716 }
7717 return true;
7718}
7719
7720static const char *const MnemonicTable =
7721 "\003aaa\003aad\003aam\003aas\003adc\004adcb\004adcl\004adcq\004adcw\004"
7722 "adcx\005adcxl\005adcxq\003add\004addb\004addl\005addpd\005addps\004addq"
7723 "\006addr16\006addr32\005addsd\005addss\010addsubpd\010addsubps\004addw\004"
7724 "adox\005adoxl\005adoxq\006aesdec\013aesdec128kl\013aesdec256kl\naesdecl"
7725 "ast\017aesdecwide128kl\017aesdecwide256kl\006aesenc\013aesenc128kl\013a"
7726 "esenc256kl\naesenclast\017aesencwide128kl\017aesencwide256kl\006aesimc\017"
7727 "aeskeygenassist\003and\004andb\004andl\004andn\005andnl\006andnpd\006an"
7728 "dnps\005andnq\005andpd\005andps\004andq\004andw\004arpl\005bextr\006bex"
7729 "trl\006bextrq\007blcfill\010blcfilll\010blcfillq\004blci\005blcic\006bl"
7730 "cicl\006blcicq\005blcil\005blciq\006blcmsk\007blcmskl\007blcmskq\004blc"
7731 "s\005blcsl\005blcsq\007blendpd\007blendps\010blendvpd\010blendvps\007bl"
7732 "sfill\010blsfilll\010blsfillq\004blsi\005blsic\006blsicl\006blsicq\005b"
7733 "lsil\005blsiq\006blsmsk\007blsmskl\007blsmskq\004blsr\005blsrl\005blsrq"
7734 "\005bndcl\005bndcn\005bndcu\006bndldx\005bndmk\006bndmov\006bndstx\005b"
7735 "ound\003bsf\004bsfl\004bsfq\004bsfw\003bsr\004bsrl\004bsrq\004bsrw\005b"
7736 "swap\006bswapl\006bswapq\002bt\003btc\004btcl\004btcq\004btcw\003btl\003"
7737 "btq\003btr\004btrl\004btrq\004btrw\003bts\004btsl\004btsq\004btsw\003bt"
7738 "w\004bzhi\005bzhil\005bzhiq\004call\005calll\005callq\005callw\004cbtw\003"
7739 "cbw\003cdq\004cdqe\004clac\003clc\003cld\010cldemote\007clflush\nclflus"
7740 "hopt\004clgi\003cli\003clr\004clrb\004clrl\004clrq\010clrssbsy\004clrw\004"
7741 "cltd\004cltq\004clts\004clui\004clwb\006clzero\003cmc\005cmova\006cmova"
7742 "e\007cmovael\007cmovaeq\007cmovaew\006cmoval\006cmovaq\006cmovaw\005cmo"
7743 "vb\006cmovbe\007cmovbel\007cmovbeq\007cmovbew\006cmovbl\006cmovbq\006cm"
7744 "ovbw\005cmove\006cmovel\006cmoveq\006cmovew\005cmovg\006cmovge\007cmovg"
7745 "el\007cmovgeq\007cmovgew\006cmovgl\006cmovgq\006cmovgw\005cmovl\006cmov"
7746 "le\007cmovlel\007cmovleq\007cmovlew\006cmovll\006cmovlq\006cmovlw\006cm"
7747 "ovne\007cmovnel\007cmovneq\007cmovnew\006cmovno\007cmovnol\007cmovnoq\007"
7748 "cmovnow\006cmovnp\007cmovnpl\007cmovnpq\007cmovnpw\006cmovns\007cmovnsl"
7749 "\007cmovnsq\007cmovnsw\005cmovo\006cmovol\006cmovoq\006cmovow\005cmovp\006"
7750 "cmovpl\006cmovpq\006cmovpw\005cmovs\006cmovsl\006cmovsq\006cmovsw\003cm"
7751 "p\004cmpb\004cmpl\005cmppd\005cmpps\004cmpq\004cmps\005cmpsb\005cmpsd\005"
7752 "cmpsl\005cmpsq\005cmpss\005cmpsw\004cmpw\007cmpxchg\ncmpxchg16b\tcmpxch"
7753 "g8b\010cmpxchgb\010cmpxchgl\010cmpxchgq\010cmpxchgw\006comisd\006comiss"
7754 "\005cpuid\003cqo\004cqto\005crc32\006crc32b\006crc32l\006crc32q\006crc3"
7755 "2w\002cs\010cvtdq2pd\010cvtdq2ps\010cvtpd2dq\010cvtpd2pi\010cvtpd2ps\010"
7756 "cvtpi2pd\010cvtpi2ps\010cvtps2dq\010cvtps2pd\010cvtps2pi\010cvtsd2si\tc"
7757 "vtsd2sil\tcvtsd2siq\010cvtsd2ss\010cvtsi2sd\tcvtsi2sdl\tcvtsi2sdq\010cv"
7758 "tsi2ss\tcvtsi2ssl\tcvtsi2ssq\010cvtss2sd\010cvtss2si\tcvtss2sil\tcvtss2"
7759 "siq\tcvttpd2dq\tcvttpd2pi\tcvttps2dq\tcvttps2pi\tcvttsd2si\ncvttsd2sil\n"
7760 "cvttsd2siq\tcvttss2si\ncvttss2sil\ncvttss2siq\003cwd\004cwde\004cwtd\004"
7761 "cwtl\003daa\003das\006data16\003dec\004decb\004decl\004decq\004decw\003"
7762 "div\004divb\004divl\005divpd\005divps\004divq\005divsd\005divss\004divw"
7763 "\004dppd\004dpps\002ds\004emms\005encls\005enclu\005enclv\014encodekey1"
7764 "28\014encodekey256\007endbr32\007endbr64\006enqcmd\007enqcmds\005enter\002"
7765 "es\textractps\005extrq\005f2xm1\004fabs\004fadd\005faddl\005faddp\005fa"
7766 "dds\004fbld\005fbstp\004fchs\006fcmovb\007fcmovbe\006fcmove\007fcmovnb\010"
7767 "fcmovnbe\007fcmovne\007fcmovnu\006fcmovu\004fcom\005fcomi\005fcoml\005f"
7768 "comp\006fcompi\006fcompl\006fcompp\006fcomps\005fcoms\004fcos\007fdecst"
7769 "p\004fdiv\005fdivl\005fdivp\005fdivr\006fdivrl\006fdivrp\006fdivrs\005f"
7770 "divs\005femms\005ffree\006ffreep\005fiadd\006fiaddl\006fiadds\005ficom\006"
7771 "ficoml\006ficomp\007ficompl\007ficomps\006ficoms\005fidiv\006fidivl\006"
7772 "fidivr\007fidivrl\007fidivrs\006fidivs\004fild\005fildl\006fildll\005fi"
7773 "lds\005fimul\006fimull\006fimuls\007fincstp\004fist\005fistl\005fistp\006"
7774 "fistpl\007fistpll\006fistps\005fists\006fisttp\007fisttpl\010fisttpll\007"
7775 "fisttps\005fisub\006fisubl\006fisubr\007fisubrl\007fisubrs\006fisubs\003"
7776 "fld\004fld1\005fldcw\006fldenv\004fldl\006fldl2e\006fldl2t\006fldlg2\006"
7777 "fldln2\005fldpi\004flds\004fldt\004fldz\004fmul\005fmull\005fmulp\005fm"
7778 "uls\006fnclex\006fninit\004fnop\006fnsave\006fnstcw\007fnstenv\006fnsts"
7779 "w\006fpatan\005fprem\006fprem1\005fptan\007frndint\006frstor\002fs\006f"
7780 "scale\004fsin\007fsincos\005fsqrt\003fst\004fstl\004fstp\005fstpl\005fs"
7781 "tps\005fstpt\004fsts\004fsub\005fsubl\005fsubp\005fsubr\006fsubrl\006fs"
7782 "ubrp\006fsubrs\005fsubs\004ftst\005fucom\006fucomi\006fucomp\007fucompi"
7783 "\007fucompp\004fxam\004fxch\007fxrstor\tfxrstor64\006fxsave\010fxsave64"
7784 "\007fxtract\005fyl2x\007fyl2xp1\006getsec\020gf2p8affineinvqb\015gf2p8a"
7785 "ffineqb\tgf2p8mulb\002gs\006haddpd\006haddps\003hlt\006hreset\006hsubpd"
7786 "\006hsubps\004idiv\005idivb\005idivl\005idivq\005idivw\004imul\005imulb"
7787 "\005imull\005imulq\005imulw\002in\003inb\003inc\004incb\004incl\004incq"
7788 "\007incsspd\007incsspq\004incw\003inl\003ins\004insb\004insd\010insertp"
7789 "s\007insertq\004insl\004insw\003int\004int3\004into\004invd\006invept\006"
7790 "invlpg\007invlpga\007invlpgb\010invlpgb}\007invpcid\007invvpid\003inw\004"
7791 "iret\005iretd\005iretl\005iretq\005iretw\002ja\003jae\002jb\003jbe\004j"
7792 "cxz\002je\005jecxz\002jg\003jge\002jl\003jle\003jmp\004jmpl\004jmpq\004"
7793 "jmpw\003jne\003jno\003jnp\003jns\002jo\002jp\005jrcxz\002js\005kaddb\005"
7794 "kaddd\005kaddq\005kaddw\005kandb\005kandd\006kandnb\006kandnd\006kandnq"
7795 "\006kandnw\005kandq\005kandw\005kmovb\005kmovd\005kmovq\005kmovw\005kno"
7796 "tb\005knotd\005knotq\005knotw\004korb\004kord\004korq\010kortestb\010ko"
7797 "rtestd\010kortestq\010kortestw\004korw\010kshiftlb\010kshiftld\010kshif"
7798 "tlq\010kshiftlw\010kshiftrb\010kshiftrd\010kshiftrq\010kshiftrw\006ktes"
7799 "tb\006ktestd\006ktestq\006ktestw\010kunpckbw\010kunpckdq\010kunpckwd\006"
7800 "kxnorb\006kxnord\006kxnorq\006kxnorw\005kxorb\005kxord\005kxorq\005kxor"
7801 "w\004lahf\003lar\004larl\004larq\004larw\005lcall\006lcalll\006lcallq\006"
7802 "lcallw\005lddqu\007ldmxcsr\003lds\004ldsl\004ldsw\tldtilecfg\003lea\004"
7803 "leal\004leaq\005leave\004leaw\003les\004lesl\004lesw\006lfence\003lfs\004"
7804 "lfsl\004lfsq\004lfsw\004lgdt\005lgdtd\005lgdtl\005lgdtq\005lgdtw\003lgs"
7805 "\004lgsl\004lgsq\004lgsw\004lidt\005lidtd\005lidtl\005lidtq\005lidtw\004"
7806 "ljmp\005ljmpl\005ljmpq\005ljmpw\004lldt\005lldtw\006llwpcb\004lmsw\005l"
7807 "msww\tloadiwkey\004lock\004lods\005lodsb\005lodsd\005lodsl\005lodsq\005"
7808 "lodsw\004loop\005loope\006loopne\005lretl\005lretq\005lretw\003lsl\004l"
7809 "sll\004lslq\004lslw\003lss\004lssl\004lssq\004lssw\003ltr\004ltrw\006lw"
7810 "pins\006lwpval\005lzcnt\006lzcntl\006lzcntq\006lzcntw\nmaskmovdqu\010ma"
7811 "skmovq\005maxpd\005maxps\005maxsd\005maxss\006mfence\005minpd\005minps\005"
7812 "minsd\005minss\007monitor\010monitorx\007montmul\003mov\005mov.s\006mov"
7813 "abs\007movabsb\007movabsl\007movabsq\007movabsw\006movapd\010movapd.s\006"
7814 "movaps\010movaps.s\004movb\006movb.s\005movbe\006movbel\006movbeq\006mo"
7815 "vbew\004movd\007movddup\tmovdir64b\007movdiri\007movdq2q\006movdqa\010m"
7816 "ovdqa.s\006movdqu\010movdqu.s\007movhlps\006movhpd\006movhps\004movl\006"
7817 "movl.s\007movlhps\006movlpd\006movlps\010movmskpd\010movmskps\007movntd"
7818 "q\010movntdqa\006movnti\007movntil\007movntiq\007movntpd\007movntps\006"
7819 "movntq\007movntsd\007movntss\004movq\006movq.s\007movq2dq\004movs\005mo"
7820 "vsb\006movsbl\006movsbq\006movsbw\005movsd\007movsd.s\010movshdup\005mo"
7821 "vsl\010movsldup\006movslq\005movsq\005movss\007movss.s\005movsw\006movs"
7822 "wl\006movswq\005movsx\006movsxd\006movupd\010movupd.s\006movups\010movu"
7823 "ps.s\004movw\006movw.s\006movzbl\006movzbq\006movzbw\006movzwl\006movzw"
7824 "q\005movzx\007mpsadbw\003mul\004mulb\004mull\005mulpd\005mulps\004mulq\005"
7825 "mulsd\005mulss\004mulw\004mulx\005mulxl\005mulxq\005mwait\006mwaitx\003"
7826 "neg\004negb\004negl\004negq\004negw\003nop\004nopl\004nopq\004nopw\003n"
7827 "ot\004notb\004notl\004notq\004notw\002or\003orb\003orl\004orpd\004orps\003"
7828 "orq\003orw\003out\004outb\004outl\004outs\005outsb\005outsd\005outsl\005"
7829 "outsw\004outw\005pabsb\005pabsd\005pabsw\010packssdw\010packsswb\010pac"
7830 "kusdw\010packuswb\005paddb\005paddd\005paddq\006paddsb\006paddsw\007pad"
7831 "dusb\007paddusw\005paddw\007palignr\004pand\005pandn\005pause\005pavgb\007"
7832 "pavgusb\005pavgw\010pblendvb\007pblendw\014pclmulhqhqdq\014pclmulhqlqdq"
7833 "\014pclmullqhqdq\014pclmullqlqdq\tpclmulqdq\007pcmpeqb\007pcmpeqd\007pc"
7834 "mpeqq\007pcmpeqw\tpcmpestri\tpcmpestrm\007pcmpgtb\007pcmpgtd\007pcmpgtq"
7835 "\007pcmpgtw\tpcmpistri\tpcmpistrm\007pconfig\004pdep\005pdepl\005pdepq\004"
7836 "pext\005pextl\005pextq\006pextrb\006pextrd\006pextrq\006pextrw\005pf2id"
7837 "\005pf2iw\005pfacc\005pfadd\007pfcmpeq\007pfcmpge\007pfcmpgt\005pfmax\005"
7838 "pfmin\005pfmul\006pfnacc\007pfpnacc\005pfrcp\010pfrcpit1\010pfrcpit2\010"
7839 "pfrsqit1\007pfrsqrt\005pfsub\006pfsubr\006phaddd\007phaddsw\006phaddw\n"
7840 "phminposuw\006phsubd\007phsubsw\006phsubw\005pi2fd\005pi2fw\006pinsrb\006"
7841 "pinsrd\006pinsrq\006pinsrw\tpmaddubsw\007pmaddwd\006pmaxsb\006pmaxsd\006"
7842 "pmaxsw\006pmaxub\006pmaxud\006pmaxuw\006pminsb\006pminsd\006pminsw\006p"
7843 "minub\006pminud\006pminuw\010pmovmskb\010pmovsxbd\010pmovsxbq\010pmovsx"
7844 "bw\010pmovsxdq\010pmovsxwd\010pmovsxwq\010pmovzxbd\010pmovzxbq\010pmovz"
7845 "xbw\010pmovzxdq\010pmovzxwd\010pmovzxwq\006pmuldq\010pmulhrsw\007pmulhr"
7846 "w\007pmulhuw\006pmulhw\006pmulld\006pmullw\007pmuludq\003pop\005popal\005"
7847 "popaw\006popcnt\007popcntl\007popcntq\007popcntw\004popf\005popfd\005po"
7848 "pfl\005popfq\005popfw\004popl\004popq\004popw\003por\010prefetch\013pre"
7849 "fetchnta\nprefetcht0\nprefetcht1\nprefetcht2\tprefetchw\013prefetchwt1\006"
7850 "psadbw\006pshufb\006pshufd\007pshufhw\007pshuflw\006pshufw\006psignb\006"
7851 "psignd\006psignw\005pslld\006pslldq\005psllq\005psllw\006psmash\005psra"
7852 "d\005psraw\005psrld\006psrldq\005psrlq\005psrlw\005psubb\005psubd\005ps"
7853 "ubq\006psubsb\006psubsw\007psubusb\007psubusw\005psubw\006pswapd\005pte"
7854 "st\007ptwrite\010ptwritel\010ptwriteq\tpunpckhbw\tpunpckhdq\npunpckhqdq"
7855 "\tpunpckhwd\tpunpcklbw\tpunpckldq\npunpcklqdq\tpunpcklwd\004push\006pus"
7856 "hal\006pushaw\005pushf\006pushfd\006pushfl\006pushfq\006pushfw\005pushl"
7857 "\005pushq\005pushw\tpvalidate\004pxor\003rcl\004rclb\004rcll\004rclq\004"
7858 "rclw\005rcpps\005rcpss\003rcr\004rcrb\004rcrl\004rcrq\004rcrw\010rdfsba"
7859 "se\trdfsbasel\trdfsbaseq\010rdgsbase\trdgsbasel\trdgsbaseq\005rdmsr\005"
7860 "rdpid\006rdpkru\005rdpmc\006rdrand\007rdrandl\007rdrandq\007rdrandw\006"
7861 "rdseed\007rdseedl\007rdseedq\007rdseedw\006rdsspd\006rdsspq\005rdtsc\006"
7862 "rdtscp\003rep\005repne\003ret\004retf\005retfq\004retl\004retq\004retw\005"
7863 "rex64\trmpadjust\trmpupdate\003rol\004rolb\004roll\004rolq\004rolw\003r"
7864 "or\004rorb\004rorl\004rorq\004rorw\004rorx\005rorxl\005rorxq\007roundpd"
7865 "\007roundps\007roundsd\007roundss\003rsm\007rsqrtps\007rsqrtss\010rstor"
7866 "ssp\004sahf\004salc\003sar\004sarb\004sarl\004sarq\004sarw\004sarx\005s"
7867 "arxl\005sarxq\013saveprevssp\003sbb\004sbbb\004sbbl\004sbbq\004sbbw\004"
7868 "scas\005scasb\005scasd\005scasl\005scasq\005scasw\010seamcall\007seamop"
7869 "s\007seamret\010senduipi\tserialize\004seta\005setae\004setb\005setbe\004"
7870 "sete\004setg\005setge\004setl\005setle\005setne\005setno\005setnp\005se"
7871 "tns\004seto\004setp\004sets\010setssbsy\006sfence\004sgdt\005sgdtd\005s"
7872 "gdtl\005sgdtq\005sgdtw\010sha1msg1\010sha1msg2\tsha1nexte\tsha1rnds4\ns"
7873 "ha256msg1\nsha256msg2\013sha256rnds2\003shl\004shlb\004shld\005shldl\005"
7874 "shldq\005shldw\004shll\004shlq\004shlw\004shlx\005shlxl\005shlxq\003shr"
7875 "\004shrb\004shrd\005shrdl\005shrdq\005shrdw\004shrl\004shrq\004shrw\004"
7876 "shrx\005shrxl\005shrxq\006shufpd\006shufps\004sidt\005sidtd\005sidtl\005"
7877 "sidtq\005sidtw\006skinit\004sldt\005sldtl\005sldtq\005sldtw\006slwpcb\004"
7878 "smsw\005smswl\005smswq\005smsww\006sqrtpd\006sqrtps\006sqrtsd\006sqrtss"
7879 "\002ss\004stac\003stc\003std\004stgi\003sti\007stmxcsr\004stos\005stosb"
7880 "\005stosd\005stosl\005stosq\005stosw\003str\004strl\004strq\004strw\tst"
7881 "tilecfg\004stui\003sub\004subb\004subl\005subpd\005subps\004subq\005sub"
7882 "sd\005subss\004subw\006swapgs\007syscall\010sysenter\007sysexit\010syse"
7883 "xitl\010sysexitq\006sysret\007sysretl\007sysretq\006t1mskc\007t1mskcl\007"
7884 "t1mskcq\006tdcall\ttdpbf16ps\007tdpbssd\007tdpbsud\007tdpbusd\007tdpbuu"
7885 "d\004test\005testb\005testl\005testq\006testui\005testw\ttileloadd\013t"
7886 "ileloaddt1\013tilerelease\ntilestored\010tilezero\007tlbsync\006tpause\005"
7887 "tzcnt\006tzcntl\006tzcntq\006tzcntw\005tzmsk\006tzmskl\006tzmskq\007uco"
7888 "misd\007ucomiss\003ud1\004ud1l\004ud1q\004ud1w\003ud2\005uiret\010umoni"
7889 "tor\006umwait\010unpckhpd\010unpckhps\010unpcklpd\010unpcklps\tv4fmaddp"
7890 "s\tv4fmaddss\nv4fnmaddps\nv4fnmaddss\006vaddpd\006vaddps\006vaddsd\006v"
7891 "addss\tvaddsubpd\tvaddsubps\007vaesdec\013vaesdeclast\007vaesenc\013vae"
7892 "senclast\007vaesimc\020vaeskeygenassist\007valignd\007valignq\007vandnp"
7893 "d\007vandnps\006vandpd\006vandps\tvblendmpd\tvblendmps\010vblendpd\010v"
7894 "blendps\tvblendvpd\tvblendvps\016vbroadcastf128\017vbroadcastf32x2\017v"
7895 "broadcastf32x4\017vbroadcastf32x8\017vbroadcastf64x2\017vbroadcastf64x4"
7896 "\016vbroadcasti128\017vbroadcasti32x2\017vbroadcasti32x4\017vbroadcasti"
7897 "32x8\017vbroadcasti64x2\017vbroadcasti64x4\014vbroadcastsd\014vbroadcas"
7898 "tss\006vcmppd\006vcmpps\006vcmpsd\006vcmpss\007vcomisd\007vcomiss\013vc"
7899 "ompresspd\013vcompressps\tvcvtdq2pd\tvcvtdq2ps\016vcvtne2ps2bf16\015vcv"
7900 "tneps2bf16\016vcvtneps2bf16x\016vcvtneps2bf16y\tvcvtpd2dq\nvcvtpd2dqx\n"
7901 "vcvtpd2dqy\tvcvtpd2ps\nvcvtpd2psx\nvcvtpd2psy\tvcvtpd2qq\nvcvtpd2udq\013"
7902 "vcvtpd2udqx\013vcvtpd2udqy\nvcvtpd2uqq\tvcvtph2ps\tvcvtps2dq\tvcvtps2pd"
7903 "\tvcvtps2ph\tvcvtps2qq\nvcvtps2udq\nvcvtps2uqq\tvcvtqq2pd\tvcvtqq2ps\nv"
7904 "cvtqq2psx\nvcvtqq2psy\tvcvtsd2si\nvcvtsd2sil\nvcvtsd2siq\tvcvtsd2ss\nvc"
7905 "vtsd2usi\013vcvtsd2usil\013vcvtsd2usiq\tvcvtsi2sd\nvcvtsi2sdl\nvcvtsi2s"
7906 "dq\tvcvtsi2ss\nvcvtsi2ssl\nvcvtsi2ssq\tvcvtss2sd\tvcvtss2si\nvcvtss2sil"
7907 "\nvcvtss2siq\nvcvtss2usi\013vcvtss2usil\013vcvtss2usiq\nvcvttpd2dq\013v"
7908 "cvttpd2dqx\013vcvttpd2dqy\nvcvttpd2qq\013vcvttpd2udq\014vcvttpd2udqx\014"
7909 "vcvttpd2udqy\013vcvttpd2uqq\nvcvttps2dq\nvcvttps2qq\013vcvttps2udq\013v"
7910 "cvttps2uqq\nvcvttsd2si\013vcvttsd2sil\013vcvttsd2siq\013vcvttsd2usi\014"
7911 "vcvttsd2usil\014vcvttsd2usiq\nvcvttss2si\013vcvttss2sil\013vcvttss2siq\013"
7912 "vcvttss2usi\014vcvttss2usil\014vcvttss2usiq\nvcvtudq2pd\nvcvtudq2ps\nvc"
7913 "vtuqq2pd\nvcvtuqq2ps\013vcvtuqq2psx\013vcvtuqq2psy\nvcvtusi2sd\013vcvtu"
7914 "si2sdl\013vcvtusi2sdq\nvcvtusi2ss\013vcvtusi2ssl\013vcvtusi2ssq\tvdbpsa"
7915 "dbw\006vdivpd\006vdivps\006vdivsd\006vdivss\tvdpbf16ps\005vdppd\005vdpp"
7916 "s\004verr\004verw\007vexp2pd\007vexp2ps\tvexpandpd\tvexpandps\014vextra"
7917 "ctf128\015vextractf32x4\015vextractf32x8\015vextractf64x2\015vextractf6"
7918 "4x4\014vextracti128\015vextracti32x4\015vextracti32x8\015vextracti64x2\015"
7919 "vextracti64x4\nvextractps\013vfixupimmpd\013vfixupimmps\013vfixupimmsd\013"
7920 "vfixupimmss\013vfmadd132pd\013vfmadd132ps\013vfmadd132sd\013vfmadd132ss"
7921 "\013vfmadd213pd\013vfmadd213ps\013vfmadd213sd\013vfmadd213ss\013vfmadd2"
7922 "31pd\013vfmadd231ps\013vfmadd231sd\013vfmadd231ss\010vfmaddpd\010vfmadd"
7923 "ps\010vfmaddsd\010vfmaddss\016vfmaddsub132pd\016vfmaddsub132ps\016vfmad"
7924 "dsub213pd\016vfmaddsub213ps\016vfmaddsub231pd\016vfmaddsub231ps\013vfma"
7925 "ddsubpd\013vfmaddsubps\013vfmsub132pd\013vfmsub132ps\013vfmsub132sd\013"
7926 "vfmsub132ss\013vfmsub213pd\013vfmsub213ps\013vfmsub213sd\013vfmsub213ss"
7927 "\013vfmsub231pd\013vfmsub231ps\013vfmsub231sd\013vfmsub231ss\016vfmsuba"
7928 "dd132pd\016vfmsubadd132ps\016vfmsubadd213pd\016vfmsubadd213ps\016vfmsub"
7929 "add231pd\016vfmsubadd231ps\013vfmsubaddpd\013vfmsubaddps\010vfmsubpd\010"
7930 "vfmsubps\010vfmsubsd\010vfmsubss\014vfnmadd132pd\014vfnmadd132ps\014vfn"
7931 "madd132sd\014vfnmadd132ss\014vfnmadd213pd\014vfnmadd213ps\014vfnmadd213"
7932 "sd\014vfnmadd213ss\014vfnmadd231pd\014vfnmadd231ps\014vfnmadd231sd\014v"
7933 "fnmadd231ss\tvfnmaddpd\tvfnmaddps\tvfnmaddsd\tvfnmaddss\014vfnmsub132pd"
7934 "\014vfnmsub132ps\014vfnmsub132sd\014vfnmsub132ss\014vfnmsub213pd\014vfn"
7935 "msub213ps\014vfnmsub213sd\014vfnmsub213ss\014vfnmsub231pd\014vfnmsub231"
7936 "ps\014vfnmsub231sd\014vfnmsub231ss\tvfnmsubpd\tvfnmsubps\tvfnmsubsd\tvf"
7937 "nmsubss\nvfpclasspd\013vfpclasspdx\013vfpclasspdy\013vfpclasspdz\nvfpcl"
7938 "assps\013vfpclasspsx\013vfpclasspsy\013vfpclasspsz\nvfpclasssd\nvfpclas"
7939 "sss\007vfrczpd\007vfrczps\007vfrczsd\007vfrczss\nvgatherdpd\nvgatherdps"
7940 "\015vgatherpf0dpd\015vgatherpf0dps\015vgatherpf0qpd\015vgatherpf0qps\015"
7941 "vgatherpf1dpd\015vgatherpf1dps\015vgatherpf1qpd\015vgatherpf1qps\nvgath"
7942 "erqpd\nvgatherqps\tvgetexppd\tvgetexpps\tvgetexpsd\tvgetexpss\nvgetmant"
7943 "pd\nvgetmantps\nvgetmantsd\nvgetmantss\021vgf2p8affineinvqb\016vgf2p8af"
7944 "fineqb\nvgf2p8mulb\007vhaddpd\007vhaddps\007vhsubpd\007vhsubps\013vinse"
7945 "rtf128\014vinsertf32x4\014vinsertf32x8\014vinsertf64x2\014vinsertf64x4\013"
7946 "vinserti128\014vinserti32x4\014vinserti32x8\014vinserti64x2\014vinserti"
7947 "64x4\tvinsertps\006vlddqu\010vldmxcsr\013vmaskmovdqu\nvmaskmovpd\nvmask"
7948 "movps\006vmaxpd\006vmaxps\006vmaxsd\006vmaxss\006vmcall\007vmclear\006v"
7949 "mfunc\006vminpd\006vminps\006vminsd\006vminss\010vmlaunch\006vmload\007"
7950 "vmmcall\007vmovapd\tvmovapd.s\007vmovaps\tvmovaps.s\005vmovd\010vmovddu"
7951 "p\007vmovdqa\tvmovdqa.s\tvmovdqa32\013vmovdqa32.s\tvmovdqa64\013vmovdqa"
7952 "64.s\007vmovdqu\tvmovdqu.s\tvmovdqu16\013vmovdqu16.s\tvmovdqu32\013vmov"
7953 "dqu32.s\tvmovdqu64\013vmovdqu64.s\010vmovdqu8\nvmovdqu8.s\010vmovhlps\007"
7954 "vmovhpd\007vmovhps\010vmovlhps\007vmovlpd\007vmovlps\tvmovmskpd\tvmovms"
7955 "kps\010vmovntdq\tvmovntdqa\010vmovntpd\010vmovntps\005vmovq\007vmovq.s\006"
7956 "vmovsd\010vmovsd.s\tvmovshdup\tvmovsldup\006vmovss\010vmovss.s\007vmovu"
7957 "pd\tvmovupd.s\007vmovups\tvmovups.s\010vmpsadbw\007vmptrld\007vmptrst\006"
7958 "vmread\007vmreadl\007vmreadq\010vmresume\005vmrun\006vmsave\006vmulpd\006"
7959 "vmulps\006vmulsd\006vmulss\007vmwrite\010vmwritel\010vmwriteq\006vmxoff"
7960 "\005vmxon\005vorpd\005vorps\015vp2intersectd\015vp2intersectq\tvp4dpwss"
7961 "d\nvp4dpwssds\006vpabsb\006vpabsd\006vpabsq\006vpabsw\tvpackssdw\tvpack"
7962 "sswb\tvpackusdw\tvpackuswb\006vpaddb\006vpaddd\006vpaddq\007vpaddsb\007"
7963 "vpaddsw\010vpaddusb\010vpaddusw\006vpaddw\010vpalignr\005vpand\006vpand"
7964 "d\006vpandn\007vpandnd\007vpandnq\006vpandq\006vpavgb\006vpavgw\010vpbl"
7965 "endd\tvpblendmb\tvpblendmd\tvpblendmq\tvpblendmw\tvpblendvb\010vpblendw"
7966 "\014vpbroadcastb\014vpbroadcastd\017vpbroadcastmb2q\017vpbroadcastmw2d\014"
7967 "vpbroadcastq\014vpbroadcastw\015vpclmulhqhqdq\015vpclmulhqlqdq\015vpclm"
7968 "ullqhqdq\015vpclmullqlqdq\nvpclmulqdq\006vpcmov\006vpcmpb\006vpcmpd\010"
7969 "vpcmpeqb\010vpcmpeqd\010vpcmpeqq\010vpcmpeqw\nvpcmpestri\nvpcmpestrm\010"
7970 "vpcmpgtb\010vpcmpgtd\010vpcmpgtq\010vpcmpgtw\nvpcmpistri\nvpcmpistrm\006"
7971 "vpcmpq\007vpcmpub\007vpcmpud\007vpcmpuq\007vpcmpuw\006vpcmpw\006vpcomb\006"
7972 "vpcomd\013vpcompressb\013vpcompressd\013vpcompressq\013vpcompressw\006v"
7973 "pcomq\007vpcomub\007vpcomud\007vpcomuq\007vpcomuw\006vpcomw\013vpconfli"
7974 "ctd\013vpconflictq\010vpdpbusd\tvpdpbusds\010vpdpwssd\tvpdpwssds\nvperm"
7975 "2f128\nvperm2i128\006vpermb\006vpermd\010vpermi2b\010vpermi2d\tvpermi2p"
7976 "d\tvpermi2ps\010vpermi2q\010vpermi2w\nvpermil2pd\nvpermil2ps\tvpermilpd"
7977 "\tvpermilps\007vpermpd\007vpermps\006vpermq\010vpermt2b\010vpermt2d\tvp"
7978 "ermt2pd\tvpermt2ps\010vpermt2q\010vpermt2w\006vpermw\tvpexpandb\tvpexpa"
7979 "ndd\tvpexpandq\tvpexpandw\007vpextrb\007vpextrd\007vpextrq\007vpextrw\n"
7980 "vpgatherdd\nvpgatherdq\nvpgatherqd\nvpgatherqq\010vphaddbd\010vphaddbq\010"
7981 "vphaddbw\007vphaddd\010vphadddq\010vphaddsw\tvphaddubd\tvphaddubq\tvpha"
7982 "ddubw\tvphaddudq\tvphadduwd\tvphadduwq\007vphaddw\010vphaddwd\010vphadd"
7983 "wq\013vphminposuw\010vphsubbw\007vphsubd\010vphsubdq\010vphsubsw\007vph"
7984 "subw\010vphsubwd\007vpinsrb\007vpinsrd\007vpinsrq\007vpinsrw\010vplzcnt"
7985 "d\010vplzcntq\010vpmacsdd\tvpmacsdqh\tvpmacsdql\tvpmacssdd\nvpmacssdqh\n"
7986 "vpmacssdql\tvpmacsswd\tvpmacssww\010vpmacswd\010vpmacsww\nvpmadcsswd\tv"
7987 "pmadcswd\013vpmadd52huq\013vpmadd52luq\nvpmaddubsw\010vpmaddwd\nvpmaskm"
7988 "ovd\nvpmaskmovq\007vpmaxsb\007vpmaxsd\007vpmaxsq\007vpmaxsw\007vpmaxub\007"
7989 "vpmaxud\007vpmaxuq\007vpmaxuw\007vpminsb\007vpminsd\007vpminsq\007vpmin"
7990 "sw\007vpminub\007vpminud\007vpminuq\007vpminuw\010vpmovb2m\010vpmovd2m\007"
7991 "vpmovdb\007vpmovdw\010vpmovm2b\010vpmovm2d\010vpmovm2q\010vpmovm2w\tvpm"
7992 "ovmskb\010vpmovq2m\007vpmovqb\007vpmovqd\007vpmovqw\010vpmovsdb\010vpmo"
7993 "vsdw\010vpmovsqb\010vpmovsqd\010vpmovsqw\010vpmovswb\tvpmovsxbd\tvpmovs"
7994 "xbq\tvpmovsxbw\tvpmovsxdq\tvpmovsxwd\tvpmovsxwq\tvpmovusdb\tvpmovusdw\t"
7995 "vpmovusqb\tvpmovusqd\tvpmovusqw\tvpmovuswb\010vpmovw2m\007vpmovwb\tvpmo"
7996 "vzxbd\tvpmovzxbq\tvpmovzxbw\tvpmovzxdq\tvpmovzxwd\tvpmovzxwq\007vpmuldq"
7997 "\tvpmulhrsw\010vpmulhuw\007vpmulhw\007vpmulld\007vpmullq\007vpmullw\016"
7998 "vpmultishiftqb\010vpmuludq\010vpopcntb\010vpopcntd\010vpopcntq\010vpopc"
7999 "ntw\004vpor\005vpord\005vporq\006vpperm\006vprold\006vprolq\007vprolvd\007"
8000 "vprolvq\006vprord\006vprorq\007vprorvd\007vprorvq\006vprotb\006vprotd\006"
8001 "vprotq\006vprotw\007vpsadbw\013vpscatterdd\013vpscatterdq\013vpscatterq"
8002 "d\013vpscatterqq\006vpshab\006vpshad\006vpshaq\006vpshaw\006vpshlb\006v"
8003 "pshld\007vpshldd\007vpshldq\010vpshldvd\010vpshldvq\010vpshldvw\007vpsh"
8004 "ldw\006vpshlq\006vpshlw\007vpshrdd\007vpshrdq\010vpshrdvd\010vpshrdvq\010"
8005 "vpshrdvw\007vpshrdw\007vpshufb\014vpshufbitqmb\007vpshufd\010vpshufhw\010"
8006 "vpshuflw\007vpsignb\007vpsignd\007vpsignw\006vpslld\007vpslldq\006vpsll"
8007 "q\007vpsllvd\007vpsllvq\007vpsllvw\006vpsllw\006vpsrad\006vpsraq\007vps"
8008 "ravd\007vpsravq\007vpsravw\006vpsraw\006vpsrld\007vpsrldq\006vpsrlq\007"
8009 "vpsrlvd\007vpsrlvq\007vpsrlvw\006vpsrlw\006vpsubb\006vpsubd\006vpsubq\007"
8010 "vpsubsb\007vpsubsw\010vpsubusb\010vpsubusw\006vpsubw\nvpternlogd\nvpter"
8011 "nlogq\006vptest\010vptestmb\010vptestmd\010vptestmq\010vptestmw\tvptest"
8012 "nmb\tvptestnmd\tvptestnmq\tvptestnmw\nvpunpckhbw\nvpunpckhdq\013vpunpck"
8013 "hqdq\nvpunpckhwd\nvpunpcklbw\nvpunpckldq\013vpunpcklqdq\nvpunpcklwd\005"
8014 "vpxor\006vpxord\006vpxorq\010vrangepd\010vrangeps\010vrangesd\010vrange"
8015 "ss\010vrcp14pd\010vrcp14ps\010vrcp14sd\010vrcp14ss\010vrcp28pd\010vrcp2"
8016 "8ps\010vrcp28sd\010vrcp28ss\006vrcpps\006vrcpss\tvreducepd\tvreduceps\t"
8017 "vreducesd\tvreducess\013vrndscalepd\013vrndscaleps\013vrndscalesd\013vr"
8018 "ndscaless\010vroundpd\010vroundps\010vroundsd\010vroundss\nvrsqrt14pd\n"
8019 "vrsqrt14ps\nvrsqrt14sd\nvrsqrt14ss\nvrsqrt28pd\nvrsqrt28ps\nvrsqrt28sd\n"
8020 "vrsqrt28ss\010vrsqrtps\010vrsqrtss\tvscalefpd\tvscalefps\tvscalefsd\tvs"
8021 "calefss\013vscatterdpd\013vscatterdps\016vscatterpf0dpd\016vscatterpf0d"
8022 "ps\016vscatterpf0qpd\016vscatterpf0qps\016vscatterpf1dpd\016vscatterpf1"
8023 "dps\016vscatterpf1qpd\016vscatterpf1qps\013vscatterqpd\013vscatterqps\n"
8024 "vshuff32x4\nvshuff64x2\nvshufi32x4\nvshufi64x2\007vshufpd\007vshufps\007"
8025 "vsqrtpd\007vsqrtps\007vsqrtsd\007vsqrtss\010vstmxcsr\006vsubpd\006vsubp"
8026 "s\006vsubsd\006vsubss\007vtestpd\007vtestps\010vucomisd\010vucomiss\tvu"
8027 "npckhpd\tvunpckhps\tvunpcklpd\tvunpcklps\006vxorpd\006vxorps\010vzeroal"
8028 "l\nvzeroupper\004wait\006wbinvd\010wbnoinvd\010wrfsbase\twrfsbasel\twrf"
8029 "sbaseq\010wrgsbase\twrgsbasel\twrgsbaseq\005wrmsr\006wrpkru\005wrssd\005"
8030 "wrssq\006wrussd\006wrussq\006xabort\010xacquire\004xadd\005xaddb\005xad"
8031 "dl\005xaddq\005xaddw\006xbegin\004xchg\005xchgb\005xchgl\005xchgq\005xc"
8032 "hgw\txcryptcbc\txcryptcfb\txcryptctr\txcryptecb\txcryptofb\004xend\006x"
8033 "getbv\005xlatb\003xor\004xorb\004xorl\005xorpd\005xorps\004xorq\004xorw"
8034 "\010xrelease\txresldtrk\006xrstor\010xrstor64\007xrstors\txrstors64\005"
8035 "xsave\007xsave64\006xsavec\010xsavec64\010xsaveopt\nxsaveopt64\006xsave"
8036 "s\010xsaves64\006xsetbv\005xsha1\007xsha256\006xstore\txstorerng\txsusl"
8037 "dtrk\005xtest";
8038
8039// Feature bitsets.
8040enum : uint8_t {
8041 AMFBS_None,
8042 AMFBS_In16BitMode,
8043 AMFBS_In32BitMode,
8044 AMFBS_In64BitMode,
8045 AMFBS_Not16BitMode,
8046 AMFBS_Not64BitMode,
8047};
8048
8049static constexpr FeatureBitset FeatureBitsets[] = {
8050 {}, // AMFBS_None
8051 {Feature_In16BitModeBit, },
8052 {Feature_In32BitModeBit, },
8053 {Feature_In64BitModeBit, },
8054 {Feature_Not16BitModeBit, },
8055 {Feature_Not64BitModeBit, },
8056};
8057
8058namespace {
8059 struct MatchEntry {
8060 uint16_t Mnemonic;
8061 uint16_t Opcode;
8062 uint16_t ConvertFn;
8063 uint8_t RequiredFeaturesIdx;
8064 uint8_t Classes[9];
8065 StringRef getMnemonic() const {
8066 return StringRef(MnemonicTable + Mnemonic + 1,
8067 MnemonicTable[Mnemonic]);
8068 }
8069 };
8070
8071 // Predicate for searching for an opcode.
8072 struct LessOpcode {
8073 bool operator()(const MatchEntry &LHS, StringRef RHS) {
8074 return LHS.getMnemonic() < RHS;
8075 }
8076 bool operator()(StringRef LHS, const MatchEntry &RHS) {
8077 return LHS < RHS.getMnemonic();
8078 }
8079 bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
8080 return LHS.getMnemonic() < RHS.getMnemonic();
8081 }
8082 };
8083} // end anonymous namespace
8084
8085static const MatchEntry MatchTable0[] = {
8086 { 0 /* aaa */, X86::AAA, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
8087 { 4 /* aad */, X86::AAD8i8, Convert__imm_95_10, AMFBS_Not64BitMode, { }, },
8088 { 4 /* aad */, X86::AAD8i8, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, },
8089 { 8 /* aam */, X86::AAM8i8, Convert__imm_95_10, AMFBS_Not64BitMode, { }, },
8090 { 8 /* aam */, X86::AAM8i8, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, },
8091 { 12 /* aas */, X86::AAS, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
8092 { 20 /* adcb */, X86::ADC8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
8093 { 20 /* adcb */, X86::ADC8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
8094 { 20 /* adcb */, X86::ADC8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, },
8095 { 20 /* adcb */, X86::ADC8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
8096 { 20 /* adcb */, X86::ADC8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, },
8097 { 20 /* adcb */, X86::ADC8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
8098 { 25 /* adcl */, X86::ADC32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8099 { 25 /* adcl */, X86::ADC32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
8100 { 25 /* adcl */, X86::ADC32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, },
8101 { 25 /* adcl */, X86::ADC32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
8102 { 25 /* adcl */, X86::ADC32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, },
8103 { 25 /* adcl */, X86::ADC32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, },
8104 { 25 /* adcl */, X86::ADC32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
8105 { 25 /* adcl */, X86::ADC32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, },
8106 { 25 /* adcl */, X86::ADC32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8107 { 30 /* adcq */, X86::ADC64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8108 { 30 /* adcq */, X86::ADC64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
8109 { 30 /* adcq */, X86::ADC64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, },
8110 { 30 /* adcq */, X86::ADC64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, },
8111 { 30 /* adcq */, X86::ADC64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
8112 { 30 /* adcq */, X86::ADC64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, },
8113 { 30 /* adcq */, X86::ADC64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, },
8114 { 30 /* adcq */, X86::ADC64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
8115 { 30 /* adcq */, X86::ADC64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8116 { 35 /* adcw */, X86::ADC16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8117 { 35 /* adcw */, X86::ADC16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8118 { 35 /* adcw */, X86::ADC16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, },
8119 { 35 /* adcw */, X86::ADC16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
8120 { 35 /* adcw */, X86::ADC16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, },
8121 { 35 /* adcw */, X86::ADC16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, },
8122 { 35 /* adcw */, X86::ADC16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
8123 { 35 /* adcw */, X86::ADC16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, },
8124 { 35 /* adcw */, X86::ADC16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8125 { 45 /* adcxl */, X86::ADCX32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8126 { 45 /* adcxl */, X86::ADCX32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8127 { 51 /* adcxq */, X86::ADCX64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8128 { 51 /* adcxq */, X86::ADCX64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8129 { 61 /* addb */, X86::ADD8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
8130 { 61 /* addb */, X86::ADD8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
8131 { 61 /* addb */, X86::ADD8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, },
8132 { 61 /* addb */, X86::ADD8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
8133 { 61 /* addb */, X86::ADD8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, },
8134 { 61 /* addb */, X86::ADD8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
8135 { 66 /* addl */, X86::ADD32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8136 { 66 /* addl */, X86::ADD32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
8137 { 66 /* addl */, X86::ADD32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, },
8138 { 66 /* addl */, X86::ADD32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
8139 { 66 /* addl */, X86::ADD32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, },
8140 { 66 /* addl */, X86::ADD32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, },
8141 { 66 /* addl */, X86::ADD32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
8142 { 66 /* addl */, X86::ADD32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, },
8143 { 66 /* addl */, X86::ADD32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8144 { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8145 { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8146 { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8147 { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8148 { 83 /* addq */, X86::ADD64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8149 { 83 /* addq */, X86::ADD64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
8150 { 83 /* addq */, X86::ADD64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, },
8151 { 83 /* addq */, X86::ADD64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, },
8152 { 83 /* addq */, X86::ADD64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
8153 { 83 /* addq */, X86::ADD64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, },
8154 { 83 /* addq */, X86::ADD64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, },
8155 { 83 /* addq */, X86::ADD64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
8156 { 83 /* addq */, X86::ADD64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8157 { 88 /* addr16 */, X86::ADDR16_PREFIX, Convert_NoOperands, AMFBS_In32BitMode, { }, },
8158 { 95 /* addr32 */, X86::ADDR32_PREFIX, Convert_NoOperands, AMFBS_In64BitMode, { }, },
8159 { 102 /* addsd */, X86::ADDSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8160 { 102 /* addsd */, X86::ADDSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8161 { 108 /* addss */, X86::ADDSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8162 { 108 /* addss */, X86::ADDSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8163 { 114 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8164 { 114 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8165 { 123 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8166 { 123 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8167 { 132 /* addw */, X86::ADD16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8168 { 132 /* addw */, X86::ADD16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8169 { 132 /* addw */, X86::ADD16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, },
8170 { 132 /* addw */, X86::ADD16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
8171 { 132 /* addw */, X86::ADD16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, },
8172 { 132 /* addw */, X86::ADD16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, },
8173 { 132 /* addw */, X86::ADD16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
8174 { 132 /* addw */, X86::ADD16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, },
8175 { 132 /* addw */, X86::ADD16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8176 { 142 /* adoxl */, X86::ADOX32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8177 { 142 /* adoxl */, X86::ADOX32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8178 { 148 /* adoxq */, X86::ADOX64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8179 { 148 /* adoxq */, X86::ADOX64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8180 { 154 /* aesdec */, X86::AESDECrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8181 { 154 /* aesdec */, X86::AESDECrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8182 { 161 /* aesdec128kl */, X86::AESDEC128KL, Convert__Reg1_1__Tie0_2_2__Mem5_0, AMFBS_None, { MCK_Mem, MCK_FR32 }, },
8183 { 173 /* aesdec256kl */, X86::AESDEC256KL, Convert__Reg1_1__Tie0_2_2__Mem5_0, AMFBS_None, { MCK_Mem, MCK_FR32 }, },
8184 { 185 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8185 { 185 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8186 { 196 /* aesdecwide128kl */, X86::AESDECWIDE128KL, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
8187 { 212 /* aesdecwide256kl */, X86::AESDECWIDE256KL, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
8188 { 228 /* aesenc */, X86::AESENCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8189 { 228 /* aesenc */, X86::AESENCrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8190 { 235 /* aesenc128kl */, X86::AESENC128KL, Convert__Reg1_1__Tie0_2_2__Mem5_0, AMFBS_None, { MCK_Mem, MCK_FR32 }, },
8191 { 247 /* aesenc256kl */, X86::AESENC256KL, Convert__Reg1_1__Tie0_2_2__Mem5_0, AMFBS_None, { MCK_Mem, MCK_FR32 }, },
8192 { 259 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8193 { 259 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8194 { 270 /* aesencwide128kl */, X86::AESENCWIDE128KL, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
8195 { 286 /* aesencwide256kl */, X86::AESENCWIDE256KL, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
8196 { 302 /* aesimc */, X86::AESIMCrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8197 { 302 /* aesimc */, X86::AESIMCrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8198 { 309 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8199 { 309 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8200 { 329 /* andb */, X86::AND8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
8201 { 329 /* andb */, X86::AND8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
8202 { 329 /* andb */, X86::AND8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, },
8203 { 329 /* andb */, X86::AND8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
8204 { 329 /* andb */, X86::AND8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, },
8205 { 329 /* andb */, X86::AND8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
8206 { 334 /* andl */, X86::AND32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8207 { 334 /* andl */, X86::AND32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
8208 { 334 /* andl */, X86::AND32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, },
8209 { 334 /* andl */, X86::AND32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
8210 { 334 /* andl */, X86::AND32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, },
8211 { 334 /* andl */, X86::AND32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, },
8212 { 334 /* andl */, X86::AND32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
8213 { 334 /* andl */, X86::AND32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, },
8214 { 334 /* andl */, X86::AND32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8215 { 344 /* andnl */, X86::ANDN32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
8216 { 344 /* andnl */, X86::ANDN32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
8217 { 350 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8218 { 350 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8219 { 357 /* andnps */, X86::ANDNPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8220 { 357 /* andnps */, X86::ANDNPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8221 { 364 /* andnq */, X86::ANDN64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
8222 { 364 /* andnq */, X86::ANDN64rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
8223 { 370 /* andpd */, X86::ANDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8224 { 370 /* andpd */, X86::ANDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8225 { 376 /* andps */, X86::ANDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8226 { 376 /* andps */, X86::ANDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8227 { 382 /* andq */, X86::AND64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8228 { 382 /* andq */, X86::AND64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
8229 { 382 /* andq */, X86::AND64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, },
8230 { 382 /* andq */, X86::AND64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, },
8231 { 382 /* andq */, X86::AND64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
8232 { 382 /* andq */, X86::AND64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, },
8233 { 382 /* andq */, X86::AND64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, },
8234 { 382 /* andq */, X86::AND64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
8235 { 382 /* andq */, X86::AND64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8236 { 387 /* andw */, X86::AND16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8237 { 387 /* andw */, X86::AND16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8238 { 387 /* andw */, X86::AND16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, },
8239 { 387 /* andw */, X86::AND16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
8240 { 387 /* andw */, X86::AND16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, },
8241 { 387 /* andw */, X86::AND16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, },
8242 { 387 /* andw */, X86::AND16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
8243 { 387 /* andw */, X86::AND16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, },
8244 { 387 /* andw */, X86::AND16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8245 { 392 /* arpl */, X86::ARPL16rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
8246 { 392 /* arpl */, X86::ARPL16mr, Convert__Mem165_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
8247 { 403 /* bextrl */, X86::BEXTR32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
8248 { 403 /* bextrl */, X86::BEXTR32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
8249 { 403 /* bextrl */, X86::BEXTRI32ri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
8250 { 403 /* bextrl */, X86::BEXTRI32mi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
8251 { 410 /* bextrq */, X86::BEXTR64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
8252 { 410 /* bextrq */, X86::BEXTR64rm, Convert__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
8253 { 410 /* bextrq */, X86::BEXTRI64ri, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, },
8254 { 410 /* bextrq */, X86::BEXTRI64mi, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, },
8255 { 425 /* blcfilll */, X86::BLCFILL32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8256 { 425 /* blcfilll */, X86::BLCFILL32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8257 { 434 /* blcfillq */, X86::BLCFILL64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8258 { 434 /* blcfillq */, X86::BLCFILL64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8259 { 454 /* blcicl */, X86::BLCIC32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8260 { 454 /* blcicl */, X86::BLCIC32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8261 { 461 /* blcicq */, X86::BLCIC64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8262 { 461 /* blcicq */, X86::BLCIC64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8263 { 468 /* blcil */, X86::BLCI32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8264 { 468 /* blcil */, X86::BLCI32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8265 { 474 /* blciq */, X86::BLCI64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8266 { 474 /* blciq */, X86::BLCI64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8267 { 487 /* blcmskl */, X86::BLCMSK32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8268 { 487 /* blcmskl */, X86::BLCMSK32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8269 { 495 /* blcmskq */, X86::BLCMSK64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8270 { 495 /* blcmskq */, X86::BLCMSK64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8271 { 508 /* blcsl */, X86::BLCS32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8272 { 508 /* blcsl */, X86::BLCS32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8273 { 514 /* blcsq */, X86::BLCS64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8274 { 514 /* blcsq */, X86::BLCS64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8275 { 520 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8276 { 520 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8277 { 528 /* blendps */, X86::BLENDPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8278 { 528 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8279 { 536 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8280 { 536 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8281 { 536 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
8282 { 536 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
8283 { 545 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8284 { 545 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8285 { 545 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
8286 { 545 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
8287 { 562 /* blsfilll */, X86::BLSFILL32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8288 { 562 /* blsfilll */, X86::BLSFILL32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8289 { 571 /* blsfillq */, X86::BLSFILL64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8290 { 571 /* blsfillq */, X86::BLSFILL64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8291 { 591 /* blsicl */, X86::BLSIC32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8292 { 591 /* blsicl */, X86::BLSIC32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8293 { 598 /* blsicq */, X86::BLSIC64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8294 { 598 /* blsicq */, X86::BLSIC64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8295 { 605 /* blsil */, X86::BLSI32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8296 { 605 /* blsil */, X86::BLSI32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8297 { 611 /* blsiq */, X86::BLSI64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8298 { 611 /* blsiq */, X86::BLSI64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8299 { 624 /* blsmskl */, X86::BLSMSK32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8300 { 624 /* blsmskl */, X86::BLSMSK32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8301 { 632 /* blsmskq */, X86::BLSMSK64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8302 { 632 /* blsmskq */, X86::BLSMSK64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8303 { 645 /* blsrl */, X86::BLSR32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8304 { 645 /* blsrl */, X86::BLSR32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8305 { 651 /* blsrq */, X86::BLSR64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8306 { 651 /* blsrq */, X86::BLSR64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8307 { 657 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
8308 { 657 /* bndcl */, X86::BNDCL64rr, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_BNDR }, },
8309 { 657 /* bndcl */, X86::BNDCL32rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
8310 { 657 /* bndcl */, X86::BNDCL64rm, Convert__Reg1_1__Mem5_0, AMFBS_In64BitMode, { MCK_Mem, MCK_BNDR }, },
8311 { 663 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
8312 { 663 /* bndcn */, X86::BNDCN64rr, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_BNDR }, },
8313 { 663 /* bndcn */, X86::BNDCN32rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
8314 { 663 /* bndcn */, X86::BNDCN64rm, Convert__Reg1_1__Mem5_0, AMFBS_In64BitMode, { MCK_Mem, MCK_BNDR }, },
8315 { 669 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
8316 { 669 /* bndcu */, X86::BNDCU64rr, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_BNDR }, },
8317 { 669 /* bndcu */, X86::BNDCU32rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
8318 { 669 /* bndcu */, X86::BNDCU64rm, Convert__Reg1_1__Mem5_0, AMFBS_In64BitMode, { MCK_Mem, MCK_BNDR }, },
8319 { 675 /* bndldx */, X86::BNDLDXrm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_BNDR }, },
8320 { 682 /* bndmk */, X86::BNDMK32rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
8321 { 682 /* bndmk */, X86::BNDMK64rm, Convert__Reg1_1__Mem5_0, AMFBS_In64BitMode, { MCK_Mem, MCK_BNDR }, },
8322 { 688 /* bndmov */, X86::BNDMOVrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_BNDR, MCK_BNDR }, },
8323 { 688 /* bndmov */, X86::BNDMOV64mr, Convert__Mem1285_1__Reg1_0, AMFBS_In64BitMode, { MCK_BNDR, MCK_Mem128 }, },
8324 { 688 /* bndmov */, X86::BNDMOV32mr, Convert__Mem645_1__Reg1_0, AMFBS_Not64BitMode, { MCK_BNDR, MCK_Mem64 }, },
8325 { 688 /* bndmov */, X86::BNDMOV64rm, Convert__Reg1_1__Mem1285_0, AMFBS_In64BitMode, { MCK_Mem128, MCK_BNDR }, },
8326 { 688 /* bndmov */, X86::BNDMOV32rm, Convert__Reg1_1__Mem645_0, AMFBS_Not64BitMode, { MCK_Mem64, MCK_BNDR }, },
8327 { 695 /* bndstx */, X86::BNDSTXmr, Convert__Mem5_1__Reg1_0, AMFBS_None, { MCK_BNDR, MCK_Mem }, },
8328 { 702 /* bound */, X86::BOUNDS16rm, Convert__Reg1_0__Mem165_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
8329 { 702 /* bound */, X86::BOUNDS32rm, Convert__Reg1_0__Mem325_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
8330 { 712 /* bsfl */, X86::BSF32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8331 { 712 /* bsfl */, X86::BSF32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8332 { 717 /* bsfq */, X86::BSF64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8333 { 717 /* bsfq */, X86::BSF64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8334 { 722 /* bsfw */, X86::BSF16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8335 { 722 /* bsfw */, X86::BSF16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8336 { 731 /* bsrl */, X86::BSR32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8337 { 731 /* bsrl */, X86::BSR32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8338 { 736 /* bsrq */, X86::BSR64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8339 { 736 /* bsrq */, X86::BSR64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8340 { 741 /* bsrw */, X86::BSR16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8341 { 741 /* bsrw */, X86::BSR16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8342 { 752 /* bswapl */, X86::BSWAP32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
8343 { 759 /* bswapq */, X86::BSWAP64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
8344 { 766 /* bt */, X86::BT32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
8345 { 769 /* btc */, X86::BTC32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
8346 { 773 /* btcl */, X86::BTC32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8347 { 773 /* btcl */, X86::BTC32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
8348 { 773 /* btcl */, X86::BTC32ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
8349 { 773 /* btcl */, X86::BTC32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
8350 { 778 /* btcq */, X86::BTC64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8351 { 778 /* btcq */, X86::BTC64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
8352 { 778 /* btcq */, X86::BTC64ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, },
8353 { 778 /* btcq */, X86::BTC64mi8, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
8354 { 783 /* btcw */, X86::BTC16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8355 { 783 /* btcw */, X86::BTC16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8356 { 783 /* btcw */, X86::BTC16ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
8357 { 783 /* btcw */, X86::BTC16mi8, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
8358 { 788 /* btl */, X86::BT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8359 { 788 /* btl */, X86::BT32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
8360 { 788 /* btl */, X86::BT32ri8, Convert__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
8361 { 788 /* btl */, X86::BT32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
8362 { 792 /* btq */, X86::BT64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8363 { 792 /* btq */, X86::BT64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
8364 { 792 /* btq */, X86::BT64ri8, Convert__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, },
8365 { 792 /* btq */, X86::BT64mi8, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
8366 { 796 /* btr */, X86::BTR32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
8367 { 800 /* btrl */, X86::BTR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8368 { 800 /* btrl */, X86::BTR32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
8369 { 800 /* btrl */, X86::BTR32ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
8370 { 800 /* btrl */, X86::BTR32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
8371 { 805 /* btrq */, X86::BTR64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8372 { 805 /* btrq */, X86::BTR64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
8373 { 805 /* btrq */, X86::BTR64ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, },
8374 { 805 /* btrq */, X86::BTR64mi8, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
8375 { 810 /* btrw */, X86::BTR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8376 { 810 /* btrw */, X86::BTR16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8377 { 810 /* btrw */, X86::BTR16ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
8378 { 810 /* btrw */, X86::BTR16mi8, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
8379 { 815 /* bts */, X86::BTS32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
8380 { 819 /* btsl */, X86::BTS32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8381 { 819 /* btsl */, X86::BTS32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
8382 { 819 /* btsl */, X86::BTS32ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
8383 { 819 /* btsl */, X86::BTS32mi8, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
8384 { 824 /* btsq */, X86::BTS64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8385 { 824 /* btsq */, X86::BTS64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
8386 { 824 /* btsq */, X86::BTS64ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, },
8387 { 824 /* btsq */, X86::BTS64mi8, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
8388 { 829 /* btsw */, X86::BTS16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8389 { 829 /* btsw */, X86::BTS16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8390 { 829 /* btsw */, X86::BTS16ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
8391 { 829 /* btsw */, X86::BTS16mi8, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
8392 { 834 /* btw */, X86::BT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8393 { 834 /* btw */, X86::BT16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8394 { 834 /* btw */, X86::BT16ri8, Convert__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
8395 { 834 /* btw */, X86::BT16mi8, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
8396 { 843 /* bzhil */, X86::BZHI32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
8397 { 843 /* bzhil */, X86::BZHI32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
8398 { 849 /* bzhiq */, X86::BZHI64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
8399 { 849 /* bzhiq */, X86::BZHI64rm, Convert__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
8400 { 855 /* call */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, },
8401 { 855 /* call */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, },
8402 { 860 /* calll */, X86::CALLpcrel32, Convert__AbsMem1_0, AMFBS_Not64BitMode, { MCK_AbsMem }, },
8403 { 860 /* calll */, X86::CALL32r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
8404 { 860 /* calll */, X86::CALL32m, Convert__Mem325_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, },
8405 { 860 /* calll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, },
8406 { 866 /* callq */, X86::CALL64pcrel32, Convert__AbsMem1_0, AMFBS_In64BitMode, { MCK_AbsMem }, },
8407 { 866 /* callq */, X86::CALL64r, Convert__Reg1_1, AMFBS_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
8408 { 866 /* callq */, X86::CALL64m, Convert__Mem645_1, AMFBS_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
8409 { 872 /* callw */, X86::CALLpcrel16, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, },
8410 { 872 /* callw */, X86::CALL16r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
8411 { 872 /* callw */, X86::CALL16m, Convert__Mem165_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, },
8412 { 872 /* callw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, },
8413 { 878 /* cbtw */, X86::CBW, Convert_NoOperands, AMFBS_None, { }, },
8414 { 896 /* clac */, X86::CLAC, Convert_NoOperands, AMFBS_None, { }, },
8415 { 901 /* clc */, X86::CLC, Convert_NoOperands, AMFBS_None, { }, },
8416 { 905 /* cld */, X86::CLD, Convert_NoOperands, AMFBS_None, { }, },
8417 { 909 /* cldemote */, X86::CLDEMOTE, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
8418 { 918 /* clflush */, X86::CLFLUSH, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
8419 { 926 /* clflushopt */, X86::CLFLUSHOPT, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
8420 { 937 /* clgi */, X86::CLGI, Convert_NoOperands, AMFBS_None, { }, },
8421 { 942 /* cli */, X86::CLI, Convert_NoOperands, AMFBS_None, { }, },
8422 { 950 /* clrb */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR8 }, },
8423 { 955 /* clrl */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32 }, },
8424 { 960 /* clrq */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64 }, },
8425 { 965 /* clrssbsy */, X86::CLRSSBSY, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8426 { 974 /* clrw */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR16 }, },
8427 { 979 /* cltd */, X86::CDQ, Convert_NoOperands, AMFBS_None, { }, },
8428 { 984 /* cltq */, X86::CDQE, Convert_NoOperands, AMFBS_In64BitMode, { }, },
8429 { 989 /* clts */, X86::CLTS, Convert_NoOperands, AMFBS_None, { }, },
8430 { 994 /* clui */, X86::CLUI, Convert_NoOperands, AMFBS_In64BitMode, { }, },
8431 { 999 /* clwb */, X86::CLWB, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
8432 { 1004 /* clzero */, X86::CLZERO32r, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
8433 { 1004 /* clzero */, X86::CLZERO64r, Convert_NoOperands, AMFBS_In64BitMode, { }, },
8434 { 1004 /* clzero */, X86::CLZERO32r, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, },
8435 { 1004 /* clzero */, X86::CLZERO64r, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
8436 { 1011 /* cmc */, X86::CMC, Convert_NoOperands, AMFBS_None, { }, },
8437 { 1028 /* cmovael */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8438 { 1028 /* cmovael */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_3, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8439 { 1036 /* cmovaeq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8440 { 1036 /* cmovaeq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_3, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8441 { 1044 /* cmovaew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8442 { 1044 /* cmovaew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_3, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8443 { 1052 /* cmoval */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8444 { 1052 /* cmoval */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_7, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8445 { 1059 /* cmovaq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8446 { 1059 /* cmovaq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_7, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8447 { 1066 /* cmovaw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8448 { 1066 /* cmovaw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_7, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8449 { 1086 /* cmovbel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8450 { 1086 /* cmovbel */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_6, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8451 { 1094 /* cmovbeq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8452 { 1094 /* cmovbeq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_6, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8453 { 1102 /* cmovbew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8454 { 1102 /* cmovbew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_6, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8455 { 1110 /* cmovbl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8456 { 1110 /* cmovbl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_2, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8457 { 1117 /* cmovbq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8458 { 1117 /* cmovbq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_2, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8459 { 1124 /* cmovbw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8460 { 1124 /* cmovbw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_2, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8461 { 1137 /* cmovel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8462 { 1137 /* cmovel */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_4, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8463 { 1144 /* cmoveq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8464 { 1144 /* cmoveq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_4, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8465 { 1151 /* cmovew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8466 { 1151 /* cmovew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_4, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8467 { 1171 /* cmovgel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8468 { 1171 /* cmovgel */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_13, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8469 { 1179 /* cmovgeq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8470 { 1179 /* cmovgeq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_13, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8471 { 1187 /* cmovgew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8472 { 1187 /* cmovgew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_13, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8473 { 1195 /* cmovgl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8474 { 1195 /* cmovgl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_15, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8475 { 1202 /* cmovgq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8476 { 1202 /* cmovgq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_15, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8477 { 1209 /* cmovgw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8478 { 1209 /* cmovgw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_15, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8479 { 1229 /* cmovlel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8480 { 1229 /* cmovlel */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_14, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8481 { 1237 /* cmovleq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8482 { 1237 /* cmovleq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_14, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8483 { 1245 /* cmovlew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8484 { 1245 /* cmovlew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_14, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8485 { 1253 /* cmovll */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8486 { 1253 /* cmovll */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_12, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8487 { 1260 /* cmovlq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8488 { 1260 /* cmovlq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_12, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8489 { 1267 /* cmovlw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8490 { 1267 /* cmovlw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_12, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8491 { 1281 /* cmovnel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8492 { 1281 /* cmovnel */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_5, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8493 { 1289 /* cmovneq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8494 { 1289 /* cmovneq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_5, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8495 { 1297 /* cmovnew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8496 { 1297 /* cmovnew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_5, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8497 { 1312 /* cmovnol */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8498 { 1312 /* cmovnol */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8499 { 1320 /* cmovnoq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8500 { 1320 /* cmovnoq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8501 { 1328 /* cmovnow */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8502 { 1328 /* cmovnow */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8503 { 1343 /* cmovnpl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8504 { 1343 /* cmovnpl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_11, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8505 { 1351 /* cmovnpq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8506 { 1351 /* cmovnpq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_11, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8507 { 1359 /* cmovnpw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8508 { 1359 /* cmovnpw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_11, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8509 { 1374 /* cmovnsl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8510 { 1374 /* cmovnsl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_9, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8511 { 1382 /* cmovnsq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8512 { 1382 /* cmovnsq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_9, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8513 { 1390 /* cmovnsw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8514 { 1390 /* cmovnsw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_9, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8515 { 1404 /* cmovol */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8516 { 1404 /* cmovol */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8517 { 1411 /* cmovoq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8518 { 1411 /* cmovoq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8519 { 1418 /* cmovow */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8520 { 1418 /* cmovow */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8521 { 1431 /* cmovpl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8522 { 1431 /* cmovpl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_10, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8523 { 1438 /* cmovpq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8524 { 1438 /* cmovpq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_10, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8525 { 1445 /* cmovpw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8526 { 1445 /* cmovpw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_10, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8527 { 1458 /* cmovsl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8528 { 1458 /* cmovsl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_8, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8529 { 1465 /* cmovsq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8530 { 1465 /* cmovsq */, X86::CMOV64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0__imm_95_8, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8531 { 1472 /* cmovsw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8532 { 1472 /* cmovsw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_8, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8533 { 1483 /* cmpb */, X86::CMP8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
8534 { 1483 /* cmpb */, X86::CMP8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
8535 { 1483 /* cmpb */, X86::CMP8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, },
8536 { 1483 /* cmpb */, X86::CMP8ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
8537 { 1483 /* cmpb */, X86::CMP8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, },
8538 { 1483 /* cmpb */, X86::CMP8rm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
8539 { 1488 /* cmpl */, X86::CMP32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8540 { 1488 /* cmpl */, X86::CMP32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
8541 { 1488 /* cmpl */, X86::CMP32ri8, Convert__regEAX__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, },
8542 { 1488 /* cmpl */, X86::CMP32ri8, Convert__Reg1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
8543 { 1488 /* cmpl */, X86::CMP32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, },
8544 { 1488 /* cmpl */, X86::CMP32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, },
8545 { 1488 /* cmpl */, X86::CMP32ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
8546 { 1488 /* cmpl */, X86::CMP32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, },
8547 { 1488 /* cmpl */, X86::CMP32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8548 { 1493 /* cmppd */, X86::CMPPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8549 { 1493 /* cmppd */, X86::CMPPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8550 { 1499 /* cmpps */, X86::CMPPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8551 { 1499 /* cmpps */, X86::CMPPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8552 { 1505 /* cmpq */, X86::CMP64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8553 { 1505 /* cmpq */, X86::CMP64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
8554 { 1505 /* cmpq */, X86::CMP64ri8, Convert__regRAX__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, },
8555 { 1505 /* cmpq */, X86::CMP64ri8, Convert__Reg1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, },
8556 { 1505 /* cmpq */, X86::CMP64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
8557 { 1505 /* cmpq */, X86::CMP64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, },
8558 { 1505 /* cmpq */, X86::CMP64ri32, Convert__Reg1_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, },
8559 { 1505 /* cmpq */, X86::CMP64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
8560 { 1505 /* cmpq */, X86::CMP64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8561 { 1515 /* cmpsb */, X86::CMPSB, Convert__DstIdx81_0__SrcIdx82_1, AMFBS_None, { MCK_DstIdx8, MCK_SrcIdx8 }, },
8562 { 1521 /* cmpsd */, X86::CMPSDrr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8563 { 1521 /* cmpsd */, X86::CMPSDrm_Int, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
8564 { 1527 /* cmpsl */, X86::CMPSL, Convert__DstIdx321_0__SrcIdx322_1, AMFBS_None, { MCK_DstIdx32, MCK_SrcIdx32 }, },
8565 { 1533 /* cmpsq */, X86::CMPSQ, Convert__DstIdx641_0__SrcIdx642_1, AMFBS_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, },
8566 { 1539 /* cmpss */, X86::CMPSSrr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8567 { 1539 /* cmpss */, X86::CMPSSrm_Int, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
8568 { 1545 /* cmpsw */, X86::CMPSW, Convert__DstIdx161_0__SrcIdx162_1, AMFBS_None, { MCK_DstIdx16, MCK_SrcIdx16 }, },
8569 { 1551 /* cmpw */, X86::CMP16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8570 { 1551 /* cmpw */, X86::CMP16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8571 { 1551 /* cmpw */, X86::CMP16ri8, Convert__regAX__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, },
8572 { 1551 /* cmpw */, X86::CMP16ri8, Convert__Reg1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
8573 { 1551 /* cmpw */, X86::CMP16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, },
8574 { 1551 /* cmpw */, X86::CMP16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, },
8575 { 1551 /* cmpw */, X86::CMP16ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
8576 { 1551 /* cmpw */, X86::CMP16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, },
8577 { 1551 /* cmpw */, X86::CMP16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8578 { 1564 /* cmpxchg16b */, X86::CMPXCHG16B, Convert__Mem1285_0, AMFBS_In64BitMode, { MCK_Mem128 }, },
8579 { 1575 /* cmpxchg8b */, X86::CMPXCHG8B, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
8580 { 1585 /* cmpxchgb */, X86::CMPXCHG8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
8581 { 1585 /* cmpxchgb */, X86::CMPXCHG8rm, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
8582 { 1594 /* cmpxchgl */, X86::CMPXCHG32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8583 { 1594 /* cmpxchgl */, X86::CMPXCHG32rm, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
8584 { 1603 /* cmpxchgq */, X86::CMPXCHG64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8585 { 1603 /* cmpxchgq */, X86::CMPXCHG64rm, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
8586 { 1612 /* cmpxchgw */, X86::CMPXCHG16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8587 { 1612 /* cmpxchgw */, X86::CMPXCHG16rm, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8588 { 1621 /* comisd */, X86::COMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8589 { 1621 /* comisd */, X86::COMISDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8590 { 1628 /* comiss */, X86::COMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8591 { 1628 /* comiss */, X86::COMISSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8592 { 1635 /* cpuid */, X86::CPUID, Convert_NoOperands, AMFBS_None, { }, },
8593 { 1645 /* cqto */, X86::CQO, Convert_NoOperands, AMFBS_In64BitMode, { }, },
8594 { 1656 /* crc32b */, X86::CRC32r32r8, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
8595 { 1656 /* crc32b */, X86::CRC32r64r8, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR64 }, },
8596 { 1656 /* crc32b */, X86::CRC32r32m8, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR32 }, },
8597 { 1656 /* crc32b */, X86::CRC32r64m8, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR64 }, },
8598 { 1663 /* crc32l */, X86::CRC32r32r32, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8599 { 1663 /* crc32l */, X86::CRC32r32m32, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8600 { 1670 /* crc32q */, X86::CRC32r64r64, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8601 { 1670 /* crc32q */, X86::CRC32r64m64, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8602 { 1677 /* crc32w */, X86::CRC32r32r16, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, },
8603 { 1677 /* crc32w */, X86::CRC32r32m16, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR32 }, },
8604 { 1684 /* cs */, X86::CS_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
8605 { 1687 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8606 { 1687 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8607 { 1696 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8608 { 1696 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8609 { 1705 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8610 { 1705 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8611 { 1714 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
8612 { 1714 /* cvtpd2pi */, X86::MMX_CVTPD2PIirm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR64 }, },
8613 { 1723 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8614 { 1723 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8615 { 1732 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
8616 { 1732 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8617 { 1741 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
8618 { 1741 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8619 { 1750 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8620 { 1750 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8621 { 1759 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8622 { 1759 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8623 { 1768 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
8624 { 1768 /* cvtps2pi */, X86::MMX_CVTPS2PIirm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
8625 { 1777 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8626 { 1777 /* cvtsd2si */, X86::CVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8627 { 1777 /* cvtsd2si */, X86::CVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
8628 { 1777 /* cvtsd2si */, X86::CVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8629 { 1786 /* cvtsd2sil */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8630 { 1786 /* cvtsd2sil */, X86::CVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
8631 { 1796 /* cvtsd2siq */, X86::CVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8632 { 1796 /* cvtsd2siq */, X86::CVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8633 { 1806 /* cvtsd2ss */, X86::CVTSD2SSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8634 { 1806 /* cvtsd2ss */, X86::CVTSD2SSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8635 { 1815 /* cvtsi2sd */, X86::CVTSI2SDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
8636 { 1815 /* cvtsi2sd */, X86::CVTSI642SDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
8637 { 1815 /* cvtsi2sd */, X86::CVTSI2SDrm_Int, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8638 { 1824 /* cvtsi2sdl */, X86::CVTSI2SDrr_Int, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
8639 { 1824 /* cvtsi2sdl */, X86::CVTSI2SDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8640 { 1834 /* cvtsi2sdq */, X86::CVTSI642SDrr_Int, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
8641 { 1834 /* cvtsi2sdq */, X86::CVTSI642SDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8642 { 1844 /* cvtsi2ss */, X86::CVTSI2SSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
8643 { 1844 /* cvtsi2ss */, X86::CVTSI642SSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
8644 { 1844 /* cvtsi2ss */, X86::CVTSI2SSrm_Int, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8645 { 1853 /* cvtsi2ssl */, X86::CVTSI2SSrr_Int, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
8646 { 1853 /* cvtsi2ssl */, X86::CVTSI2SSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8647 { 1863 /* cvtsi2ssq */, X86::CVTSI642SSrr_Int, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
8648 { 1863 /* cvtsi2ssq */, X86::CVTSI642SSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8649 { 1873 /* cvtss2sd */, X86::CVTSS2SDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8650 { 1873 /* cvtss2sd */, X86::CVTSS2SDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8651 { 1882 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8652 { 1882 /* cvtss2si */, X86::CVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8653 { 1882 /* cvtss2si */, X86::CVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8654 { 1882 /* cvtss2si */, X86::CVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
8655 { 1891 /* cvtss2sil */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8656 { 1891 /* cvtss2sil */, X86::CVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8657 { 1901 /* cvtss2siq */, X86::CVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8658 { 1901 /* cvtss2siq */, X86::CVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
8659 { 1911 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8660 { 1911 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8661 { 1921 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
8662 { 1921 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR64 }, },
8663 { 1931 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8664 { 1931 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8665 { 1941 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
8666 { 1941 /* cvttps2pi */, X86::MMX_CVTTPS2PIirm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
8667 { 1951 /* cvttsd2si */, X86::CVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8668 { 1951 /* cvttsd2si */, X86::CVTTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8669 { 1951 /* cvttsd2si */, X86::CVTTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
8670 { 1951 /* cvttsd2si */, X86::CVTTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8671 { 1961 /* cvttsd2sil */, X86::CVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8672 { 1961 /* cvttsd2sil */, X86::CVTTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
8673 { 1972 /* cvttsd2siq */, X86::CVTTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8674 { 1972 /* cvttsd2siq */, X86::CVTTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8675 { 1983 /* cvttss2si */, X86::CVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8676 { 1983 /* cvttss2si */, X86::CVTTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8677 { 1983 /* cvttss2si */, X86::CVTTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8678 { 1983 /* cvttss2si */, X86::CVTTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
8679 { 1993 /* cvttss2sil */, X86::CVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8680 { 1993 /* cvttss2sil */, X86::CVTTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8681 { 2004 /* cvttss2siq */, X86::CVTTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8682 { 2004 /* cvttss2siq */, X86::CVTTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
8683 { 2024 /* cwtd */, X86::CWD, Convert_NoOperands, AMFBS_None, { }, },
8684 { 2029 /* cwtl */, X86::CWDE, Convert_NoOperands, AMFBS_None, { }, },
8685 { 2034 /* daa */, X86::DAA, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
8686 { 2038 /* das */, X86::DAS, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
8687 { 2042 /* data16 */, X86::DATA16_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
8688 { 2053 /* decb */, X86::DEC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
8689 { 2053 /* decb */, X86::DEC8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
8690 { 2058 /* decl */, X86::DEC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, },
8691 { 2058 /* decl */, X86::DEC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
8692 { 2058 /* decl */, X86::DEC32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8693 { 2063 /* decq */, X86::DEC64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
8694 { 2063 /* decq */, X86::DEC64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
8695 { 2068 /* decw */, X86::DEC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, },
8696 { 2068 /* decw */, X86::DEC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
8697 { 2068 /* decw */, X86::DEC16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8698 { 2077 /* divb */, X86::DIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
8699 { 2077 /* divb */, X86::DIV8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
8700 { 2077 /* divb */, X86::DIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8, MCK_AL }, },
8701 { 2077 /* divb */, X86::DIV8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_AL }, },
8702 { 2082 /* divl */, X86::DIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
8703 { 2082 /* divl */, X86::DIV32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8704 { 2082 /* divl */, X86::DIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32, MCK_EAX }, },
8705 { 2082 /* divl */, X86::DIV32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_EAX }, },
8706 { 2087 /* divpd */, X86::DIVPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8707 { 2087 /* divpd */, X86::DIVPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8708 { 2093 /* divps */, X86::DIVPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8709 { 2093 /* divps */, X86::DIVPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8710 { 2099 /* divq */, X86::DIV64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
8711 { 2099 /* divq */, X86::DIV64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
8712 { 2099 /* divq */, X86::DIV64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64, MCK_RAX }, },
8713 { 2099 /* divq */, X86::DIV64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_RAX }, },
8714 { 2104 /* divsd */, X86::DIVSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8715 { 2104 /* divsd */, X86::DIVSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8716 { 2110 /* divss */, X86::DIVSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8717 { 2110 /* divss */, X86::DIVSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8718 { 2116 /* divw */, X86::DIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
8719 { 2116 /* divw */, X86::DIV16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8720 { 2116 /* divw */, X86::DIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16, MCK_AX }, },
8721 { 2116 /* divw */, X86::DIV16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_AX }, },
8722 { 2121 /* dppd */, X86::DPPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8723 { 2121 /* dppd */, X86::DPPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8724 { 2126 /* dpps */, X86::DPPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8725 { 2126 /* dpps */, X86::DPPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8726 { 2131 /* ds */, X86::DS_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
8727 { 2134 /* emms */, X86::MMX_EMMS, Convert_NoOperands, AMFBS_None, { }, },
8728 { 2139 /* encls */, X86::ENCLS, Convert_NoOperands, AMFBS_None, { }, },
8729 { 2145 /* enclu */, X86::ENCLU, Convert_NoOperands, AMFBS_None, { }, },
8730 { 2151 /* enclv */, X86::ENCLV, Convert_NoOperands, AMFBS_None, { }, },
8731 { 2157 /* encodekey128 */, X86::ENCODEKEY128, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8732 { 2170 /* encodekey256 */, X86::ENCODEKEY256, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8733 { 2183 /* endbr32 */, X86::ENDBR32, Convert_NoOperands, AMFBS_None, { }, },
8734 { 2191 /* endbr64 */, X86::ENDBR64, Convert_NoOperands, AMFBS_None, { }, },
8735 { 2199 /* enqcmd */, X86::ENQCMD16, Convert__Reg1_1__Mem5125_0, AMFBS_Not64BitMode, { MCK_Mem512, MCK_GR16 }, },
8736 { 2199 /* enqcmd */, X86::ENQCMD32, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_GR32 }, },
8737 { 2199 /* enqcmd */, X86::ENQCMD64, Convert__Reg1_1__Mem5125_0, AMFBS_In64BitMode, { MCK_Mem512, MCK_GR64 }, },
8738 { 2206 /* enqcmds */, X86::ENQCMDS16, Convert__Reg1_1__Mem5125_0, AMFBS_Not64BitMode, { MCK_Mem512, MCK_GR16 }, },
8739 { 2206 /* enqcmds */, X86::ENQCMDS32, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_GR32 }, },
8740 { 2206 /* enqcmds */, X86::ENQCMDS64, Convert__Reg1_1__Mem5125_0, AMFBS_In64BitMode, { MCK_Mem512, MCK_GR64 }, },
8741 { 2214 /* enter */, X86::ENTER, Convert__Imm1_0__Imm1_1, AMFBS_None, { MCK_Imm, MCK_Imm }, },
8742 { 2220 /* es */, X86::ES_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
8743 { 2223 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
8744 { 2223 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
8745 { 2233 /* extrq */, X86::EXTRQ, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8746 { 2233 /* extrq */, X86::EXTRQI, Convert__Reg1_2__Tie0_3_3__ImmUnsignedi81_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32 }, },
8747 { 2239 /* f2xm1 */, X86::F2XM1, Convert_NoOperands, AMFBS_None, { }, },
8748 { 2245 /* fabs */, X86::ABS_F, Convert_NoOperands, AMFBS_None, { }, },
8749 { 2250 /* fadd */, X86::ADD_FPrST0, Convert__regST1, AMFBS_None, { }, },
8750 { 2250 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8751 { 2250 /* fadd */, X86::ADD_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8752 { 2250 /* fadd */, X86::ADD_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8753 { 2250 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8754 { 2255 /* faddl */, X86::ADD_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
8755 { 2261 /* faddp */, X86::ADD_FPrST0, Convert__regST1, AMFBS_None, { }, },
8756 { 2261 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8757 { 2261 /* faddp */, X86::ADD_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8758 { 2261 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8759 { 2261 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8760 { 2267 /* fadds */, X86::ADD_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8761 { 2273 /* fbld */, X86::FBLDm, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, },
8762 { 2278 /* fbstp */, X86::FBSTPm, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, },
8763 { 2284 /* fchs */, X86::CHS_F, Convert_NoOperands, AMFBS_None, { }, },
8764 { 2289 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8765 { 2296 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8766 { 2304 /* fcmove */, X86::CMOVE_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8767 { 2311 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8768 { 2319 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8769 { 2328 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8770 { 2336 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8771 { 2344 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8772 { 2351 /* fcom */, X86::COM_FST0r, Convert__regST1, AMFBS_None, { }, },
8773 { 2351 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8774 { 2356 /* fcomi */, X86::COM_FIr, Convert__regST1, AMFBS_None, { }, },
8775 { 2356 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8776 { 2356 /* fcomi */, X86::COM_FIr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8777 { 2356 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8778 { 2362 /* fcoml */, X86::FCOM64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
8779 { 2368 /* fcomp */, X86::COMP_FST0r, Convert__regST1, AMFBS_None, { }, },
8780 { 2368 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8781 { 2374 /* fcompi */, X86::COM_FIPr, Convert__regST1, AMFBS_None, { }, },
8782 { 2374 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8783 { 2374 /* fcompi */, X86::COM_FIPr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8784 { 2374 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8785 { 2381 /* fcompl */, X86::FCOMP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
8786 { 2388 /* fcompp */, X86::FCOMPP, Convert_NoOperands, AMFBS_None, { }, },
8787 { 2395 /* fcomps */, X86::FCOMP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8788 { 2402 /* fcoms */, X86::FCOM32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8789 { 2408 /* fcos */, X86::FCOS, Convert_NoOperands, AMFBS_None, { }, },
8790 { 2413 /* fdecstp */, X86::FDECSTP, Convert_NoOperands, AMFBS_None, { }, },
8791 { 2421 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8792 { 2421 /* fdiv */, X86::DIV_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8793 { 2421 /* fdiv */, X86::DIVR_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8794 { 2421 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8795 { 2426 /* fdivl */, X86::DIV_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
8796 { 2432 /* fdivp */, X86::DIVR_FPrST0, Convert__regST1, AMFBS_None, { }, },
8797 { 2432 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8798 { 2432 /* fdivp */, X86::DIVR_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8799 { 2432 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8800 { 2432 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8801 { 2438 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8802 { 2438 /* fdivr */, X86::DIVR_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8803 { 2438 /* fdivr */, X86::DIV_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8804 { 2438 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8805 { 2444 /* fdivrl */, X86::DIVR_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
8806 { 2451 /* fdivrp */, X86::DIV_FPrST0, Convert__regST1, AMFBS_None, { }, },
8807 { 2451 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8808 { 2451 /* fdivrp */, X86::DIV_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8809 { 2451 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8810 { 2451 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8811 { 2458 /* fdivrs */, X86::DIVR_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8812 { 2465 /* fdivs */, X86::DIV_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8813 { 2471 /* femms */, X86::FEMMS, Convert_NoOperands, AMFBS_None, { }, },
8814 { 2477 /* ffree */, X86::FFREE, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8815 { 2483 /* ffreep */, X86::FFREEP, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8816 { 2496 /* fiaddl */, X86::ADD_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8817 { 2503 /* fiadds */, X86::ADD_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8818 { 2516 /* ficoml */, X86::FICOM32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8819 { 2530 /* ficompl */, X86::FICOMP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8820 { 2538 /* ficomps */, X86::FICOMP16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8821 { 2546 /* ficoms */, X86::FICOM16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8822 { 2559 /* fidivl */, X86::DIV_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8823 { 2573 /* fidivrl */, X86::DIVR_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8824 { 2581 /* fidivrs */, X86::DIVR_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8825 { 2589 /* fidivs */, X86::DIV_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8826 { 2601 /* fildl */, X86::ILD_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8827 { 2607 /* fildll */, X86::ILD_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
8828 { 2614 /* filds */, X86::ILD_F16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8829 { 2626 /* fimull */, X86::MUL_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8830 { 2633 /* fimuls */, X86::MUL_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8831 { 2640 /* fincstp */, X86::FINCSTP, Convert_NoOperands, AMFBS_None, { }, },
8832 { 2653 /* fistl */, X86::IST_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8833 { 2665 /* fistpl */, X86::IST_FP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8834 { 2672 /* fistpll */, X86::IST_FP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
8835 { 2680 /* fistps */, X86::IST_FP16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8836 { 2687 /* fists */, X86::IST_F16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8837 { 2700 /* fisttpl */, X86::ISTT_FP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8838 { 2708 /* fisttpll */, X86::ISTT_FP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
8839 { 2717 /* fisttps */, X86::ISTT_FP16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8840 { 2731 /* fisubl */, X86::SUB_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8841 { 2745 /* fisubrl */, X86::SUBR_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8842 { 2753 /* fisubrs */, X86::SUBR_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8843 { 2761 /* fisubs */, X86::SUB_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8844 { 2768 /* fld */, X86::LD_Frr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8845 { 2772 /* fld1 */, X86::LD_F1, Convert_NoOperands, AMFBS_None, { }, },
8846 { 2777 /* fldcw */, X86::FLDCW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8847 { 2783 /* fldenv */, X86::FLDENVm, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
8848 { 2790 /* fldl */, X86::LD_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
8849 { 2795 /* fldl2e */, X86::FLDL2E, Convert_NoOperands, AMFBS_None, { }, },
8850 { 2802 /* fldl2t */, X86::FLDL2T, Convert_NoOperands, AMFBS_None, { }, },
8851 { 2809 /* fldlg2 */, X86::FLDLG2, Convert_NoOperands, AMFBS_None, { }, },
8852 { 2816 /* fldln2 */, X86::FLDLN2, Convert_NoOperands, AMFBS_None, { }, },
8853 { 2823 /* fldpi */, X86::FLDPI, Convert_NoOperands, AMFBS_None, { }, },
8854 { 2829 /* flds */, X86::LD_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8855 { 2834 /* fldt */, X86::LD_F80m, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, },
8856 { 2839 /* fldz */, X86::LD_F0, Convert_NoOperands, AMFBS_None, { }, },
8857 { 2844 /* fmul */, X86::MUL_FPrST0, Convert__regST1, AMFBS_None, { }, },
8858 { 2844 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8859 { 2844 /* fmul */, X86::MUL_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8860 { 2844 /* fmul */, X86::MUL_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8861 { 2844 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8862 { 2849 /* fmull */, X86::MUL_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
8863 { 2855 /* fmulp */, X86::MUL_FPrST0, Convert__regST1, AMFBS_None, { }, },
8864 { 2855 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8865 { 2855 /* fmulp */, X86::MUL_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8866 { 2855 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8867 { 2855 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8868 { 2861 /* fmuls */, X86::MUL_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8869 { 2867 /* fnclex */, X86::FNCLEX, Convert_NoOperands, AMFBS_None, { }, },
8870 { 2874 /* fninit */, X86::FNINIT, Convert_NoOperands, AMFBS_None, { }, },
8871 { 2881 /* fnop */, X86::FNOP, Convert_NoOperands, AMFBS_None, { }, },
8872 { 2886 /* fnsave */, X86::FSAVEm, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
8873 { 2893 /* fnstcw */, X86::FNSTCW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8874 { 2900 /* fnstenv */, X86::FSTENVm, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
8875 { 2908 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, AMFBS_None, { }, },
8876 { 2908 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, AMFBS_None, { MCK_AX }, },
8877 { 2908 /* fnstsw */, X86::FNSTSWm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8878 { 2915 /* fpatan */, X86::FPATAN, Convert_NoOperands, AMFBS_None, { }, },
8879 { 2922 /* fprem */, X86::FPREM, Convert_NoOperands, AMFBS_None, { }, },
8880 { 2928 /* fprem1 */, X86::FPREM1, Convert_NoOperands, AMFBS_None, { }, },
8881 { 2935 /* fptan */, X86::FPTAN, Convert_NoOperands, AMFBS_None, { }, },
8882 { 2941 /* frndint */, X86::FRNDINT, Convert_NoOperands, AMFBS_None, { }, },
8883 { 2949 /* frstor */, X86::FRSTORm, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
8884 { 2956 /* fs */, X86::FS_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
8885 { 2959 /* fscale */, X86::FSCALE, Convert_NoOperands, AMFBS_None, { }, },
8886 { 2966 /* fsin */, X86::FSIN, Convert_NoOperands, AMFBS_None, { }, },
8887 { 2971 /* fsincos */, X86::FSINCOS, Convert_NoOperands, AMFBS_None, { }, },
8888 { 2979 /* fsqrt */, X86::SQRT_F, Convert_NoOperands, AMFBS_None, { }, },
8889 { 2985 /* fst */, X86::ST_Frr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8890 { 2989 /* fstl */, X86::ST_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
8891 { 2994 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8892 { 2999 /* fstpl */, X86::ST_FP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
8893 { 3005 /* fstps */, X86::ST_FP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8894 { 3011 /* fstpt */, X86::ST_FP80m, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, },
8895 { 3017 /* fsts */, X86::ST_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8896 { 3022 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8897 { 3022 /* fsub */, X86::SUB_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8898 { 3022 /* fsub */, X86::SUBR_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8899 { 3022 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8900 { 3027 /* fsubl */, X86::SUB_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
8901 { 3033 /* fsubp */, X86::SUBR_FPrST0, Convert__regST1, AMFBS_None, { }, },
8902 { 3033 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8903 { 3033 /* fsubp */, X86::SUBR_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8904 { 3033 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8905 { 3033 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8906 { 3039 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8907 { 3039 /* fsubr */, X86::SUBR_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8908 { 3039 /* fsubr */, X86::SUB_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8909 { 3039 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8910 { 3045 /* fsubrl */, X86::SUBR_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
8911 { 3052 /* fsubrp */, X86::SUB_FPrST0, Convert__regST1, AMFBS_None, { }, },
8912 { 3052 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8913 { 3052 /* fsubrp */, X86::SUB_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8914 { 3052 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8915 { 3052 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8916 { 3059 /* fsubrs */, X86::SUBR_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8917 { 3066 /* fsubs */, X86::SUB_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8918 { 3072 /* ftst */, X86::TST_F, Convert_NoOperands, AMFBS_None, { }, },
8919 { 3077 /* fucom */, X86::UCOM_Fr, Convert__regST1, AMFBS_None, { }, },
8920 { 3077 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8921 { 3083 /* fucomi */, X86::UCOM_FIr, Convert__regST1, AMFBS_None, { }, },
8922 { 3083 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8923 { 3083 /* fucomi */, X86::UCOM_FIr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8924 { 3083 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8925 { 3090 /* fucomp */, X86::UCOM_FPr, Convert__regST1, AMFBS_None, { }, },
8926 { 3090 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8927 { 3097 /* fucompi */, X86::UCOM_FIPr, Convert__regST1, AMFBS_None, { }, },
8928 { 3097 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8929 { 3097 /* fucompi */, X86::UCOM_FIPr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
8930 { 3097 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
8931 { 3105 /* fucompp */, X86::UCOM_FPPr, Convert_NoOperands, AMFBS_None, { }, },
8932 { 3113 /* fxam */, X86::FXAM, Convert_NoOperands, AMFBS_None, { }, },
8933 { 3118 /* fxch */, X86::XCH_F, Convert__regST1, AMFBS_None, { }, },
8934 { 3118 /* fxch */, X86::XCH_F, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
8935 { 3123 /* fxrstor */, X86::FXRSTOR, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
8936 { 3131 /* fxrstor64 */, X86::FXRSTOR64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
8937 { 3141 /* fxsave */, X86::FXSAVE, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
8938 { 3148 /* fxsave64 */, X86::FXSAVE64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
8939 { 3157 /* fxtract */, X86::FXTRACT, Convert_NoOperands, AMFBS_None, { }, },
8940 { 3165 /* fyl2x */, X86::FYL2X, Convert_NoOperands, AMFBS_None, { }, },
8941 { 3171 /* fyl2xp1 */, X86::FYL2XP1, Convert_NoOperands, AMFBS_None, { }, },
8942 { 3179 /* getsec */, X86::GETSEC, Convert_NoOperands, AMFBS_None, { }, },
8943 { 3186 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8944 { 3186 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8945 { 3203 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8946 { 3203 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8947 { 3217 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8948 { 3217 /* gf2p8mulb */, X86::GF2P8MULBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8949 { 3227 /* gs */, X86::GS_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
8950 { 3230 /* haddpd */, X86::HADDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8951 { 3230 /* haddpd */, X86::HADDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8952 { 3237 /* haddps */, X86::HADDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8953 { 3237 /* haddps */, X86::HADDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8954 { 3244 /* hlt */, X86::HLT, Convert_NoOperands, AMFBS_None, { }, },
8955 { 3248 /* hreset */, X86::HRESET, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
8956 { 3255 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8957 { 3255 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8958 { 3262 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8959 { 3262 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8960 { 3274 /* idivb */, X86::IDIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
8961 { 3274 /* idivb */, X86::IDIV8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
8962 { 3274 /* idivb */, X86::IDIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8, MCK_AL }, },
8963 { 3274 /* idivb */, X86::IDIV8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_AL }, },
8964 { 3280 /* idivl */, X86::IDIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
8965 { 3280 /* idivl */, X86::IDIV32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8966 { 3280 /* idivl */, X86::IDIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32, MCK_EAX }, },
8967 { 3280 /* idivl */, X86::IDIV32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_EAX }, },
8968 { 3286 /* idivq */, X86::IDIV64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
8969 { 3286 /* idivq */, X86::IDIV64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
8970 { 3286 /* idivq */, X86::IDIV64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64, MCK_RAX }, },
8971 { 3286 /* idivq */, X86::IDIV64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_RAX }, },
8972 { 3292 /* idivw */, X86::IDIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
8973 { 3292 /* idivw */, X86::IDIV16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
8974 { 3292 /* idivw */, X86::IDIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16, MCK_AX }, },
8975 { 3292 /* idivw */, X86::IDIV16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_AX }, },
8976 { 3303 /* imulb */, X86::IMUL8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
8977 { 3303 /* imulb */, X86::IMUL8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
8978 { 3309 /* imull */, X86::IMUL32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
8979 { 3309 /* imull */, X86::IMUL32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
8980 { 3309 /* imull */, X86::IMUL32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
8981 { 3309 /* imull */, X86::IMUL32rri8, Convert__Reg1_1__Reg1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
8982 { 3309 /* imull */, X86::IMUL32rri, Convert__Reg1_1__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
8983 { 3309 /* imull */, X86::IMUL32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
8984 { 3309 /* imull */, X86::IMUL32rri8, Convert__Reg1_2__Reg1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32, MCK_GR32 }, },
8985 { 3309 /* imull */, X86::IMUL32rmi8, Convert__Reg1_2__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32, MCK_GR32 }, },
8986 { 3309 /* imull */, X86::IMUL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
8987 { 3309 /* imull */, X86::IMUL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
8988 { 3315 /* imulq */, X86::IMUL64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
8989 { 3315 /* imulq */, X86::IMUL64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
8990 { 3315 /* imulq */, X86::IMUL64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8991 { 3315 /* imulq */, X86::IMUL64rri8, Convert__Reg1_1__Reg1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, },
8992 { 3315 /* imulq */, X86::IMUL64rri32, Convert__Reg1_1__Reg1_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, },
8993 { 3315 /* imulq */, X86::IMUL64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
8994 { 3315 /* imulq */, X86::IMUL64rri8, Convert__Reg1_2__Reg1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64, MCK_GR64 }, },
8995 { 3315 /* imulq */, X86::IMUL64rmi8, Convert__Reg1_2__Mem645_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_Mem64, MCK_GR64 }, },
8996 { 3315 /* imulq */, X86::IMUL64rri32, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, },
8997 { 3315 /* imulq */, X86::IMUL64rmi32, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, },
8998 { 3321 /* imulw */, X86::IMUL16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
8999 { 3321 /* imulw */, X86::IMUL16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
9000 { 3321 /* imulw */, X86::IMUL16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9001 { 3321 /* imulw */, X86::IMUL16rri8, Convert__Reg1_1__Reg1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
9002 { 3321 /* imulw */, X86::IMUL16rri, Convert__Reg1_1__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
9003 { 3321 /* imulw */, X86::IMUL16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
9004 { 3321 /* imulw */, X86::IMUL16rri8, Convert__Reg1_2__Reg1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16, MCK_GR16 }, },
9005 { 3321 /* imulw */, X86::IMUL16rmi8, Convert__Reg1_2__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16, MCK_GR16 }, },
9006 { 3321 /* imulw */, X86::IMUL16rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16, MCK_GR16 }, },
9007 { 3321 /* imulw */, X86::IMUL16rmi, Convert__Reg1_2__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16, MCK_GR16 }, },
9008 { 3330 /* inb */, X86::IN8rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, },
9009 { 3330 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
9010 { 3330 /* inb */, X86::IN8rr, Convert_NoOperands, AMFBS_None, { MCK_DX, MCK_AL }, },
9011 { 3330 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_AL }, },
9012 { 3338 /* incb */, X86::INC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
9013 { 3338 /* incb */, X86::INC8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
9014 { 3343 /* incl */, X86::INC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, },
9015 { 3343 /* incl */, X86::INC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
9016 { 3343 /* incl */, X86::INC32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
9017 { 3348 /* incq */, X86::INC64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
9018 { 3348 /* incq */, X86::INC64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
9019 { 3353 /* incsspd */, X86::INCSSPD, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
9020 { 3361 /* incsspq */, X86::INCSSPQ, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
9021 { 3369 /* incw */, X86::INC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, },
9022 { 3369 /* incw */, X86::INC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
9023 { 3369 /* incw */, X86::INC16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
9024 { 3374 /* inl */, X86::IN32rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, },
9025 { 3374 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
9026 { 3374 /* inl */, X86::IN32rr, Convert_NoOperands, AMFBS_None, { MCK_DX, MCK_EAX }, },
9027 { 3374 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_EAX }, },
9028 { 3382 /* insb */, X86::INSB, Convert__DstIdx81_1, AMFBS_None, { MCK_DX, MCK_DstIdx8 }, },
9029 { 3392 /* insertps */, X86::INSERTPSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9030 { 3392 /* insertps */, X86::INSERTPSrm, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
9031 { 3401 /* insertq */, X86::INSERTQ, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9032 { 3401 /* insertq */, X86::INSERTQI, Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9033 { 3409 /* insl */, X86::INSL, Convert__DstIdx321_1, AMFBS_None, { MCK_DX, MCK_DstIdx32 }, },
9034 { 3414 /* insw */, X86::INSW, Convert__DstIdx161_1, AMFBS_None, { MCK_DX, MCK_DstIdx16 }, },
9035 { 3419 /* int */, X86::INT, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
9036 { 3423 /* int3 */, X86::INT3, Convert_NoOperands, AMFBS_None, { }, },
9037 { 3428 /* into */, X86::INTO, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
9038 { 3433 /* invd */, X86::INVD, Convert_NoOperands, AMFBS_None, { }, },
9039 { 3438 /* invept */, X86::INVEPT32, Convert__Reg1_1__Mem1285_0, AMFBS_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
9040 { 3438 /* invept */, X86::INVEPT64, Convert__Reg1_1__Mem1285_0, AMFBS_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
9041 { 3445 /* invlpg */, X86::INVLPG, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
9042 { 3452 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
9043 { 3452 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
9044 { 3452 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX, MCK_ECX }, },
9045 { 3452 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX, MCK_ECX }, },
9046 { 3460 /* invlpgb */, X86::INVLPGB64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
9047 { 3460 /* invlpgb */, X86::INVLPGB32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX, MCK_EDX }, },
9048 { 3460 /* invlpgb */, X86::INVLPGB64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX, MCK_EDX }, },
9049 { 3468 /* invlpgb} */, X86::INVLPGB32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
9050 { 3477 /* invpcid */, X86::INVPCID32, Convert__Reg1_1__Mem1285_0, AMFBS_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
9051 { 3477 /* invpcid */, X86::INVPCID64, Convert__Reg1_1__Mem1285_0, AMFBS_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
9052 { 3485 /* invvpid */, X86::INVVPID32, Convert__Reg1_1__Mem1285_0, AMFBS_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
9053 { 3485 /* invvpid */, X86::INVVPID64, Convert__Reg1_1__Mem1285_0, AMFBS_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
9054 { 3493 /* inw */, X86::IN16rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, },
9055 { 3493 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
9056 { 3493 /* inw */, X86::IN16rr, Convert_NoOperands, AMFBS_None, { MCK_DX, MCK_AX }, },
9057 { 3493 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_AX }, },
9058 { 3508 /* iretl */, X86::IRET32, Convert_NoOperands, AMFBS_None, { }, },
9059 { 3514 /* iretq */, X86::IRET64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
9060 { 3520 /* iretw */, X86::IRET16, Convert_NoOperands, AMFBS_None, { }, },
9061 { 3526 /* ja */, X86::JCC_1, Convert__AbsMem1_0__imm_95_7, AMFBS_None, { MCK_AbsMem }, },
9062 { 3529 /* jae */, X86::JCC_1, Convert__AbsMem1_0__imm_95_3, AMFBS_None, { MCK_AbsMem }, },
9063 { 3533 /* jb */, X86::JCC_1, Convert__AbsMem1_0__imm_95_2, AMFBS_None, { MCK_AbsMem }, },
9064 { 3536 /* jbe */, X86::JCC_1, Convert__AbsMem1_0__imm_95_6, AMFBS_None, { MCK_AbsMem }, },
9065 { 3540 /* jcxz */, X86::JCXZ, Convert__AbsMem1_0, AMFBS_Not64BitMode, { MCK_AbsMem }, },
9066 { 3545 /* je */, X86::JCC_1, Convert__AbsMem1_0__imm_95_4, AMFBS_None, { MCK_AbsMem }, },
9067 { 3548 /* jecxz */, X86::JECXZ, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, },
9068 { 3554 /* jg */, X86::JCC_1, Convert__AbsMem1_0__imm_95_15, AMFBS_None, { MCK_AbsMem }, },
9069 { 3557 /* jge */, X86::JCC_1, Convert__AbsMem1_0__imm_95_13, AMFBS_None, { MCK_AbsMem }, },
9070 { 3561 /* jl */, X86::JCC_1, Convert__AbsMem1_0__imm_95_12, AMFBS_None, { MCK_AbsMem }, },
9071 { 3564 /* jle */, X86::JCC_1, Convert__AbsMem1_0__imm_95_14, AMFBS_None, { MCK_AbsMem }, },
9072 { 3568 /* jmp */, X86::JMP_1, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, },
9073 { 3568 /* jmp */, X86::JMP16m, Convert__Mem165_1, AMFBS_In16BitMode, { MCK__STAR_, MCK_Mem16 }, },
9074 { 3568 /* jmp */, X86::JMP32m, Convert__Mem325_1, AMFBS_In32BitMode, { MCK__STAR_, MCK_Mem32 }, },
9075 { 3568 /* jmp */, X86::JMP64m, Convert__Mem645_1, AMFBS_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
9076 { 3568 /* jmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, },
9077 { 3568 /* jmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, },
9078 { 3572 /* jmpl */, X86::JMP32r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
9079 { 3572 /* jmpl */, X86::JMP32m, Convert__Mem325_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, },
9080 { 3572 /* jmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, },
9081 { 3577 /* jmpq */, X86::JMP64r, Convert__Reg1_1, AMFBS_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
9082 { 3577 /* jmpq */, X86::JMP64m, Convert__Mem645_1, AMFBS_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
9083 { 3582 /* jmpw */, X86::JMP16r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
9084 { 3582 /* jmpw */, X86::JMP16m, Convert__Mem165_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, },
9085 { 3582 /* jmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, },
9086 { 3587 /* jne */, X86::JCC_1, Convert__AbsMem1_0__imm_95_5, AMFBS_None, { MCK_AbsMem }, },
9087 { 3591 /* jno */, X86::JCC_1, Convert__AbsMem1_0__imm_95_1, AMFBS_None, { MCK_AbsMem }, },
9088 { 3595 /* jnp */, X86::JCC_1, Convert__AbsMem1_0__imm_95_11, AMFBS_None, { MCK_AbsMem }, },
9089 { 3599 /* jns */, X86::JCC_1, Convert__AbsMem1_0__imm_95_9, AMFBS_None, { MCK_AbsMem }, },
9090 { 3603 /* jo */, X86::JCC_1, Convert__AbsMem1_0__imm_95_0, AMFBS_None, { MCK_AbsMem }, },
9091 { 3606 /* jp */, X86::JCC_1, Convert__AbsMem1_0__imm_95_10, AMFBS_None, { MCK_AbsMem }, },
9092 { 3609 /* jrcxz */, X86::JRCXZ, Convert__AbsMem1_0, AMFBS_In64BitMode, { MCK_AbsMem }, },
9093 { 3615 /* js */, X86::JCC_1, Convert__AbsMem1_0__imm_95_8, AMFBS_None, { MCK_AbsMem }, },
9094 { 3618 /* kaddb */, X86::KADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9095 { 3624 /* kaddd */, X86::KADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9096 { 3630 /* kaddq */, X86::KADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9097 { 3636 /* kaddw */, X86::KADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9098 { 3642 /* kandb */, X86::KANDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9099 { 3648 /* kandd */, X86::KANDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9100 { 3654 /* kandnb */, X86::KANDNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9101 { 3661 /* kandnd */, X86::KANDNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9102 { 3668 /* kandnq */, X86::KANDNQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9103 { 3675 /* kandnw */, X86::KANDNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9104 { 3682 /* kandq */, X86::KANDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9105 { 3688 /* kandw */, X86::KANDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9106 { 3694 /* kmovb */, X86::KMOVBkk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9107 { 3694 /* kmovb */, X86::KMOVBrk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_GR32 }, },
9108 { 3694 /* kmovb */, X86::KMOVBmk, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_Mem8 }, },
9109 { 3694 /* kmovb */, X86::KMOVBkr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VK1 }, },
9110 { 3694 /* kmovb */, X86::KMOVBkm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VK1 }, },
9111 { 3700 /* kmovd */, X86::KMOVDkk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9112 { 3700 /* kmovd */, X86::KMOVDrk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_GR32 }, },
9113 { 3700 /* kmovd */, X86::KMOVDmk, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_Mem32 }, },
9114 { 3700 /* kmovd */, X86::KMOVDkr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VK1 }, },
9115 { 3700 /* kmovd */, X86::KMOVDkm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VK1 }, },
9116 { 3706 /* kmovq */, X86::KMOVQkk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9117 { 3706 /* kmovq */, X86::KMOVQrk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_GR64 }, },
9118 { 3706 /* kmovq */, X86::KMOVQmk, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_Mem64 }, },
9119 { 3706 /* kmovq */, X86::KMOVQkr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VK1 }, },
9120 { 3706 /* kmovq */, X86::KMOVQkm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VK1 }, },
9121 { 3712 /* kmovw */, X86::KMOVWkk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9122 { 3712 /* kmovw */, X86::KMOVWrk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_GR32 }, },
9123 { 3712 /* kmovw */, X86::KMOVWmk, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_Mem16 }, },
9124 { 3712 /* kmovw */, X86::KMOVWkr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VK1 }, },
9125 { 3712 /* kmovw */, X86::KMOVWkm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VK1 }, },
9126 { 3718 /* knotb */, X86::KNOTBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9127 { 3724 /* knotd */, X86::KNOTDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9128 { 3730 /* knotq */, X86::KNOTQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9129 { 3736 /* knotw */, X86::KNOTWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9130 { 3742 /* korb */, X86::KORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9131 { 3747 /* kord */, X86::KORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9132 { 3752 /* korq */, X86::KORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9133 { 3757 /* kortestb */, X86::KORTESTBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9134 { 3766 /* kortestd */, X86::KORTESTDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9135 { 3775 /* kortestq */, X86::KORTESTQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9136 { 3784 /* kortestw */, X86::KORTESTWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9137 { 3793 /* korw */, X86::KORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9138 { 3798 /* kshiftlb */, X86::KSHIFTLBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
9139 { 3807 /* kshiftld */, X86::KSHIFTLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
9140 { 3816 /* kshiftlq */, X86::KSHIFTLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
9141 { 3825 /* kshiftlw */, X86::KSHIFTLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
9142 { 3834 /* kshiftrb */, X86::KSHIFTRBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
9143 { 3843 /* kshiftrd */, X86::KSHIFTRDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
9144 { 3852 /* kshiftrq */, X86::KSHIFTRQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
9145 { 3861 /* kshiftrw */, X86::KSHIFTRWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
9146 { 3870 /* ktestb */, X86::KTESTBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9147 { 3877 /* ktestd */, X86::KTESTDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9148 { 3884 /* ktestq */, X86::KTESTQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9149 { 3891 /* ktestw */, X86::KTESTWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
9150 { 3898 /* kunpckbw */, X86::KUNPCKBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9151 { 3907 /* kunpckdq */, X86::KUNPCKDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9152 { 3916 /* kunpckwd */, X86::KUNPCKWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9153 { 3925 /* kxnorb */, X86::KXNORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9154 { 3932 /* kxnord */, X86::KXNORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9155 { 3939 /* kxnorq */, X86::KXNORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9156 { 3946 /* kxnorw */, X86::KXNORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9157 { 3953 /* kxorb */, X86::KXORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9158 { 3959 /* kxord */, X86::KXORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9159 { 3965 /* kxorq */, X86::KXORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9160 { 3971 /* kxorw */, X86::KXORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
9161 { 3977 /* lahf */, X86::LAHF, Convert_NoOperands, AMFBS_None, { }, },
9162 { 3986 /* larl */, X86::LAR32rr, Convert__Reg1_1__GR16orGR32orGR641_0, AMFBS_None, { MCK_GR16orGR32orGR64, MCK_GR32 }, },
9163 { 3986 /* larl */, X86::LAR32rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR32 }, },
9164 { 3991 /* larq */, X86::LAR64rr, Convert__Reg1_1__GR16orGR32orGR641_0, AMFBS_None, { MCK_GR16orGR32orGR64, MCK_GR64 }, },
9165 { 3991 /* larq */, X86::LAR64rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR64 }, },
9166 { 3996 /* larw */, X86::LAR16rr, Convert__Reg1_1__GR16orGR32orGR641_0, AMFBS_None, { MCK_GR16orGR32orGR64, MCK_GR16 }, },
9167 { 3996 /* larw */, X86::LAR16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
9168 { 4001 /* lcall */, X86::FARCALL32m, Convert__Mem5_1, AMFBS_Not16BitMode, { MCK__STAR_, MCK_Mem }, },
9169 { 4001 /* lcall */, X86::FARCALL16m, Convert__Mem5_1, AMFBS_In16BitMode, { MCK__STAR_, MCK_Mem }, },
9170 { 4001 /* lcall */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, },
9171 { 4001 /* lcall */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, },
9172 { 4007 /* lcalll */, X86::FARCALL32m, Convert__Mem5_1, AMFBS_None, { MCK__STAR_, MCK_Mem }, },
9173 { 4007 /* lcalll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, },
9174 { 4014 /* lcallq */, X86::FARCALL64m, Convert__Mem5_1, AMFBS_None, { MCK__STAR_, MCK_Mem }, },
9175 { 4021 /* lcallw */, X86::FARCALL16m, Convert__Mem5_1, AMFBS_None, { MCK__STAR_, MCK_Mem }, },
9176 { 4021 /* lcallw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, },
9177 { 4028 /* lddqu */, X86::LDDQUrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9178 { 4034 /* ldmxcsr */, X86::LDMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
9179 { 4046 /* ldsl */, X86::LDS32rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
9180 { 4051 /* ldsw */, X86::LDS16rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
9181 { 4056 /* ldtilecfg */, X86::LDTILECFG, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
9182 { 4070 /* leal */, X86::LEA32r, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
9183 { 4070 /* leal */, X86::LEA64_32r, Convert__Reg1_1__Mem5_0, AMFBS_In64BitMode, { MCK_Mem, MCK_GR32 }, },
9184 { 4075 /* leaq */, X86::LEA64r, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR64 }, },
9185 { 4080 /* leave */, X86::LEAVE, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
9186 { 4080 /* leave */, X86::LEAVE64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
9187 { 4086 /* leaw */, X86::LEA16r, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR16 }, },
9188 { 4095 /* lesl */, X86::LES32rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
9189 { 4100 /* lesw */, X86::LES16rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
9190 { 4105 /* lfence */, X86::LFENCE, Convert_NoOperands, AMFBS_None, { }, },
9191 { 4116 /* lfsl */, X86::LFS32rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR32 }, },
9192 { 4121 /* lfsq */, X86::LFS64rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR64 }, },
9193 { 4126 /* lfsw */, X86::LFS16rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR16 }, },
9194 { 4142 /* lgdtl */, X86::LGDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
9195 { 4148 /* lgdtq */, X86::LGDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
9196 { 4154 /* lgdtw */, X86::LGDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
9197 { 4164 /* lgsl */, X86::LGS32rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR32 }, },
9198 { 4169 /* lgsq */, X86::LGS64rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR64 }, },
9199 { 4174 /* lgsw */, X86::LGS16rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR16 }, },
9200 { 4190 /* lidtl */, X86::LIDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
9201 { 4196 /* lidtq */, X86::LIDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
9202 { 4202 /* lidtw */, X86::LIDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
9203 { 4208 /* ljmp */, X86::FARJMP32m, Convert__Mem5_1, AMFBS_Not16BitMode, { MCK__STAR_, MCK_Mem }, },
9204 { 4208 /* ljmp */, X86::FARJMP16m, Convert__Mem5_1, AMFBS_In16BitMode, { MCK__STAR_, MCK_Mem }, },
9205 { 4208 /* ljmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, },
9206 { 4208 /* ljmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, },
9207 { 4213 /* ljmpl */, X86::FARJMP32m, Convert__Mem5_1, AMFBS_None, { MCK__STAR_, MCK_Mem }, },
9208 { 4213 /* ljmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, },
9209 { 4219 /* ljmpq */, X86::FARJMP64m, Convert__Mem5_1, AMFBS_In64BitMode, { MCK__STAR_, MCK_Mem }, },
9210 { 4225 /* ljmpw */, X86::FARJMP16m, Convert__Mem5_1, AMFBS_None, { MCK__STAR_, MCK_Mem }, },
9211 { 4225 /* ljmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, },
9212 { 4236 /* lldtw */, X86::LLDT16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
9213 { 4236 /* lldtw */, X86::LLDT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
9214 { 4242 /* llwpcb */, X86::LLWPCB, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
9215 { 4242 /* llwpcb */, X86::LLWPCB64, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
9216 { 4254 /* lmsww */, X86::LMSW16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
9217 { 4254 /* lmsww */, X86::LMSW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
9218 { 4260 /* loadiwkey */, X86::LOADIWKEY, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9219 { 4270 /* lock */, X86::LOCK_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
9220 { 4275 /* lods */, X86::LODSW, Convert__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16, MCK_AX }, },
9221 { 4275 /* lods */, X86::LODSL, Convert__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32, MCK_EAX }, },
9222 { 4275 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64, MCK_RAX }, },
9223 { 4275 /* lods */, X86::LODSB, Convert__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8, MCK_AL }, },
9224 { 4280 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8 }, },
9225 { 4280 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8, MCK_AL }, },
9226 { 4292 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32 }, },
9227 { 4292 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32, MCK_EAX }, },
9228 { 4298 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64 }, },
9229 { 4298 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64, MCK_RAX }, },
9230 { 4304 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16 }, },
9231 { 4304 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16, MCK_AX }, },
9232 { 4310 /* loop */, X86::LOOP, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, },
9233 { 4315 /* loope */, X86::LOOPE, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, },
9234 { 4321 /* loopne */, X86::LOOPNE, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, },
9235 { 4328 /* lretl */, X86::LRETL, Convert_NoOperands, AMFBS_None, { }, },
9236 { 4328 /* lretl */, X86::LRETIL, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
9237 { 4334 /* lretq */, X86::LRETQ, Convert_NoOperands, AMFBS_In64BitMode, { }, },
9238 { 4334 /* lretq */, X86::LRETIQ, Convert__Imm1_0, AMFBS_In64BitMode, { MCK_Imm }, },
9239 { 4340 /* lretw */, X86::LRETW, Convert_NoOperands, AMFBS_None, { }, },
9240 { 4340 /* lretw */, X86::LRETIW, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
9241 { 4350 /* lsll */, X86::LSL32rr, Convert__Reg1_1__GR16orGR32orGR641_0, AMFBS_None, { MCK_GR16orGR32orGR64, MCK_GR32 }, },
9242 { 4350 /* lsll */, X86::LSL32rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR32 }, },
9243 { 4355 /* lslq */, X86::LSL64rr, Convert__Reg1_1__GR16orGR32orGR641_0, AMFBS_None, { MCK_GR16orGR32orGR64, MCK_GR64 }, },
9244 { 4355 /* lslq */, X86::LSL64rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR64 }, },
9245 { 4360 /* lslw */, X86::LSL16rr, Convert__Reg1_1__GR16orGR32orGR641_0, AMFBS_None, { MCK_GR16orGR32orGR64, MCK_GR16 }, },
9246 { 4360 /* lslw */, X86::LSL16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
9247 { 4369 /* lssl */, X86::LSS32rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR32 }, },
9248 { 4374 /* lssq */, X86::LSS64rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR64 }, },
9249 { 4379 /* lssw */, X86::LSS16rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR16 }, },
9250 { 4388 /* ltrw */, X86::LTRr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
9251 { 4388 /* ltrw */, X86::LTRm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
9252 { 4393 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
9253 { 4393 /* lwpins */, X86::LWPINS64rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR64 }, },
9254 { 4393 /* lwpins */, X86::LWPINS32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
9255 { 4393 /* lwpins */, X86::LWPINS64rmi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR64 }, },
9256 { 4400 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
9257 { 4400 /* lwpval */, X86::LWPVAL64rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR64 }, },
9258 { 4400 /* lwpval */, X86::LWPVAL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
9259 { 4400 /* lwpval */, X86::LWPVAL64rmi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR64 }, },
9260 { 4413 /* lzcntl */, X86::LZCNT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
9261 { 4413 /* lzcntl */, X86::LZCNT32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
9262 { 4420 /* lzcntq */, X86::LZCNT64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
9263 { 4420 /* lzcntq */, X86::LZCNT64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
9264 { 4427 /* lzcntw */, X86::LZCNT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9265 { 4427 /* lzcntw */, X86::LZCNT16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
9266 { 4434 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
9267 { 4434 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, },
9268 { 4445 /* maskmovq */, X86::MMX_MASKMOVQ, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_VR64, MCK_VR64 }, },
9269 { 4445 /* maskmovq */, X86::MMX_MASKMOVQ64, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_VR64, MCK_VR64 }, },
9270 { 4454 /* maxpd */, X86::MAXPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9271 { 4454 /* maxpd */, X86::MAXPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9272 { 4460 /* maxps */, X86::MAXPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9273 { 4460 /* maxps */, X86::MAXPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9274 { 4466 /* maxsd */, X86::MAXSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9275 { 4466 /* maxsd */, X86::MAXSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9276 { 4472 /* maxss */, X86::MAXSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9277 { 4472 /* maxss */, X86::MAXSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9278 { 4478 /* mfence */, X86::MFENCE, Convert_NoOperands, AMFBS_None, { }, },
9279 { 4485 /* minpd */, X86::MINPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9280 { 4485 /* minpd */, X86::MINPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9281 { 4491 /* minps */, X86::MINPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9282 { 4491 /* minps */, X86::MINPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9283 { 4497 /* minsd */, X86::MINSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9284 { 4497 /* minsd */, X86::MINSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9285 { 4503 /* minss */, X86::MINSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9286 { 4503 /* minss */, X86::MINSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9287 { 4509 /* monitor */, X86::MONITOR32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
9288 { 4509 /* monitor */, X86::MONITOR64rrr, Convert_NoOperands, AMFBS_In64BitMode, { }, },
9289 { 4509 /* monitor */, X86::MONITOR32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, },
9290 { 4509 /* monitor */, X86::MONITOR64rrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, },
9291 { 4517 /* monitorx */, X86::MONITORX32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
9292 { 4517 /* monitorx */, X86::MONITORX64rrr, Convert_NoOperands, AMFBS_In64BitMode, { }, },
9293 { 4517 /* monitorx */, X86::MONITORX32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, },
9294 { 4517 /* monitorx */, X86::MONITORX64rrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, },
9295 { 4526 /* montmul */, X86::MONTMUL, Convert_NoOperands, AMFBS_None, { }, },
9296 { 4538 /* mov.s */, X86::MOV16rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9297 { 4538 /* mov.s */, X86::MOV32rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
9298 { 4538 /* mov.s */, X86::MOV64rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
9299 { 4538 /* mov.s */, X86::MOV8rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
9300 { 4551 /* movabsb */, X86::MOV8o64a, Convert__MemOffs64_82_1, AMFBS_None, { MCK_AL, MCK_MemOffs64_8 }, },
9301 { 4551 /* movabsb */, X86::MOV8ao64, Convert__MemOffs64_82_0, AMFBS_None, { MCK_MemOffs64_8, MCK_AL }, },
9302 { 4559 /* movabsl */, X86::MOV32o64a, Convert__MemOffs64_322_1, AMFBS_None, { MCK_EAX, MCK_MemOffs64_32 }, },
9303 { 4559 /* movabsl */, X86::MOV32ao64, Convert__MemOffs64_322_0, AMFBS_None, { MCK_MemOffs64_32, MCK_EAX }, },
9304 { 4567 /* movabsq */, X86::MOV64o64a, Convert__MemOffs64_642_1, AMFBS_None, { MCK_RAX, MCK_MemOffs64_64 }, },
9305 { 4567 /* movabsq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR64 }, },
9306 { 4567 /* movabsq */, X86::MOV64ao64, Convert__MemOffs64_642_0, AMFBS_None, { MCK_MemOffs64_64, MCK_RAX }, },
9307 { 4575 /* movabsw */, X86::MOV16o64a, Convert__MemOffs64_162_1, AMFBS_None, { MCK_AX, MCK_MemOffs64_16 }, },
9308 { 4575 /* movabsw */, X86::MOV16ao64, Convert__MemOffs64_162_0, AMFBS_None, { MCK_MemOffs64_16, MCK_AX }, },
9309 { 4583 /* movapd */, X86::MOVAPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9310 { 4583 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9311 { 4583 /* movapd */, X86::MOVAPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9312 { 4590 /* movapd.s */, X86::MOVAPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9313 { 4599 /* movaps */, X86::MOVAPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9314 { 4599 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9315 { 4599 /* movaps */, X86::MOVAPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9316 { 4606 /* movaps.s */, X86::MOVAPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9317 { 4615 /* movb */, X86::MOV8o16a, Convert__MemOffs16_82_1, AMFBS_None, { MCK_AL, MCK_MemOffs16_8 }, },
9318 { 4615 /* movb */, X86::MOV8o32a, Convert__MemOffs32_82_1, AMFBS_None, { MCK_AL, MCK_MemOffs32_8 }, },
9319 { 4615 /* movb */, X86::MOV8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
9320 { 4615 /* movb */, X86::MOV8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
9321 { 4615 /* movb */, X86::MOV8ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
9322 { 4615 /* movb */, X86::MOV8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, },
9323 { 4615 /* movb */, X86::MOV8ao16, Convert__MemOffs16_82_0, AMFBS_None, { MCK_MemOffs16_8, MCK_AL }, },
9324 { 4615 /* movb */, X86::MOV8ao32, Convert__MemOffs32_82_0, AMFBS_None, { MCK_MemOffs32_8, MCK_AL }, },
9325 { 4615 /* movb */, X86::MOV8rm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
9326 { 4620 /* movb.s */, X86::MOV8rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
9327 { 4633 /* movbel */, X86::MOVBE32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
9328 { 4633 /* movbel */, X86::MOVBE32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
9329 { 4640 /* movbeq */, X86::MOVBE64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
9330 { 4640 /* movbeq */, X86::MOVBE64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
9331 { 4647 /* movbew */, X86::MOVBE16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
9332 { 4647 /* movbew */, X86::MOVBE16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
9333 { 4654 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_GR32 }, },
9334 { 4654 /* movd */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_GR64 }, },
9335 { 4654 /* movd */, X86::MMX_MOVD64mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_Mem32 }, },
9336 { 4654 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
9337 { 4654 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
9338 { 4654 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
9339 { 4654 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR64 }, },
9340 { 4654 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
9341 { 4654 /* movd */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR64 }, },
9342 { 4654 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
9343 { 4654 /* movd */, X86::MMX_MOVD64rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR64 }, },
9344 { 4654 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9345 { 4659 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9346 { 4659 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9347 { 4667 /* movdir64b */, X86::MOVDIR64B16, Convert__Reg1_1__Mem5125_0, AMFBS_Not64BitMode, { MCK_Mem512, MCK_GR16 }, },
9348 { 4667 /* movdir64b */, X86::MOVDIR64B32, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_GR32 }, },
9349 { 4667 /* movdir64b */, X86::MOVDIR64B64, Convert__Reg1_1__Mem5125_0, AMFBS_In64BitMode, { MCK_Mem512, MCK_GR64 }, },
9350 { 4677 /* movdiri */, X86::MOVDIRI32, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
9351 { 4677 /* movdiri */, X86::MOVDIRI64, Convert__Mem645_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem64 }, },
9352 { 4685 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
9353 { 4693 /* movdqa */, X86::MOVDQArr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9354 { 4693 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9355 { 4693 /* movdqa */, X86::MOVDQArm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9356 { 4700 /* movdqa.s */, X86::MOVDQArr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9357 { 4709 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9358 { 4709 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9359 { 4709 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9360 { 4716 /* movdqu.s */, X86::MOVDQUrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9361 { 4725 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9362 { 4733 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
9363 { 4733 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9364 { 4740 /* movhps */, X86::MOVHPSmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
9365 { 4740 /* movhps */, X86::MOVHPSrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9366 { 4747 /* movl */, X86::MOV32o16a, Convert__MemOffs16_322_1, AMFBS_None, { MCK_EAX, MCK_MemOffs16_32 }, },
9367 { 4747 /* movl */, X86::MOV32o32a, Convert__MemOffs32_322_1, AMFBS_None, { MCK_EAX, MCK_MemOffs32_32 }, },
9368 { 4747 /* movl */, X86::MOV32rs, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR32 }, },
9369 { 4747 /* movl */, X86::MOV32rc, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, },
9370 { 4747 /* movl */, X86::MOV32rd, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, },
9371 { 4747 /* movl */, X86::MOV32sr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_SEGMENT_REG }, },
9372 { 4747 /* movl */, X86::MOV32cr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, },
9373 { 4747 /* movl */, X86::MOV32dr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, },
9374 { 4747 /* movl */, X86::MOV32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
9375 { 4747 /* movl */, X86::MOV32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
9376 { 4747 /* movl */, X86::MOV32ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
9377 { 4747 /* movl */, X86::MOV32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, },
9378 { 4747 /* movl */, X86::MOV32ao16, Convert__MemOffs16_322_0, AMFBS_None, { MCK_MemOffs16_32, MCK_EAX }, },
9379 { 4747 /* movl */, X86::MOV32ao32, Convert__MemOffs32_322_0, AMFBS_None, { MCK_MemOffs32_32, MCK_EAX }, },
9380 { 4747 /* movl */, X86::MOV32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
9381 { 4752 /* movl.s */, X86::MOV32rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
9382 { 4759 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9383 { 4767 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
9384 { 4767 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9385 { 4774 /* movlps */, X86::MOVLPSmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
9386 { 4774 /* movlps */, X86::MOVLPSrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9387 { 4781 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
9388 { 4790 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
9389 { 4799 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9390 { 4807 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9391 { 4823 /* movntil */, X86::MOVNTImr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
9392 { 4831 /* movntiq */, X86::MOVNTI_64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
9393 { 4839 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9394 { 4847 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9395 { 4855 /* movntq */, X86::MMX_MOVNTQmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
9396 { 4862 /* movntsd */, X86::MOVNTSD, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
9397 { 4870 /* movntss */, X86::MOVNTSS, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
9398 { 4878 /* movq */, X86::MOV64o32a, Convert__MemOffs32_642_1, AMFBS_None, { MCK_RAX, MCK_MemOffs32_64 }, },
9399 { 4878 /* movq */, X86::MOV64rs, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR64 }, },
9400 { 4878 /* movq */, X86::MMX_MOVQ64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9401 { 4878 /* movq */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_GR64 }, },
9402 { 4878 /* movq */, X86::MMX_MOVQ64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
9403 { 4878 /* movq */, X86::MOV64rc, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_CONTROL_REG, MCK_GR64 }, },
9404 { 4878 /* movq */, X86::MOV64rd, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_DEBUG_REG, MCK_GR64 }, },
9405 { 4878 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9406 { 4878 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
9407 { 4878 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
9408 { 4878 /* movq */, X86::MOV64sr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_SEGMENT_REG }, },
9409 { 4878 /* movq */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR64 }, },
9410 { 4878 /* movq */, X86::MOV64cr, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_CONTROL_REG }, },
9411 { 4878 /* movq */, X86::MOV64dr, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_DEBUG_REG }, },
9412 { 4878 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
9413 { 4878 /* movq */, X86::MOV64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
9414 { 4878 /* movq */, X86::MOV64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
9415 { 4878 /* movq */, X86::MOV64ri32, Convert__Reg1_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, },
9416 { 4878 /* movq */, X86::MOV64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
9417 { 4878 /* movq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR64 }, },
9418 { 4878 /* movq */, X86::MOV64ao32, Convert__MemOffs32_642_0, AMFBS_None, { MCK_MemOffs32_64, MCK_RAX }, },
9419 { 4878 /* movq */, X86::MMX_MOVQ64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9420 { 4878 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9421 { 4878 /* movq */, X86::MOV64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
9422 { 4883 /* movq.s */, X86::MMX_MOVQ64rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9423 { 4883 /* movq.s */, X86::MOVPQI2QIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9424 { 4883 /* movq.s */, X86::MOV64rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
9425 { 4890 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
9426 { 4903 /* movsb */, X86::MOVSB, Convert__DstIdx81_1__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8, MCK_DstIdx8 }, },
9427 { 4909 /* movsbl */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
9428 { 4909 /* movsbl */, X86::MOVSX32rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR32 }, },
9429 { 4916 /* movsbq */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR64 }, },
9430 { 4916 /* movsbq */, X86::MOVSX64rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR64 }, },
9431 { 4923 /* movsbw */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, },
9432 { 4923 /* movsbw */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR16 }, },
9433 { 4930 /* movsd */, X86::MOVSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9434 { 4930 /* movsd */, X86::MOVSDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
9435 { 4930 /* movsd */, X86::MOVSDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9436 { 4936 /* movsd.s */, X86::MOVSDrr_REV, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9437 { 4944 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9438 { 4944 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9439 { 4953 /* movsl */, X86::MOVSL, Convert__DstIdx321_1__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32, MCK_DstIdx32 }, },
9440 { 4959 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9441 { 4959 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9442 { 4968 /* movslq */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR32, MCK_GR64 }, },
9443 { 4968 /* movslq */, X86::MOVSX64rm32, Convert__Reg1_1__Mem325_0, AMFBS_In64BitMode, { MCK_Mem32, MCK_GR64 }, },
9444 { 4975 /* movsq */, X86::MOVSQ, Convert__DstIdx641_1__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, },
9445 { 4981 /* movss */, X86::MOVSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9446 { 4981 /* movss */, X86::MOVSSmr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
9447 { 4981 /* movss */, X86::MOVSSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9448 { 4987 /* movss.s */, X86::MOVSSrr_REV, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9449 { 4995 /* movsw */, X86::MOVSW, Convert__DstIdx161_1__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16, MCK_DstIdx16 }, },
9450 { 5001 /* movswl */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, },
9451 { 5001 /* movswl */, X86::MOVSX32rm16, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR32 }, },
9452 { 5008 /* movswq */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR64 }, },
9453 { 5008 /* movswq */, X86::MOVSX64rm16, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR64 }, },
9454 { 5015 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, },
9455 { 5015 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR64 }, },
9456 { 5015 /* movsx */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR64 }, },
9457 { 5015 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, },
9458 { 5015 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
9459 { 5015 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR64 }, },
9460 { 5015 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR16 }, },
9461 { 5028 /* movupd */, X86::MOVUPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9462 { 5028 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9463 { 5028 /* movupd */, X86::MOVUPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9464 { 5035 /* movupd.s */, X86::MOVUPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9465 { 5044 /* movups */, X86::MOVUPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9466 { 5044 /* movups */, X86::MOVUPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9467 { 5044 /* movups */, X86::MOVUPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9468 { 5051 /* movups.s */, X86::MOVUPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9469 { 5060 /* movw */, X86::MOV16o16a, Convert__MemOffs16_162_1, AMFBS_None, { MCK_AX, MCK_MemOffs16_16 }, },
9470 { 5060 /* movw */, X86::MOV16o32a, Convert__MemOffs32_162_1, AMFBS_None, { MCK_AX, MCK_MemOffs32_16 }, },
9471 { 5060 /* movw */, X86::MOV16rs, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR16 }, },
9472 { 5060 /* movw */, X86::MOV16ms, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_SEGMENT_REG, MCK_Mem16 }, },
9473 { 5060 /* movw */, X86::MOV16sr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_SEGMENT_REG }, },
9474 { 5060 /* movw */, X86::MOV16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9475 { 5060 /* movw */, X86::MOV16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
9476 { 5060 /* movw */, X86::MOV16ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
9477 { 5060 /* movw */, X86::MOV16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, },
9478 { 5060 /* movw */, X86::MOV16ao16, Convert__MemOffs16_162_0, AMFBS_None, { MCK_MemOffs16_16, MCK_AX }, },
9479 { 5060 /* movw */, X86::MOV16ao32, Convert__MemOffs32_162_0, AMFBS_None, { MCK_MemOffs32_16, MCK_AX }, },
9480 { 5060 /* movw */, X86::MOV16sm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_SEGMENT_REG }, },
9481 { 5060 /* movw */, X86::MOV16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
9482 { 5065 /* movw.s */, X86::MOV16rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9483 { 5072 /* movzbl */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
9484 { 5072 /* movzbl */, X86::MOVZX32rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR32 }, },
9485 { 5079 /* movzbq */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR64 }, },
9486 { 5079 /* movzbq */, X86::MOVZX64rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR64 }, },
9487 { 5086 /* movzbw */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, },
9488 { 5086 /* movzbw */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR16 }, },
9489 { 5093 /* movzwl */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, },
9490 { 5093 /* movzwl */, X86::MOVZX32rm16, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR32 }, },
9491 { 5100 /* movzwq */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR64 }, },
9492 { 5100 /* movzwq */, X86::MOVZX64rm16, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR64 }, },
9493 { 5107 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, },
9494 { 5107 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR64 }, },
9495 { 5107 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, },
9496 { 5107 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
9497 { 5107 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR64 }, },
9498 { 5107 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR16 }, },
9499 { 5113 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9500 { 5113 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9501 { 5125 /* mulb */, X86::MUL8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
9502 { 5125 /* mulb */, X86::MUL8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
9503 { 5130 /* mull */, X86::MUL32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
9504 { 5130 /* mull */, X86::MUL32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
9505 { 5135 /* mulpd */, X86::MULPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9506 { 5135 /* mulpd */, X86::MULPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9507 { 5141 /* mulps */, X86::MULPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9508 { 5141 /* mulps */, X86::MULPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9509 { 5147 /* mulq */, X86::MUL64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
9510 { 5147 /* mulq */, X86::MUL64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
9511 { 5152 /* mulsd */, X86::MULSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9512 { 5152 /* mulsd */, X86::MULSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9513 { 5158 /* mulss */, X86::MULSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9514 { 5158 /* mulss */, X86::MULSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9515 { 5164 /* mulw */, X86::MUL16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
9516 { 5164 /* mulw */, X86::MUL16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
9517 { 5174 /* mulxl */, X86::MULX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
9518 { 5174 /* mulxl */, X86::MULX32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
9519 { 5180 /* mulxq */, X86::MULX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
9520 { 5180 /* mulxq */, X86::MULX64rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
9521 { 5186 /* mwait */, X86::MWAITrr, Convert_NoOperands, AMFBS_None, { }, },
9522 { 5186 /* mwait */, X86::MWAITrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX, MCK_ECX }, },
9523 { 5186 /* mwait */, X86::MWAITrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX, MCK_RCX }, },
9524 { 5192 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, AMFBS_None, { }, },
9525 { 5192 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EBX }, },
9526 { 5192 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RBX }, },
9527 { 5203 /* negb */, X86::NEG8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
9528 { 5203 /* negb */, X86::NEG8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
9529 { 5208 /* negl */, X86::NEG32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
9530 { 5208 /* negl */, X86::NEG32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
9531 { 5213 /* negq */, X86::NEG64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
9532 { 5213 /* negq */, X86::NEG64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
9533 { 5218 /* negw */, X86::NEG16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
9534 { 5218 /* negw */, X86::NEG16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
9535 { 5223 /* nop */, X86::NOOP, Convert_NoOperands, AMFBS_None, { }, },
9536 { 5227 /* nopl */, X86::NOOPLr, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
9537 { 5227 /* nopl */, X86::NOOPL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
9538 { 5232 /* nopq */, X86::NOOPQr, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
9539 { 5232 /* nopq */, X86::NOOPQ, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
9540 { 5237 /* nopw */, X86::NOOPWr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
9541 { 5237 /* nopw */, X86::NOOPW, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
9542 { 5246 /* notb */, X86::NOT8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
9543 { 5246 /* notb */, X86::NOT8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
9544 { 5251 /* notl */, X86::NOT32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
9545 { 5251 /* notl */, X86::NOT32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
9546 { 5256 /* notq */, X86::NOT64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
9547 { 5256 /* notq */, X86::NOT64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
9548 { 5261 /* notw */, X86::NOT16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
9549 { 5261 /* notw */, X86::NOT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
9550 { 5269 /* orb */, X86::OR8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
9551 { 5269 /* orb */, X86::OR8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
9552 { 5269 /* orb */, X86::OR8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, },
9553 { 5269 /* orb */, X86::OR8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
9554 { 5269 /* orb */, X86::OR8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, },
9555 { 5269 /* orb */, X86::OR8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
9556 { 5273 /* orl */, X86::OR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
9557 { 5273 /* orl */, X86::OR32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
9558 { 5273 /* orl */, X86::OR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, },
9559 { 5273 /* orl */, X86::OR32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
9560 { 5273 /* orl */, X86::OR32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, },
9561 { 5273 /* orl */, X86::OR32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, },
9562 { 5273 /* orl */, X86::OR32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
9563 { 5273 /* orl */, X86::OR32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, },
9564 { 5273 /* orl */, X86::OR32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
9565 { 5277 /* orpd */, X86::ORPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9566 { 5277 /* orpd */, X86::ORPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9567 { 5282 /* orps */, X86::ORPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9568 { 5282 /* orps */, X86::ORPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9569 { 5287 /* orq */, X86::OR64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
9570 { 5287 /* orq */, X86::OR64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
9571 { 5287 /* orq */, X86::OR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, },
9572 { 5287 /* orq */, X86::OR64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, },
9573 { 5287 /* orq */, X86::OR64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
9574 { 5287 /* orq */, X86::OR64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, },
9575 { 5287 /* orq */, X86::OR64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, },
9576 { 5287 /* orq */, X86::OR64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
9577 { 5287 /* orq */, X86::OR64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
9578 { 5291 /* orw */, X86::OR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9579 { 5291 /* orw */, X86::OR16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
9580 { 5291 /* orw */, X86::OR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, },
9581 { 5291 /* orw */, X86::OR16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
9582 { 5291 /* orw */, X86::OR16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, },
9583 { 5291 /* orw */, X86::OR16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, },
9584 { 5291 /* orw */, X86::OR16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
9585 { 5291 /* orw */, X86::OR16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, },
9586 { 5291 /* orw */, X86::OR16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
9587 { 5299 /* outb */, X86::OUT8rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, },
9588 { 5299 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
9589 { 5299 /* outb */, X86::OUT8rr, Convert_NoOperands, AMFBS_None, { MCK_AL, MCK_DX }, },
9590 { 5299 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_1, AMFBS_None, { MCK_AL, MCK_ImmUnsignedi8 }, },
9591 { 5304 /* outl */, X86::OUT32rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, },
9592 { 5304 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
9593 { 5304 /* outl */, X86::OUT32rr, Convert_NoOperands, AMFBS_None, { MCK_EAX, MCK_DX }, },
9594 { 5304 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_1, AMFBS_None, { MCK_EAX, MCK_ImmUnsignedi8 }, },
9595 { 5314 /* outsb */, X86::OUTSB, Convert__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8, MCK_DX }, },
9596 { 5326 /* outsl */, X86::OUTSL, Convert__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32, MCK_DX }, },
9597 { 5332 /* outsw */, X86::OUTSW, Convert__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16, MCK_DX }, },
9598 { 5338 /* outw */, X86::OUT16rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, },
9599 { 5338 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
9600 { 5338 /* outw */, X86::OUT16rr, Convert_NoOperands, AMFBS_None, { MCK_AX, MCK_DX }, },
9601 { 5338 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_1, AMFBS_None, { MCK_AX, MCK_ImmUnsignedi8 }, },
9602 { 5343 /* pabsb */, X86::MMX_PABSBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9603 { 5343 /* pabsb */, X86::PABSBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9604 { 5343 /* pabsb */, X86::PABSBrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9605 { 5343 /* pabsb */, X86::MMX_PABSBrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9606 { 5349 /* pabsd */, X86::MMX_PABSDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9607 { 5349 /* pabsd */, X86::PABSDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9608 { 5349 /* pabsd */, X86::PABSDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9609 { 5349 /* pabsd */, X86::MMX_PABSDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9610 { 5355 /* pabsw */, X86::MMX_PABSWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9611 { 5355 /* pabsw */, X86::PABSWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9612 { 5355 /* pabsw */, X86::PABSWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9613 { 5355 /* pabsw */, X86::MMX_PABSWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9614 { 5361 /* packssdw */, X86::MMX_PACKSSDWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9615 { 5361 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9616 { 5361 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9617 { 5361 /* packssdw */, X86::MMX_PACKSSDWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9618 { 5370 /* packsswb */, X86::MMX_PACKSSWBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9619 { 5370 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9620 { 5370 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9621 { 5370 /* packsswb */, X86::MMX_PACKSSWBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9622 { 5379 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9623 { 5379 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9624 { 5388 /* packuswb */, X86::MMX_PACKUSWBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9625 { 5388 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9626 { 5388 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9627 { 5388 /* packuswb */, X86::MMX_PACKUSWBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9628 { 5397 /* paddb */, X86::MMX_PADDBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9629 { 5397 /* paddb */, X86::PADDBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9630 { 5397 /* paddb */, X86::PADDBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9631 { 5397 /* paddb */, X86::MMX_PADDBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9632 { 5403 /* paddd */, X86::MMX_PADDDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9633 { 5403 /* paddd */, X86::PADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9634 { 5403 /* paddd */, X86::PADDDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9635 { 5403 /* paddd */, X86::MMX_PADDDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9636 { 5409 /* paddq */, X86::MMX_PADDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9637 { 5409 /* paddq */, X86::PADDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9638 { 5409 /* paddq */, X86::PADDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9639 { 5409 /* paddq */, X86::MMX_PADDQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9640 { 5415 /* paddsb */, X86::MMX_PADDSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9641 { 5415 /* paddsb */, X86::PADDSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9642 { 5415 /* paddsb */, X86::PADDSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9643 { 5415 /* paddsb */, X86::MMX_PADDSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9644 { 5422 /* paddsw */, X86::MMX_PADDSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9645 { 5422 /* paddsw */, X86::PADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9646 { 5422 /* paddsw */, X86::PADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9647 { 5422 /* paddsw */, X86::MMX_PADDSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9648 { 5429 /* paddusb */, X86::MMX_PADDUSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9649 { 5429 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9650 { 5429 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9651 { 5429 /* paddusb */, X86::MMX_PADDUSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9652 { 5437 /* paddusw */, X86::MMX_PADDUSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9653 { 5437 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9654 { 5437 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9655 { 5437 /* paddusw */, X86::MMX_PADDUSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9656 { 5445 /* paddw */, X86::MMX_PADDWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9657 { 5445 /* paddw */, X86::PADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9658 { 5445 /* paddw */, X86::PADDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9659 { 5445 /* paddw */, X86::MMX_PADDWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9660 { 5451 /* palignr */, X86::MMX_PALIGNRrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, },
9661 { 5451 /* palignr */, X86::PALIGNRrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9662 { 5451 /* palignr */, X86::PALIGNRrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9663 { 5451 /* palignr */, X86::MMX_PALIGNRrmi, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, },
9664 { 5459 /* pand */, X86::MMX_PANDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9665 { 5459 /* pand */, X86::PANDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9666 { 5459 /* pand */, X86::PANDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9667 { 5459 /* pand */, X86::MMX_PANDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9668 { 5464 /* pandn */, X86::MMX_PANDNirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9669 { 5464 /* pandn */, X86::PANDNrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9670 { 5464 /* pandn */, X86::PANDNrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9671 { 5464 /* pandn */, X86::MMX_PANDNirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9672 { 5470 /* pause */, X86::PAUSE, Convert_NoOperands, AMFBS_None, { }, },
9673 { 5476 /* pavgb */, X86::MMX_PAVGBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9674 { 5476 /* pavgb */, X86::PAVGBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9675 { 5476 /* pavgb */, X86::PAVGBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9676 { 5476 /* pavgb */, X86::MMX_PAVGBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9677 { 5482 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9678 { 5482 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9679 { 5490 /* pavgw */, X86::MMX_PAVGWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9680 { 5490 /* pavgw */, X86::PAVGWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9681 { 5490 /* pavgw */, X86::PAVGWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9682 { 5490 /* pavgw */, X86::MMX_PAVGWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9683 { 5496 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9684 { 5496 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9685 { 5496 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
9686 { 5496 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
9687 { 5505 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9688 { 5505 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9689 { 5513 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9690 { 5513 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_17, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9691 { 5526 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9692 { 5526 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9693 { 5539 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9694 { 5539 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_16, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9695 { 5552 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9696 { 5552 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9697 { 5565 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9698 { 5565 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9699 { 5575 /* pcmpeqb */, X86::MMX_PCMPEQBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9700 { 5575 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9701 { 5575 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9702 { 5575 /* pcmpeqb */, X86::MMX_PCMPEQBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9703 { 5583 /* pcmpeqd */, X86::MMX_PCMPEQDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9704 { 5583 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9705 { 5583 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9706 { 5583 /* pcmpeqd */, X86::MMX_PCMPEQDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9707 { 5591 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9708 { 5591 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9709 { 5599 /* pcmpeqw */, X86::MMX_PCMPEQWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9710 { 5599 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9711 { 5599 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9712 { 5599 /* pcmpeqw */, X86::MMX_PCMPEQWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9713 { 5607 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9714 { 5607 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9715 { 5617 /* pcmpestrm */, X86::PCMPESTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9716 { 5617 /* pcmpestrm */, X86::PCMPESTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9717 { 5627 /* pcmpgtb */, X86::MMX_PCMPGTBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9718 { 5627 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9719 { 5627 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9720 { 5627 /* pcmpgtb */, X86::MMX_PCMPGTBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9721 { 5635 /* pcmpgtd */, X86::MMX_PCMPGTDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9722 { 5635 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9723 { 5635 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9724 { 5635 /* pcmpgtd */, X86::MMX_PCMPGTDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9725 { 5643 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9726 { 5643 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9727 { 5651 /* pcmpgtw */, X86::MMX_PCMPGTWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9728 { 5651 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9729 { 5651 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9730 { 5651 /* pcmpgtw */, X86::MMX_PCMPGTWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9731 { 5659 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9732 { 5659 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9733 { 5669 /* pcmpistrm */, X86::PCMPISTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9734 { 5669 /* pcmpistrm */, X86::PCMPISTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9735 { 5679 /* pconfig */, X86::PCONFIG, Convert_NoOperands, AMFBS_None, { }, },
9736 { 5692 /* pdepl */, X86::PDEP32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
9737 { 5692 /* pdepl */, X86::PDEP32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
9738 { 5698 /* pdepq */, X86::PDEP64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
9739 { 5698 /* pdepq */, X86::PDEP64rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
9740 { 5709 /* pextl */, X86::PEXT32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
9741 { 5709 /* pextl */, X86::PEXT32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
9742 { 5715 /* pextq */, X86::PEXT64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
9743 { 5715 /* pextq */, X86::PEXT64rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
9744 { 5721 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
9745 { 5721 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, },
9746 { 5728 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
9747 { 5728 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
9748 { 5735 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
9749 { 5735 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
9750 { 5742 /* pextrw */, X86::MMX_PEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64, MCK_GR32orGR64 }, },
9751 { 5742 /* pextrw */, X86::PEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
9752 { 5742 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, },
9753 { 5749 /* pf2id */, X86::PF2IDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9754 { 5749 /* pf2id */, X86::PF2IDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9755 { 5755 /* pf2iw */, X86::PF2IWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9756 { 5755 /* pf2iw */, X86::PF2IWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9757 { 5761 /* pfacc */, X86::PFACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9758 { 5761 /* pfacc */, X86::PFACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9759 { 5767 /* pfadd */, X86::PFADDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9760 { 5767 /* pfadd */, X86::PFADDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9761 { 5773 /* pfcmpeq */, X86::PFCMPEQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9762 { 5773 /* pfcmpeq */, X86::PFCMPEQrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9763 { 5781 /* pfcmpge */, X86::PFCMPGErr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9764 { 5781 /* pfcmpge */, X86::PFCMPGErm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9765 { 5789 /* pfcmpgt */, X86::PFCMPGTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9766 { 5789 /* pfcmpgt */, X86::PFCMPGTrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9767 { 5797 /* pfmax */, X86::PFMAXrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9768 { 5797 /* pfmax */, X86::PFMAXrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9769 { 5803 /* pfmin */, X86::PFMINrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9770 { 5803 /* pfmin */, X86::PFMINrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9771 { 5809 /* pfmul */, X86::PFMULrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9772 { 5809 /* pfmul */, X86::PFMULrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9773 { 5815 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9774 { 5815 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9775 { 5822 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9776 { 5822 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9777 { 5830 /* pfrcp */, X86::PFRCPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9778 { 5830 /* pfrcp */, X86::PFRCPrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9779 { 5836 /* pfrcpit1 */, X86::PFRCPIT1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9780 { 5836 /* pfrcpit1 */, X86::PFRCPIT1rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9781 { 5845 /* pfrcpit2 */, X86::PFRCPIT2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9782 { 5845 /* pfrcpit2 */, X86::PFRCPIT2rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9783 { 5854 /* pfrsqit1 */, X86::PFRSQIT1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9784 { 5854 /* pfrsqit1 */, X86::PFRSQIT1rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9785 { 5863 /* pfrsqrt */, X86::PFRSQRTrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9786 { 5863 /* pfrsqrt */, X86::PFRSQRTrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9787 { 5871 /* pfsub */, X86::PFSUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9788 { 5871 /* pfsub */, X86::PFSUBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9789 { 5877 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9790 { 5877 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9791 { 5884 /* phaddd */, X86::MMX_PHADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9792 { 5884 /* phaddd */, X86::PHADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9793 { 5884 /* phaddd */, X86::PHADDDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9794 { 5884 /* phaddd */, X86::MMX_PHADDDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9795 { 5891 /* phaddsw */, X86::MMX_PHADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9796 { 5891 /* phaddsw */, X86::PHADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9797 { 5891 /* phaddsw */, X86::PHADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9798 { 5891 /* phaddsw */, X86::MMX_PHADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9799 { 5899 /* phaddw */, X86::MMX_PHADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9800 { 5899 /* phaddw */, X86::PHADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9801 { 5899 /* phaddw */, X86::PHADDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9802 { 5899 /* phaddw */, X86::MMX_PHADDWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9803 { 5906 /* phminposuw */, X86::PHMINPOSUWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9804 { 5906 /* phminposuw */, X86::PHMINPOSUWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9805 { 5917 /* phsubd */, X86::MMX_PHSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9806 { 5917 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9807 { 5917 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9808 { 5917 /* phsubd */, X86::MMX_PHSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9809 { 5924 /* phsubsw */, X86::MMX_PHSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9810 { 5924 /* phsubsw */, X86::PHSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9811 { 5924 /* phsubsw */, X86::PHSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9812 { 5924 /* phsubsw */, X86::MMX_PHSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9813 { 5932 /* phsubw */, X86::MMX_PHSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9814 { 5932 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9815 { 5932 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9816 { 5932 /* phsubw */, X86::MMX_PHSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9817 { 5939 /* pi2fd */, X86::PI2FDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9818 { 5939 /* pi2fd */, X86::PI2FDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9819 { 5945 /* pi2fw */, X86::PI2FWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9820 { 5945 /* pi2fw */, X86::PI2FWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9821 { 5951 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
9822 { 5951 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_2__Tie0_1_1__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32 }, },
9823 { 5958 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32 }, },
9824 { 5958 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
9825 { 5965 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32 }, },
9826 { 5965 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
9827 { 5972 /* pinsrw */, X86::MMX_PINSRWrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_VR64 }, },
9828 { 5972 /* pinsrw */, X86::PINSRWrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
9829 { 5972 /* pinsrw */, X86::MMX_PINSRWrm, Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_VR64 }, },
9830 { 5972 /* pinsrw */, X86::PINSRWrm, Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32 }, },
9831 { 5979 /* pmaddubsw */, X86::MMX_PMADDUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9832 { 5979 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9833 { 5979 /* pmaddubsw */, X86::PMADDUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9834 { 5979 /* pmaddubsw */, X86::MMX_PMADDUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9835 { 5989 /* pmaddwd */, X86::MMX_PMADDWDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9836 { 5989 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9837 { 5989 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9838 { 5989 /* pmaddwd */, X86::MMX_PMADDWDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9839 { 5997 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9840 { 5997 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9841 { 6004 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9842 { 6004 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9843 { 6011 /* pmaxsw */, X86::MMX_PMAXSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9844 { 6011 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9845 { 6011 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9846 { 6011 /* pmaxsw */, X86::MMX_PMAXSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9847 { 6018 /* pmaxub */, X86::MMX_PMAXUBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9848 { 6018 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9849 { 6018 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9850 { 6018 /* pmaxub */, X86::MMX_PMAXUBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9851 { 6025 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9852 { 6025 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9853 { 6032 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9854 { 6032 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9855 { 6039 /* pminsb */, X86::PMINSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9856 { 6039 /* pminsb */, X86::PMINSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9857 { 6046 /* pminsd */, X86::PMINSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9858 { 6046 /* pminsd */, X86::PMINSDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9859 { 6053 /* pminsw */, X86::MMX_PMINSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9860 { 6053 /* pminsw */, X86::PMINSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9861 { 6053 /* pminsw */, X86::PMINSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9862 { 6053 /* pminsw */, X86::MMX_PMINSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9863 { 6060 /* pminub */, X86::MMX_PMINUBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9864 { 6060 /* pminub */, X86::PMINUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9865 { 6060 /* pminub */, X86::PMINUBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9866 { 6060 /* pminub */, X86::MMX_PMINUBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9867 { 6067 /* pminud */, X86::PMINUDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9868 { 6067 /* pminud */, X86::PMINUDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9869 { 6074 /* pminuw */, X86::PMINUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9870 { 6074 /* pminuw */, X86::PMINUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9871 { 6081 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_GR32orGR64 }, },
9872 { 6081 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
9873 { 6090 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9874 { 6090 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9875 { 6099 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9876 { 6099 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32 }, },
9877 { 6108 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9878 { 6108 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9879 { 6117 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9880 { 6117 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9881 { 6126 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9882 { 6126 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9883 { 6135 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9884 { 6135 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9885 { 6144 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9886 { 6144 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9887 { 6153 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9888 { 6153 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32 }, },
9889 { 6162 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9890 { 6162 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9891 { 6171 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9892 { 6171 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9893 { 6180 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9894 { 6180 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9895 { 6189 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9896 { 6189 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9897 { 6198 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9898 { 6198 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9899 { 6205 /* pmulhrsw */, X86::MMX_PMULHRSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9900 { 6205 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9901 { 6205 /* pmulhrsw */, X86::PMULHRSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9902 { 6205 /* pmulhrsw */, X86::MMX_PMULHRSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9903 { 6214 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9904 { 6214 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9905 { 6222 /* pmulhuw */, X86::MMX_PMULHUWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9906 { 6222 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9907 { 6222 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9908 { 6222 /* pmulhuw */, X86::MMX_PMULHUWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9909 { 6230 /* pmulhw */, X86::MMX_PMULHWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9910 { 6230 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9911 { 6230 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9912 { 6230 /* pmulhw */, X86::MMX_PMULHWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9913 { 6237 /* pmulld */, X86::PMULLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9914 { 6237 /* pmulld */, X86::PMULLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9915 { 6244 /* pmullw */, X86::MMX_PMULLWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9916 { 6244 /* pmullw */, X86::PMULLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9917 { 6244 /* pmullw */, X86::PMULLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9918 { 6244 /* pmullw */, X86::MMX_PMULLWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9919 { 6251 /* pmuludq */, X86::MMX_PMULUDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9920 { 6251 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9921 { 6251 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9922 { 6251 /* pmuludq */, X86::MMX_PMULUDQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9923 { 6263 /* popal */, X86::POPA32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
9924 { 6269 /* popaw */, X86::POPA16, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
9925 { 6282 /* popcntl */, X86::POPCNT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
9926 { 6282 /* popcntl */, X86::POPCNT32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
9927 { 6290 /* popcntq */, X86::POPCNT64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
9928 { 6290 /* popcntq */, X86::POPCNT64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
9929 { 6298 /* popcntw */, X86::POPCNT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9930 { 6298 /* popcntw */, X86::POPCNT16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
9931 { 6317 /* popfl */, X86::POPF32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
9932 { 6323 /* popfq */, X86::POPF64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
9933 { 6329 /* popfw */, X86::POPF16, Convert_NoOperands, AMFBS_None, { }, },
9934 { 6335 /* popl */, X86::POPDS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, },
9935 { 6335 /* popl */, X86::POPES32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, },
9936 { 6335 /* popl */, X86::POPFS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_FS }, },
9937 { 6335 /* popl */, X86::POPGS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_GS }, },
9938 { 6335 /* popl */, X86::POPSS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, },
9939 { 6335 /* popl */, X86::POP32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
9940 { 6335 /* popl */, X86::POP32rmm, Convert__Mem325_0, AMFBS_Not64BitMode, { MCK_Mem32 }, },
9941 { 6340 /* popq */, X86::POPFS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_FS }, },
9942 { 6340 /* popq */, X86::POPGS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_GS }, },
9943 { 6340 /* popq */, X86::POP64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
9944 { 6340 /* popq */, X86::POP64rmm, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
9945 { 6345 /* popw */, X86::POPDS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, },
9946 { 6345 /* popw */, X86::POPES16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, },
9947 { 6345 /* popw */, X86::POPFS16, Convert_NoOperands, AMFBS_None, { MCK_FS }, },
9948 { 6345 /* popw */, X86::POPGS16, Convert_NoOperands, AMFBS_None, { MCK_GS }, },
9949 { 6345 /* popw */, X86::POPSS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, },
9950 { 6345 /* popw */, X86::POP16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
9951 { 6345 /* popw */, X86::POP16rmm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
9952 { 6350 /* por */, X86::MMX_PORirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9953 { 6350 /* por */, X86::PORrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9954 { 6350 /* por */, X86::PORrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9955 { 6350 /* por */, X86::MMX_PORirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9956 { 6354 /* prefetch */, X86::PREFETCH, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
9957 { 6363 /* prefetchnta */, X86::PREFETCHNTA, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
9958 { 6375 /* prefetcht0 */, X86::PREFETCHT0, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
9959 { 6386 /* prefetcht1 */, X86::PREFETCHT1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
9960 { 6397 /* prefetcht2 */, X86::PREFETCHT2, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
9961 { 6408 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
9962 { 6418 /* prefetchwt1 */, X86::PREFETCHWT1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
9963 { 6430 /* psadbw */, X86::MMX_PSADBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9964 { 6430 /* psadbw */, X86::PSADBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9965 { 6430 /* psadbw */, X86::PSADBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9966 { 6430 /* psadbw */, X86::MMX_PSADBWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9967 { 6437 /* pshufb */, X86::MMX_PSHUFBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9968 { 6437 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9969 { 6437 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9970 { 6437 /* pshufb */, X86::MMX_PSHUFBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9971 { 6444 /* pshufd */, X86::PSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9972 { 6444 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9973 { 6451 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9974 { 6451 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9975 { 6459 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9976 { 6459 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9977 { 6467 /* pshufw */, X86::MMX_PSHUFWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, },
9978 { 6467 /* pshufw */, X86::MMX_PSHUFWmi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, },
9979 { 6474 /* psignb */, X86::MMX_PSIGNBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9980 { 6474 /* psignb */, X86::PSIGNBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9981 { 6474 /* psignb */, X86::PSIGNBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9982 { 6474 /* psignb */, X86::MMX_PSIGNBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9983 { 6481 /* psignd */, X86::MMX_PSIGNDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9984 { 6481 /* psignd */, X86::PSIGNDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9985 { 6481 /* psignd */, X86::PSIGNDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9986 { 6481 /* psignd */, X86::MMX_PSIGNDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9987 { 6488 /* psignw */, X86::MMX_PSIGNWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9988 { 6488 /* psignw */, X86::PSIGNWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9989 { 6488 /* psignw */, X86::PSIGNWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9990 { 6488 /* psignw */, X86::MMX_PSIGNWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9991 { 6495 /* pslld */, X86::MMX_PSLLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9992 { 6495 /* pslld */, X86::PSLLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9993 { 6495 /* pslld */, X86::MMX_PSLLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, },
9994 { 6495 /* pslld */, X86::PSLLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9995 { 6495 /* pslld */, X86::PSLLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9996 { 6495 /* pslld */, X86::MMX_PSLLDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
9997 { 6501 /* pslldq */, X86::PSLLDQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9998 { 6508 /* psllq */, X86::MMX_PSLLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
9999 { 6508 /* psllq */, X86::PSLLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10000 { 6508 /* psllq */, X86::MMX_PSLLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, },
10001 { 6508 /* psllq */, X86::PSLLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
10002 { 6508 /* psllq */, X86::PSLLQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10003 { 6508 /* psllq */, X86::MMX_PSLLQrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10004 { 6514 /* psllw */, X86::MMX_PSLLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10005 { 6514 /* psllw */, X86::PSLLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10006 { 6514 /* psllw */, X86::MMX_PSLLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, },
10007 { 6514 /* psllw */, X86::PSLLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
10008 { 6514 /* psllw */, X86::PSLLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10009 { 6514 /* psllw */, X86::MMX_PSLLWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10010 { 6520 /* psmash */, X86::PSMASH, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10011 { 6520 /* psmash */, X86::PSMASH, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
10012 { 6527 /* psrad */, X86::MMX_PSRADrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10013 { 6527 /* psrad */, X86::PSRADrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10014 { 6527 /* psrad */, X86::MMX_PSRADri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, },
10015 { 6527 /* psrad */, X86::PSRADri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
10016 { 6527 /* psrad */, X86::PSRADrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10017 { 6527 /* psrad */, X86::MMX_PSRADrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10018 { 6533 /* psraw */, X86::MMX_PSRAWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10019 { 6533 /* psraw */, X86::PSRAWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10020 { 6533 /* psraw */, X86::MMX_PSRAWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, },
10021 { 6533 /* psraw */, X86::PSRAWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
10022 { 6533 /* psraw */, X86::PSRAWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10023 { 6533 /* psraw */, X86::MMX_PSRAWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10024 { 6539 /* psrld */, X86::MMX_PSRLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10025 { 6539 /* psrld */, X86::PSRLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10026 { 6539 /* psrld */, X86::MMX_PSRLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, },
10027 { 6539 /* psrld */, X86::PSRLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
10028 { 6539 /* psrld */, X86::PSRLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10029 { 6539 /* psrld */, X86::MMX_PSRLDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10030 { 6545 /* psrldq */, X86::PSRLDQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
10031 { 6552 /* psrlq */, X86::MMX_PSRLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10032 { 6552 /* psrlq */, X86::PSRLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10033 { 6552 /* psrlq */, X86::MMX_PSRLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, },
10034 { 6552 /* psrlq */, X86::PSRLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
10035 { 6552 /* psrlq */, X86::PSRLQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10036 { 6552 /* psrlq */, X86::MMX_PSRLQrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10037 { 6558 /* psrlw */, X86::MMX_PSRLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10038 { 6558 /* psrlw */, X86::PSRLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10039 { 6558 /* psrlw */, X86::MMX_PSRLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64 }, },
10040 { 6558 /* psrlw */, X86::PSRLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
10041 { 6558 /* psrlw */, X86::PSRLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10042 { 6558 /* psrlw */, X86::MMX_PSRLWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10043 { 6564 /* psubb */, X86::MMX_PSUBBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10044 { 6564 /* psubb */, X86::PSUBBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10045 { 6564 /* psubb */, X86::PSUBBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10046 { 6564 /* psubb */, X86::MMX_PSUBBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10047 { 6570 /* psubd */, X86::MMX_PSUBDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10048 { 6570 /* psubd */, X86::PSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10049 { 6570 /* psubd */, X86::PSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10050 { 6570 /* psubd */, X86::MMX_PSUBDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10051 { 6576 /* psubq */, X86::MMX_PSUBQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10052 { 6576 /* psubq */, X86::PSUBQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10053 { 6576 /* psubq */, X86::PSUBQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10054 { 6576 /* psubq */, X86::MMX_PSUBQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10055 { 6582 /* psubsb */, X86::MMX_PSUBSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10056 { 6582 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10057 { 6582 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10058 { 6582 /* psubsb */, X86::MMX_PSUBSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10059 { 6589 /* psubsw */, X86::MMX_PSUBSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10060 { 6589 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10061 { 6589 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10062 { 6589 /* psubsw */, X86::MMX_PSUBSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10063 { 6596 /* psubusb */, X86::MMX_PSUBUSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10064 { 6596 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10065 { 6596 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10066 { 6596 /* psubusb */, X86::MMX_PSUBUSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10067 { 6604 /* psubusw */, X86::MMX_PSUBUSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10068 { 6604 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10069 { 6604 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10070 { 6604 /* psubusw */, X86::MMX_PSUBUSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10071 { 6612 /* psubw */, X86::MMX_PSUBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10072 { 6612 /* psubw */, X86::PSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10073 { 6612 /* psubw */, X86::PSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10074 { 6612 /* psubw */, X86::MMX_PSUBWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10075 { 6618 /* pswapd */, X86::PSWAPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10076 { 6618 /* pswapd */, X86::PSWAPDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10077 { 6625 /* ptest */, X86::PTESTrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10078 { 6625 /* ptest */, X86::PTESTrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10079 { 6639 /* ptwritel */, X86::PTWRITEr, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
10080 { 6639 /* ptwritel */, X86::PTWRITEm, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
10081 { 6648 /* ptwriteq */, X86::PTWRITE64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
10082 { 6648 /* ptwriteq */, X86::PTWRITE64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
10083 { 6657 /* punpckhbw */, X86::MMX_PUNPCKHBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10084 { 6657 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10085 { 6657 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10086 { 6657 /* punpckhbw */, X86::MMX_PUNPCKHBWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10087 { 6667 /* punpckhdq */, X86::MMX_PUNPCKHDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10088 { 6667 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10089 { 6667 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10090 { 6667 /* punpckhdq */, X86::MMX_PUNPCKHDQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10091 { 6677 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10092 { 6677 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10093 { 6688 /* punpckhwd */, X86::MMX_PUNPCKHWDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10094 { 6688 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10095 { 6688 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10096 { 6688 /* punpckhwd */, X86::MMX_PUNPCKHWDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10097 { 6698 /* punpcklbw */, X86::MMX_PUNPCKLBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10098 { 6698 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10099 { 6698 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10100 { 6698 /* punpcklbw */, X86::MMX_PUNPCKLBWirm, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR64 }, },
10101 { 6708 /* punpckldq */, X86::MMX_PUNPCKLDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10102 { 6708 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10103 { 6708 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10104 { 6708 /* punpckldq */, X86::MMX_PUNPCKLDQirm, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR64 }, },
10105 { 6718 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10106 { 6718 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10107 { 6729 /* punpcklwd */, X86::MMX_PUNPCKLWDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10108 { 6729 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10109 { 6729 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10110 { 6729 /* punpcklwd */, X86::MMX_PUNPCKLWDirm, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR64 }, },
10111 { 6744 /* pushal */, X86::PUSHA32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
10112 { 6751 /* pushaw */, X86::PUSHA16, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
10113 { 6771 /* pushfl */, X86::PUSHF32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
10114 { 6778 /* pushfq */, X86::PUSHF64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10115 { 6785 /* pushfw */, X86::PUSHF16, Convert_NoOperands, AMFBS_None, { }, },
10116 { 6792 /* pushl */, X86::PUSHCS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_CS }, },
10117 { 6792 /* pushl */, X86::PUSHDS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, },
10118 { 6792 /* pushl */, X86::PUSHES32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, },
10119 { 6792 /* pushl */, X86::PUSHFS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_FS }, },
10120 { 6792 /* pushl */, X86::PUSHGS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_GS }, },
10121 { 6792 /* pushl */, X86::PUSHSS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, },
10122 { 6792 /* pushl */, X86::PUSH32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
10123 { 6792 /* pushl */, X86::PUSH32i8, Convert__ImmSExti32i81_0, AMFBS_Not64BitMode, { MCK_ImmSExti32i8 }, },
10124 { 6792 /* pushl */, X86::PUSHi32, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, },
10125 { 6792 /* pushl */, X86::PUSH32rmm, Convert__Mem325_0, AMFBS_Not64BitMode, { MCK_Mem32 }, },
10126 { 6798 /* pushq */, X86::PUSHFS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_FS }, },
10127 { 6798 /* pushq */, X86::PUSHGS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_GS }, },
10128 { 6798 /* pushq */, X86::PUSH64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
10129 { 6798 /* pushq */, X86::PUSH64i8, Convert__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8 }, },
10130 { 6798 /* pushq */, X86::PUSH64i32, Convert__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32 }, },
10131 { 6798 /* pushq */, X86::PUSH64rmm, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
10132 { 6804 /* pushw */, X86::PUSHCS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_CS }, },
10133 { 6804 /* pushw */, X86::PUSHDS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, },
10134 { 6804 /* pushw */, X86::PUSHES16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, },
10135 { 6804 /* pushw */, X86::PUSHFS16, Convert_NoOperands, AMFBS_None, { MCK_FS }, },
10136 { 6804 /* pushw */, X86::PUSHGS16, Convert_NoOperands, AMFBS_None, { MCK_GS }, },
10137 { 6804 /* pushw */, X86::PUSHSS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, },
10138 { 6804 /* pushw */, X86::PUSH16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
10139 { 6804 /* pushw */, X86::PUSH16i8, Convert__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8 }, },
10140 { 6804 /* pushw */, X86::PUSHi16, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
10141 { 6804 /* pushw */, X86::PUSH16rmm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
10142 { 6810 /* pvalidate */, X86::PVALIDATE32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
10143 { 6810 /* pvalidate */, X86::PVALIDATE64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10144 { 6810 /* pvalidate */, X86::PVALIDATE32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, },
10145 { 6810 /* pvalidate */, X86::PVALIDATE64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
10146 { 6820 /* pxor */, X86::MMX_PXORirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
10147 { 6820 /* pxor */, X86::PXORrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10148 { 6820 /* pxor */, X86::PXORrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10149 { 6820 /* pxor */, X86::MMX_PXORirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
10150 { 6829 /* rclb */, X86::RCL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10151 { 6829 /* rclb */, X86::RCL8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
10152 { 6829 /* rclb */, X86::RCL8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, },
10153 { 6829 /* rclb */, X86::RCL8mCL, Convert__Mem85_1, AMFBS_None, { MCK_CL, MCK_Mem8 }, },
10154 { 6829 /* rclb */, X86::RCL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, },
10155 { 6829 /* rclb */, X86::RCL8mi, Convert__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
10156 { 6834 /* rcll */, X86::RCL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10157 { 6834 /* rcll */, X86::RCL32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
10158 { 6834 /* rcll */, X86::RCL32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, },
10159 { 6834 /* rcll */, X86::RCL32mCL, Convert__Mem325_1, AMFBS_None, { MCK_CL, MCK_Mem32 }, },
10160 { 6834 /* rcll */, X86::RCL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
10161 { 6834 /* rcll */, X86::RCL32mi, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
10162 { 6839 /* rclq */, X86::RCL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10163 { 6839 /* rclq */, X86::RCL64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
10164 { 6839 /* rclq */, X86::RCL64rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR64 }, },
10165 { 6839 /* rclq */, X86::RCL64mCL, Convert__Mem645_1, AMFBS_In64BitMode, { MCK_CL, MCK_Mem64 }, },
10166 { 6839 /* rclq */, X86::RCL64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, },
10167 { 6839 /* rclq */, X86::RCL64mi, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
10168 { 6844 /* rclw */, X86::RCL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10169 { 6844 /* rclw */, X86::RCL16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
10170 { 6844 /* rclw */, X86::RCL16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, },
10171 { 6844 /* rclw */, X86::RCL16mCL, Convert__Mem165_1, AMFBS_None, { MCK_CL, MCK_Mem16 }, },
10172 { 6844 /* rclw */, X86::RCL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
10173 { 6844 /* rclw */, X86::RCL16mi, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
10174 { 6849 /* rcpps */, X86::RCPPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10175 { 6849 /* rcpps */, X86::RCPPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10176 { 6855 /* rcpss */, X86::RCPSSr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10177 { 6855 /* rcpss */, X86::RCPSSm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
10178 { 6865 /* rcrb */, X86::RCR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10179 { 6865 /* rcrb */, X86::RCR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
10180 { 6865 /* rcrb */, X86::RCR8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, },
10181 { 6865 /* rcrb */, X86::RCR8mCL, Convert__Mem85_1, AMFBS_None, { MCK_CL, MCK_Mem8 }, },
10182 { 6865 /* rcrb */, X86::RCR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, },
10183 { 6865 /* rcrb */, X86::RCR8mi, Convert__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
10184 { 6870 /* rcrl */, X86::RCR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10185 { 6870 /* rcrl */, X86::RCR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
10186 { 6870 /* rcrl */, X86::RCR32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, },
10187 { 6870 /* rcrl */, X86::RCR32mCL, Convert__Mem325_1, AMFBS_None, { MCK_CL, MCK_Mem32 }, },
10188 { 6870 /* rcrl */, X86::RCR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
10189 { 6870 /* rcrl */, X86::RCR32mi, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
10190 { 6875 /* rcrq */, X86::RCR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10191 { 6875 /* rcrq */, X86::RCR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
10192 { 6875 /* rcrq */, X86::RCR64rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR64 }, },
10193 { 6875 /* rcrq */, X86::RCR64mCL, Convert__Mem645_1, AMFBS_In64BitMode, { MCK_CL, MCK_Mem64 }, },
10194 { 6875 /* rcrq */, X86::RCR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, },
10195 { 6875 /* rcrq */, X86::RCR64mi, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
10196 { 6880 /* rcrw */, X86::RCR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10197 { 6880 /* rcrw */, X86::RCR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
10198 { 6880 /* rcrw */, X86::RCR16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, },
10199 { 6880 /* rcrw */, X86::RCR16mCL, Convert__Mem165_1, AMFBS_None, { MCK_CL, MCK_Mem16 }, },
10200 { 6880 /* rcrw */, X86::RCR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
10201 { 6880 /* rcrw */, X86::RCR16mi, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
10202 { 6894 /* rdfsbasel */, X86::RDFSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
10203 { 6904 /* rdfsbaseq */, X86::RDFSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
10204 { 6923 /* rdgsbasel */, X86::RDGSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
10205 { 6933 /* rdgsbaseq */, X86::RDGSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
10206 { 6943 /* rdmsr */, X86::RDMSR, Convert_NoOperands, AMFBS_None, { }, },
10207 { 6949 /* rdpid */, X86::RDPID32, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
10208 { 6949 /* rdpid */, X86::RDPID64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
10209 { 6955 /* rdpkru */, X86::RDPKRUr, Convert_NoOperands, AMFBS_None, { }, },
10210 { 6962 /* rdpmc */, X86::RDPMC, Convert_NoOperands, AMFBS_None, { }, },
10211 { 6975 /* rdrandl */, X86::RDRAND32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
10212 { 6983 /* rdrandq */, X86::RDRAND64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
10213 { 6991 /* rdrandw */, X86::RDRAND16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
10214 { 7006 /* rdseedl */, X86::RDSEED32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
10215 { 7014 /* rdseedq */, X86::RDSEED64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
10216 { 7022 /* rdseedw */, X86::RDSEED16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
10217 { 7030 /* rdsspd */, X86::RDSSPD, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10218 { 7037 /* rdsspq */, X86::RDSSPQ, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10219 { 7044 /* rdtsc */, X86::RDTSC, Convert_NoOperands, AMFBS_None, { }, },
10220 { 7050 /* rdtscp */, X86::RDTSCP, Convert_NoOperands, AMFBS_None, { }, },
10221 { 7057 /* rep */, X86::REP_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
10222 { 7061 /* repne */, X86::REPNE_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
10223 { 7082 /* retl */, X86::RETL, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
10224 { 7082 /* retl */, X86::RETIL, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, },
10225 { 7087 /* retq */, X86::RETQ, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10226 { 7087 /* retq */, X86::RETIQ, Convert__Imm1_0, AMFBS_In64BitMode, { MCK_Imm }, },
10227 { 7092 /* retw */, X86::RETW, Convert_NoOperands, AMFBS_None, { }, },
10228 { 7092 /* retw */, X86::RETIW, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
10229 { 7097 /* rex64 */, X86::REX64_PREFIX, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10230 { 7103 /* rmpadjust */, X86::RMPADJUST, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10231 { 7103 /* rmpadjust */, X86::RMPADJUST, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
10232 { 7113 /* rmpupdate */, X86::RMPUPDATE, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10233 { 7113 /* rmpupdate */, X86::RMPUPDATE, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
10234 { 7127 /* rolb */, X86::ROL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10235 { 7127 /* rolb */, X86::ROL8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
10236 { 7127 /* rolb */, X86::ROL8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, },
10237 { 7127 /* rolb */, X86::ROL8mCL, Convert__Mem85_1, AMFBS_None, { MCK_CL, MCK_Mem8 }, },
10238 { 7127 /* rolb */, X86::ROL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, },
10239 { 7127 /* rolb */, X86::ROL8mi, Convert__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
10240 { 7132 /* roll */, X86::ROL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10241 { 7132 /* roll */, X86::ROL32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
10242 { 7132 /* roll */, X86::ROL32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, },
10243 { 7132 /* roll */, X86::ROL32mCL, Convert__Mem325_1, AMFBS_None, { MCK_CL, MCK_Mem32 }, },
10244 { 7132 /* roll */, X86::ROL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
10245 { 7132 /* roll */, X86::ROL32mi, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
10246 { 7137 /* rolq */, X86::ROL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10247 { 7137 /* rolq */, X86::ROL64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
10248 { 7137 /* rolq */, X86::ROL64rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR64 }, },
10249 { 7137 /* rolq */, X86::ROL64mCL, Convert__Mem645_1, AMFBS_In64BitMode, { MCK_CL, MCK_Mem64 }, },
10250 { 7137 /* rolq */, X86::ROL64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, },
10251 { 7137 /* rolq */, X86::ROL64mi, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
10252 { 7142 /* rolw */, X86::ROL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10253 { 7142 /* rolw */, X86::ROL16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
10254 { 7142 /* rolw */, X86::ROL16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, },
10255 { 7142 /* rolw */, X86::ROL16mCL, Convert__Mem165_1, AMFBS_None, { MCK_CL, MCK_Mem16 }, },
10256 { 7142 /* rolw */, X86::ROL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
10257 { 7142 /* rolw */, X86::ROL16mi, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
10258 { 7151 /* rorb */, X86::ROR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10259 { 7151 /* rorb */, X86::ROR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
10260 { 7151 /* rorb */, X86::ROR8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, },
10261 { 7151 /* rorb */, X86::ROR8mCL, Convert__Mem85_1, AMFBS_None, { MCK_CL, MCK_Mem8 }, },
10262 { 7151 /* rorb */, X86::ROR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, },
10263 { 7151 /* rorb */, X86::ROR8mi, Convert__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
10264 { 7156 /* rorl */, X86::ROR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10265 { 7156 /* rorl */, X86::ROR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
10266 { 7156 /* rorl */, X86::ROR32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, },
10267 { 7156 /* rorl */, X86::ROR32mCL, Convert__Mem325_1, AMFBS_None, { MCK_CL, MCK_Mem32 }, },
10268 { 7156 /* rorl */, X86::ROR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
10269 { 7156 /* rorl */, X86::ROR32mi, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
10270 { 7161 /* rorq */, X86::ROR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10271 { 7161 /* rorq */, X86::ROR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
10272 { 7161 /* rorq */, X86::ROR64rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR64 }, },
10273 { 7161 /* rorq */, X86::ROR64mCL, Convert__Mem645_1, AMFBS_In64BitMode, { MCK_CL, MCK_Mem64 }, },
10274 { 7161 /* rorq */, X86::ROR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, },
10275 { 7161 /* rorq */, X86::ROR64mi, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
10276 { 7166 /* rorw */, X86::ROR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10277 { 7166 /* rorw */, X86::ROR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
10278 { 7166 /* rorw */, X86::ROR16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, },
10279 { 7166 /* rorw */, X86::ROR16mCL, Convert__Mem165_1, AMFBS_None, { MCK_CL, MCK_Mem16 }, },
10280 { 7166 /* rorw */, X86::ROR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
10281 { 7166 /* rorw */, X86::ROR16mi, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
10282 { 7176 /* rorxl */, X86::RORX32ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
10283 { 7176 /* rorxl */, X86::RORX32mi, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_GR32 }, },
10284 { 7182 /* rorxq */, X86::RORX64ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
10285 { 7182 /* rorxq */, X86::RORX64mi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_GR64 }, },
10286 { 7188 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10287 { 7188 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
10288 { 7196 /* roundps */, X86::ROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10289 { 7196 /* roundps */, X86::ROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
10290 { 7204 /* roundsd */, X86::ROUNDSDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10291 { 7204 /* roundsd */, X86::ROUNDSDm_Int, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
10292 { 7212 /* roundss */, X86::ROUNDSSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10293 { 7212 /* roundss */, X86::ROUNDSSm_Int, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
10294 { 7220 /* rsm */, X86::RSM, Convert_NoOperands, AMFBS_None, { }, },
10295 { 7224 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10296 { 7224 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10297 { 7232 /* rsqrtss */, X86::RSQRTSSr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10298 { 7232 /* rsqrtss */, X86::RSQRTSSm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
10299 { 7240 /* rstorssp */, X86::RSTORSSP, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
10300 { 7249 /* sahf */, X86::SAHF, Convert_NoOperands, AMFBS_None, { }, },
10301 { 7254 /* salc */, X86::SALC, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
10302 { 7263 /* sarb */, X86::SAR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10303 { 7263 /* sarb */, X86::SAR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
10304 { 7263 /* sarb */, X86::SAR8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, },
10305 { 7263 /* sarb */, X86::SAR8mCL, Convert__Mem85_1, AMFBS_None, { MCK_CL, MCK_Mem8 }, },
10306 { 7263 /* sarb */, X86::SAR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, },
10307 { 7263 /* sarb */, X86::SAR8mi, Convert__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
10308 { 7268 /* sarl */, X86::SAR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10309 { 7268 /* sarl */, X86::SAR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
10310 { 7268 /* sarl */, X86::SAR32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, },
10311 { 7268 /* sarl */, X86::SAR32mCL, Convert__Mem325_1, AMFBS_None, { MCK_CL, MCK_Mem32 }, },
10312 { 7268 /* sarl */, X86::SAR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
10313 { 7268 /* sarl */, X86::SAR32mi, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
10314 { 7273 /* sarq */, X86::SAR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10315 { 7273 /* sarq */, X86::SAR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
10316 { 7273 /* sarq */, X86::SAR64rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR64 }, },
10317 { 7273 /* sarq */, X86::SAR64mCL, Convert__Mem645_1, AMFBS_In64BitMode, { MCK_CL, MCK_Mem64 }, },
10318 { 7273 /* sarq */, X86::SAR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, },
10319 { 7273 /* sarq */, X86::SAR64mi, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
10320 { 7278 /* sarw */, X86::SAR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10321 { 7278 /* sarw */, X86::SAR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
10322 { 7278 /* sarw */, X86::SAR16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, },
10323 { 7278 /* sarw */, X86::SAR16mCL, Convert__Mem165_1, AMFBS_None, { MCK_CL, MCK_Mem16 }, },
10324 { 7278 /* sarw */, X86::SAR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
10325 { 7278 /* sarw */, X86::SAR16mi, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
10326 { 7288 /* sarxl */, X86::SARX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
10327 { 7288 /* sarxl */, X86::SARX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
10328 { 7294 /* sarxq */, X86::SARX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
10329 { 7294 /* sarxq */, X86::SARX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
10330 { 7300 /* saveprevssp */, X86::SAVEPREVSSP, Convert_NoOperands, AMFBS_None, { }, },
10331 { 7316 /* sbbb */, X86::SBB8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
10332 { 7316 /* sbbb */, X86::SBB8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
10333 { 7316 /* sbbb */, X86::SBB8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, },
10334 { 7316 /* sbbb */, X86::SBB8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
10335 { 7316 /* sbbb */, X86::SBB8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, },
10336 { 7316 /* sbbb */, X86::SBB8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
10337 { 7321 /* sbbl */, X86::SBB32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10338 { 7321 /* sbbl */, X86::SBB32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
10339 { 7321 /* sbbl */, X86::SBB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, },
10340 { 7321 /* sbbl */, X86::SBB32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
10341 { 7321 /* sbbl */, X86::SBB32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, },
10342 { 7321 /* sbbl */, X86::SBB32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, },
10343 { 7321 /* sbbl */, X86::SBB32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
10344 { 7321 /* sbbl */, X86::SBB32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, },
10345 { 7321 /* sbbl */, X86::SBB32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
10346 { 7326 /* sbbq */, X86::SBB64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
10347 { 7326 /* sbbq */, X86::SBB64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
10348 { 7326 /* sbbq */, X86::SBB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, },
10349 { 7326 /* sbbq */, X86::SBB64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, },
10350 { 7326 /* sbbq */, X86::SBB64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
10351 { 7326 /* sbbq */, X86::SBB64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, },
10352 { 7326 /* sbbq */, X86::SBB64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, },
10353 { 7326 /* sbbq */, X86::SBB64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
10354 { 7326 /* sbbq */, X86::SBB64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
10355 { 7331 /* sbbw */, X86::SBB16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10356 { 7331 /* sbbw */, X86::SBB16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
10357 { 7331 /* sbbw */, X86::SBB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, },
10358 { 7331 /* sbbw */, X86::SBB16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
10359 { 7331 /* sbbw */, X86::SBB16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, },
10360 { 7331 /* sbbw */, X86::SBB16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, },
10361 { 7331 /* sbbw */, X86::SBB16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
10362 { 7331 /* sbbw */, X86::SBB16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, },
10363 { 7331 /* sbbw */, X86::SBB16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
10364 { 7336 /* scas */, X86::SCASW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16, MCK_AX }, },
10365 { 7336 /* scas */, X86::SCASL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32, MCK_EAX }, },
10366 { 7336 /* scas */, X86::SCASQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
10367 { 7336 /* scas */, X86::SCASB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8, MCK_AL }, },
10368 { 7341 /* scasb */, X86::SCASB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8 }, },
10369 { 7341 /* scasb */, X86::SCASB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8, MCK_AL }, },
10370 { 7353 /* scasl */, X86::SCASL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32 }, },
10371 { 7353 /* scasl */, X86::SCASL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32, MCK_EAX }, },
10372 { 7359 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64 }, },
10373 { 7359 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
10374 { 7365 /* scasw */, X86::SCASW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16 }, },
10375 { 7365 /* scasw */, X86::SCASW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16, MCK_AX }, },
10376 { 7371 /* seamcall */, X86::SEAMCALL, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10377 { 7380 /* seamops */, X86::SEAMOPS, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10378 { 7388 /* seamret */, X86::SEAMRET, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10379 { 7396 /* senduipi */, X86::SENDUIPI, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
10380 { 7405 /* serialize */, X86::SERIALIZE, Convert_NoOperands, AMFBS_None, { }, },
10381 { 7415 /* seta */, X86::SETCCr, Convert__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR8 }, },
10382 { 7415 /* seta */, X86::SETCCm, Convert__Mem85_0__imm_95_7, AMFBS_None, { MCK_Mem8 }, },
10383 { 7420 /* setae */, X86::SETCCr, Convert__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR8 }, },
10384 { 7420 /* setae */, X86::SETCCm, Convert__Mem85_0__imm_95_3, AMFBS_None, { MCK_Mem8 }, },
10385 { 7426 /* setb */, X86::SETCCr, Convert__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR8 }, },
10386 { 7426 /* setb */, X86::SETCCm, Convert__Mem85_0__imm_95_2, AMFBS_None, { MCK_Mem8 }, },
10387 { 7431 /* setbe */, X86::SETCCr, Convert__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR8 }, },
10388 { 7431 /* setbe */, X86::SETCCm, Convert__Mem85_0__imm_95_6, AMFBS_None, { MCK_Mem8 }, },
10389 { 7437 /* sete */, X86::SETCCr, Convert__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR8 }, },
10390 { 7437 /* sete */, X86::SETCCm, Convert__Mem85_0__imm_95_4, AMFBS_None, { MCK_Mem8 }, },
10391 { 7442 /* setg */, X86::SETCCr, Convert__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR8 }, },
10392 { 7442 /* setg */, X86::SETCCm, Convert__Mem85_0__imm_95_15, AMFBS_None, { MCK_Mem8 }, },
10393 { 7447 /* setge */, X86::SETCCr, Convert__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR8 }, },
10394 { 7447 /* setge */, X86::SETCCm, Convert__Mem85_0__imm_95_13, AMFBS_None, { MCK_Mem8 }, },
10395 { 7453 /* setl */, X86::SETCCr, Convert__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR8 }, },
10396 { 7453 /* setl */, X86::SETCCm, Convert__Mem85_0__imm_95_12, AMFBS_None, { MCK_Mem8 }, },
10397 { 7458 /* setle */, X86::SETCCr, Convert__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR8 }, },
10398 { 7458 /* setle */, X86::SETCCm, Convert__Mem85_0__imm_95_14, AMFBS_None, { MCK_Mem8 }, },
10399 { 7464 /* setne */, X86::SETCCr, Convert__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR8 }, },
10400 { 7464 /* setne */, X86::SETCCm, Convert__Mem85_0__imm_95_5, AMFBS_None, { MCK_Mem8 }, },
10401 { 7470 /* setno */, X86::SETCCr, Convert__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR8 }, },
10402 { 7470 /* setno */, X86::SETCCm, Convert__Mem85_0__imm_95_1, AMFBS_None, { MCK_Mem8 }, },
10403 { 7476 /* setnp */, X86::SETCCr, Convert__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR8 }, },
10404 { 7476 /* setnp */, X86::SETCCm, Convert__Mem85_0__imm_95_11, AMFBS_None, { MCK_Mem8 }, },
10405 { 7482 /* setns */, X86::SETCCr, Convert__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR8 }, },
10406 { 7482 /* setns */, X86::SETCCm, Convert__Mem85_0__imm_95_9, AMFBS_None, { MCK_Mem8 }, },
10407 { 7488 /* seto */, X86::SETCCr, Convert__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR8 }, },
10408 { 7488 /* seto */, X86::SETCCm, Convert__Mem85_0__imm_95_0, AMFBS_None, { MCK_Mem8 }, },
10409 { 7493 /* setp */, X86::SETCCr, Convert__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR8 }, },
10410 { 7493 /* setp */, X86::SETCCm, Convert__Mem85_0__imm_95_10, AMFBS_None, { MCK_Mem8 }, },
10411 { 7498 /* sets */, X86::SETCCr, Convert__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR8 }, },
10412 { 7498 /* sets */, X86::SETCCm, Convert__Mem85_0__imm_95_8, AMFBS_None, { MCK_Mem8 }, },
10413 { 7503 /* setssbsy */, X86::SETSSBSY, Convert_NoOperands, AMFBS_None, { }, },
10414 { 7512 /* sfence */, X86::SFENCE, Convert_NoOperands, AMFBS_None, { }, },
10415 { 7530 /* sgdtl */, X86::SGDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
10416 { 7536 /* sgdtq */, X86::SGDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
10417 { 7542 /* sgdtw */, X86::SGDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
10418 { 7548 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10419 { 7548 /* sha1msg1 */, X86::SHA1MSG1rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10420 { 7557 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10421 { 7557 /* sha1msg2 */, X86::SHA1MSG2rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10422 { 7566 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10423 { 7566 /* sha1nexte */, X86::SHA1NEXTErm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10424 { 7576 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10425 { 7576 /* sha1rnds4 */, X86::SHA1RNDS4rmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
10426 { 7586 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10427 { 7586 /* sha256msg1 */, X86::SHA256MSG1rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10428 { 7597 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10429 { 7597 /* sha256msg2 */, X86::SHA256MSG2rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10430 { 7608 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10431 { 7608 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_1__Tie0_2_2__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10432 { 7608 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
10433 { 7608 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_2__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
10434 { 7624 /* shlb */, X86::SHL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10435 { 7624 /* shlb */, X86::SHL8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
10436 { 7624 /* shlb */, X86::SHL8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, },
10437 { 7624 /* shlb */, X86::SHL8mCL, Convert__Mem85_1, AMFBS_None, { MCK_CL, MCK_Mem8 }, },
10438 { 7624 /* shlb */, X86::SHL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, },
10439 { 7624 /* shlb */, X86::SHL8mi, Convert__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
10440 { 7634 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10441 { 7634 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
10442 { 7634 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR32, MCK_GR32 }, },
10443 { 7634 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR32, MCK_Mem32 }, },
10444 { 7634 /* shldl */, X86::SHLD32rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
10445 { 7634 /* shldl */, X86::SHLD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, },
10446 { 7640 /* shldq */, X86::SHLD64rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
10447 { 7640 /* shldq */, X86::SHLD64mrCL, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
10448 { 7640 /* shldq */, X86::SHLD64rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR64, MCK_GR64 }, },
10449 { 7640 /* shldq */, X86::SHLD64mrCL, Convert__Mem645_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR64, MCK_Mem64 }, },
10450 { 7640 /* shldq */, X86::SHLD64rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
10451 { 7640 /* shldq */, X86::SHLD64mri8, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_Mem64 }, },
10452 { 7646 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10453 { 7646 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
10454 { 7646 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR16, MCK_GR16 }, },
10455 { 7646 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR16, MCK_Mem16 }, },
10456 { 7646 /* shldw */, X86::SHLD16rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
10457 { 7646 /* shldw */, X86::SHLD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, },
10458 { 7652 /* shll */, X86::SHL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10459 { 7652 /* shll */, X86::SHL32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
10460 { 7652 /* shll */, X86::SHL32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, },
10461 { 7652 /* shll */, X86::SHL32mCL, Convert__Mem325_1, AMFBS_None, { MCK_CL, MCK_Mem32 }, },
10462 { 7652 /* shll */, X86::SHL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
10463 { 7652 /* shll */, X86::SHL32mi, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
10464 { 7657 /* shlq */, X86::SHL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10465 { 7657 /* shlq */, X86::SHL64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
10466 { 7657 /* shlq */, X86::SHL64rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR64 }, },
10467 { 7657 /* shlq */, X86::SHL64mCL, Convert__Mem645_1, AMFBS_In64BitMode, { MCK_CL, MCK_Mem64 }, },
10468 { 7657 /* shlq */, X86::SHL64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, },
10469 { 7657 /* shlq */, X86::SHL64mi, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
10470 { 7662 /* shlw */, X86::SHL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10471 { 7662 /* shlw */, X86::SHL16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
10472 { 7662 /* shlw */, X86::SHL16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, },
10473 { 7662 /* shlw */, X86::SHL16mCL, Convert__Mem165_1, AMFBS_None, { MCK_CL, MCK_Mem16 }, },
10474 { 7662 /* shlw */, X86::SHL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
10475 { 7662 /* shlw */, X86::SHL16mi, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
10476 { 7672 /* shlxl */, X86::SHLX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
10477 { 7672 /* shlxl */, X86::SHLX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
10478 { 7678 /* shlxq */, X86::SHLX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
10479 { 7678 /* shlxq */, X86::SHLX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
10480 { 7688 /* shrb */, X86::SHR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10481 { 7688 /* shrb */, X86::SHR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
10482 { 7688 /* shrb */, X86::SHR8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, },
10483 { 7688 /* shrb */, X86::SHR8mCL, Convert__Mem85_1, AMFBS_None, { MCK_CL, MCK_Mem8 }, },
10484 { 7688 /* shrb */, X86::SHR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, },
10485 { 7688 /* shrb */, X86::SHR8mi, Convert__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
10486 { 7698 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10487 { 7698 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
10488 { 7698 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR32, MCK_GR32 }, },
10489 { 7698 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR32, MCK_Mem32 }, },
10490 { 7698 /* shrdl */, X86::SHRD32rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
10491 { 7698 /* shrdl */, X86::SHRD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, },
10492 { 7704 /* shrdq */, X86::SHRD64rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
10493 { 7704 /* shrdq */, X86::SHRD64mrCL, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
10494 { 7704 /* shrdq */, X86::SHRD64rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR64, MCK_GR64 }, },
10495 { 7704 /* shrdq */, X86::SHRD64mrCL, Convert__Mem645_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR64, MCK_Mem64 }, },
10496 { 7704 /* shrdq */, X86::SHRD64rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
10497 { 7704 /* shrdq */, X86::SHRD64mri8, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_Mem64 }, },
10498 { 7710 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10499 { 7710 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
10500 { 7710 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR16, MCK_GR16 }, },
10501 { 7710 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR16, MCK_Mem16 }, },
10502 { 7710 /* shrdw */, X86::SHRD16rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
10503 { 7710 /* shrdw */, X86::SHRD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, },
10504 { 7716 /* shrl */, X86::SHR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10505 { 7716 /* shrl */, X86::SHR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
10506 { 7716 /* shrl */, X86::SHR32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, },
10507 { 7716 /* shrl */, X86::SHR32mCL, Convert__Mem325_1, AMFBS_None, { MCK_CL, MCK_Mem32 }, },
10508 { 7716 /* shrl */, X86::SHR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
10509 { 7716 /* shrl */, X86::SHR32mi, Convert__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
10510 { 7721 /* shrq */, X86::SHR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
10511 { 7721 /* shrq */, X86::SHR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
10512 { 7721 /* shrq */, X86::SHR64rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR64 }, },
10513 { 7721 /* shrq */, X86::SHR64mCL, Convert__Mem645_1, AMFBS_In64BitMode, { MCK_CL, MCK_Mem64 }, },
10514 { 7721 /* shrq */, X86::SHR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64 }, },
10515 { 7721 /* shrq */, X86::SHR64mi, Convert__Mem645_1__ImmUnsignedi81_0, AMFBS_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
10516 { 7726 /* shrw */, X86::SHR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10517 { 7726 /* shrw */, X86::SHR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
10518 { 7726 /* shrw */, X86::SHR16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, },
10519 { 7726 /* shrw */, X86::SHR16mCL, Convert__Mem165_1, AMFBS_None, { MCK_CL, MCK_Mem16 }, },
10520 { 7726 /* shrw */, X86::SHR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
10521 { 7726 /* shrw */, X86::SHR16mi, Convert__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
10522 { 7736 /* shrxl */, X86::SHRX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
10523 { 7736 /* shrxl */, X86::SHRX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
10524 { 7742 /* shrxq */, X86::SHRX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
10525 { 7742 /* shrxq */, X86::SHRX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
10526 { 7748 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10527 { 7748 /* shufpd */, X86::SHUFPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
10528 { 7755 /* shufps */, X86::SHUFPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10529 { 7755 /* shufps */, X86::SHUFPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
10530 { 7773 /* sidtl */, X86::SIDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
10531 { 7779 /* sidtq */, X86::SIDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
10532 { 7785 /* sidtw */, X86::SIDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
10533 { 7791 /* skinit */, X86::SKINIT, Convert_NoOperands, AMFBS_None, { }, },
10534 { 7791 /* skinit */, X86::SKINIT, Convert_NoOperands, AMFBS_None, { MCK_EAX }, },
10535 { 7798 /* sldt */, X86::SLDT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
10536 { 7803 /* sldtl */, X86::SLDT32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
10537 { 7809 /* sldtq */, X86::SLDT64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
10538 { 7815 /* sldtw */, X86::SLDT16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
10539 { 7815 /* sldtw */, X86::SLDT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
10540 { 7821 /* slwpcb */, X86::SLWPCB, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
10541 { 7821 /* slwpcb */, X86::SLWPCB64, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
10542 { 7833 /* smswl */, X86::SMSW32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
10543 { 7839 /* smswq */, X86::SMSW64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
10544 { 7845 /* smsww */, X86::SMSW16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
10545 { 7845 /* smsww */, X86::SMSW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
10546 { 7851 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10547 { 7851 /* sqrtpd */, X86::SQRTPDm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10548 { 7858 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10549 { 7858 /* sqrtps */, X86::SQRTPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10550 { 7865 /* sqrtsd */, X86::SQRTSDr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10551 { 7865 /* sqrtsd */, X86::SQRTSDm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
10552 { 7872 /* sqrtss */, X86::SQRTSSr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10553 { 7872 /* sqrtss */, X86::SQRTSSm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
10554 { 7879 /* ss */, X86::SS_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
10555 { 7882 /* stac */, X86::STAC, Convert_NoOperands, AMFBS_None, { }, },
10556 { 7887 /* stc */, X86::STC, Convert_NoOperands, AMFBS_None, { }, },
10557 { 7891 /* std */, X86::STD, Convert_NoOperands, AMFBS_None, { }, },
10558 { 7895 /* stgi */, X86::STGI, Convert_NoOperands, AMFBS_None, { }, },
10559 { 7900 /* sti */, X86::STI, Convert_NoOperands, AMFBS_None, { }, },
10560 { 7904 /* stmxcsr */, X86::STMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
10561 { 7912 /* stos */, X86::STOSB, Convert__DstIdx81_1, AMFBS_None, { MCK_AL, MCK_DstIdx8 }, },
10562 { 7912 /* stos */, X86::STOSW, Convert__DstIdx161_1, AMFBS_None, { MCK_AX, MCK_DstIdx16 }, },
10563 { 7912 /* stos */, X86::STOSL, Convert__DstIdx321_1, AMFBS_None, { MCK_EAX, MCK_DstIdx32 }, },
10564 { 7912 /* stos */, X86::STOSQ, Convert__DstIdx641_1, AMFBS_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
10565 { 7917 /* stosb */, X86::STOSB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8 }, },
10566 { 7917 /* stosb */, X86::STOSB, Convert__DstIdx81_1, AMFBS_None, { MCK_AL, MCK_DstIdx8 }, },
10567 { 7929 /* stosl */, X86::STOSL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32 }, },
10568 { 7929 /* stosl */, X86::STOSL, Convert__DstIdx321_1, AMFBS_None, { MCK_EAX, MCK_DstIdx32 }, },
10569 { 7935 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64 }, },
10570 { 7935 /* stosq */, X86::STOSQ, Convert__DstIdx641_1, AMFBS_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
10571 { 7941 /* stosw */, X86::STOSW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16 }, },
10572 { 7941 /* stosw */, X86::STOSW, Convert__DstIdx161_1, AMFBS_None, { MCK_AX, MCK_DstIdx16 }, },
10573 { 7951 /* strl */, X86::STR32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
10574 { 7956 /* strq */, X86::STR64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
10575 { 7961 /* strw */, X86::STR16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
10576 { 7961 /* strw */, X86::STRm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
10577 { 7966 /* sttilecfg */, X86::STTILECFG, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
10578 { 7976 /* stui */, X86::STUI, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10579 { 7985 /* subb */, X86::SUB8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
10580 { 7985 /* subb */, X86::SUB8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
10581 { 7985 /* subb */, X86::SUB8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, },
10582 { 7985 /* subb */, X86::SUB8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
10583 { 7985 /* subb */, X86::SUB8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, },
10584 { 7985 /* subb */, X86::SUB8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
10585 { 7990 /* subl */, X86::SUB32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10586 { 7990 /* subl */, X86::SUB32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
10587 { 7990 /* subl */, X86::SUB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, },
10588 { 7990 /* subl */, X86::SUB32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
10589 { 7990 /* subl */, X86::SUB32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, },
10590 { 7990 /* subl */, X86::SUB32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, },
10591 { 7990 /* subl */, X86::SUB32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
10592 { 7990 /* subl */, X86::SUB32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, },
10593 { 7990 /* subl */, X86::SUB32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
10594 { 7995 /* subpd */, X86::SUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10595 { 7995 /* subpd */, X86::SUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10596 { 8001 /* subps */, X86::SUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10597 { 8001 /* subps */, X86::SUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10598 { 8007 /* subq */, X86::SUB64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
10599 { 8007 /* subq */, X86::SUB64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
10600 { 8007 /* subq */, X86::SUB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, },
10601 { 8007 /* subq */, X86::SUB64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, },
10602 { 8007 /* subq */, X86::SUB64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
10603 { 8007 /* subq */, X86::SUB64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, },
10604 { 8007 /* subq */, X86::SUB64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, },
10605 { 8007 /* subq */, X86::SUB64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
10606 { 8007 /* subq */, X86::SUB64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
10607 { 8012 /* subsd */, X86::SUBSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10608 { 8012 /* subsd */, X86::SUBSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
10609 { 8018 /* subss */, X86::SUBSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10610 { 8018 /* subss */, X86::SUBSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
10611 { 8024 /* subw */, X86::SUB16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10612 { 8024 /* subw */, X86::SUB16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
10613 { 8024 /* subw */, X86::SUB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, },
10614 { 8024 /* subw */, X86::SUB16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
10615 { 8024 /* subw */, X86::SUB16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, },
10616 { 8024 /* subw */, X86::SUB16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, },
10617 { 8024 /* subw */, X86::SUB16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
10618 { 8024 /* subw */, X86::SUB16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, },
10619 { 8024 /* subw */, X86::SUB16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
10620 { 8029 /* swapgs */, X86::SWAPGS, Convert_NoOperands, AMFBS_None, { }, },
10621 { 8036 /* syscall */, X86::SYSCALL, Convert_NoOperands, AMFBS_None, { }, },
10622 { 8044 /* sysenter */, X86::SYSENTER, Convert_NoOperands, AMFBS_None, { }, },
10623 { 8061 /* sysexitl */, X86::SYSEXIT, Convert_NoOperands, AMFBS_None, { }, },
10624 { 8070 /* sysexitq */, X86::SYSEXIT64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10625 { 8086 /* sysretl */, X86::SYSRET, Convert_NoOperands, AMFBS_None, { }, },
10626 { 8094 /* sysretq */, X86::SYSRET64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10627 { 8109 /* t1mskcl */, X86::T1MSKC32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10628 { 8109 /* t1mskcl */, X86::T1MSKC32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
10629 { 8117 /* t1mskcq */, X86::T1MSKC64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
10630 { 8117 /* t1mskcq */, X86::T1MSKC64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
10631 { 8125 /* tdcall */, X86::TDCALL, Convert_NoOperands, AMFBS_None, { }, },
10632 { 8132 /* tdpbf16ps */, X86::TDPBF16PS, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_TILE, MCK_TILE, MCK_TILE }, },
10633 { 8142 /* tdpbssd */, X86::TDPBSSD, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_TILE, MCK_TILE, MCK_TILE }, },
10634 { 8150 /* tdpbsud */, X86::TDPBSUD, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_TILE, MCK_TILE, MCK_TILE }, },
10635 { 8158 /* tdpbusd */, X86::TDPBUSD, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_TILE, MCK_TILE, MCK_TILE }, },
10636 { 8166 /* tdpbuud */, X86::TDPBUUD, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_TILE, MCK_TILE, MCK_TILE }, },
10637 { 8179 /* testb */, X86::TEST8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
10638 { 8179 /* testb */, X86::TEST8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
10639 { 8179 /* testb */, X86::TEST8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, },
10640 { 8179 /* testb */, X86::TEST8ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
10641 { 8179 /* testb */, X86::TEST8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, },
10642 { 8179 /* testb */, X86::TEST8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
10643 { 8185 /* testl */, X86::TEST32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10644 { 8185 /* testl */, X86::TEST32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
10645 { 8185 /* testl */, X86::TEST32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, },
10646 { 8185 /* testl */, X86::TEST32ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
10647 { 8185 /* testl */, X86::TEST32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, },
10648 { 8185 /* testl */, X86::TEST32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
10649 { 8191 /* testq */, X86::TEST64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
10650 { 8191 /* testq */, X86::TEST64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
10651 { 8191 /* testq */, X86::TEST64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, },
10652 { 8191 /* testq */, X86::TEST64ri32, Convert__Reg1_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, },
10653 { 8191 /* testq */, X86::TEST64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
10654 { 8191 /* testq */, X86::TEST64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
10655 { 8197 /* testui */, X86::TESTUI, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10656 { 8204 /* testw */, X86::TEST16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10657 { 8204 /* testw */, X86::TEST16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
10658 { 8204 /* testw */, X86::TEST16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, },
10659 { 8204 /* testw */, X86::TEST16ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
10660 { 8204 /* testw */, X86::TEST16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, },
10661 { 8204 /* testw */, X86::TEST16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
10662 { 8210 /* tileloadd */, X86::TILELOADD, Convert__Reg1_1__SibMem5_0, AMFBS_In64BitMode, { MCK_SibMem, MCK_TILE }, },
10663 { 8220 /* tileloaddt1 */, X86::TILELOADDT1, Convert__Reg1_1__SibMem5_0, AMFBS_In64BitMode, { MCK_SibMem, MCK_TILE }, },
10664 { 8232 /* tilerelease */, X86::TILERELEASE, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10665 { 8244 /* tilestored */, X86::TILESTORED, Convert__SibMem5_1__Reg1_0, AMFBS_In64BitMode, { MCK_TILE, MCK_SibMem }, },
10666 { 8255 /* tilezero */, X86::TILEZERO, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_TILE }, },
10667 { 8264 /* tlbsync */, X86::TLBSYNC, Convert_NoOperands, AMFBS_None, { }, },
10668 { 8272 /* tpause */, X86::TPAUSE, Convert__GR32orGR641_0, AMFBS_None, { MCK_GR32orGR64 }, },
10669 { 8285 /* tzcntl */, X86::TZCNT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10670 { 8285 /* tzcntl */, X86::TZCNT32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
10671 { 8292 /* tzcntq */, X86::TZCNT64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
10672 { 8292 /* tzcntq */, X86::TZCNT64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
10673 { 8299 /* tzcntw */, X86::TZCNT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10674 { 8299 /* tzcntw */, X86::TZCNT16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
10675 { 8312 /* tzmskl */, X86::TZMSK32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10676 { 8312 /* tzmskl */, X86::TZMSK32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
10677 { 8319 /* tzmskq */, X86::TZMSK64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
10678 { 8319 /* tzmskq */, X86::TZMSK64rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
10679 { 8326 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10680 { 8326 /* ucomisd */, X86::UCOMISDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
10681 { 8334 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10682 { 8334 /* ucomiss */, X86::UCOMISSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
10683 { 8346 /* ud1l */, X86::UD1Lr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10684 { 8346 /* ud1l */, X86::UD1Lm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
10685 { 8351 /* ud1q */, X86::UD1Qr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
10686 { 8351 /* ud1q */, X86::UD1Qm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
10687 { 8356 /* ud1w */, X86::UD1Wr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10688 { 8356 /* ud1w */, X86::UD1Wm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
10689 { 8361 /* ud2 */, X86::TRAP, Convert_NoOperands, AMFBS_None, { }, },
10690 { 8365 /* uiret */, X86::UIRET, Convert_NoOperands, AMFBS_In64BitMode, { }, },
10691 { 8371 /* umonitor */, X86::UMONITOR16, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16 }, },
10692 { 8371 /* umonitor */, X86::UMONITOR32, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
10693 { 8371 /* umonitor */, X86::UMONITOR64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
10694 { 8380 /* umwait */, X86::UMWAIT, Convert__GR32orGR641_0, AMFBS_None, { MCK_GR32orGR64 }, },
10695 { 8387 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10696 { 8387 /* unpckhpd */, X86::UNPCKHPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10697 { 8396 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10698 { 8396 /* unpckhps */, X86::UNPCKHPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10699 { 8405 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10700 { 8405 /* unpcklpd */, X86::UNPCKLPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10701 { 8414 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10702 { 8414 /* unpcklps */, X86::UNPCKLPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10703 { 8423 /* v4fmaddps */, X86::V4FMADDPSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
10704 { 8423 /* v4fmaddps */, X86::V4FMADDPSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10705 { 8423 /* v4fmaddps */, X86::V4FMADDPSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10706 { 8433 /* v4fmaddss */, X86::V4FMADDSSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10707 { 8433 /* v4fmaddss */, X86::V4FMADDSSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10708 { 8433 /* v4fmaddss */, X86::V4FMADDSSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10709 { 8443 /* v4fnmaddps */, X86::V4FNMADDPSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
10710 { 8443 /* v4fnmaddps */, X86::V4FNMADDPSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10711 { 8443 /* v4fnmaddps */, X86::V4FNMADDPSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10712 { 8454 /* v4fnmaddss */, X86::V4FNMADDSSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10713 { 8454 /* v4fnmaddss */, X86::V4FNMADDSSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10714 { 8454 /* v4fnmaddss */, X86::V4FNMADDSSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10715 { 8465 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10716 { 8465 /* vaddpd */, X86::VADDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
10717 { 8465 /* vaddpd */, X86::VADDPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10718 { 8465 /* vaddpd */, X86::VADDPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
10719 { 8465 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10720 { 8465 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10721 { 8465 /* vaddpd */, X86::VADDPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10722 { 8465 /* vaddpd */, X86::VADDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10723 { 8465 /* vaddpd */, X86::VADDPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
10724 { 8465 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10725 { 8465 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10726 { 8465 /* vaddpd */, X86::VADDPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
10727 { 8465 /* vaddpd */, X86::VADDPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
10728 { 8465 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
10729 { 8465 /* vaddpd */, X86::VADDPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10730 { 8465 /* vaddpd */, X86::VADDPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10731 { 8465 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10732 { 8465 /* vaddpd */, X86::VADDPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10733 { 8465 /* vaddpd */, X86::VADDPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10734 { 8465 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10735 { 8465 /* vaddpd */, X86::VADDPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10736 { 8465 /* vaddpd */, X86::VADDPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10737 { 8465 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10738 { 8465 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10739 { 8465 /* vaddpd */, X86::VADDPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10740 { 8465 /* vaddpd */, X86::VADDPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10741 { 8465 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10742 { 8465 /* vaddpd */, X86::VADDPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10743 { 8465 /* vaddpd */, X86::VADDPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10744 { 8465 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10745 { 8465 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10746 { 8465 /* vaddpd */, X86::VADDPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10747 { 8465 /* vaddpd */, X86::VADDPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10748 { 8465 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10749 { 8472 /* vaddps */, X86::VADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10750 { 8472 /* vaddps */, X86::VADDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
10751 { 8472 /* vaddps */, X86::VADDPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10752 { 8472 /* vaddps */, X86::VADDPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
10753 { 8472 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10754 { 8472 /* vaddps */, X86::VADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10755 { 8472 /* vaddps */, X86::VADDPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10756 { 8472 /* vaddps */, X86::VADDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10757 { 8472 /* vaddps */, X86::VADDPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
10758 { 8472 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10759 { 8472 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10760 { 8472 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
10761 { 8472 /* vaddps */, X86::VADDPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
10762 { 8472 /* vaddps */, X86::VADDPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
10763 { 8472 /* vaddps */, X86::VADDPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10764 { 8472 /* vaddps */, X86::VADDPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10765 { 8472 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10766 { 8472 /* vaddps */, X86::VADDPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10767 { 8472 /* vaddps */, X86::VADDPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10768 { 8472 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10769 { 8472 /* vaddps */, X86::VADDPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10770 { 8472 /* vaddps */, X86::VADDPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10771 { 8472 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10772 { 8472 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10773 { 8472 /* vaddps */, X86::VADDPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10774 { 8472 /* vaddps */, X86::VADDPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10775 { 8472 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10776 { 8472 /* vaddps */, X86::VADDPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10777 { 8472 /* vaddps */, X86::VADDPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10778 { 8472 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10779 { 8472 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10780 { 8472 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10781 { 8472 /* vaddps */, X86::VADDPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10782 { 8472 /* vaddps */, X86::VADDPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10783 { 8479 /* vaddsd */, X86::VADDSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10784 { 8479 /* vaddsd */, X86::VADDSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10785 { 8479 /* vaddsd */, X86::VADDSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10786 { 8479 /* vaddsd */, X86::VADDSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
10787 { 8479 /* vaddsd */, X86::VADDSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10788 { 8479 /* vaddsd */, X86::VADDSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10789 { 8479 /* vaddsd */, X86::VADDSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10790 { 8479 /* vaddsd */, X86::VADDSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10791 { 8479 /* vaddsd */, X86::VADDSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10792 { 8479 /* vaddsd */, X86::VADDSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10793 { 8479 /* vaddsd */, X86::VADDSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10794 { 8486 /* vaddss */, X86::VADDSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10795 { 8486 /* vaddss */, X86::VADDSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10796 { 8486 /* vaddss */, X86::VADDSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10797 { 8486 /* vaddss */, X86::VADDSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10798 { 8486 /* vaddss */, X86::VADDSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10799 { 8486 /* vaddss */, X86::VADDSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10800 { 8486 /* vaddss */, X86::VADDSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10801 { 8486 /* vaddss */, X86::VADDSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10802 { 8486 /* vaddss */, X86::VADDSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10803 { 8486 /* vaddss */, X86::VADDSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10804 { 8486 /* vaddss */, X86::VADDSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10805 { 8493 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10806 { 8493 /* vaddsubpd */, X86::VADDSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
10807 { 8493 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10808 { 8493 /* vaddsubpd */, X86::VADDSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10809 { 8503 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10810 { 8503 /* vaddsubps */, X86::VADDSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
10811 { 8503 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10812 { 8503 /* vaddsubps */, X86::VADDSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10813 { 8513 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10814 { 8513 /* vaesdec */, X86::VAESDECYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
10815 { 8513 /* vaesdec */, X86::VAESDECZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10816 { 8513 /* vaesdec */, X86::VAESDECZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
10817 { 8513 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10818 { 8513 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10819 { 8513 /* vaesdec */, X86::VAESDECZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10820 { 8513 /* vaesdec */, X86::VAESDECYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10821 { 8513 /* vaesdec */, X86::VAESDECZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
10822 { 8513 /* vaesdec */, X86::VAESDECZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10823 { 8521 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10824 { 8521 /* vaesdeclast */, X86::VAESDECLASTYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
10825 { 8521 /* vaesdeclast */, X86::VAESDECLASTZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10826 { 8521 /* vaesdeclast */, X86::VAESDECLASTZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
10827 { 8521 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10828 { 8521 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10829 { 8521 /* vaesdeclast */, X86::VAESDECLASTZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10830 { 8521 /* vaesdeclast */, X86::VAESDECLASTYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10831 { 8521 /* vaesdeclast */, X86::VAESDECLASTZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
10832 { 8521 /* vaesdeclast */, X86::VAESDECLASTZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10833 { 8533 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10834 { 8533 /* vaesenc */, X86::VAESENCYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
10835 { 8533 /* vaesenc */, X86::VAESENCZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10836 { 8533 /* vaesenc */, X86::VAESENCZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
10837 { 8533 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10838 { 8533 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10839 { 8533 /* vaesenc */, X86::VAESENCZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10840 { 8533 /* vaesenc */, X86::VAESENCYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10841 { 8533 /* vaesenc */, X86::VAESENCZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
10842 { 8533 /* vaesenc */, X86::VAESENCZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10843 { 8541 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10844 { 8541 /* vaesenclast */, X86::VAESENCLASTYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
10845 { 8541 /* vaesenclast */, X86::VAESENCLASTZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10846 { 8541 /* vaesenclast */, X86::VAESENCLASTZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
10847 { 8541 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10848 { 8541 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10849 { 8541 /* vaesenclast */, X86::VAESENCLASTZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10850 { 8541 /* vaesenclast */, X86::VAESENCLASTYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10851 { 8541 /* vaesenclast */, X86::VAESENCLASTZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
10852 { 8541 /* vaesenclast */, X86::VAESENCLASTZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10853 { 8553 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10854 { 8553 /* vaesimc */, X86::VAESIMCrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10855 { 8561 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10856 { 8561 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
10857 { 8578 /* valignd */, X86::VALIGNDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10858 { 8578 /* valignd */, X86::VALIGNDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
10859 { 8578 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10860 { 8578 /* valignd */, X86::VALIGNDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10861 { 8578 /* valignd */, X86::VALIGNDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
10862 { 8578 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10863 { 8578 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
10864 { 8578 /* valignd */, X86::VALIGNDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
10865 { 8578 /* valignd */, X86::VALIGNDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
10866 { 8578 /* valignd */, X86::VALIGNDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10867 { 8578 /* valignd */, X86::VALIGNDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10868 { 8578 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10869 { 8578 /* valignd */, X86::VALIGNDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10870 { 8578 /* valignd */, X86::VALIGNDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10871 { 8578 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10872 { 8578 /* valignd */, X86::VALIGNDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10873 { 8578 /* valignd */, X86::VALIGNDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10874 { 8578 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10875 { 8578 /* valignd */, X86::VALIGNDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10876 { 8578 /* valignd */, X86::VALIGNDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10877 { 8578 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10878 { 8578 /* valignd */, X86::VALIGNDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10879 { 8578 /* valignd */, X86::VALIGNDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10880 { 8578 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10881 { 8578 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10882 { 8578 /* valignd */, X86::VALIGNDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10883 { 8578 /* valignd */, X86::VALIGNDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10884 { 8586 /* valignq */, X86::VALIGNQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10885 { 8586 /* valignq */, X86::VALIGNQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
10886 { 8586 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10887 { 8586 /* valignq */, X86::VALIGNQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10888 { 8586 /* valignq */, X86::VALIGNQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
10889 { 8586 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10890 { 8586 /* valignq */, X86::VALIGNQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
10891 { 8586 /* valignq */, X86::VALIGNQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
10892 { 8586 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
10893 { 8586 /* valignq */, X86::VALIGNQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10894 { 8586 /* valignq */, X86::VALIGNQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10895 { 8586 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10896 { 8586 /* valignq */, X86::VALIGNQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10897 { 8586 /* valignq */, X86::VALIGNQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10898 { 8586 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10899 { 8586 /* valignq */, X86::VALIGNQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10900 { 8586 /* valignq */, X86::VALIGNQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10901 { 8586 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10902 { 8586 /* valignq */, X86::VALIGNQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10903 { 8586 /* valignq */, X86::VALIGNQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10904 { 8586 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10905 { 8586 /* valignq */, X86::VALIGNQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10906 { 8586 /* valignq */, X86::VALIGNQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10907 { 8586 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10908 { 8586 /* valignq */, X86::VALIGNQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10909 { 8586 /* valignq */, X86::VALIGNQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10910 { 8586 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10911 { 8594 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10912 { 8594 /* vandnpd */, X86::VANDNPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
10913 { 8594 /* vandnpd */, X86::VANDNPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10914 { 8594 /* vandnpd */, X86::VANDNPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
10915 { 8594 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10916 { 8594 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10917 { 8594 /* vandnpd */, X86::VANDNPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10918 { 8594 /* vandnpd */, X86::VANDNPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10919 { 8594 /* vandnpd */, X86::VANDNPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
10920 { 8594 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10921 { 8594 /* vandnpd */, X86::VANDNPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
10922 { 8594 /* vandnpd */, X86::VANDNPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
10923 { 8594 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
10924 { 8594 /* vandnpd */, X86::VANDNPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10925 { 8594 /* vandnpd */, X86::VANDNPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10926 { 8594 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10927 { 8594 /* vandnpd */, X86::VANDNPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10928 { 8594 /* vandnpd */, X86::VANDNPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10929 { 8594 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10930 { 8594 /* vandnpd */, X86::VANDNPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10931 { 8594 /* vandnpd */, X86::VANDNPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10932 { 8594 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10933 { 8594 /* vandnpd */, X86::VANDNPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10934 { 8594 /* vandnpd */, X86::VANDNPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10935 { 8594 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10936 { 8594 /* vandnpd */, X86::VANDNPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10937 { 8594 /* vandnpd */, X86::VANDNPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10938 { 8594 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10939 { 8594 /* vandnpd */, X86::VANDNPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10940 { 8594 /* vandnpd */, X86::VANDNPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10941 { 8594 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10942 { 8602 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10943 { 8602 /* vandnps */, X86::VANDNPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
10944 { 8602 /* vandnps */, X86::VANDNPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10945 { 8602 /* vandnps */, X86::VANDNPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
10946 { 8602 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10947 { 8602 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10948 { 8602 /* vandnps */, X86::VANDNPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10949 { 8602 /* vandnps */, X86::VANDNPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10950 { 8602 /* vandnps */, X86::VANDNPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
10951 { 8602 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10952 { 8602 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
10953 { 8602 /* vandnps */, X86::VANDNPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
10954 { 8602 /* vandnps */, X86::VANDNPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
10955 { 8602 /* vandnps */, X86::VANDNPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10956 { 8602 /* vandnps */, X86::VANDNPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10957 { 8602 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10958 { 8602 /* vandnps */, X86::VANDNPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10959 { 8602 /* vandnps */, X86::VANDNPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10960 { 8602 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10961 { 8602 /* vandnps */, X86::VANDNPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10962 { 8602 /* vandnps */, X86::VANDNPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10963 { 8602 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10964 { 8602 /* vandnps */, X86::VANDNPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10965 { 8602 /* vandnps */, X86::VANDNPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10966 { 8602 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10967 { 8602 /* vandnps */, X86::VANDNPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10968 { 8602 /* vandnps */, X86::VANDNPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10969 { 8602 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10970 { 8602 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10971 { 8602 /* vandnps */, X86::VANDNPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10972 { 8602 /* vandnps */, X86::VANDNPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10973 { 8610 /* vandpd */, X86::VANDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10974 { 8610 /* vandpd */, X86::VANDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
10975 { 8610 /* vandpd */, X86::VANDPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10976 { 8610 /* vandpd */, X86::VANDPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
10977 { 8610 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10978 { 8610 /* vandpd */, X86::VANDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10979 { 8610 /* vandpd */, X86::VANDPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10980 { 8610 /* vandpd */, X86::VANDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10981 { 8610 /* vandpd */, X86::VANDPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
10982 { 8610 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10983 { 8610 /* vandpd */, X86::VANDPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
10984 { 8610 /* vandpd */, X86::VANDPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
10985 { 8610 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
10986 { 8610 /* vandpd */, X86::VANDPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10987 { 8610 /* vandpd */, X86::VANDPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10988 { 8610 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10989 { 8610 /* vandpd */, X86::VANDPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10990 { 8610 /* vandpd */, X86::VANDPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10991 { 8610 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10992 { 8610 /* vandpd */, X86::VANDPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10993 { 8610 /* vandpd */, X86::VANDPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10994 { 8610 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10995 { 8610 /* vandpd */, X86::VANDPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10996 { 8610 /* vandpd */, X86::VANDPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10997 { 8610 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10998 { 8610 /* vandpd */, X86::VANDPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10999 { 8610 /* vandpd */, X86::VANDPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11000 { 8610 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11001 { 8610 /* vandpd */, X86::VANDPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11002 { 8610 /* vandpd */, X86::VANDPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11003 { 8610 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11004 { 8617 /* vandps */, X86::VANDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11005 { 8617 /* vandps */, X86::VANDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11006 { 8617 /* vandps */, X86::VANDPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11007 { 8617 /* vandps */, X86::VANDPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11008 { 8617 /* vandps */, X86::VANDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11009 { 8617 /* vandps */, X86::VANDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11010 { 8617 /* vandps */, X86::VANDPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11011 { 8617 /* vandps */, X86::VANDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11012 { 8617 /* vandps */, X86::VANDPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11013 { 8617 /* vandps */, X86::VANDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11014 { 8617 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11015 { 8617 /* vandps */, X86::VANDPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11016 { 8617 /* vandps */, X86::VANDPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11017 { 8617 /* vandps */, X86::VANDPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11018 { 8617 /* vandps */, X86::VANDPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11019 { 8617 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11020 { 8617 /* vandps */, X86::VANDPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11021 { 8617 /* vandps */, X86::VANDPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11022 { 8617 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11023 { 8617 /* vandps */, X86::VANDPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11024 { 8617 /* vandps */, X86::VANDPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11025 { 8617 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11026 { 8617 /* vandps */, X86::VANDPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11027 { 8617 /* vandps */, X86::VANDPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11028 { 8617 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11029 { 8617 /* vandps */, X86::VANDPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11030 { 8617 /* vandps */, X86::VANDPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11031 { 8617 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11032 { 8617 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11033 { 8617 /* vandps */, X86::VANDPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11034 { 8617 /* vandps */, X86::VANDPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11035 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11036 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11037 { 8624 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11038 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11039 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11040 { 8624 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11041 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11042 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11043 { 8624 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11044 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11045 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11046 { 8624 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11047 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11048 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11049 { 8624 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11050 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11051 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11052 { 8624 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11053 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11054 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11055 { 8624 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11056 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11057 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11058 { 8624 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11059 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11060 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11061 { 8624 /* vblendmpd */, X86::VBLENDMPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11062 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11063 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11064 { 8634 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11065 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11066 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11067 { 8634 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11068 { 8634 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11069 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11070 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11071 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11072 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11073 { 8634 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11074 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11075 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11076 { 8634 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11077 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11078 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11079 { 8634 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11080 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11081 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11082 { 8634 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11083 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11084 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11085 { 8634 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11086 { 8634 /* vblendmps */, X86::VBLENDMPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11087 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11088 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11089 { 8644 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11090 { 8644 /* vblendpd */, X86::VBLENDPDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11091 { 8644 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11092 { 8644 /* vblendpd */, X86::VBLENDPDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11093 { 8653 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11094 { 8653 /* vblendps */, X86::VBLENDPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11095 { 8653 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11096 { 8653 /* vblendps */, X86::VBLENDPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11097 { 8662 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11098 { 8662 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11099 { 8662 /* vblendvpd */, X86::VBLENDVPDYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11100 { 8662 /* vblendvpd */, X86::VBLENDVPDYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11101 { 8672 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11102 { 8672 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11103 { 8672 /* vblendvps */, X86::VBLENDVPSYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11104 { 8672 /* vblendvps */, X86::VBLENDVPSYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11105 { 8682 /* vbroadcastf128 */, X86::VBROADCASTF128, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, },
11106 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
11107 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
11108 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, },
11109 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
11110 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11111 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11112 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11113 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11114 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11115 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11116 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11117 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11118 { 8713 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
11119 { 8713 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
11120 { 8713 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11121 { 8713 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11122 { 8713 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11123 { 8713 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11124 { 8729 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
11125 { 8729 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11126 { 8729 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11127 { 8745 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
11128 { 8745 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
11129 { 8745 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11130 { 8745 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11131 { 8745 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11132 { 8745 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11133 { 8761 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
11134 { 8761 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11135 { 8761 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11136 { 8777 /* vbroadcasti128 */, X86::VBROADCASTI128, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, },
11137 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11138 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
11139 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
11140 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
11141 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, },
11142 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
11143 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11144 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11145 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11146 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11147 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11148 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11149 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11150 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11151 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11152 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11153 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11154 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11155 { 8808 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
11156 { 8808 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
11157 { 8808 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11158 { 8808 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11159 { 8808 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11160 { 8808 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11161 { 8824 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
11162 { 8824 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11163 { 8824 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11164 { 8840 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
11165 { 8840 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
11166 { 8840 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11167 { 8840 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11168 { 8840 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11169 { 8840 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11170 { 8856 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
11171 { 8856 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11172 { 8856 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11173 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
11174 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
11175 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
11176 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDYrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256 }, },
11177 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZ256rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, },
11178 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
11179 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11180 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11181 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11182 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11183 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11184 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11185 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11186 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11187 { 8885 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11188 { 8885 /* vbroadcastss */, X86::VBROADCASTSSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
11189 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11190 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
11191 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
11192 { 8885 /* vbroadcastss */, X86::VBROADCASTSSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
11193 { 8885 /* vbroadcastss */, X86::VBROADCASTSSYrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256 }, },
11194 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ128rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
11195 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ256rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X }, },
11196 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512 }, },
11197 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11198 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11199 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11200 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11201 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11202 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11203 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11204 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11205 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11206 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11207 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11208 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZrmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11209 { 8898 /* vcmppd */, X86::VCMPPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11210 { 8898 /* vcmppd */, X86::VCMPPDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11211 { 8898 /* vcmppd */, X86::VCMPPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
11212 { 8898 /* vcmppd */, X86::VCMPPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
11213 { 8898 /* vcmppd */, X86::VCMPPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
11214 { 8898 /* vcmppd */, X86::VCMPPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11215 { 8898 /* vcmppd */, X86::VCMPPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
11216 { 8898 /* vcmppd */, X86::VCMPPDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11217 { 8898 /* vcmppd */, X86::VCMPPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
11218 { 8898 /* vcmppd */, X86::VCMPPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
11219 { 8898 /* vcmppd */, X86::VCMPPDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
11220 { 8898 /* vcmppd */, X86::VCMPPDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
11221 { 8898 /* vcmppd */, X86::VCMPPDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
11222 { 8898 /* vcmppd */, X86::VCMPPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
11223 { 8898 /* vcmppd */, X86::VCMPPDZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11224 { 8898 /* vcmppd */, X86::VCMPPDZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11225 { 8898 /* vcmppd */, X86::VCMPPDZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11226 { 8898 /* vcmppd */, X86::VCMPPDZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11227 { 8898 /* vcmppd */, X86::VCMPPDZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11228 { 8898 /* vcmppd */, X86::VCMPPDZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11229 { 8898 /* vcmppd */, X86::VCMPPDZrribk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11230 { 8898 /* vcmppd */, X86::VCMPPDZ128rmbik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11231 { 8898 /* vcmppd */, X86::VCMPPDZ256rmbik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11232 { 8898 /* vcmppd */, X86::VCMPPDZrmbik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11233 { 8905 /* vcmpps */, X86::VCMPPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11234 { 8905 /* vcmpps */, X86::VCMPPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11235 { 8905 /* vcmpps */, X86::VCMPPSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
11236 { 8905 /* vcmpps */, X86::VCMPPSZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
11237 { 8905 /* vcmpps */, X86::VCMPPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
11238 { 8905 /* vcmpps */, X86::VCMPPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11239 { 8905 /* vcmpps */, X86::VCMPPSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
11240 { 8905 /* vcmpps */, X86::VCMPPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11241 { 8905 /* vcmpps */, X86::VCMPPSZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
11242 { 8905 /* vcmpps */, X86::VCMPPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
11243 { 8905 /* vcmpps */, X86::VCMPPSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
11244 { 8905 /* vcmpps */, X86::VCMPPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
11245 { 8905 /* vcmpps */, X86::VCMPPSZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
11246 { 8905 /* vcmpps */, X86::VCMPPSZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
11247 { 8905 /* vcmpps */, X86::VCMPPSZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11248 { 8905 /* vcmpps */, X86::VCMPPSZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11249 { 8905 /* vcmpps */, X86::VCMPPSZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11250 { 8905 /* vcmpps */, X86::VCMPPSZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11251 { 8905 /* vcmpps */, X86::VCMPPSZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11252 { 8905 /* vcmpps */, X86::VCMPPSZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11253 { 8905 /* vcmpps */, X86::VCMPPSZrribk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11254 { 8905 /* vcmpps */, X86::VCMPPSZrmbik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11255 { 8905 /* vcmpps */, X86::VCMPPSZ128rmbik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11256 { 8905 /* vcmpps */, X86::VCMPPSZ256rmbik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11257 { 8912 /* vcmpsd */, X86::VCMPSDrr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11258 { 8912 /* vcmpsd */, X86::VCMPSDZrr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
11259 { 8912 /* vcmpsd */, X86::VCMPSDrm_Int, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11260 { 8912 /* vcmpsd */, X86::VCMPSDZrm_Int, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_VK1 }, },
11261 { 8912 /* vcmpsd */, X86::VCMPSDZrrb_Int, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
11262 { 8912 /* vcmpsd */, X86::VCMPSDZrr_Intk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11263 { 8912 /* vcmpsd */, X86::VCMPSDZrm_Intk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11264 { 8912 /* vcmpsd */, X86::VCMPSDZrrb_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11265 { 8919 /* vcmpss */, X86::VCMPSSrr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11266 { 8919 /* vcmpss */, X86::VCMPSSZrr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
11267 { 8919 /* vcmpss */, X86::VCMPSSrm_Int, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11268 { 8919 /* vcmpss */, X86::VCMPSSZrm_Int, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_VK1 }, },
11269 { 8919 /* vcmpss */, X86::VCMPSSZrrb_Int, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
11270 { 8919 /* vcmpss */, X86::VCMPSSZrr_Intk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11271 { 8919 /* vcmpss */, X86::VCMPSSZrm_Intk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11272 { 8919 /* vcmpss */, X86::VCMPSSZrrb_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11273 { 8926 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11274 { 8926 /* vcomisd */, X86::VCOMISDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11275 { 8926 /* vcomisd */, X86::VCOMISDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
11276 { 8926 /* vcomisd */, X86::VCOMISDZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
11277 { 8926 /* vcomisd */, X86::VCOMISDZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
11278 { 8934 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11279 { 8934 /* vcomiss */, X86::VCOMISSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11280 { 8934 /* vcomiss */, X86::VCOMISSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
11281 { 8934 /* vcomiss */, X86::VCOMISSZrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
11282 { 8934 /* vcomiss */, X86::VCOMISSZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
11283 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11284 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
11285 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
11286 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
11287 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11288 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
11289 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11290 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11291 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11292 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11293 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11294 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11295 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11296 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11297 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11298 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11299 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
11300 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
11301 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
11302 { 8954 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11303 { 8954 /* vcompressps */, X86::VCOMPRESSPSZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
11304 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11305 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11306 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11307 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11308 { 8954 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11309 { 8954 /* vcompressps */, X86::VCOMPRESSPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11310 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11311 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11312 { 8954 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11313 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11314 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
11315 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11316 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
11317 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
11318 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, },
11319 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
11320 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
11321 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
11322 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
11323 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
11324 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
11325 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
11326 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11327 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11328 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11329 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11330 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11331 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11332 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11333 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11334 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11335 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11336 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11337 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11338 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11339 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11340 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11341 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11342 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11343 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11344 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11345 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
11346 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11347 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
11348 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11349 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
11350 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
11351 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
11352 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
11353 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
11354 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11355 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
11356 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
11357 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
11358 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11359 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11360 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11361 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11362 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11363 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11364 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11365 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11366 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11367 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11368 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11369 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11370 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11371 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11372 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11373 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11374 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11375 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11376 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11377 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11378 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11379 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11380 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11381 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11382 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11383 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11384 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11385 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11386 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11387 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11388 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11389 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11390 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11391 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11392 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11393 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11394 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11395 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11396 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11397 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11398 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11399 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11400 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11401 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11402 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11403 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11404 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11405 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11406 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
11407 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
11408 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, },
11409 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR256X }, },
11410 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
11411 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_FR32X }, },
11412 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11413 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11414 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11415 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11416 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11417 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11418 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11419 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11420 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11421 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11422 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11423 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11424 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11425 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11426 { 9015 /* vcvtneps2bf16x */, X86::VCVTNEPS2BF16Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11427 { 9015 /* vcvtneps2bf16x */, X86::VCVTNEPS2BF16Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
11428 { 9015 /* vcvtneps2bf16x */, X86::VCVTNEPS2BF16Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11429 { 9015 /* vcvtneps2bf16x */, X86::VCVTNEPS2BF16Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11430 { 9030 /* vcvtneps2bf16y */, X86::VCVTNEPS2BF16Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
11431 { 9030 /* vcvtneps2bf16y */, X86::VCVTNEPS2BF16Z256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, },
11432 { 9030 /* vcvtneps2bf16y */, X86::VCVTNEPS2BF16Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11433 { 9030 /* vcvtneps2bf16y */, X86::VCVTNEPS2BF16Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11434 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11435 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
11436 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11437 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
11438 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
11439 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, },
11440 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
11441 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11442 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
11443 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
11444 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11445 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11446 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11447 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11448 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11449 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11450 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11451 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11452 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11453 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11454 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11455 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11456 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11457 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11458 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11459 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11460 { 9055 /* vcvtpd2dqx */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11461 { 9055 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11462 { 9055 /* vcvtpd2dqx */, X86::VCVTPD2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
11463 { 9055 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
11464 { 9055 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11465 { 9055 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11466 { 9055 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11467 { 9055 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11468 { 9055 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11469 { 9055 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11470 { 9055 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11471 { 9066 /* vcvtpd2dqy */, X86::VCVTPD2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
11472 { 9066 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
11473 { 9066 /* vcvtpd2dqy */, X86::VCVTPD2DQYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32 }, },
11474 { 9066 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, },
11475 { 9066 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
11476 { 9066 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11477 { 9066 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11478 { 9066 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11479 { 9066 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11480 { 9066 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11481 { 9066 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11482 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11483 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
11484 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11485 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
11486 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
11487 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, },
11488 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
11489 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11490 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
11491 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
11492 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11493 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11494 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11495 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11496 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11497 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11498 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11499 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11500 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11501 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11502 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11503 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11504 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11505 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11506 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11507 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11508 { 9087 /* vcvtpd2psx */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11509 { 9087 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11510 { 9087 /* vcvtpd2psx */, X86::VCVTPD2PSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
11511 { 9087 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
11512 { 9087 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11513 { 9087 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11514 { 9087 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11515 { 9087 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11516 { 9087 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11517 { 9087 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11518 { 9087 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11519 { 9098 /* vcvtpd2psy */, X86::VCVTPD2PSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
11520 { 9098 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
11521 { 9098 /* vcvtpd2psy */, X86::VCVTPD2PSYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32 }, },
11522 { 9098 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, },
11523 { 9098 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
11524 { 9098 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11525 { 9098 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11526 { 9098 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11527 { 9098 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11528 { 9098 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11529 { 9098 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11530 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11531 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
11532 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11533 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
11534 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
11535 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
11536 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11537 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11538 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
11539 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11540 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11541 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11542 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11543 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11544 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11545 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11546 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11547 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11548 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11549 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11550 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11551 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11552 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11553 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11554 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11555 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11556 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11557 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11558 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11559 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11560 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11561 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
11562 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
11563 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, },
11564 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
11565 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11566 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
11567 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
11568 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11569 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11570 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11571 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11572 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11573 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11574 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11575 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11576 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11577 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11578 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11579 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11580 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11581 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11582 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11583 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11584 { 9130 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11585 { 9130 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
11586 { 9130 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11587 { 9130 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11588 { 9130 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11589 { 9130 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11590 { 9130 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11591 { 9130 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11592 { 9130 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11593 { 9142 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
11594 { 9142 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, },
11595 { 9142 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
11596 { 9142 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11597 { 9142 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11598 { 9142 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11599 { 9142 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11600 { 9142 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11601 { 9142 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11602 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11603 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
11604 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11605 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
11606 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
11607 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
11608 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11609 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11610 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
11611 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11612 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11613 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11614 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11615 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11616 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11617 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11618 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11619 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11620 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11621 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11622 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11623 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11624 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11625 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11626 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11627 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11628 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11629 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11630 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11631 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11632 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11633 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
11634 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11635 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
11636 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
11637 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, },
11638 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
11639 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
11640 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
11641 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
11642 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
11643 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11644 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11645 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11646 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11647 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11648 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11649 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11650 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11651 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11652 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11653 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11654 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11655 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11656 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11657 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11658 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
11659 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11660 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
11661 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11662 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
11663 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
11664 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
11665 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
11666 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
11667 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11668 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
11669 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
11670 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
11671 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11672 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11673 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11674 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11675 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11676 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11677 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11678 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11679 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11680 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11681 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11682 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11683 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11684 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11685 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11686 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11687 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11688 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11689 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11690 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11691 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11692 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
11693 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11694 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
11695 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
11696 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, },
11697 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
11698 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
11699 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
11700 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
11701 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
11702 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
11703 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
11704 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
11705 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11706 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11707 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11708 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11709 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11710 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11711 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11712 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11713 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11714 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11715 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11716 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11717 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11718 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11719 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11720 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11721 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11722 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11723 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11724 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11725 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
11726 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
11727 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHYrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
11728 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHYmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, },
11729 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
11730 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ128mr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64 }, },
11731 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
11732 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
11733 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
11734 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
11735 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZrrb, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
11736 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11737 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ128mrk, Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11738 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11739 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11740 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11741 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11742 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11743 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11744 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11745 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11746 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11747 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11748 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
11749 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
11750 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
11751 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
11752 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
11753 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512 }, },
11754 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
11755 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
11756 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
11757 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11758 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11759 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11760 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11761 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11762 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11763 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11764 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11765 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11766 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11767 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11768 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11769 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11770 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11771 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11772 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11773 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11774 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11775 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11776 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11777 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11778 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
11779 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11780 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
11781 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
11782 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
11783 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11784 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
11785 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
11786 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
11787 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11788 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11789 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11790 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11791 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11792 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11793 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11794 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11795 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11796 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11797 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11798 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11799 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11800 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11801 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11802 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11803 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11804 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11805 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11806 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11807 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11808 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
11809 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
11810 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
11811 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
11812 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
11813 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512 }, },
11814 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
11815 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
11816 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
11817 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11818 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11819 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11820 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11821 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11822 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11823 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11824 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11825 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11826 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11827 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11828 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11829 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11830 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11831 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11832 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11833 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11834 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11835 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11836 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11837 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11838 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
11839 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11840 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
11841 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
11842 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
11843 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11844 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11845 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
11846 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11847 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11848 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11849 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11850 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11851 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11852 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11853 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11854 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11855 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11856 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11857 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11858 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11859 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11860 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11861 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11862 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11863 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11864 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11865 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11866 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11867 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11868 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
11869 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
11870 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, },
11871 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
11872 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11873 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
11874 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
11875 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11876 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11877 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11878 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11879 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11880 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11881 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11882 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11883 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11884 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11885 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11886 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11887 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11888 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11889 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11890 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11891 { 9257 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
11892 { 9257 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
11893 { 9257 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11894 { 9257 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11895 { 9257 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11896 { 9257 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11897 { 9257 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11898 { 9257 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11899 { 9257 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11900 { 9268 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
11901 { 9268 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, },
11902 { 9268 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
11903 { 9268 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11904 { 9268 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11905 { 9268 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11906 { 9268 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11907 { 9268 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11908 { 9268 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11909 { 9279 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
11910 { 9279 /* vcvtsd2si */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
11911 { 9279 /* vcvtsd2si */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
11912 { 9279 /* vcvtsd2si */, X86::VCVTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
11913 { 9279 /* vcvtsd2si */, X86::VCVTSD2SIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
11914 { 9279 /* vcvtsd2si */, X86::VCVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
11915 { 9279 /* vcvtsd2si */, X86::VCVTSD2SI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
11916 { 9279 /* vcvtsd2si */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
11917 { 9279 /* vcvtsd2si */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
11918 { 9279 /* vcvtsd2si */, X86::VCVTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
11919 { 9289 /* vcvtsd2sil */, X86::VCVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
11920 { 9289 /* vcvtsd2sil */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
11921 { 9289 /* vcvtsd2sil */, X86::VCVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
11922 { 9289 /* vcvtsd2sil */, X86::VCVTSD2SIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
11923 { 9289 /* vcvtsd2sil */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
11924 { 9300 /* vcvtsd2siq */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
11925 { 9300 /* vcvtsd2siq */, X86::VCVTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
11926 { 9300 /* vcvtsd2siq */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
11927 { 9300 /* vcvtsd2siq */, X86::VCVTSD2SI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
11928 { 9300 /* vcvtsd2siq */, X86::VCVTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
11929 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11930 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11931 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11932 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11933 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11934 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11935 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11936 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11937 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11938 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11939 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11940 { 9321 /* vcvtsd2usi */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
11941 { 9321 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
11942 { 9321 /* vcvtsd2usi */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
11943 { 9321 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
11944 { 9321 /* vcvtsd2usi */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
11945 { 9321 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
11946 { 9332 /* vcvtsd2usil */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
11947 { 9332 /* vcvtsd2usil */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
11948 { 9332 /* vcvtsd2usil */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
11949 { 9344 /* vcvtsd2usiq */, X86::VCVTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
11950 { 9344 /* vcvtsd2usiq */, X86::VCVTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
11951 { 9344 /* vcvtsd2usiq */, X86::VCVTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
11952 { 9356 /* vcvtsi2sd */, X86::VCVTSI2SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11953 { 9356 /* vcvtsi2sd */, X86::VCVTSI2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
11954 { 9356 /* vcvtsi2sd */, X86::VCVTSI642SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
11955 { 9356 /* vcvtsi2sd */, X86::VCVTSI642SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
11956 { 9356 /* vcvtsi2sd */, X86::VCVTSI2SDrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11957 { 9356 /* vcvtsi2sd */, X86::VCVTSI2SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11958 { 9356 /* vcvtsi2sd */, X86::VCVTSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11959 { 9366 /* vcvtsi2sdl */, X86::VCVTSI2SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11960 { 9366 /* vcvtsi2sdl */, X86::VCVTSI2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
11961 { 9366 /* vcvtsi2sdl */, X86::VCVTSI2SDrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11962 { 9366 /* vcvtsi2sdl */, X86::VCVTSI2SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11963 { 9377 /* vcvtsi2sdq */, X86::VCVTSI642SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
11964 { 9377 /* vcvtsi2sdq */, X86::VCVTSI642SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
11965 { 9377 /* vcvtsi2sdq */, X86::VCVTSI642SDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11966 { 9377 /* vcvtsi2sdq */, X86::VCVTSI642SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11967 { 9377 /* vcvtsi2sdq */, X86::VCVTSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11968 { 9388 /* vcvtsi2ss */, X86::VCVTSI2SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11969 { 9388 /* vcvtsi2ss */, X86::VCVTSI2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
11970 { 9388 /* vcvtsi2ss */, X86::VCVTSI642SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
11971 { 9388 /* vcvtsi2ss */, X86::VCVTSI642SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
11972 { 9388 /* vcvtsi2ss */, X86::VCVTSI2SSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11973 { 9388 /* vcvtsi2ss */, X86::VCVTSI2SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11974 { 9388 /* vcvtsi2ss */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11975 { 9388 /* vcvtsi2ss */, X86::VCVTSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11976 { 9398 /* vcvtsi2ssl */, X86::VCVTSI2SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11977 { 9398 /* vcvtsi2ssl */, X86::VCVTSI2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
11978 { 9398 /* vcvtsi2ssl */, X86::VCVTSI2SSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11979 { 9398 /* vcvtsi2ssl */, X86::VCVTSI2SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11980 { 9398 /* vcvtsi2ssl */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11981 { 9409 /* vcvtsi2ssq */, X86::VCVTSI642SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
11982 { 9409 /* vcvtsi2ssq */, X86::VCVTSI642SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
11983 { 9409 /* vcvtsi2ssq */, X86::VCVTSI642SSrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11984 { 9409 /* vcvtsi2ssq */, X86::VCVTSI642SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11985 { 9409 /* vcvtsi2ssq */, X86::VCVTSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11986 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11987 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11988 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11989 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11990 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11991 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11992 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11993 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11994 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11995 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11996 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11997 { 9430 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
11998 { 9430 /* vcvtss2si */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
11999 { 9430 /* vcvtss2si */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12000 { 9430 /* vcvtss2si */, X86::VCVTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
12001 { 9430 /* vcvtss2si */, X86::VCVTSS2SIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12002 { 9430 /* vcvtss2si */, X86::VCVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12003 { 9430 /* vcvtss2si */, X86::VCVTSS2SI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
12004 { 9430 /* vcvtss2si */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
12005 { 9430 /* vcvtss2si */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
12006 { 9430 /* vcvtss2si */, X86::VCVTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
12007 { 9440 /* vcvtss2sil */, X86::VCVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
12008 { 9440 /* vcvtss2sil */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12009 { 9440 /* vcvtss2sil */, X86::VCVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12010 { 9440 /* vcvtss2sil */, X86::VCVTSS2SIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12011 { 9440 /* vcvtss2sil */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
12012 { 9451 /* vcvtss2siq */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
12013 { 9451 /* vcvtss2siq */, X86::VCVTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
12014 { 9451 /* vcvtss2siq */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
12015 { 9451 /* vcvtss2siq */, X86::VCVTSS2SI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
12016 { 9451 /* vcvtss2siq */, X86::VCVTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
12017 { 9462 /* vcvtss2usi */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12018 { 9462 /* vcvtss2usi */, X86::VCVTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
12019 { 9462 /* vcvtss2usi */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12020 { 9462 /* vcvtss2usi */, X86::VCVTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
12021 { 9462 /* vcvtss2usi */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
12022 { 9462 /* vcvtss2usi */, X86::VCVTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
12023 { 9473 /* vcvtss2usil */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12024 { 9473 /* vcvtss2usil */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12025 { 9473 /* vcvtss2usil */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
12026 { 9485 /* vcvtss2usiq */, X86::VCVTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
12027 { 9485 /* vcvtss2usiq */, X86::VCVTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
12028 { 9485 /* vcvtss2usiq */, X86::VCVTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
12029 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
12030 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
12031 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12032 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
12033 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
12034 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, },
12035 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
12036 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
12037 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
12038 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
12039 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12040 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12041 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12042 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12043 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12044 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12045 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12046 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12047 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12048 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12049 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12050 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12051 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12052 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12053 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12054 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12055 { 9508 /* vcvttpd2dqx */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
12056 { 9508 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12057 { 9508 /* vcvttpd2dqx */, X86::VCVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
12058 { 9508 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
12059 { 9508 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
12060 { 9508 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12061 { 9508 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12062 { 9508 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12063 { 9508 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12064 { 9508 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12065 { 9508 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12066 { 9520 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
12067 { 9520 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
12068 { 9520 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32 }, },
12069 { 9520 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, },
12070 { 9520 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
12071 { 9520 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12072 { 9520 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12073 { 9520 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12074 { 9520 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12075 { 9520 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12076 { 9520 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12077 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12078 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
12079 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12080 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
12081 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
12082 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12083 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12084 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
12085 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
12086 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
12087 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12088 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12089 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12090 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12091 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12092 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12093 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12094 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12095 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12096 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12097 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12098 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12099 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12100 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12101 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12102 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12103 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12104 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12105 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12106 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12107 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12108 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
12109 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
12110 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, },
12111 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
12112 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
12113 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
12114 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
12115 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12116 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12117 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12118 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12119 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12120 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12121 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12122 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12123 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12124 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12125 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12126 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12127 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12128 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12129 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12130 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12131 { 9555 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12132 { 9555 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
12133 { 9555 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
12134 { 9555 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12135 { 9555 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12136 { 9555 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12137 { 9555 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12138 { 9555 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12139 { 9555 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12140 { 9568 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
12141 { 9568 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, },
12142 { 9568 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
12143 { 9568 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12144 { 9568 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12145 { 9568 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12146 { 9568 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12147 { 9568 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12148 { 9568 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12149 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12150 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
12151 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12152 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
12153 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
12154 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12155 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12156 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
12157 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
12158 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
12159 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12160 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12161 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12162 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12163 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12164 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12165 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12166 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12167 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12168 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12169 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12170 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12171 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12172 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12173 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12174 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12175 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12176 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12177 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12178 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12179 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
12180 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
12181 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12182 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
12183 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12184 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
12185 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
12186 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
12187 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
12188 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12189 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12190 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
12191 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
12192 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
12193 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12194 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12195 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12196 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12197 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12198 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12199 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12200 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12201 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12202 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12203 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12204 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12205 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12206 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12207 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12208 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12209 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12210 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12211 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12212 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12213 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12214 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
12215 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
12216 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
12217 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
12218 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
12219 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
12220 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
12221 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
12222 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
12223 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12224 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12225 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12226 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12227 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12228 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12229 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12230 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12231 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12232 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12233 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12234 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12235 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12236 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12237 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12238 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12239 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12240 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12241 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12242 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12243 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12244 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
12245 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12246 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
12247 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
12248 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12249 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12250 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
12251 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
12252 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
12253 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12254 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12255 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12256 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12257 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12258 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12259 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12260 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12261 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12262 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12263 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12264 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12265 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12266 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12267 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12268 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12269 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12270 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12271 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12272 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12273 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12274 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
12275 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
12276 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
12277 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
12278 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
12279 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
12280 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
12281 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
12282 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
12283 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12284 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12285 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12286 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12287 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12288 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12289 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12290 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12291 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12292 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12293 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12294 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12295 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12296 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12297 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12298 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12299 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12300 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12301 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12302 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12303 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
12304 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
12305 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12306 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
12307 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
12308 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
12309 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
12310 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
12311 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12312 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12313 { 9650 /* vcvttsd2sil */, X86::VCVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
12314 { 9650 /* vcvttsd2sil */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12315 { 9650 /* vcvttsd2sil */, X86::VCVTTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
12316 { 9650 /* vcvttsd2sil */, X86::VCVTTSD2SIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
12317 { 9650 /* vcvttsd2sil */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12318 { 9662 /* vcvttsd2siq */, X86::VCVTTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
12319 { 9662 /* vcvttsd2siq */, X86::VCVTTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
12320 { 9662 /* vcvttsd2siq */, X86::VCVTTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
12321 { 9662 /* vcvttsd2siq */, X86::VCVTTSD2SI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
12322 { 9662 /* vcvttsd2siq */, X86::VCVTTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12323 { 9674 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12324 { 9674 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
12325 { 9674 /* vcvttsd2usi */, X86::VCVTTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
12326 { 9674 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
12327 { 9674 /* vcvttsd2usi */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12328 { 9674 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12329 { 9686 /* vcvttsd2usil */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12330 { 9686 /* vcvttsd2usil */, X86::VCVTTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
12331 { 9686 /* vcvttsd2usil */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12332 { 9699 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
12333 { 9699 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
12334 { 9699 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12335 { 9712 /* vcvttss2si */, X86::VCVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
12336 { 9712 /* vcvttss2si */, X86::VCVTTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
12337 { 9712 /* vcvttss2si */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12338 { 9712 /* vcvttss2si */, X86::VCVTTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
12339 { 9712 /* vcvttss2si */, X86::VCVTTSS2SIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12340 { 9712 /* vcvttss2si */, X86::VCVTTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12341 { 9712 /* vcvttss2si */, X86::VCVTTSS2SI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
12342 { 9712 /* vcvttss2si */, X86::VCVTTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
12343 { 9712 /* vcvttss2si */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12344 { 9712 /* vcvttss2si */, X86::VCVTTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12345 { 9723 /* vcvttss2sil */, X86::VCVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
12346 { 9723 /* vcvttss2sil */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12347 { 9723 /* vcvttss2sil */, X86::VCVTTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12348 { 9723 /* vcvttss2sil */, X86::VCVTTSS2SIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12349 { 9723 /* vcvttss2sil */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12350 { 9735 /* vcvttss2siq */, X86::VCVTTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
12351 { 9735 /* vcvttss2siq */, X86::VCVTTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
12352 { 9735 /* vcvttss2siq */, X86::VCVTTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
12353 { 9735 /* vcvttss2siq */, X86::VCVTTSS2SI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
12354 { 9735 /* vcvttss2siq */, X86::VCVTTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12355 { 9747 /* vcvttss2usi */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12356 { 9747 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
12357 { 9747 /* vcvttss2usi */, X86::VCVTTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12358 { 9747 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
12359 { 9747 /* vcvttss2usi */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12360 { 9747 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12361 { 9759 /* vcvttss2usil */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12362 { 9759 /* vcvttss2usil */, X86::VCVTTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12363 { 9759 /* vcvttss2usil */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12364 { 9772 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
12365 { 9772 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR64 }, },
12366 { 9772 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12367 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12368 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
12369 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
12370 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
12371 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
12372 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
12373 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
12374 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
12375 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
12376 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12377 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12378 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12379 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12380 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12381 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12382 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12383 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12384 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12385 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12386 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12387 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12388 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12389 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12390 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12391 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12392 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12393 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12394 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12395 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
12396 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12397 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
12398 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
12399 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12400 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
12401 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
12402 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
12403 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
12404 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12405 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12406 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12407 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12408 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12409 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12410 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12411 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12412 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12413 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12414 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12415 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12416 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12417 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12418 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12419 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12420 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12421 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12422 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12423 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12424 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12425 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
12426 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12427 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
12428 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
12429 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12430 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
12431 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
12432 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
12433 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
12434 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12435 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12436 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12437 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12438 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12439 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12440 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12441 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12442 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12443 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12444 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12445 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12446 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12447 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12448 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12449 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12450 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12451 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12452 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12453 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12454 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12455 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
12456 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
12457 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X }, },
12458 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
12459 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
12460 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
12461 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
12462 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12463 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12464 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12465 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12466 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12467 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12468 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12469 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12470 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12471 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12472 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12473 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12474 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12475 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12476 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12477 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12478 { 9829 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12479 { 9829 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
12480 { 9829 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
12481 { 9829 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12482 { 9829 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12483 { 9829 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12484 { 9829 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12485 { 9829 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12486 { 9829 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12487 { 9841 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
12488 { 9841 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X }, },
12489 { 9841 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
12490 { 9841 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_1__Tie0_2_2__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12491 { 9841 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12492 { 9841 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12493 { 9841 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12494 { 9841 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmbk, Convert__Reg1_2__Tie0_3_3__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12495 { 9841 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12496 { 9853 /* vcvtusi2sd */, X86::VCVTUSI2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
12497 { 9853 /* vcvtusi2sd */, X86::VCVTUSI642SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
12498 { 9853 /* vcvtusi2sd */, X86::VCVTUSI2SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12499 { 9853 /* vcvtusi2sd */, X86::VCVTUSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
12500 { 9864 /* vcvtusi2sdl */, X86::VCVTUSI2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
12501 { 9864 /* vcvtusi2sdl */, X86::VCVTUSI2SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12502 { 9876 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
12503 { 9876 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12504 { 9876 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
12505 { 9888 /* vcvtusi2ss */, X86::VCVTUSI2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
12506 { 9888 /* vcvtusi2ss */, X86::VCVTUSI642SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
12507 { 9888 /* vcvtusi2ss */, X86::VCVTUSI2SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12508 { 9888 /* vcvtusi2ss */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
12509 { 9888 /* vcvtusi2ss */, X86::VCVTUSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
12510 { 9899 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
12511 { 9899 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12512 { 9899 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
12513 { 9911 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
12514 { 9911 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12515 { 9911 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
12516 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12517 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12518 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12519 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12520 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12521 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12522 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12523 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12524 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12525 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12526 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12527 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12528 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12529 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12530 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12531 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12532 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12533 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12534 { 9933 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12535 { 9933 /* vdivpd */, X86::VDIVPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12536 { 9933 /* vdivpd */, X86::VDIVPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12537 { 9933 /* vdivpd */, X86::VDIVPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12538 { 9933 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12539 { 9933 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12540 { 9933 /* vdivpd */, X86::VDIVPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12541 { 9933 /* vdivpd */, X86::VDIVPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12542 { 9933 /* vdivpd */, X86::VDIVPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12543 { 9933 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12544 { 9933 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12545 { 9933 /* vdivpd */, X86::VDIVPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12546 { 9933 /* vdivpd */, X86::VDIVPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12547 { 9933 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12548 { 9933 /* vdivpd */, X86::VDIVPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12549 { 9933 /* vdivpd */, X86::VDIVPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12550 { 9933 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12551 { 9933 /* vdivpd */, X86::VDIVPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12552 { 9933 /* vdivpd */, X86::VDIVPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12553 { 9933 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12554 { 9933 /* vdivpd */, X86::VDIVPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12555 { 9933 /* vdivpd */, X86::VDIVPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12556 { 9933 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12557 { 9933 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12558 { 9933 /* vdivpd */, X86::VDIVPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12559 { 9933 /* vdivpd */, X86::VDIVPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12560 { 9933 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12561 { 9933 /* vdivpd */, X86::VDIVPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12562 { 9933 /* vdivpd */, X86::VDIVPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12563 { 9933 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12564 { 9933 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12565 { 9933 /* vdivpd */, X86::VDIVPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12566 { 9933 /* vdivpd */, X86::VDIVPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12567 { 9933 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12568 { 9940 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12569 { 9940 /* vdivps */, X86::VDIVPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12570 { 9940 /* vdivps */, X86::VDIVPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12571 { 9940 /* vdivps */, X86::VDIVPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12572 { 9940 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12573 { 9940 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12574 { 9940 /* vdivps */, X86::VDIVPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12575 { 9940 /* vdivps */, X86::VDIVPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12576 { 9940 /* vdivps */, X86::VDIVPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12577 { 9940 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12578 { 9940 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12579 { 9940 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12580 { 9940 /* vdivps */, X86::VDIVPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12581 { 9940 /* vdivps */, X86::VDIVPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12582 { 9940 /* vdivps */, X86::VDIVPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12583 { 9940 /* vdivps */, X86::VDIVPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12584 { 9940 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12585 { 9940 /* vdivps */, X86::VDIVPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12586 { 9940 /* vdivps */, X86::VDIVPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12587 { 9940 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12588 { 9940 /* vdivps */, X86::VDIVPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12589 { 9940 /* vdivps */, X86::VDIVPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12590 { 9940 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12591 { 9940 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12592 { 9940 /* vdivps */, X86::VDIVPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12593 { 9940 /* vdivps */, X86::VDIVPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12594 { 9940 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12595 { 9940 /* vdivps */, X86::VDIVPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12596 { 9940 /* vdivps */, X86::VDIVPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12597 { 9940 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12598 { 9940 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12599 { 9940 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12600 { 9940 /* vdivps */, X86::VDIVPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12601 { 9940 /* vdivps */, X86::VDIVPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12602 { 9947 /* vdivsd */, X86::VDIVSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12603 { 9947 /* vdivsd */, X86::VDIVSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12604 { 9947 /* vdivsd */, X86::VDIVSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12605 { 9947 /* vdivsd */, X86::VDIVSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12606 { 9947 /* vdivsd */, X86::VDIVSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12607 { 9947 /* vdivsd */, X86::VDIVSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12608 { 9947 /* vdivsd */, X86::VDIVSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12609 { 9947 /* vdivsd */, X86::VDIVSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12610 { 9947 /* vdivsd */, X86::VDIVSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12611 { 9947 /* vdivsd */, X86::VDIVSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12612 { 9947 /* vdivsd */, X86::VDIVSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12613 { 9954 /* vdivss */, X86::VDIVSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12614 { 9954 /* vdivss */, X86::VDIVSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12615 { 9954 /* vdivss */, X86::VDIVSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12616 { 9954 /* vdivss */, X86::VDIVSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12617 { 9954 /* vdivss */, X86::VDIVSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12618 { 9954 /* vdivss */, X86::VDIVSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12619 { 9954 /* vdivss */, X86::VDIVSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12620 { 9954 /* vdivss */, X86::VDIVSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12621 { 9954 /* vdivss */, X86::VDIVSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12622 { 9954 /* vdivss */, X86::VDIVSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12623 { 9954 /* vdivss */, X86::VDIVSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12624 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12625 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12626 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12627 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12628 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12629 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12630 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12631 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12632 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12633 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12634 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12635 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12636 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12637 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12638 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12639 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12640 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12641 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12642 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12643 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12644 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12645 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12646 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12647 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12648 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12649 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12650 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12651 { 9971 /* vdppd */, X86::VDPPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12652 { 9971 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12653 { 9977 /* vdpps */, X86::VDPPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12654 { 9977 /* vdpps */, X86::VDPPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12655 { 9977 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12656 { 9977 /* vdpps */, X86::VDPPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12657 { 9983 /* verr */, X86::VERRr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
12658 { 9983 /* verr */, X86::VERRm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
12659 { 9988 /* verw */, X86::VERWr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
12660 { 9988 /* verw */, X86::VERWm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
12661 { 9993 /* vexp2pd */, X86::VEXP2PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12662 { 9993 /* vexp2pd */, X86::VEXP2PDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12663 { 9993 /* vexp2pd */, X86::VEXP2PDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12664 { 9993 /* vexp2pd */, X86::VEXP2PDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
12665 { 9993 /* vexp2pd */, X86::VEXP2PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12666 { 9993 /* vexp2pd */, X86::VEXP2PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12667 { 9993 /* vexp2pd */, X86::VEXP2PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12668 { 9993 /* vexp2pd */, X86::VEXP2PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12669 { 9993 /* vexp2pd */, X86::VEXP2PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12670 { 9993 /* vexp2pd */, X86::VEXP2PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12671 { 9993 /* vexp2pd */, X86::VEXP2PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12672 { 9993 /* vexp2pd */, X86::VEXP2PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12673 { 10001 /* vexp2ps */, X86::VEXP2PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12674 { 10001 /* vexp2ps */, X86::VEXP2PSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12675 { 10001 /* vexp2ps */, X86::VEXP2PSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12676 { 10001 /* vexp2ps */, X86::VEXP2PSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
12677 { 10001 /* vexp2ps */, X86::VEXP2PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12678 { 10001 /* vexp2ps */, X86::VEXP2PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12679 { 10001 /* vexp2ps */, X86::VEXP2PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12680 { 10001 /* vexp2ps */, X86::VEXP2PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12681 { 10001 /* vexp2ps */, X86::VEXP2PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12682 { 10001 /* vexp2ps */, X86::VEXP2PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12683 { 10001 /* vexp2ps */, X86::VEXP2PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12684 { 10001 /* vexp2ps */, X86::VEXP2PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12685 { 10009 /* vexpandpd */, X86::VEXPANDPDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12686 { 10009 /* vexpandpd */, X86::VEXPANDPDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
12687 { 10009 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12688 { 10009 /* vexpandpd */, X86::VEXPANDPDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
12689 { 10009 /* vexpandpd */, X86::VEXPANDPDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
12690 { 10009 /* vexpandpd */, X86::VEXPANDPDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12691 { 10009 /* vexpandpd */, X86::VEXPANDPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12692 { 10009 /* vexpandpd */, X86::VEXPANDPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12693 { 10009 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12694 { 10009 /* vexpandpd */, X86::VEXPANDPDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12695 { 10009 /* vexpandpd */, X86::VEXPANDPDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12696 { 10009 /* vexpandpd */, X86::VEXPANDPDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12697 { 10009 /* vexpandpd */, X86::VEXPANDPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12698 { 10009 /* vexpandpd */, X86::VEXPANDPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12699 { 10009 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12700 { 10009 /* vexpandpd */, X86::VEXPANDPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12701 { 10009 /* vexpandpd */, X86::VEXPANDPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12702 { 10009 /* vexpandpd */, X86::VEXPANDPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12703 { 10019 /* vexpandps */, X86::VEXPANDPSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
12704 { 10019 /* vexpandps */, X86::VEXPANDPSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
12705 { 10019 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12706 { 10019 /* vexpandps */, X86::VEXPANDPSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
12707 { 10019 /* vexpandps */, X86::VEXPANDPSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
12708 { 10019 /* vexpandps */, X86::VEXPANDPSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12709 { 10019 /* vexpandps */, X86::VEXPANDPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12710 { 10019 /* vexpandps */, X86::VEXPANDPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12711 { 10019 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12712 { 10019 /* vexpandps */, X86::VEXPANDPSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12713 { 10019 /* vexpandps */, X86::VEXPANDPSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12714 { 10019 /* vexpandps */, X86::VEXPANDPSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12715 { 10019 /* vexpandps */, X86::VEXPANDPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12716 { 10019 /* vexpandps */, X86::VEXPANDPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12717 { 10019 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12718 { 10019 /* vexpandps */, X86::VEXPANDPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12719 { 10019 /* vexpandps */, X86::VEXPANDPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12720 { 10019 /* vexpandps */, X86::VEXPANDPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12721 { 10029 /* vextractf128 */, X86::VEXTRACTF128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
12722 { 10029 /* vextractf128 */, X86::VEXTRACTF128mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, },
12723 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
12724 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
12725 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
12726 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
12727 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12728 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12729 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12730 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12731 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12732 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12733 { 10056 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
12734 { 10056 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
12735 { 10056 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12736 { 10056 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12737 { 10056 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12738 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
12739 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
12740 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
12741 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
12742 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12743 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12744 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12745 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12746 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12747 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12748 { 10084 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
12749 { 10084 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
12750 { 10084 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12751 { 10084 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12752 { 10084 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12753 { 10098 /* vextracti128 */, X86::VEXTRACTI128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
12754 { 10098 /* vextracti128 */, X86::VEXTRACTI128mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, },
12755 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
12756 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
12757 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
12758 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
12759 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12760 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12761 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12762 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12763 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12764 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12765 { 10125 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
12766 { 10125 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
12767 { 10125 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12768 { 10125 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12769 { 10125 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12770 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
12771 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
12772 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
12773 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
12774 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12775 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12776 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12777 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12778 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12779 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12780 { 10153 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
12781 { 10153 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
12782 { 10153 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12783 { 10153 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12784 { 10153 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12785 { 10167 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
12786 { 10167 /* vextractps */, X86::VEXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
12787 { 10167 /* vextractps */, X86::VEXTRACTPSZrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, },
12788 { 10167 /* vextractps */, X86::VEXTRACTPSZmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem32 }, },
12789 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12790 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12791 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12792 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12793 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12794 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12795 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12796 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12797 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12798 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12799 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12800 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12801 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12802 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12803 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12804 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12805 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12806 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12807 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12808 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12809 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12810 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12811 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12812 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12813 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12814 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12815 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12816 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12817 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12818 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12819 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12820 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12821 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12822 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12823 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12824 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12825 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12826 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12827 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12828 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12829 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12830 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12831 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12832 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12833 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12834 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12835 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12836 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12837 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12838 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12839 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12840 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12841 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12842 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12843 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12844 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12845 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12846 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12847 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12848 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12849 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12850 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12851 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12852 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12853 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12854 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12855 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12856 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12857 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12858 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12859 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12860 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12861 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12862 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12863 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12864 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12865 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12866 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12867 { 10226 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12868 { 10226 /* vfmadd132pd */, X86::VFMADD132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12869 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12870 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12871 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12872 { 10226 /* vfmadd132pd */, X86::VFMADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12873 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12874 { 10226 /* vfmadd132pd */, X86::VFMADD132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12875 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12876 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12877 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12878 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12879 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12880 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12881 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12882 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12883 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12884 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12885 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12886 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12887 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12888 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12889 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12890 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12891 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12892 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12893 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12894 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12895 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12896 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12897 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12898 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12899 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12900 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12901 { 10238 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12902 { 10238 /* vfmadd132ps */, X86::VFMADD132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12903 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12904 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12905 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12906 { 10238 /* vfmadd132ps */, X86::VFMADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12907 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12908 { 10238 /* vfmadd132ps */, X86::VFMADD132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12909 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12910 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12911 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12912 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12913 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12914 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12915 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12916 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12917 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12918 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12919 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12920 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12921 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12922 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12923 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12924 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12925 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12926 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12927 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12928 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12929 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12930 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12931 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12932 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12933 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12934 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12935 { 10250 /* vfmadd132sd */, X86::VFMADD132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12936 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12937 { 10250 /* vfmadd132sd */, X86::VFMADD132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12938 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12939 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12940 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12941 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12942 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12943 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12944 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12945 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12946 { 10262 /* vfmadd132ss */, X86::VFMADD132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12947 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12948 { 10262 /* vfmadd132ss */, X86::VFMADD132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12949 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12950 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12951 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12952 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12953 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12954 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12955 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12956 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12957 { 10274 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12958 { 10274 /* vfmadd213pd */, X86::VFMADD213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12959 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12960 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12961 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12962 { 10274 /* vfmadd213pd */, X86::VFMADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12963 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12964 { 10274 /* vfmadd213pd */, X86::VFMADD213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12965 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12966 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12967 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12968 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12969 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12970 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12971 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12972 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12973 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12974 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12975 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12976 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12977 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12978 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12979 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12980 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12981 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12982 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12983 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12984 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12985 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12986 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12987 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12988 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12989 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12990 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12991 { 10286 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12992 { 10286 /* vfmadd213ps */, X86::VFMADD213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12993 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12994 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12995 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12996 { 10286 /* vfmadd213ps */, X86::VFMADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12997 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12998 { 10286 /* vfmadd213ps */, X86::VFMADD213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12999 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13000 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13001 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13002 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13003 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13004 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13005 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13006 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13007 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13008 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13009 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13010 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13011 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13012 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13013 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13014 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13015 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13016 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13017 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13018 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13019 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13020 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13021 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13022 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13023 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13024 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13025 { 10298 /* vfmadd213sd */, X86::VFMADD213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13026 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13027 { 10298 /* vfmadd213sd */, X86::VFMADD213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13028 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13029 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13030 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13031 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13032 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13033 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13034 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13035 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13036 { 10310 /* vfmadd213ss */, X86::VFMADD213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13037 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13038 { 10310 /* vfmadd213ss */, X86::VFMADD213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13039 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13040 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13041 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13042 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13043 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13044 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13045 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13046 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13047 { 10322 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13048 { 10322 /* vfmadd231pd */, X86::VFMADD231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13049 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13050 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13051 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13052 { 10322 /* vfmadd231pd */, X86::VFMADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13053 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13054 { 10322 /* vfmadd231pd */, X86::VFMADD231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13055 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13056 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13057 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13058 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13059 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13060 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13061 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13062 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13063 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13064 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13065 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13066 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13067 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13068 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13069 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13070 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13071 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13072 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13073 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13074 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13075 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13076 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13077 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13078 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13079 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13080 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13081 { 10334 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13082 { 10334 /* vfmadd231ps */, X86::VFMADD231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13083 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13084 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13085 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13086 { 10334 /* vfmadd231ps */, X86::VFMADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13087 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13088 { 10334 /* vfmadd231ps */, X86::VFMADD231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13089 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13090 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13091 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13092 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13093 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13094 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13095 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13096 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13097 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13098 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13099 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13100 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13101 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13102 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13103 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13104 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13105 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13106 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13107 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13108 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13109 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13110 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13111 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13112 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13113 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13114 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13115 { 10346 /* vfmadd231sd */, X86::VFMADD231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13116 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13117 { 10346 /* vfmadd231sd */, X86::VFMADD231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13118 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13119 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13120 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13121 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13122 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13123 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13124 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13125 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13126 { 10358 /* vfmadd231ss */, X86::VFMADD231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13127 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13128 { 10358 /* vfmadd231ss */, X86::VFMADD231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13129 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13130 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13131 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13132 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13133 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13134 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13135 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13136 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13137 { 10370 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13138 { 10370 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13139 { 10370 /* vfmaddpd */, X86::VFMADDPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13140 { 10370 /* vfmaddpd */, X86::VFMADDPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13141 { 10370 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13142 { 10370 /* vfmaddpd */, X86::VFMADDPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13143 { 10379 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13144 { 10379 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13145 { 10379 /* vfmaddps */, X86::VFMADDPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13146 { 10379 /* vfmaddps */, X86::VFMADDPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13147 { 10379 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13148 { 10379 /* vfmaddps */, X86::VFMADDPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13149 { 10388 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13150 { 10388 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13151 { 10388 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13152 { 10397 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13153 { 10397 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13154 { 10397 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13155 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13156 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13157 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13158 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13159 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13160 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13161 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13162 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13163 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13164 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13165 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13166 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13167 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13168 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13169 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13170 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13171 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13172 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13173 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13174 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13175 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13176 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13177 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13178 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13179 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13180 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13181 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13182 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13183 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13184 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13185 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13186 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13187 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13188 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13189 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13190 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13191 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13192 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13193 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13194 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13195 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13196 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13197 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13198 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13199 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13200 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13201 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13202 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13203 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13204 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13205 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13206 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13207 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13208 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13209 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13210 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13211 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13212 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13213 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13214 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13215 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13216 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13217 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13218 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13219 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13220 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13221 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13222 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13223 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13224 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13225 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13226 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13227 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13228 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13229 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13230 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13231 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13232 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13233 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13234 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13235 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13236 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13237 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13238 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13239 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13240 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13241 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13242 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13243 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13244 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13245 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13246 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13247 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13248 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13249 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13250 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13251 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13252 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13253 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13254 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13255 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13256 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13257 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13258 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13259 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13260 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13261 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13262 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13263 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13264 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13265 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13266 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13267 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13268 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13269 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13270 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13271 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13272 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13273 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13274 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13275 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13276 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13277 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13278 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13279 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13280 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13281 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13282 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13283 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13284 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13285 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13286 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13287 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13288 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13289 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13290 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13291 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13292 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13293 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13294 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13295 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13296 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13297 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13298 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13299 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13300 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13301 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13302 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13303 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13304 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13305 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13306 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13307 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13308 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13309 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13310 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13311 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13312 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13313 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13314 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13315 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13316 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13317 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13318 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13319 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13320 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13321 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13322 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13323 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13324 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13325 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13326 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13327 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13328 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13329 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13330 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13331 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13332 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13333 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13334 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13335 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13336 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13337 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13338 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13339 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13340 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13341 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13342 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13343 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13344 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13345 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13346 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13347 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13348 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13349 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13350 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13351 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13352 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13353 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13354 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13355 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13356 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13357 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13358 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13359 { 10496 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13360 { 10496 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13361 { 10496 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13362 { 10496 /* vfmaddsubpd */, X86::VFMADDSUBPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13363 { 10496 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13364 { 10496 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13365 { 10508 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13366 { 10508 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13367 { 10508 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13368 { 10508 /* vfmaddsubps */, X86::VFMADDSUBPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13369 { 10508 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13370 { 10508 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13371 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13372 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13373 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13374 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13375 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13376 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13377 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13378 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13379 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13380 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13381 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13382 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13383 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13384 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13385 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13386 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13387 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13388 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13389 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13390 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13391 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13392 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13393 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13394 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13395 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13396 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13397 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13398 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13399 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13400 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13401 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13402 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13403 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13404 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13405 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13406 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13407 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13408 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13409 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13410 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13411 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13412 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13413 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13414 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13415 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13416 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13417 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13418 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13419 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13420 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13421 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13422 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13423 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13424 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13425 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13426 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13427 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13428 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13429 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13430 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13431 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13432 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13433 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13434 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13435 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13436 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13437 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13438 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13439 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13440 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13441 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13442 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13443 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13444 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13445 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13446 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13447 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13448 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13449 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13450 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13451 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13452 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13453 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13454 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13455 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13456 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13457 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13458 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13459 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13460 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13461 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13462 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13463 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13464 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13465 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13466 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13467 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13468 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13469 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13470 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13471 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13472 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13473 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13474 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13475 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13476 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13477 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13478 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13479 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13480 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13481 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13482 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13483 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13484 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13485 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13486 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13487 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13488 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13489 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13490 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13491 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13492 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13493 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13494 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13495 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13496 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13497 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13498 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13499 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13500 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13501 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13502 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13503 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13504 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13505 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13506 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13507 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13508 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13509 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13510 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13511 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13512 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13513 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13514 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13515 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13516 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13517 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13518 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13519 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13520 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13521 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13522 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13523 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13524 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13525 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13526 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13527 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13528 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13529 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13530 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13531 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13532 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13533 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13534 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13535 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13536 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13537 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13538 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13539 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13540 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13541 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13542 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13543 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13544 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13545 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13546 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13547 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13548 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13549 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13550 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13551 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13552 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13553 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13554 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13555 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13556 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13557 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13558 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13559 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13560 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13561 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13562 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13563 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13564 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13565 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13566 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13567 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13568 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13569 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13570 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13571 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13572 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13573 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13574 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13575 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13576 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13577 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13578 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13579 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13580 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13581 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13582 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13583 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13584 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13585 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13586 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13587 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13588 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13589 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13590 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13591 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13592 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13593 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13594 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13595 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13596 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13597 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13598 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13599 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13600 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13601 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13602 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13603 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13604 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13605 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13606 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13607 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13608 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13609 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13610 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13611 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13612 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13613 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13614 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13615 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13616 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13617 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13618 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13619 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13620 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13621 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13622 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13623 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13624 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13625 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13626 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13627 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13628 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13629 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13630 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13631 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13632 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13633 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13634 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13635 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13636 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13637 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13638 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13639 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13640 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13641 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13642 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13643 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13644 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13645 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13646 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13647 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13648 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13649 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13650 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13651 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13652 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13653 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13654 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13655 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13656 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13657 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13658 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13659 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13660 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13661 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13662 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13663 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13664 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13665 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13666 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13667 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13668 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13669 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13670 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13671 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13672 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13673 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13674 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13675 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13676 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13677 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13678 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13679 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13680 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13681 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13682 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13683 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13684 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13685 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13686 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13687 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13688 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13689 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13690 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13691 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13692 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13693 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13694 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13695 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13696 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13697 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13698 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13699 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13700 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13701 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13702 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13703 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13704 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13705 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13706 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13707 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13708 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13709 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13710 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13711 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13712 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13713 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13714 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13715 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13716 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13717 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13718 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13719 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13720 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13721 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13722 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13723 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13724 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13725 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13726 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13727 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13728 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13729 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13730 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13731 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13732 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13733 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13734 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13735 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13736 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13737 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13738 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13739 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13740 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13741 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13742 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13743 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13744 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13745 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13746 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13747 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13748 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13749 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13750 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13751 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13752 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13753 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13754 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13755 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13756 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13757 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13758 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13759 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13760 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13761 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13762 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13763 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13764 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13765 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13766 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13767 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13768 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13769 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13770 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13771 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13772 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13773 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13774 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13775 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13776 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13777 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13778 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13779 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13780 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13781 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13782 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13783 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13784 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13785 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13786 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13787 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13788 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13789 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13790 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13791 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13792 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13793 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13794 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13795 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13796 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13797 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13798 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13799 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13800 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13801 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13802 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13803 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13804 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13805 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13806 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13807 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13808 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13809 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13810 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13811 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13812 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13813 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13814 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13815 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13816 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13817 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13818 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13819 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13820 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13821 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13822 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13823 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13824 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13825 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13826 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13827 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13828 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13829 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13830 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13831 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13832 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13833 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13834 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13835 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13836 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13837 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13838 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13839 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13840 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13841 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13842 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13843 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13844 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13845 { 10754 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13846 { 10754 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13847 { 10754 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13848 { 10754 /* vfmsubaddpd */, X86::VFMSUBADDPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13849 { 10754 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13850 { 10754 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13851 { 10766 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13852 { 10766 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13853 { 10766 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13854 { 10766 /* vfmsubaddps */, X86::VFMSUBADDPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13855 { 10766 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13856 { 10766 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13857 { 10778 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13858 { 10778 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13859 { 10778 /* vfmsubpd */, X86::VFMSUBPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13860 { 10778 /* vfmsubpd */, X86::VFMSUBPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13861 { 10778 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13862 { 10778 /* vfmsubpd */, X86::VFMSUBPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13863 { 10787 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13864 { 10787 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13865 { 10787 /* vfmsubps */, X86::VFMSUBPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13866 { 10787 /* vfmsubps */, X86::VFMSUBPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13867 { 10787 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13868 { 10787 /* vfmsubps */, X86::VFMSUBPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13869 { 10796 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13870 { 10796 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13871 { 10796 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13872 { 10805 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13873 { 10805 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13874 { 10805 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13875 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13876 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13877 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13878 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13879 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13880 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13881 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13882 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13883 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13884 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13885 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13886 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13887 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13888 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13889 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13890 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13891 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13892 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13893 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13894 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13895 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13896 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13897 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13898 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13899 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13900 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13901 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13902 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13903 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13904 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13905 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13906 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13907 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13908 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13909 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13910 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13911 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13912 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13913 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13914 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13915 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13916 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13917 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13918 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13919 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13920 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13921 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13922 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13923 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13924 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13925 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13926 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13927 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13928 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13929 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13930 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13931 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13932 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13933 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13934 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13935 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13936 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13937 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13938 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13939 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13940 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13941 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13942 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13943 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13944 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13945 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13946 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13947 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13948 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13949 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13950 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13951 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13952 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13953 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13954 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13955 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13956 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13957 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13958 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13959 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13960 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13961 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13962 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13963 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13964 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13965 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13966 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13967 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13968 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13969 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13970 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13971 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13972 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13973 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13974 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13975 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13976 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13977 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13978 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13979 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13980 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13981 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13982 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13983 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13984 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13985 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13986 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13987 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13988 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13989 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13990 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13991 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13992 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13993 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13994 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13995 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13996 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13997 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13998 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13999 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14000 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14001 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14002 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14003 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14004 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14005 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14006 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14007 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14008 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14009 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14010 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14011 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14012 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14013 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14014 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14015 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14016 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14017 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14018 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14019 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14020 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14021 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14022 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14023 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14024 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14025 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14026 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14027 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14028 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14029 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14030 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14031 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14032 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14033 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14034 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14035 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14036 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14037 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14038 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14039 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14040 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14041 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14042 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14043 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14044 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14045 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14046 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14047 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
14048 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14049 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14050 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14051 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14052 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14053 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14054 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14055 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14056 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14057 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14058 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14059 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14060 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14061 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14062 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14063 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14064 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14065 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14066 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14067 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14068 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14069 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14070 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14071 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14072 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14073 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14074 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14075 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14076 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14077 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14078 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14079 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14080 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14081 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14082 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14083 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14084 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14085 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14086 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14087 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14088 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14089 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14090 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14091 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14092 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14093 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14094 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14095 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14096 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14097 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14098 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14099 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14100 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14101 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14102 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14103 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14104 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14105 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14106 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14107 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14108 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14109 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14110 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14111 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14112 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14113 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14114 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14115 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14116 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14117 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14118 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14119 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14120 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14121 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14122 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14123 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14124 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14125 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14126 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14127 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14128 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14129 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14130 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14131 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14132 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14133 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14134 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14135 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14136 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14137 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
14138 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14139 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14140 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14141 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14142 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14143 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14144 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14145 { 10970 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14146 { 10970 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14147 { 10970 /* vfnmaddpd */, X86::VFNMADDPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14148 { 10970 /* vfnmaddpd */, X86::VFNMADDPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14149 { 10970 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14150 { 10970 /* vfnmaddpd */, X86::VFNMADDPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14151 { 10980 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14152 { 10980 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14153 { 10980 /* vfnmaddps */, X86::VFNMADDPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14154 { 10980 /* vfnmaddps */, X86::VFNMADDPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14155 { 10980 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14156 { 10980 /* vfnmaddps */, X86::VFNMADDPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14157 { 10990 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14158 { 10990 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14159 { 10990 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14160 { 11000 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14161 { 11000 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14162 { 11000 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14163 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14164 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14165 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14166 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14167 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14168 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14169 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14170 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14171 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14172 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14173 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14174 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14175 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14176 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14177 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14178 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14179 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14180 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14181 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14182 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14183 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14184 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14185 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14186 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14187 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14188 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14189 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14190 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14191 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14192 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14193 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14194 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14195 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14196 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14197 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14198 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14199 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14200 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14201 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14202 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14203 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14204 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14205 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14206 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14207 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14208 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14209 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14210 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14211 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14212 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14213 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14214 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14215 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14216 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14217 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14218 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14219 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14220 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14221 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14222 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14223 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14224 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14225 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14226 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14227 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14228 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14229 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14230 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14231 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14232 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14233 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14234 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14235 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14236 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14237 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14238 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14239 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14240 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14241 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14242 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14243 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14244 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14245 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
14246 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14247 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14248 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14249 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14250 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14251 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14252 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14253 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14254 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14255 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14256 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14257 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14258 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14259 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14260 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14261 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14262 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14263 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14264 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14265 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14266 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14267 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14268 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14269 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14270 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14271 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14272 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14273 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14274 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14275 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14276 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14277 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14278 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14279 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14280 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14281 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14282 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14283 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14284 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14285 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14286 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14287 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14288 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14289 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14290 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14291 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14292 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14293 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14294 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14295 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14296 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14297 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14298 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14299 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14300 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14301 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14302 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14303 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14304 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14305 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14306 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14307 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14308 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14309 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14310 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14311 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14312 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14313 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14314 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14315 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14316 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14317 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14318 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14319 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14320 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14321 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14322 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14323 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14324 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14325 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14326 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14327 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14328 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14329 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14330 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14331 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14332 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14333 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14334 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14335 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
14336 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14337 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14338 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14339 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14340 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14341 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14342 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14343 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14344 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14345 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14346 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14347 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14348 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14349 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14350 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14351 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14352 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14353 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14354 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14355 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14356 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14357 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14358 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14359 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14360 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14361 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14362 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14363 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14364 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14365 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14366 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14367 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14368 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14369 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14370 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14371 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14372 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14373 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14374 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14375 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14376 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14377 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14378 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14379 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14380 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14381 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14382 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14383 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14384 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14385 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14386 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14387 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14388 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14389 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14390 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14391 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14392 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14393 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14394 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14395 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14396 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14397 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14398 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14399 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14400 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14401 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14402 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14403 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14404 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14405 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14406 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14407 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14408 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14409 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14410 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14411 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14412 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14413 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14414 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14415 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14416 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14417 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14418 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14419 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14420 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14421 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14422 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14423 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14424 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14425 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
14426 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14427 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14428 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14429 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14430 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14431 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14432 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14433 { 11166 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14434 { 11166 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14435 { 11166 /* vfnmsubpd */, X86::VFNMSUBPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14436 { 11166 /* vfnmsubpd */, X86::VFNMSUBPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14437 { 11166 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14438 { 11166 /* vfnmsubpd */, X86::VFNMSUBPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14439 { 11176 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14440 { 11176 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14441 { 11176 /* vfnmsubps */, X86::VFNMSUBPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14442 { 11176 /* vfnmsubps */, X86::VFNMSUBPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14443 { 11176 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14444 { 11176 /* vfnmsubps */, X86::VFNMSUBPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14445 { 11186 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14446 { 11186 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14447 { 11186 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14448 { 11196 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14449 { 11196 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14450 { 11196 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14451 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
14452 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
14453 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
14454 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ128rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1 }, },
14455 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ256rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1 }, },
14456 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZrmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1 }, },
14457 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14458 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14459 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14460 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ128rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14461 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ256rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14462 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZrmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14463 { 11217 /* vfpclasspdx */, X86::VFPCLASSPDZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
14464 { 11217 /* vfpclasspdx */, X86::VFPCLASSPDZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1 }, },
14465 { 11217 /* vfpclasspdx */, X86::VFPCLASSPDZ128rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1 }, },
14466 { 11217 /* vfpclasspdx */, X86::VFPCLASSPDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14467 { 11217 /* vfpclasspdx */, X86::VFPCLASSPDZ128rmk, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14468 { 11217 /* vfpclasspdx */, X86::VFPCLASSPDZ128rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14469 { 11229 /* vfpclasspdy */, X86::VFPCLASSPDZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
14470 { 11229 /* vfpclasspdy */, X86::VFPCLASSPDZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1 }, },
14471 { 11229 /* vfpclasspdy */, X86::VFPCLASSPDZ256rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1 }, },
14472 { 11229 /* vfpclasspdy */, X86::VFPCLASSPDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14473 { 11229 /* vfpclasspdy */, X86::VFPCLASSPDZ256rmk, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14474 { 11229 /* vfpclasspdy */, X86::VFPCLASSPDZ256rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14475 { 11241 /* vfpclasspdz */, X86::VFPCLASSPDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
14476 { 11241 /* vfpclasspdz */, X86::VFPCLASSPDZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1 }, },
14477 { 11241 /* vfpclasspdz */, X86::VFPCLASSPDZrmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1 }, },
14478 { 11241 /* vfpclasspdz */, X86::VFPCLASSPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14479 { 11241 /* vfpclasspdz */, X86::VFPCLASSPDZrmk, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14480 { 11241 /* vfpclasspdz */, X86::VFPCLASSPDZrmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14481 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
14482 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
14483 { 11253 /* vfpclassps */, X86::VFPCLASSPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
14484 { 11253 /* vfpclassps */, X86::VFPCLASSPSZrmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1 }, },
14485 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ128rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1 }, },
14486 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ256rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1 }, },
14487 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14488 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14489 { 11253 /* vfpclassps */, X86::VFPCLASSPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14490 { 11253 /* vfpclassps */, X86::VFPCLASSPSZrmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14491 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ128rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14492 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ256rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14493 { 11264 /* vfpclasspsx */, X86::VFPCLASSPSZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
14494 { 11264 /* vfpclasspsx */, X86::VFPCLASSPSZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1 }, },
14495 { 11264 /* vfpclasspsx */, X86::VFPCLASSPSZ128rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1 }, },
14496 { 11264 /* vfpclasspsx */, X86::VFPCLASSPSZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14497 { 11264 /* vfpclasspsx */, X86::VFPCLASSPSZ128rmk, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14498 { 11264 /* vfpclasspsx */, X86::VFPCLASSPSZ128rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14499 { 11276 /* vfpclasspsy */, X86::VFPCLASSPSZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
14500 { 11276 /* vfpclasspsy */, X86::VFPCLASSPSZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1 }, },
14501 { 11276 /* vfpclasspsy */, X86::VFPCLASSPSZ256rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1 }, },
14502 { 11276 /* vfpclasspsy */, X86::VFPCLASSPSZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14503 { 11276 /* vfpclasspsy */, X86::VFPCLASSPSZ256rmk, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14504 { 11276 /* vfpclasspsy */, X86::VFPCLASSPSZ256rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14505 { 11288 /* vfpclasspsz */, X86::VFPCLASSPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
14506 { 11288 /* vfpclasspsz */, X86::VFPCLASSPSZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1 }, },
14507 { 11288 /* vfpclasspsz */, X86::VFPCLASSPSZrmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1 }, },
14508 { 11288 /* vfpclasspsz */, X86::VFPCLASSPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14509 { 11288 /* vfpclasspsz */, X86::VFPCLASSPSZrmk, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14510 { 11288 /* vfpclasspsz */, X86::VFPCLASSPSZrmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14511 { 11300 /* vfpclasssd */, X86::VFPCLASSSDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
14512 { 11300 /* vfpclasssd */, X86::VFPCLASSSDZrm, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VK1 }, },
14513 { 11300 /* vfpclasssd */, X86::VFPCLASSSDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14514 { 11300 /* vfpclasssd */, X86::VFPCLASSSDZrmk, Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14515 { 11311 /* vfpclassss */, X86::VFPCLASSSSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
14516 { 11311 /* vfpclassss */, X86::VFPCLASSSSZrm, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_VK1 }, },
14517 { 11311 /* vfpclassss */, X86::VFPCLASSSSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14518 { 11311 /* vfpclassss */, X86::VFPCLASSSSZrmk, Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14519 { 11322 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14520 { 11322 /* vfrczpd */, X86::VFRCZPDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
14521 { 11322 /* vfrczpd */, X86::VFRCZPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
14522 { 11322 /* vfrczpd */, X86::VFRCZPDYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
14523 { 11330 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14524 { 11330 /* vfrczps */, X86::VFRCZPSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
14525 { 11330 /* vfrczps */, X86::VFRCZPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
14526 { 11330 /* vfrczps */, X86::VFRCZPSYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
14527 { 11338 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14528 { 11338 /* vfrczsd */, X86::VFRCZSDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
14529 { 11346 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14530 { 11346 /* vfrczss */, X86::VFRCZSSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
14531 { 11354 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
14532 { 11354 /* vgatherdpd */, X86::VGATHERDPDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
14533 { 11354 /* vgatherdpd */, X86::VGATHERDPDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, AMFBS_None, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14534 { 11354 /* vgatherdpd */, X86::VGATHERDPDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0, AMFBS_None, { MCK_Mem256_RC128X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14535 { 11354 /* vgatherdpd */, X86::VGATHERDPDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0, AMFBS_None, { MCK_Mem512_RC256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14536 { 11365 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
14537 { 11365 /* vgatherdps */, X86::VGATHERDPSYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
14538 { 11365 /* vgatherdps */, X86::VGATHERDPSZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, AMFBS_None, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14539 { 11365 /* vgatherdps */, X86::VGATHERDPSZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, AMFBS_None, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14540 { 11365 /* vgatherdps */, X86::VGATHERDPSZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14541 { 11376 /* vgatherpf0dpd */, X86::VGATHERPF0DPDm, Convert__Reg1_2__Mem512_RC256X5_0, AMFBS_None, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14542 { 11390 /* vgatherpf0dps */, X86::VGATHERPF0DPSm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14543 { 11404 /* vgatherpf0qpd */, X86::VGATHERPF0QPDm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14544 { 11418 /* vgatherpf0qps */, X86::VGATHERPF0QPSm, Convert__Reg1_2__Mem256_RC5125_0, AMFBS_None, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14545 { 11432 /* vgatherpf1dpd */, X86::VGATHERPF1DPDm, Convert__Reg1_2__Mem512_RC256X5_0, AMFBS_None, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14546 { 11446 /* vgatherpf1dps */, X86::VGATHERPF1DPSm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14547 { 11460 /* vgatherpf1qpd */, X86::VGATHERPF1QPDm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14548 { 11474 /* vgatherpf1qps */, X86::VGATHERPF1QPSm, Convert__Reg1_2__Mem256_RC5125_0, AMFBS_None, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14549 { 11488 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
14550 { 11488 /* vgatherqpd */, X86::VGATHERQPDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
14551 { 11488 /* vgatherqpd */, X86::VGATHERQPDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, AMFBS_None, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14552 { 11488 /* vgatherqpd */, X86::VGATHERQPDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, AMFBS_None, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14553 { 11488 /* vgatherqpd */, X86::VGATHERQPDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14554 { 11499 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
14555 { 11499 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
14556 { 11499 /* vgatherqps */, X86::VGATHERQPSZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0, AMFBS_None, { MCK_Mem128_RC256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14557 { 11499 /* vgatherqps */, X86::VGATHERQPSZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0, AMFBS_None, { MCK_Mem256_RC512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14558 { 11499 /* vgatherqps */, X86::VGATHERQPSZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0, AMFBS_None, { MCK_Mem64_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14559 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
14560 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
14561 { 11510 /* vgetexppd */, X86::VGETEXPPDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
14562 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
14563 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
14564 { 11510 /* vgetexppd */, X86::VGETEXPPDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
14565 { 11510 /* vgetexppd */, X86::VGETEXPPDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
14566 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
14567 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
14568 { 11510 /* vgetexppd */, X86::VGETEXPPDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
14569 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14570 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14571 { 11510 /* vgetexppd */, X86::VGETEXPPDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14572 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14573 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14574 { 11510 /* vgetexppd */, X86::VGETEXPPDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14575 { 11510 /* vgetexppd */, X86::VGETEXPPDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14576 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14577 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14578 { 11510 /* vgetexppd */, X86::VGETEXPPDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14579 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14580 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14581 { 11510 /* vgetexppd */, X86::VGETEXPPDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14582 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14583 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14584 { 11510 /* vgetexppd */, X86::VGETEXPPDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14585 { 11510 /* vgetexppd */, X86::VGETEXPPDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14586 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14587 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14588 { 11510 /* vgetexppd */, X86::VGETEXPPDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14589 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
14590 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
14591 { 11520 /* vgetexpps */, X86::VGETEXPPSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
14592 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
14593 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
14594 { 11520 /* vgetexpps */, X86::VGETEXPPSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
14595 { 11520 /* vgetexpps */, X86::VGETEXPPSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
14596 { 11520 /* vgetexpps */, X86::VGETEXPPSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
14597 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
14598 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
14599 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14600 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14601 { 11520 /* vgetexpps */, X86::VGETEXPPSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14602 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14603 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14604 { 11520 /* vgetexpps */, X86::VGETEXPPSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14605 { 11520 /* vgetexpps */, X86::VGETEXPPSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14606 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14607 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14608 { 11520 /* vgetexpps */, X86::VGETEXPPSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14609 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14610 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14611 { 11520 /* vgetexpps */, X86::VGETEXPPSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14612 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14613 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14614 { 11520 /* vgetexpps */, X86::VGETEXPPSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14615 { 11520 /* vgetexpps */, X86::VGETEXPPSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14616 { 11520 /* vgetexpps */, X86::VGETEXPPSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14617 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14618 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14619 { 11530 /* vgetexpsd */, X86::VGETEXPSDZr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14620 { 11530 /* vgetexpsd */, X86::VGETEXPSDZm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14621 { 11530 /* vgetexpsd */, X86::VGETEXPSDZrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14622 { 11530 /* vgetexpsd */, X86::VGETEXPSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14623 { 11530 /* vgetexpsd */, X86::VGETEXPSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14624 { 11530 /* vgetexpsd */, X86::VGETEXPSDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14625 { 11530 /* vgetexpsd */, X86::VGETEXPSDZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14626 { 11530 /* vgetexpsd */, X86::VGETEXPSDZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14627 { 11530 /* vgetexpsd */, X86::VGETEXPSDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14628 { 11540 /* vgetexpss */, X86::VGETEXPSSZr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14629 { 11540 /* vgetexpss */, X86::VGETEXPSSZm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
14630 { 11540 /* vgetexpss */, X86::VGETEXPSSZrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14631 { 11540 /* vgetexpss */, X86::VGETEXPSSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14632 { 11540 /* vgetexpss */, X86::VGETEXPSSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14633 { 11540 /* vgetexpss */, X86::VGETEXPSSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14634 { 11540 /* vgetexpss */, X86::VGETEXPSSZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14635 { 11540 /* vgetexpss */, X86::VGETEXPSSZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14636 { 11540 /* vgetexpss */, X86::VGETEXPSSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14637 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
14638 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
14639 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
14640 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
14641 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
14642 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
14643 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
14644 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
14645 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
14646 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
14647 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14648 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14649 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14650 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14651 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14652 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14653 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14654 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14655 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14656 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14657 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14658 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14659 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14660 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14661 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14662 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14663 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14664 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14665 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14666 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14667 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
14668 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
14669 { 11561 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
14670 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
14671 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
14672 { 11561 /* vgetmantps */, X86::VGETMANTPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
14673 { 11561 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
14674 { 11561 /* vgetmantps */, X86::VGETMANTPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
14675 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
14676 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
14677 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14678 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14679 { 11561 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14680 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14681 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14682 { 11561 /* vgetmantps */, X86::VGETMANTPSZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14683 { 11561 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14684 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14685 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14686 { 11561 /* vgetmantps */, X86::VGETMANTPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14687 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14688 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14689 { 11561 /* vgetmantps */, X86::VGETMANTPSZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14690 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14691 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14692 { 11561 /* vgetmantps */, X86::VGETMANTPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14693 { 11561 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14694 { 11561 /* vgetmantps */, X86::VGETMANTPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14695 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14696 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14697 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14698 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrmi, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14699 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14700 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14701 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14702 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14703 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14704 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14705 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14706 { 11583 /* vgetmantss */, X86::VGETMANTSSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14707 { 11583 /* vgetmantss */, X86::VGETMANTSSZrmi, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
14708 { 11583 /* vgetmantss */, X86::VGETMANTSSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14709 { 11583 /* vgetmantss */, X86::VGETMANTSSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14710 { 11583 /* vgetmantss */, X86::VGETMANTSSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14711 { 11583 /* vgetmantss */, X86::VGETMANTSSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14712 { 11583 /* vgetmantss */, X86::VGETMANTSSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14713 { 11583 /* vgetmantss */, X86::VGETMANTSSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14714 { 11583 /* vgetmantss */, X86::VGETMANTSSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14715 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14716 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14717 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14718 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14719 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14720 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14721 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14722 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14723 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14724 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14725 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14726 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14727 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14728 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14729 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14730 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14731 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14732 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14733 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14734 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14735 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14736 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14737 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14738 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14739 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14740 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14741 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14742 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14743 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14744 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14745 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14746 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14747 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14748 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14749 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14750 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14751 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14752 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14753 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14754 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14755 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14756 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14757 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14758 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14759 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14760 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14761 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14762 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14763 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14764 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14765 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14766 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14767 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14768 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14769 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14770 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14771 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14772 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14773 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14774 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14775 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14776 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14777 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14778 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14779 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14780 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14781 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14782 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14783 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14784 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14785 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14786 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14787 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14788 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14789 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14790 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14791 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14792 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14793 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14794 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14795 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14796 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14797 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14798 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14799 { 11638 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14800 { 11638 /* vhaddpd */, X86::VHADDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14801 { 11638 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14802 { 11638 /* vhaddpd */, X86::VHADDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14803 { 11646 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14804 { 11646 /* vhaddps */, X86::VHADDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14805 { 11646 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14806 { 11646 /* vhaddps */, X86::VHADDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14807 { 11654 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14808 { 11654 /* vhsubpd */, X86::VHSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14809 { 11654 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14810 { 11654 /* vhsubpd */, X86::VHSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14811 { 11662 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14812 { 11662 /* vhsubps */, X86::VHSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14813 { 11662 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14814 { 11662 /* vhsubps */, X86::VHSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14815 { 11670 /* vinsertf128 */, X86::VINSERTF128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_VR256, MCK_VR256 }, },
14816 { 11670 /* vinsertf128 */, X86::VINSERTF128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256, MCK_VR256 }, },
14817 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
14818 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
14819 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
14820 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14821 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14822 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14823 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14824 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14825 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14826 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14827 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14828 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14829 { 11695 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
14830 { 11695 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
14831 { 11695 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14832 { 11695 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14833 { 11695 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14834 { 11695 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14835 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
14836 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
14837 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
14838 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14839 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14840 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14841 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14842 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14843 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14844 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14845 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14846 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14847 { 11721 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
14848 { 11721 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
14849 { 11721 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14850 { 11721 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14851 { 11721 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14852 { 11721 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14853 { 11734 /* vinserti128 */, X86::VINSERTI128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_VR256, MCK_VR256 }, },
14854 { 11734 /* vinserti128 */, X86::VINSERTI128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256, MCK_VR256 }, },
14855 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
14856 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
14857 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
14858 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14859 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14860 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14861 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14862 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14863 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14864 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14865 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14866 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14867 { 11759 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
14868 { 11759 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
14869 { 11759 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14870 { 11759 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14871 { 11759 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14872 { 11759 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14873 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
14874 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
14875 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
14876 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14877 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14878 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14879 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14880 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14881 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14882 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14883 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14884 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14885 { 11785 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
14886 { 11785 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
14887 { 11785 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14888 { 11785 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14889 { 11785 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14890 { 11785 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14891 { 11798 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14892 { 11798 /* vinsertps */, X86::VINSERTPSZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14893 { 11798 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14894 { 11798 /* vinsertps */, X86::VINSERTPSZrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
14895 { 11808 /* vlddqu */, X86::VLDDQUrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
14896 { 11808 /* vlddqu */, X86::VLDDQUYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
14897 { 11815 /* vldmxcsr */, X86::VLDMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
14898 { 11824 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
14899 { 11824 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, },
14900 { 11836 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
14901 { 11836 /* vmaskmovpd */, X86::VMASKMOVPDYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
14902 { 11836 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14903 { 11836 /* vmaskmovpd */, X86::VMASKMOVPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14904 { 11847 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
14905 { 11847 /* vmaskmovps */, X86::VMASKMOVPSYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
14906 { 11847 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14907 { 11847 /* vmaskmovps */, X86::VMASKMOVPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14908 { 11858 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14909 { 11858 /* vmaxpd */, X86::VMAXPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14910 { 11858 /* vmaxpd */, X86::VMAXPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14911 { 11858 /* vmaxpd */, X86::VMAXPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14912 { 11858 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14913 { 11858 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14914 { 11858 /* vmaxpd */, X86::VMAXPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14915 { 11858 /* vmaxpd */, X86::VMAXPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14916 { 11858 /* vmaxpd */, X86::VMAXPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14917 { 11858 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14918 { 11858 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14919 { 11858 /* vmaxpd */, X86::VMAXPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14920 { 11858 /* vmaxpd */, X86::VMAXPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14921 { 11858 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14922 { 11858 /* vmaxpd */, X86::VMAXPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14923 { 11858 /* vmaxpd */, X86::VMAXPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14924 { 11858 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14925 { 11858 /* vmaxpd */, X86::VMAXPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14926 { 11858 /* vmaxpd */, X86::VMAXPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14927 { 11858 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14928 { 11858 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14929 { 11858 /* vmaxpd */, X86::VMAXPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14930 { 11858 /* vmaxpd */, X86::VMAXPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14931 { 11858 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14932 { 11858 /* vmaxpd */, X86::VMAXPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14933 { 11858 /* vmaxpd */, X86::VMAXPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14934 { 11858 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14935 { 11858 /* vmaxpd */, X86::VMAXPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14936 { 11858 /* vmaxpd */, X86::VMAXPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14937 { 11858 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14938 { 11858 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14939 { 11858 /* vmaxpd */, X86::VMAXPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14940 { 11858 /* vmaxpd */, X86::VMAXPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14941 { 11858 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14942 { 11865 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14943 { 11865 /* vmaxps */, X86::VMAXPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14944 { 11865 /* vmaxps */, X86::VMAXPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14945 { 11865 /* vmaxps */, X86::VMAXPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14946 { 11865 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14947 { 11865 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14948 { 11865 /* vmaxps */, X86::VMAXPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14949 { 11865 /* vmaxps */, X86::VMAXPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14950 { 11865 /* vmaxps */, X86::VMAXPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14951 { 11865 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14952 { 11865 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14953 { 11865 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14954 { 11865 /* vmaxps */, X86::VMAXPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14955 { 11865 /* vmaxps */, X86::VMAXPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14956 { 11865 /* vmaxps */, X86::VMAXPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14957 { 11865 /* vmaxps */, X86::VMAXPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14958 { 11865 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14959 { 11865 /* vmaxps */, X86::VMAXPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14960 { 11865 /* vmaxps */, X86::VMAXPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14961 { 11865 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14962 { 11865 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14963 { 11865 /* vmaxps */, X86::VMAXPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14964 { 11865 /* vmaxps */, X86::VMAXPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14965 { 11865 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14966 { 11865 /* vmaxps */, X86::VMAXPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14967 { 11865 /* vmaxps */, X86::VMAXPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14968 { 11865 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14969 { 11865 /* vmaxps */, X86::VMAXPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14970 { 11865 /* vmaxps */, X86::VMAXPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14971 { 11865 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14972 { 11865 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14973 { 11865 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14974 { 11865 /* vmaxps */, X86::VMAXPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14975 { 11865 /* vmaxps */, X86::VMAXPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14976 { 11872 /* vmaxsd */, X86::VMAXSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14977 { 11872 /* vmaxsd */, X86::VMAXSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14978 { 11872 /* vmaxsd */, X86::VMAXSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14979 { 11872 /* vmaxsd */, X86::VMAXSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14980 { 11872 /* vmaxsd */, X86::VMAXSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14981 { 11872 /* vmaxsd */, X86::VMAXSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14982 { 11872 /* vmaxsd */, X86::VMAXSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14983 { 11872 /* vmaxsd */, X86::VMAXSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14984 { 11872 /* vmaxsd */, X86::VMAXSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14985 { 11872 /* vmaxsd */, X86::VMAXSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14986 { 11872 /* vmaxsd */, X86::VMAXSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14987 { 11879 /* vmaxss */, X86::VMAXSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14988 { 11879 /* vmaxss */, X86::VMAXSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14989 { 11879 /* vmaxss */, X86::VMAXSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14990 { 11879 /* vmaxss */, X86::VMAXSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
14991 { 11879 /* vmaxss */, X86::VMAXSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14992 { 11879 /* vmaxss */, X86::VMAXSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14993 { 11879 /* vmaxss */, X86::VMAXSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14994 { 11879 /* vmaxss */, X86::VMAXSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14995 { 11879 /* vmaxss */, X86::VMAXSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14996 { 11879 /* vmaxss */, X86::VMAXSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14997 { 11879 /* vmaxss */, X86::VMAXSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14998 { 11886 /* vmcall */, X86::VMCALL, Convert_NoOperands, AMFBS_None, { }, },
14999 { 11893 /* vmclear */, X86::VMCLEARm, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
15000 { 11901 /* vmfunc */, X86::VMFUNC, Convert_NoOperands, AMFBS_None, { }, },
15001 { 11908 /* vminpd */, X86::VMINPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15002 { 11908 /* vminpd */, X86::VMINPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15003 { 11908 /* vminpd */, X86::VMINPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15004 { 11908 /* vminpd */, X86::VMINPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15005 { 11908 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15006 { 11908 /* vminpd */, X86::VMINPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15007 { 11908 /* vminpd */, X86::VMINPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15008 { 11908 /* vminpd */, X86::VMINPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15009 { 11908 /* vminpd */, X86::VMINPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15010 { 11908 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15011 { 11908 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
15012 { 11908 /* vminpd */, X86::VMINPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
15013 { 11908 /* vminpd */, X86::VMINPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
15014 { 11908 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
15015 { 11908 /* vminpd */, X86::VMINPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15016 { 11908 /* vminpd */, X86::VMINPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15017 { 11908 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15018 { 11908 /* vminpd */, X86::VMINPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15019 { 11908 /* vminpd */, X86::VMINPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15020 { 11908 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15021 { 11908 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15022 { 11908 /* vminpd */, X86::VMINPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15023 { 11908 /* vminpd */, X86::VMINPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15024 { 11908 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15025 { 11908 /* vminpd */, X86::VMINPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15026 { 11908 /* vminpd */, X86::VMINPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15027 { 11908 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15028 { 11908 /* vminpd */, X86::VMINPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15029 { 11908 /* vminpd */, X86::VMINPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15030 { 11908 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15031 { 11908 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15032 { 11908 /* vminpd */, X86::VMINPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15033 { 11908 /* vminpd */, X86::VMINPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15034 { 11908 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15035 { 11915 /* vminps */, X86::VMINPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15036 { 11915 /* vminps */, X86::VMINPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15037 { 11915 /* vminps */, X86::VMINPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15038 { 11915 /* vminps */, X86::VMINPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15039 { 11915 /* vminps */, X86::VMINPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15040 { 11915 /* vminps */, X86::VMINPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15041 { 11915 /* vminps */, X86::VMINPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15042 { 11915 /* vminps */, X86::VMINPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15043 { 11915 /* vminps */, X86::VMINPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15044 { 11915 /* vminps */, X86::VMINPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15045 { 11915 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
15046 { 11915 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15047 { 11915 /* vminps */, X86::VMINPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15048 { 11915 /* vminps */, X86::VMINPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15049 { 11915 /* vminps */, X86::VMINPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15050 { 11915 /* vminps */, X86::VMINPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15051 { 11915 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15052 { 11915 /* vminps */, X86::VMINPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15053 { 11915 /* vminps */, X86::VMINPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15054 { 11915 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15055 { 11915 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15056 { 11915 /* vminps */, X86::VMINPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15057 { 11915 /* vminps */, X86::VMINPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15058 { 11915 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15059 { 11915 /* vminps */, X86::VMINPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15060 { 11915 /* vminps */, X86::VMINPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15061 { 11915 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15062 { 11915 /* vminps */, X86::VMINPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15063 { 11915 /* vminps */, X86::VMINPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15064 { 11915 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15065 { 11915 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15066 { 11915 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15067 { 11915 /* vminps */, X86::VMINPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15068 { 11915 /* vminps */, X86::VMINPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15069 { 11922 /* vminsd */, X86::VMINSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15070 { 11922 /* vminsd */, X86::VMINSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15071 { 11922 /* vminsd */, X86::VMINSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15072 { 11922 /* vminsd */, X86::VMINSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
15073 { 11922 /* vminsd */, X86::VMINSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15074 { 11922 /* vminsd */, X86::VMINSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15075 { 11922 /* vminsd */, X86::VMINSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15076 { 11922 /* vminsd */, X86::VMINSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15077 { 11922 /* vminsd */, X86::VMINSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15078 { 11922 /* vminsd */, X86::VMINSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15079 { 11922 /* vminsd */, X86::VMINSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15080 { 11929 /* vminss */, X86::VMINSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15081 { 11929 /* vminss */, X86::VMINSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15082 { 11929 /* vminss */, X86::VMINSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
15083 { 11929 /* vminss */, X86::VMINSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
15084 { 11929 /* vminss */, X86::VMINSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15085 { 11929 /* vminss */, X86::VMINSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15086 { 11929 /* vminss */, X86::VMINSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15087 { 11929 /* vminss */, X86::VMINSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15088 { 11929 /* vminss */, X86::VMINSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15089 { 11929 /* vminss */, X86::VMINSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15090 { 11929 /* vminss */, X86::VMINSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15091 { 11936 /* vmlaunch */, X86::VMLAUNCH, Convert_NoOperands, AMFBS_None, { }, },
15092 { 11945 /* vmload */, X86::VMLOAD32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
15093 { 11945 /* vmload */, X86::VMLOAD64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
15094 { 11945 /* vmload */, X86::VMLOAD32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, },
15095 { 11945 /* vmload */, X86::VMLOAD64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
15096 { 11952 /* vmmcall */, X86::VMMCALL, Convert_NoOperands, AMFBS_None, { }, },
15097 { 11960 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15098 { 11960 /* vmovapd */, X86::VMOVAPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15099 { 11960 /* vmovapd */, X86::VMOVAPDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15100 { 11960 /* vmovapd */, X86::VMOVAPDYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
15101 { 11960 /* vmovapd */, X86::VMOVAPDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15102 { 11960 /* vmovapd */, X86::VMOVAPDZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
15103 { 11960 /* vmovapd */, X86::VMOVAPDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15104 { 11960 /* vmovapd */, X86::VMOVAPDZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
15105 { 11960 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15106 { 11960 /* vmovapd */, X86::VMOVAPDZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15107 { 11960 /* vmovapd */, X86::VMOVAPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15108 { 11960 /* vmovapd */, X86::VMOVAPDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15109 { 11960 /* vmovapd */, X86::VMOVAPDYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
15110 { 11960 /* vmovapd */, X86::VMOVAPDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15111 { 11960 /* vmovapd */, X86::VMOVAPDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15112 { 11960 /* vmovapd */, X86::VMOVAPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15113 { 11960 /* vmovapd */, X86::VMOVAPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15114 { 11960 /* vmovapd */, X86::VMOVAPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15115 { 11960 /* vmovapd */, X86::VMOVAPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15116 { 11960 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15117 { 11960 /* vmovapd */, X86::VMOVAPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15118 { 11960 /* vmovapd */, X86::VMOVAPDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15119 { 11960 /* vmovapd */, X86::VMOVAPDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15120 { 11960 /* vmovapd */, X86::VMOVAPDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15121 { 11960 /* vmovapd */, X86::VMOVAPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15122 { 11960 /* vmovapd */, X86::VMOVAPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15123 { 11960 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15124 { 11960 /* vmovapd */, X86::VMOVAPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15125 { 11960 /* vmovapd */, X86::VMOVAPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15126 { 11960 /* vmovapd */, X86::VMOVAPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15127 { 11968 /* vmovapd.s */, X86::VMOVAPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15128 { 11968 /* vmovapd.s */, X86::VMOVAPDYrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15129 { 11968 /* vmovapd.s */, X86::VMOVAPDZ128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15130 { 11968 /* vmovapd.s */, X86::VMOVAPDZ256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15131 { 11968 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15132 { 11968 /* vmovapd.s */, X86::VMOVAPDZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15133 { 11968 /* vmovapd.s */, X86::VMOVAPDZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15134 { 11968 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15135 { 11968 /* vmovapd.s */, X86::VMOVAPDZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15136 { 11968 /* vmovapd.s */, X86::VMOVAPDZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15137 { 11968 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15138 { 11978 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15139 { 11978 /* vmovaps */, X86::VMOVAPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15140 { 11978 /* vmovaps */, X86::VMOVAPSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15141 { 11978 /* vmovaps */, X86::VMOVAPSYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
15142 { 11978 /* vmovaps */, X86::VMOVAPSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15143 { 11978 /* vmovaps */, X86::VMOVAPSZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
15144 { 11978 /* vmovaps */, X86::VMOVAPSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15145 { 11978 /* vmovaps */, X86::VMOVAPSZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
15146 { 11978 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15147 { 11978 /* vmovaps */, X86::VMOVAPSZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15148 { 11978 /* vmovaps */, X86::VMOVAPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15149 { 11978 /* vmovaps */, X86::VMOVAPSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15150 { 11978 /* vmovaps */, X86::VMOVAPSYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
15151 { 11978 /* vmovaps */, X86::VMOVAPSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15152 { 11978 /* vmovaps */, X86::VMOVAPSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15153 { 11978 /* vmovaps */, X86::VMOVAPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15154 { 11978 /* vmovaps */, X86::VMOVAPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15155 { 11978 /* vmovaps */, X86::VMOVAPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15156 { 11978 /* vmovaps */, X86::VMOVAPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15157 { 11978 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15158 { 11978 /* vmovaps */, X86::VMOVAPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15159 { 11978 /* vmovaps */, X86::VMOVAPSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15160 { 11978 /* vmovaps */, X86::VMOVAPSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15161 { 11978 /* vmovaps */, X86::VMOVAPSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15162 { 11978 /* vmovaps */, X86::VMOVAPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15163 { 11978 /* vmovaps */, X86::VMOVAPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15164 { 11978 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15165 { 11978 /* vmovaps */, X86::VMOVAPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15166 { 11978 /* vmovaps */, X86::VMOVAPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15167 { 11978 /* vmovaps */, X86::VMOVAPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15168 { 11986 /* vmovaps.s */, X86::VMOVAPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15169 { 11986 /* vmovaps.s */, X86::VMOVAPSYrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15170 { 11986 /* vmovaps.s */, X86::VMOVAPSZ128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15171 { 11986 /* vmovaps.s */, X86::VMOVAPSZ256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15172 { 11986 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15173 { 11986 /* vmovaps.s */, X86::VMOVAPSZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15174 { 11986 /* vmovaps.s */, X86::VMOVAPSZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15175 { 11986 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15176 { 11986 /* vmovaps.s */, X86::VMOVAPSZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15177 { 11986 /* vmovaps.s */, X86::VMOVAPSZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15178 { 11986 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15179 { 11996 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
15180 { 11996 /* vmovd */, X86::VMOVPQIto64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
15181 { 11996 /* vmovd */, X86::VMOVPDI2DImr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
15182 { 11996 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
15183 { 11996 /* vmovd */, X86::VMOVDI2PDIZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
15184 { 11996 /* vmovd */, X86::VMOV64toPQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
15185 { 11996 /* vmovd */, X86::VMOV64toPQIZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
15186 { 11996 /* vmovd */, X86::VMOVPDI2DIZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
15187 { 11996 /* vmovd */, X86::VMOVPQIto64Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
15188 { 11996 /* vmovd */, X86::VMOVPDI2DIZmr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
15189 { 11996 /* vmovd */, X86::VMOVDI2PDIrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
15190 { 11996 /* vmovd */, X86::VMOVDI2PDIZrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
15191 { 12002 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15192 { 12002 /* vmovddup */, X86::VMOVDDUPYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15193 { 12002 /* vmovddup */, X86::VMOVDDUPZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15194 { 12002 /* vmovddup */, X86::VMOVDDUPZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15195 { 12002 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15196 { 12002 /* vmovddup */, X86::VMOVDDUPYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
15197 { 12002 /* vmovddup */, X86::VMOVDDUPZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15198 { 12002 /* vmovddup */, X86::VMOVDDUPZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15199 { 12002 /* vmovddup */, X86::VMOVDDUPrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
15200 { 12002 /* vmovddup */, X86::VMOVDDUPZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
15201 { 12002 /* vmovddup */, X86::VMOVDDUPZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15202 { 12002 /* vmovddup */, X86::VMOVDDUPZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15203 { 12002 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15204 { 12002 /* vmovddup */, X86::VMOVDDUPZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15205 { 12002 /* vmovddup */, X86::VMOVDDUPZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15206 { 12002 /* vmovddup */, X86::VMOVDDUPZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15207 { 12002 /* vmovddup */, X86::VMOVDDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15208 { 12002 /* vmovddup */, X86::VMOVDDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15209 { 12002 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15210 { 12002 /* vmovddup */, X86::VMOVDDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15211 { 12002 /* vmovddup */, X86::VMOVDDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15212 { 12002 /* vmovddup */, X86::VMOVDDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15213 { 12011 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15214 { 12011 /* vmovdqa */, X86::VMOVDQAmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15215 { 12011 /* vmovdqa */, X86::VMOVDQAYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15216 { 12011 /* vmovdqa */, X86::VMOVDQAYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
15217 { 12011 /* vmovdqa */, X86::VMOVDQArm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15218 { 12011 /* vmovdqa */, X86::VMOVDQAYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
15219 { 12019 /* vmovdqa.s */, X86::VMOVDQArr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15220 { 12019 /* vmovdqa.s */, X86::VMOVDQAYrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15221 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15222 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
15223 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15224 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
15225 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15226 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15227 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15228 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15229 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15230 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15231 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15232 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15233 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15234 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15235 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15236 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15237 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15238 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15239 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15240 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15241 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15242 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15243 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15244 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15245 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Z128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15246 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Z256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15247 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15248 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15249 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15250 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15251 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15252 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15253 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15254 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15255 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
15256 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15257 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
15258 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15259 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15260 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15261 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15262 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15263 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15264 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15265 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15266 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15267 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15268 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15269 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15270 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15271 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15272 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15273 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15274 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15275 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15276 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15277 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15278 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Z128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15279 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Z256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15280 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15281 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15282 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15283 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15284 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15285 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15286 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15287 { 12073 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15288 { 12073 /* vmovdqu */, X86::VMOVDQUmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15289 { 12073 /* vmovdqu */, X86::VMOVDQUYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15290 { 12073 /* vmovdqu */, X86::VMOVDQUYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
15291 { 12073 /* vmovdqu */, X86::VMOVDQUrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15292 { 12073 /* vmovdqu */, X86::VMOVDQUYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
15293 { 12081 /* vmovdqu.s */, X86::VMOVDQUrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15294 { 12081 /* vmovdqu.s */, X86::VMOVDQUYrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15295 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15296 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
15297 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15298 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
15299 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15300 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15301 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15302 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15303 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15304 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15305 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15306 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15307 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15308 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15309 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15310 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15311 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15312 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15313 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15314 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15315 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15316 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15317 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15318 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15319 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Z128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15320 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Z256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15321 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15322 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15323 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15324 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15325 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15326 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15327 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15328 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15329 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
15330 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15331 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
15332 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15333 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15334 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15335 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15336 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15337 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15338 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15339 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15340 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15341 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15342 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15343 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15344 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15345 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15346 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15347 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15348 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15349 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15350 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15351 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15352 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Z128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15353 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Z256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15354 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15355 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15356 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15357 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15358 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15359 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15360 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15361 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15362 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
15363 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15364 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
15365 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15366 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15367 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15368 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15369 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15370 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15371 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15372 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15373 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15374 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15375 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15376 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15377 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15378 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15379 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15380 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15381 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15382 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15383 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15384 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15385 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Z128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15386 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Z256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15387 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15388 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15389 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15390 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15391 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15392 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15393 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15394 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15395 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
15396 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15397 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
15398 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15399 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15400 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15401 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15402 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15403 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15404 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15405 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15406 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15407 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15408 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15409 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15410 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15411 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15412 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15413 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15414 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15415 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15416 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15417 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15418 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Z128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15419 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Z256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15420 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15421 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15422 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15423 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15424 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15425 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15426 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15427 { 12177 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15428 { 12177 /* vmovhlps */, X86::VMOVHLPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15429 { 12186 /* vmovhpd */, X86::VMOVHPDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
15430 { 12186 /* vmovhpd */, X86::VMOVHPDZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
15431 { 12186 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15432 { 12186 /* vmovhpd */, X86::VMOVHPDZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
15433 { 12194 /* vmovhps */, X86::VMOVHPSmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
15434 { 12194 /* vmovhps */, X86::VMOVHPSZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
15435 { 12194 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15436 { 12194 /* vmovhps */, X86::VMOVHPSZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
15437 { 12202 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15438 { 12202 /* vmovlhps */, X86::VMOVLHPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15439 { 12211 /* vmovlpd */, X86::VMOVLPDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
15440 { 12211 /* vmovlpd */, X86::VMOVLPDZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
15441 { 12211 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15442 { 12211 /* vmovlpd */, X86::VMOVLPDZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
15443 { 12219 /* vmovlps */, X86::VMOVLPSmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
15444 { 12219 /* vmovlps */, X86::VMOVLPSZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
15445 { 12219 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15446 { 12219 /* vmovlps */, X86::VMOVLPSZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
15447 { 12227 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
15448 { 12227 /* vmovmskpd */, X86::VMOVMSKPDYrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_GR32orGR64 }, },
15449 { 12237 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
15450 { 12237 /* vmovmskps */, X86::VMOVMSKPSYrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_GR32orGR64 }, },
15451 { 12247 /* vmovntdq */, X86::VMOVNTDQmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15452 { 12247 /* vmovntdq */, X86::VMOVNTDQYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
15453 { 12247 /* vmovntdq */, X86::VMOVNTDQZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
15454 { 12247 /* vmovntdq */, X86::VMOVNTDQZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
15455 { 12247 /* vmovntdq */, X86::VMOVNTDQZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15456 { 12256 /* vmovntdqa */, X86::VMOVNTDQArm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15457 { 12256 /* vmovntdqa */, X86::VMOVNTDQAZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15458 { 12256 /* vmovntdqa */, X86::VMOVNTDQAYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
15459 { 12256 /* vmovntdqa */, X86::VMOVNTDQAZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15460 { 12256 /* vmovntdqa */, X86::VMOVNTDQAZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15461 { 12266 /* vmovntpd */, X86::VMOVNTPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15462 { 12266 /* vmovntpd */, X86::VMOVNTPDYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
15463 { 12266 /* vmovntpd */, X86::VMOVNTPDZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
15464 { 12266 /* vmovntpd */, X86::VMOVNTPDZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
15465 { 12266 /* vmovntpd */, X86::VMOVNTPDZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15466 { 12275 /* vmovntps */, X86::VMOVNTPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15467 { 12275 /* vmovntps */, X86::VMOVNTPSYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
15468 { 12275 /* vmovntps */, X86::VMOVNTPSZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
15469 { 12275 /* vmovntps */, X86::VMOVNTPSZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
15470 { 12275 /* vmovntps */, X86::VMOVNTPSZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15471 { 12284 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15472 { 12284 /* vmovq */, X86::VMOVPQIto64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
15473 { 12284 /* vmovq */, X86::VMOVPQI2QImr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
15474 { 12284 /* vmovq */, X86::VMOV64toPQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
15475 { 12284 /* vmovq */, X86::VMOV64toPQIZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
15476 { 12284 /* vmovq */, X86::VMOVPQIto64Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
15477 { 12284 /* vmovq */, X86::VMOVZPQILo2PQIZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15478 { 12284 /* vmovq */, X86::VMOVPQI2QIZmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
15479 { 12284 /* vmovq */, X86::VMOVQI2PQIrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
15480 { 12284 /* vmovq */, X86::VMOVQI2PQIZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
15481 { 12290 /* vmovq.s */, X86::VMOVPQI2QIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15482 { 12290 /* vmovq.s */, X86::VMOVPQI2QIZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15483 { 12298 /* vmovsd */, X86::VMOVSDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
15484 { 12298 /* vmovsd */, X86::VMOVSDZmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
15485 { 12298 /* vmovsd */, X86::VMOVSDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
15486 { 12298 /* vmovsd */, X86::VMOVSDZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
15487 { 12298 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15488 { 12298 /* vmovsd */, X86::VMOVSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15489 { 12298 /* vmovsd */, X86::VMOVSDZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15490 { 12298 /* vmovsd */, X86::VMOVSDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15491 { 12298 /* vmovsd */, X86::VMOVSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15492 { 12298 /* vmovsd */, X86::VMOVSDZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15493 { 12298 /* vmovsd */, X86::VMOVSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15494 { 12305 /* vmovsd.s */, X86::VMOVSDrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15495 { 12305 /* vmovsd.s */, X86::VMOVSDZrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15496 { 12305 /* vmovsd.s */, X86::VMOVSDZrrk_REV, Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15497 { 12305 /* vmovsd.s */, X86::VMOVSDZrrkz_REV, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15498 { 12314 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15499 { 12314 /* vmovshdup */, X86::VMOVSHDUPYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15500 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15501 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15502 { 12314 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15503 { 12314 /* vmovshdup */, X86::VMOVSHDUPrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15504 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15505 { 12314 /* vmovshdup */, X86::VMOVSHDUPYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
15506 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15507 { 12314 /* vmovshdup */, X86::VMOVSHDUPZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15508 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15509 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15510 { 12314 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15511 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15512 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15513 { 12314 /* vmovshdup */, X86::VMOVSHDUPZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15514 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15515 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15516 { 12314 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15517 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15518 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15519 { 12314 /* vmovshdup */, X86::VMOVSHDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15520 { 12324 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15521 { 12324 /* vmovsldup */, X86::VMOVSLDUPYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15522 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15523 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15524 { 12324 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15525 { 12324 /* vmovsldup */, X86::VMOVSLDUPrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15526 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15527 { 12324 /* vmovsldup */, X86::VMOVSLDUPYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
15528 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15529 { 12324 /* vmovsldup */, X86::VMOVSLDUPZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15530 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15531 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15532 { 12324 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15533 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15534 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15535 { 12324 /* vmovsldup */, X86::VMOVSLDUPZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15536 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15537 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15538 { 12324 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15539 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15540 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15541 { 12324 /* vmovsldup */, X86::VMOVSLDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15542 { 12334 /* vmovss */, X86::VMOVSSmr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
15543 { 12334 /* vmovss */, X86::VMOVSSZmr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
15544 { 12334 /* vmovss */, X86::VMOVSSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
15545 { 12334 /* vmovss */, X86::VMOVSSZrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
15546 { 12334 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15547 { 12334 /* vmovss */, X86::VMOVSSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15548 { 12334 /* vmovss */, X86::VMOVSSZmrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15549 { 12334 /* vmovss */, X86::VMOVSSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15550 { 12334 /* vmovss */, X86::VMOVSSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15551 { 12334 /* vmovss */, X86::VMOVSSZrmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15552 { 12334 /* vmovss */, X86::VMOVSSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15553 { 12341 /* vmovss.s */, X86::VMOVSSrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15554 { 12341 /* vmovss.s */, X86::VMOVSSZrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15555 { 12341 /* vmovss.s */, X86::VMOVSSZrrk_REV, Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15556 { 12341 /* vmovss.s */, X86::VMOVSSZrrkz_REV, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15557 { 12350 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15558 { 12350 /* vmovupd */, X86::VMOVUPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15559 { 12350 /* vmovupd */, X86::VMOVUPDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15560 { 12350 /* vmovupd */, X86::VMOVUPDYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
15561 { 12350 /* vmovupd */, X86::VMOVUPDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15562 { 12350 /* vmovupd */, X86::VMOVUPDZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
15563 { 12350 /* vmovupd */, X86::VMOVUPDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15564 { 12350 /* vmovupd */, X86::VMOVUPDZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
15565 { 12350 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15566 { 12350 /* vmovupd */, X86::VMOVUPDZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15567 { 12350 /* vmovupd */, X86::VMOVUPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15568 { 12350 /* vmovupd */, X86::VMOVUPDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15569 { 12350 /* vmovupd */, X86::VMOVUPDYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
15570 { 12350 /* vmovupd */, X86::VMOVUPDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15571 { 12350 /* vmovupd */, X86::VMOVUPDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15572 { 12350 /* vmovupd */, X86::VMOVUPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15573 { 12350 /* vmovupd */, X86::VMOVUPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15574 { 12350 /* vmovupd */, X86::VMOVUPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15575 { 12350 /* vmovupd */, X86::VMOVUPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15576 { 12350 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15577 { 12350 /* vmovupd */, X86::VMOVUPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15578 { 12350 /* vmovupd */, X86::VMOVUPDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15579 { 12350 /* vmovupd */, X86::VMOVUPDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15580 { 12350 /* vmovupd */, X86::VMOVUPDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15581 { 12350 /* vmovupd */, X86::VMOVUPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15582 { 12350 /* vmovupd */, X86::VMOVUPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15583 { 12350 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15584 { 12350 /* vmovupd */, X86::VMOVUPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15585 { 12350 /* vmovupd */, X86::VMOVUPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15586 { 12350 /* vmovupd */, X86::VMOVUPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15587 { 12358 /* vmovupd.s */, X86::VMOVUPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15588 { 12358 /* vmovupd.s */, X86::VMOVUPDYrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15589 { 12358 /* vmovupd.s */, X86::VMOVUPDZ128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15590 { 12358 /* vmovupd.s */, X86::VMOVUPDZ256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15591 { 12358 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15592 { 12358 /* vmovupd.s */, X86::VMOVUPDZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15593 { 12358 /* vmovupd.s */, X86::VMOVUPDZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15594 { 12358 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15595 { 12358 /* vmovupd.s */, X86::VMOVUPDZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15596 { 12358 /* vmovupd.s */, X86::VMOVUPDZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15597 { 12358 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15598 { 12368 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15599 { 12368 /* vmovups */, X86::VMOVUPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15600 { 12368 /* vmovups */, X86::VMOVUPSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15601 { 12368 /* vmovups */, X86::VMOVUPSYmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
15602 { 12368 /* vmovups */, X86::VMOVUPSZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15603 { 12368 /* vmovups */, X86::VMOVUPSZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
15604 { 12368 /* vmovups */, X86::VMOVUPSZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15605 { 12368 /* vmovups */, X86::VMOVUPSZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
15606 { 12368 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15607 { 12368 /* vmovups */, X86::VMOVUPSZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15608 { 12368 /* vmovups */, X86::VMOVUPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15609 { 12368 /* vmovups */, X86::VMOVUPSZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15610 { 12368 /* vmovups */, X86::VMOVUPSYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
15611 { 12368 /* vmovups */, X86::VMOVUPSZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15612 { 12368 /* vmovups */, X86::VMOVUPSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15613 { 12368 /* vmovups */, X86::VMOVUPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15614 { 12368 /* vmovups */, X86::VMOVUPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15615 { 12368 /* vmovups */, X86::VMOVUPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15616 { 12368 /* vmovups */, X86::VMOVUPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15617 { 12368 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15618 { 12368 /* vmovups */, X86::VMOVUPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15619 { 12368 /* vmovups */, X86::VMOVUPSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15620 { 12368 /* vmovups */, X86::VMOVUPSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15621 { 12368 /* vmovups */, X86::VMOVUPSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15622 { 12368 /* vmovups */, X86::VMOVUPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15623 { 12368 /* vmovups */, X86::VMOVUPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15624 { 12368 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15625 { 12368 /* vmovups */, X86::VMOVUPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15626 { 12368 /* vmovups */, X86::VMOVUPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15627 { 12368 /* vmovups */, X86::VMOVUPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15628 { 12376 /* vmovups.s */, X86::VMOVUPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15629 { 12376 /* vmovups.s */, X86::VMOVUPSYrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15630 { 12376 /* vmovups.s */, X86::VMOVUPSZ128rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15631 { 12376 /* vmovups.s */, X86::VMOVUPSZ256rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15632 { 12376 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15633 { 12376 /* vmovups.s */, X86::VMOVUPSZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15634 { 12376 /* vmovups.s */, X86::VMOVUPSZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15635 { 12376 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15636 { 12376 /* vmovups.s */, X86::VMOVUPSZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15637 { 12376 /* vmovups.s */, X86::VMOVUPSZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15638 { 12376 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15639 { 12386 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15640 { 12386 /* vmpsadbw */, X86::VMPSADBWYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15641 { 12386 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15642 { 12386 /* vmpsadbw */, X86::VMPSADBWYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15643 { 12395 /* vmptrld */, X86::VMPTRLDm, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
15644 { 12403 /* vmptrst */, X86::VMPTRSTm, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
15645 { 12418 /* vmreadl */, X86::VMREAD32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
15646 { 12418 /* vmreadl */, X86::VMREAD32mr, Convert__Mem325_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
15647 { 12426 /* vmreadq */, X86::VMREAD64rr, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_GR64 }, },
15648 { 12426 /* vmreadq */, X86::VMREAD64mr, Convert__Mem645_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem64 }, },
15649 { 12434 /* vmresume */, X86::VMRESUME, Convert_NoOperands, AMFBS_None, { }, },
15650 { 12443 /* vmrun */, X86::VMRUN32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
15651 { 12443 /* vmrun */, X86::VMRUN64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
15652 { 12443 /* vmrun */, X86::VMRUN32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, },
15653 { 12443 /* vmrun */, X86::VMRUN64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
15654 { 12449 /* vmsave */, X86::VMSAVE32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
15655 { 12449 /* vmsave */, X86::VMSAVE64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
15656 { 12449 /* vmsave */, X86::VMSAVE32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, },
15657 { 12449 /* vmsave */, X86::VMSAVE64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
15658 { 12456 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15659 { 12456 /* vmulpd */, X86::VMULPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15660 { 12456 /* vmulpd */, X86::VMULPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15661 { 12456 /* vmulpd */, X86::VMULPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15662 { 12456 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15663 { 12456 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15664 { 12456 /* vmulpd */, X86::VMULPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15665 { 12456 /* vmulpd */, X86::VMULPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15666 { 12456 /* vmulpd */, X86::VMULPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15667 { 12456 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15668 { 12456 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
15669 { 12456 /* vmulpd */, X86::VMULPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
15670 { 12456 /* vmulpd */, X86::VMULPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
15671 { 12456 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
15672 { 12456 /* vmulpd */, X86::VMULPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15673 { 12456 /* vmulpd */, X86::VMULPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15674 { 12456 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15675 { 12456 /* vmulpd */, X86::VMULPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15676 { 12456 /* vmulpd */, X86::VMULPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15677 { 12456 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15678 { 12456 /* vmulpd */, X86::VMULPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15679 { 12456 /* vmulpd */, X86::VMULPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15680 { 12456 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15681 { 12456 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15682 { 12456 /* vmulpd */, X86::VMULPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15683 { 12456 /* vmulpd */, X86::VMULPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15684 { 12456 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15685 { 12456 /* vmulpd */, X86::VMULPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15686 { 12456 /* vmulpd */, X86::VMULPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15687 { 12456 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15688 { 12456 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15689 { 12456 /* vmulpd */, X86::VMULPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15690 { 12456 /* vmulpd */, X86::VMULPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15691 { 12456 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15692 { 12463 /* vmulps */, X86::VMULPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15693 { 12463 /* vmulps */, X86::VMULPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15694 { 12463 /* vmulps */, X86::VMULPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15695 { 12463 /* vmulps */, X86::VMULPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15696 { 12463 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15697 { 12463 /* vmulps */, X86::VMULPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15698 { 12463 /* vmulps */, X86::VMULPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15699 { 12463 /* vmulps */, X86::VMULPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15700 { 12463 /* vmulps */, X86::VMULPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15701 { 12463 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15702 { 12463 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
15703 { 12463 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15704 { 12463 /* vmulps */, X86::VMULPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15705 { 12463 /* vmulps */, X86::VMULPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15706 { 12463 /* vmulps */, X86::VMULPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15707 { 12463 /* vmulps */, X86::VMULPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15708 { 12463 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15709 { 12463 /* vmulps */, X86::VMULPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15710 { 12463 /* vmulps */, X86::VMULPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15711 { 12463 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15712 { 12463 /* vmulps */, X86::VMULPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15713 { 12463 /* vmulps */, X86::VMULPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15714 { 12463 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15715 { 12463 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15716 { 12463 /* vmulps */, X86::VMULPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15717 { 12463 /* vmulps */, X86::VMULPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15718 { 12463 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15719 { 12463 /* vmulps */, X86::VMULPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15720 { 12463 /* vmulps */, X86::VMULPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15721 { 12463 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15722 { 12463 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15723 { 12463 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15724 { 12463 /* vmulps */, X86::VMULPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15725 { 12463 /* vmulps */, X86::VMULPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15726 { 12470 /* vmulsd */, X86::VMULSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15727 { 12470 /* vmulsd */, X86::VMULSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15728 { 12470 /* vmulsd */, X86::VMULSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15729 { 12470 /* vmulsd */, X86::VMULSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
15730 { 12470 /* vmulsd */, X86::VMULSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15731 { 12470 /* vmulsd */, X86::VMULSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15732 { 12470 /* vmulsd */, X86::VMULSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15733 { 12470 /* vmulsd */, X86::VMULSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15734 { 12470 /* vmulsd */, X86::VMULSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15735 { 12470 /* vmulsd */, X86::VMULSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15736 { 12470 /* vmulsd */, X86::VMULSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15737 { 12477 /* vmulss */, X86::VMULSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15738 { 12477 /* vmulss */, X86::VMULSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15739 { 12477 /* vmulss */, X86::VMULSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
15740 { 12477 /* vmulss */, X86::VMULSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
15741 { 12477 /* vmulss */, X86::VMULSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15742 { 12477 /* vmulss */, X86::VMULSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15743 { 12477 /* vmulss */, X86::VMULSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15744 { 12477 /* vmulss */, X86::VMULSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15745 { 12477 /* vmulss */, X86::VMULSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15746 { 12477 /* vmulss */, X86::VMULSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15747 { 12477 /* vmulss */, X86::VMULSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15748 { 12492 /* vmwritel */, X86::VMWRITE32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
15749 { 12492 /* vmwritel */, X86::VMWRITE32rm, Convert__Reg1_1__Mem325_0, AMFBS_Not64BitMode, { MCK_Mem32, MCK_GR32 }, },
15750 { 12501 /* vmwriteq */, X86::VMWRITE64rr, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR64, MCK_GR64 }, },
15751 { 12501 /* vmwriteq */, X86::VMWRITE64rm, Convert__Reg1_1__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_GR64 }, },
15752 { 12510 /* vmxoff */, X86::VMXOFF, Convert_NoOperands, AMFBS_None, { }, },
15753 { 12517 /* vmxon */, X86::VMXON, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
15754 { 12523 /* vorpd */, X86::VORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15755 { 12523 /* vorpd */, X86::VORPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15756 { 12523 /* vorpd */, X86::VORPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15757 { 12523 /* vorpd */, X86::VORPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15758 { 12523 /* vorpd */, X86::VORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15759 { 12523 /* vorpd */, X86::VORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15760 { 12523 /* vorpd */, X86::VORPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15761 { 12523 /* vorpd */, X86::VORPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15762 { 12523 /* vorpd */, X86::VORPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15763 { 12523 /* vorpd */, X86::VORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15764 { 12523 /* vorpd */, X86::VORPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
15765 { 12523 /* vorpd */, X86::VORPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
15766 { 12523 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
15767 { 12523 /* vorpd */, X86::VORPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15768 { 12523 /* vorpd */, X86::VORPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15769 { 12523 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15770 { 12523 /* vorpd */, X86::VORPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15771 { 12523 /* vorpd */, X86::VORPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15772 { 12523 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15773 { 12523 /* vorpd */, X86::VORPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15774 { 12523 /* vorpd */, X86::VORPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15775 { 12523 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15776 { 12523 /* vorpd */, X86::VORPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15777 { 12523 /* vorpd */, X86::VORPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15778 { 12523 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15779 { 12523 /* vorpd */, X86::VORPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15780 { 12523 /* vorpd */, X86::VORPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15781 { 12523 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15782 { 12523 /* vorpd */, X86::VORPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15783 { 12523 /* vorpd */, X86::VORPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15784 { 12523 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15785 { 12529 /* vorps */, X86::VORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15786 { 12529 /* vorps */, X86::VORPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15787 { 12529 /* vorps */, X86::VORPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15788 { 12529 /* vorps */, X86::VORPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15789 { 12529 /* vorps */, X86::VORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15790 { 12529 /* vorps */, X86::VORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15791 { 12529 /* vorps */, X86::VORPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15792 { 12529 /* vorps */, X86::VORPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15793 { 12529 /* vorps */, X86::VORPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15794 { 12529 /* vorps */, X86::VORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15795 { 12529 /* vorps */, X86::VORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15796 { 12529 /* vorps */, X86::VORPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15797 { 12529 /* vorps */, X86::VORPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15798 { 12529 /* vorps */, X86::VORPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15799 { 12529 /* vorps */, X86::VORPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15800 { 12529 /* vorps */, X86::VORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15801 { 12529 /* vorps */, X86::VORPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15802 { 12529 /* vorps */, X86::VORPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15803 { 12529 /* vorps */, X86::VORPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15804 { 12529 /* vorps */, X86::VORPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15805 { 12529 /* vorps */, X86::VORPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15806 { 12529 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15807 { 12529 /* vorps */, X86::VORPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15808 { 12529 /* vorps */, X86::VORPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15809 { 12529 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15810 { 12529 /* vorps */, X86::VORPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15811 { 12529 /* vorps */, X86::VORPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15812 { 12529 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15813 { 12529 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15814 { 12529 /* vorps */, X86::VORPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15815 { 12529 /* vorps */, X86::VORPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15816 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZ128rr, Convert__VK4Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK4Pair }, },
15817 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZ256rr, Convert__VK8Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK8Pair }, },
15818 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZrr, Convert__VK16Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK16Pair }, },
15819 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZ128rm, Convert__VK4Pair1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK4Pair }, },
15820 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZ256rm, Convert__VK8Pair1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK8Pair }, },
15821 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZrm, Convert__VK16Pair1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK16Pair }, },
15822 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZrmb, Convert__VK16Pair1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK16Pair }, },
15823 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZ128rmb, Convert__VK4Pair1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK4Pair }, },
15824 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZ256rmb, Convert__VK8Pair1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK8Pair }, },
15825 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZ128rr, Convert__VK2Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK2Pair }, },
15826 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZ256rr, Convert__VK4Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK4Pair }, },
15827 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZrr, Convert__VK8Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK8Pair }, },
15828 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZ128rm, Convert__VK2Pair1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK2Pair }, },
15829 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZ256rm, Convert__VK4Pair1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK4Pair }, },
15830 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZrm, Convert__VK8Pair1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK8Pair }, },
15831 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZ128rmb, Convert__VK2Pair1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK2Pair }, },
15832 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZ256rmb, Convert__VK4Pair1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK4Pair }, },
15833 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZrmb, Convert__VK8Pair1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK8Pair }, },
15834 { 12563 /* vp4dpwssd */, X86::VP4DPWSSDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
15835 { 12563 /* vp4dpwssd */, X86::VP4DPWSSDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15836 { 12563 /* vp4dpwssd */, X86::VP4DPWSSDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15837 { 12573 /* vp4dpwssds */, X86::VP4DPWSSDSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
15838 { 12573 /* vp4dpwssds */, X86::VP4DPWSSDSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15839 { 12573 /* vp4dpwssds */, X86::VP4DPWSSDSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15840 { 12584 /* vpabsb */, X86::VPABSBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15841 { 12584 /* vpabsb */, X86::VPABSBYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15842 { 12584 /* vpabsb */, X86::VPABSBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15843 { 12584 /* vpabsb */, X86::VPABSBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15844 { 12584 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15845 { 12584 /* vpabsb */, X86::VPABSBrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15846 { 12584 /* vpabsb */, X86::VPABSBZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15847 { 12584 /* vpabsb */, X86::VPABSBYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
15848 { 12584 /* vpabsb */, X86::VPABSBZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15849 { 12584 /* vpabsb */, X86::VPABSBZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15850 { 12584 /* vpabsb */, X86::VPABSBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15851 { 12584 /* vpabsb */, X86::VPABSBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15852 { 12584 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15853 { 12584 /* vpabsb */, X86::VPABSBZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15854 { 12584 /* vpabsb */, X86::VPABSBZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15855 { 12584 /* vpabsb */, X86::VPABSBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15856 { 12584 /* vpabsb */, X86::VPABSBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15857 { 12584 /* vpabsb */, X86::VPABSBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15858 { 12584 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15859 { 12584 /* vpabsb */, X86::VPABSBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15860 { 12584 /* vpabsb */, X86::VPABSBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15861 { 12584 /* vpabsb */, X86::VPABSBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15862 { 12591 /* vpabsd */, X86::VPABSDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15863 { 12591 /* vpabsd */, X86::VPABSDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15864 { 12591 /* vpabsd */, X86::VPABSDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15865 { 12591 /* vpabsd */, X86::VPABSDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15866 { 12591 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15867 { 12591 /* vpabsd */, X86::VPABSDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15868 { 12591 /* vpabsd */, X86::VPABSDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15869 { 12591 /* vpabsd */, X86::VPABSDYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
15870 { 12591 /* vpabsd */, X86::VPABSDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15871 { 12591 /* vpabsd */, X86::VPABSDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15872 { 12591 /* vpabsd */, X86::VPABSDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
15873 { 12591 /* vpabsd */, X86::VPABSDZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
15874 { 12591 /* vpabsd */, X86::VPABSDZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
15875 { 12591 /* vpabsd */, X86::VPABSDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15876 { 12591 /* vpabsd */, X86::VPABSDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15877 { 12591 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15878 { 12591 /* vpabsd */, X86::VPABSDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15879 { 12591 /* vpabsd */, X86::VPABSDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15880 { 12591 /* vpabsd */, X86::VPABSDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15881 { 12591 /* vpabsd */, X86::VPABSDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15882 { 12591 /* vpabsd */, X86::VPABSDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15883 { 12591 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15884 { 12591 /* vpabsd */, X86::VPABSDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15885 { 12591 /* vpabsd */, X86::VPABSDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15886 { 12591 /* vpabsd */, X86::VPABSDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15887 { 12591 /* vpabsd */, X86::VPABSDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15888 { 12591 /* vpabsd */, X86::VPABSDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15889 { 12591 /* vpabsd */, X86::VPABSDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15890 { 12591 /* vpabsd */, X86::VPABSDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15891 { 12591 /* vpabsd */, X86::VPABSDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15892 { 12591 /* vpabsd */, X86::VPABSDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15893 { 12598 /* vpabsq */, X86::VPABSQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15894 { 12598 /* vpabsq */, X86::VPABSQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15895 { 12598 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15896 { 12598 /* vpabsq */, X86::VPABSQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15897 { 12598 /* vpabsq */, X86::VPABSQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15898 { 12598 /* vpabsq */, X86::VPABSQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15899 { 12598 /* vpabsq */, X86::VPABSQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
15900 { 12598 /* vpabsq */, X86::VPABSQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
15901 { 12598 /* vpabsq */, X86::VPABSQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
15902 { 12598 /* vpabsq */, X86::VPABSQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15903 { 12598 /* vpabsq */, X86::VPABSQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15904 { 12598 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15905 { 12598 /* vpabsq */, X86::VPABSQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15906 { 12598 /* vpabsq */, X86::VPABSQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15907 { 12598 /* vpabsq */, X86::VPABSQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15908 { 12598 /* vpabsq */, X86::VPABSQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15909 { 12598 /* vpabsq */, X86::VPABSQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15910 { 12598 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15911 { 12598 /* vpabsq */, X86::VPABSQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15912 { 12598 /* vpabsq */, X86::VPABSQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15913 { 12598 /* vpabsq */, X86::VPABSQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15914 { 12598 /* vpabsq */, X86::VPABSQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15915 { 12598 /* vpabsq */, X86::VPABSQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15916 { 12598 /* vpabsq */, X86::VPABSQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15917 { 12598 /* vpabsq */, X86::VPABSQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15918 { 12598 /* vpabsq */, X86::VPABSQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15919 { 12598 /* vpabsq */, X86::VPABSQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15920 { 12605 /* vpabsw */, X86::VPABSWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15921 { 12605 /* vpabsw */, X86::VPABSWYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
15922 { 12605 /* vpabsw */, X86::VPABSWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
15923 { 12605 /* vpabsw */, X86::VPABSWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
15924 { 12605 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15925 { 12605 /* vpabsw */, X86::VPABSWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15926 { 12605 /* vpabsw */, X86::VPABSWZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
15927 { 12605 /* vpabsw */, X86::VPABSWYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
15928 { 12605 /* vpabsw */, X86::VPABSWZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
15929 { 12605 /* vpabsw */, X86::VPABSWZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15930 { 12605 /* vpabsw */, X86::VPABSWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15931 { 12605 /* vpabsw */, X86::VPABSWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15932 { 12605 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15933 { 12605 /* vpabsw */, X86::VPABSWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15934 { 12605 /* vpabsw */, X86::VPABSWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15935 { 12605 /* vpabsw */, X86::VPABSWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15936 { 12605 /* vpabsw */, X86::VPABSWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15937 { 12605 /* vpabsw */, X86::VPABSWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15938 { 12605 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15939 { 12605 /* vpabsw */, X86::VPABSWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15940 { 12605 /* vpabsw */, X86::VPABSWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15941 { 12605 /* vpabsw */, X86::VPABSWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15942 { 12612 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15943 { 12612 /* vpackssdw */, X86::VPACKSSDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15944 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15945 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15946 { 12612 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15947 { 12612 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15948 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15949 { 12612 /* vpackssdw */, X86::VPACKSSDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15950 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15951 { 12612 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15952 { 12612 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15953 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15954 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15955 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15956 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15957 { 12612 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15958 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15959 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15960 { 12612 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15961 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15962 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15963 { 12612 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15964 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15965 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15966 { 12612 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15967 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15968 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15969 { 12612 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15970 { 12612 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15971 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15972 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15973 { 12622 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15974 { 12622 /* vpacksswb */, X86::VPACKSSWBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15975 { 12622 /* vpacksswb */, X86::VPACKSSWBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15976 { 12622 /* vpacksswb */, X86::VPACKSSWBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15977 { 12622 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15978 { 12622 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15979 { 12622 /* vpacksswb */, X86::VPACKSSWBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15980 { 12622 /* vpacksswb */, X86::VPACKSSWBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15981 { 12622 /* vpacksswb */, X86::VPACKSSWBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15982 { 12622 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15983 { 12622 /* vpacksswb */, X86::VPACKSSWBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15984 { 12622 /* vpacksswb */, X86::VPACKSSWBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15985 { 12622 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15986 { 12622 /* vpacksswb */, X86::VPACKSSWBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15987 { 12622 /* vpacksswb */, X86::VPACKSSWBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15988 { 12622 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15989 { 12622 /* vpacksswb */, X86::VPACKSSWBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15990 { 12622 /* vpacksswb */, X86::VPACKSSWBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15991 { 12622 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15992 { 12622 /* vpacksswb */, X86::VPACKSSWBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15993 { 12622 /* vpacksswb */, X86::VPACKSSWBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15994 { 12622 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15995 { 12632 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15996 { 12632 /* vpackusdw */, X86::VPACKUSDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15997 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15998 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15999 { 12632 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16000 { 12632 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16001 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16002 { 12632 /* vpackusdw */, X86::VPACKUSDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16003 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16004 { 12632 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16005 { 12632 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16006 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16007 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16008 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16009 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16010 { 12632 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16011 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16012 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16013 { 12632 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16014 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16015 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16016 { 12632 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16017 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16018 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16019 { 12632 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16020 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16021 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16022 { 12632 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16023 { 12632 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16024 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16025 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16026 { 12642 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16027 { 12642 /* vpackuswb */, X86::VPACKUSWBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16028 { 12642 /* vpackuswb */, X86::VPACKUSWBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16029 { 12642 /* vpackuswb */, X86::VPACKUSWBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16030 { 12642 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16031 { 12642 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16032 { 12642 /* vpackuswb */, X86::VPACKUSWBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16033 { 12642 /* vpackuswb */, X86::VPACKUSWBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16034 { 12642 /* vpackuswb */, X86::VPACKUSWBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16035 { 12642 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16036 { 12642 /* vpackuswb */, X86::VPACKUSWBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16037 { 12642 /* vpackuswb */, X86::VPACKUSWBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16038 { 12642 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16039 { 12642 /* vpackuswb */, X86::VPACKUSWBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16040 { 12642 /* vpackuswb */, X86::VPACKUSWBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16041 { 12642 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16042 { 12642 /* vpackuswb */, X86::VPACKUSWBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16043 { 12642 /* vpackuswb */, X86::VPACKUSWBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16044 { 12642 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16045 { 12642 /* vpackuswb */, X86::VPACKUSWBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16046 { 12642 /* vpackuswb */, X86::VPACKUSWBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16047 { 12642 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16048 { 12652 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16049 { 12652 /* vpaddb */, X86::VPADDBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16050 { 12652 /* vpaddb */, X86::VPADDBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16051 { 12652 /* vpaddb */, X86::VPADDBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16052 { 12652 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16053 { 12652 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16054 { 12652 /* vpaddb */, X86::VPADDBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16055 { 12652 /* vpaddb */, X86::VPADDBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16056 { 12652 /* vpaddb */, X86::VPADDBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16057 { 12652 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16058 { 12652 /* vpaddb */, X86::VPADDBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16059 { 12652 /* vpaddb */, X86::VPADDBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16060 { 12652 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16061 { 12652 /* vpaddb */, X86::VPADDBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16062 { 12652 /* vpaddb */, X86::VPADDBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16063 { 12652 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16064 { 12652 /* vpaddb */, X86::VPADDBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16065 { 12652 /* vpaddb */, X86::VPADDBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16066 { 12652 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16067 { 12652 /* vpaddb */, X86::VPADDBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16068 { 12652 /* vpaddb */, X86::VPADDBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16069 { 12652 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16070 { 12659 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16071 { 12659 /* vpaddd */, X86::VPADDDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16072 { 12659 /* vpaddd */, X86::VPADDDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16073 { 12659 /* vpaddd */, X86::VPADDDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16074 { 12659 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16075 { 12659 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16076 { 12659 /* vpaddd */, X86::VPADDDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16077 { 12659 /* vpaddd */, X86::VPADDDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16078 { 12659 /* vpaddd */, X86::VPADDDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16079 { 12659 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16080 { 12659 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16081 { 12659 /* vpaddd */, X86::VPADDDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16082 { 12659 /* vpaddd */, X86::VPADDDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16083 { 12659 /* vpaddd */, X86::VPADDDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16084 { 12659 /* vpaddd */, X86::VPADDDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16085 { 12659 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16086 { 12659 /* vpaddd */, X86::VPADDDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16087 { 12659 /* vpaddd */, X86::VPADDDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16088 { 12659 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16089 { 12659 /* vpaddd */, X86::VPADDDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16090 { 12659 /* vpaddd */, X86::VPADDDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16091 { 12659 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16092 { 12659 /* vpaddd */, X86::VPADDDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16093 { 12659 /* vpaddd */, X86::VPADDDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16094 { 12659 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16095 { 12659 /* vpaddd */, X86::VPADDDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16096 { 12659 /* vpaddd */, X86::VPADDDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16097 { 12659 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16098 { 12659 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16099 { 12659 /* vpaddd */, X86::VPADDDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16100 { 12659 /* vpaddd */, X86::VPADDDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16101 { 12666 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16102 { 12666 /* vpaddq */, X86::VPADDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16103 { 12666 /* vpaddq */, X86::VPADDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16104 { 12666 /* vpaddq */, X86::VPADDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16105 { 12666 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16106 { 12666 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16107 { 12666 /* vpaddq */, X86::VPADDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16108 { 12666 /* vpaddq */, X86::VPADDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16109 { 12666 /* vpaddq */, X86::VPADDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16110 { 12666 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16111 { 12666 /* vpaddq */, X86::VPADDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16112 { 12666 /* vpaddq */, X86::VPADDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16113 { 12666 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16114 { 12666 /* vpaddq */, X86::VPADDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16115 { 12666 /* vpaddq */, X86::VPADDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16116 { 12666 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16117 { 12666 /* vpaddq */, X86::VPADDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16118 { 12666 /* vpaddq */, X86::VPADDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16119 { 12666 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16120 { 12666 /* vpaddq */, X86::VPADDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16121 { 12666 /* vpaddq */, X86::VPADDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16122 { 12666 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16123 { 12666 /* vpaddq */, X86::VPADDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16124 { 12666 /* vpaddq */, X86::VPADDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16125 { 12666 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16126 { 12666 /* vpaddq */, X86::VPADDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16127 { 12666 /* vpaddq */, X86::VPADDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16128 { 12666 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16129 { 12666 /* vpaddq */, X86::VPADDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16130 { 12666 /* vpaddq */, X86::VPADDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16131 { 12666 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16132 { 12673 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16133 { 12673 /* vpaddsb */, X86::VPADDSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16134 { 12673 /* vpaddsb */, X86::VPADDSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16135 { 12673 /* vpaddsb */, X86::VPADDSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16136 { 12673 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16137 { 12673 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16138 { 12673 /* vpaddsb */, X86::VPADDSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16139 { 12673 /* vpaddsb */, X86::VPADDSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16140 { 12673 /* vpaddsb */, X86::VPADDSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16141 { 12673 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16142 { 12673 /* vpaddsb */, X86::VPADDSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16143 { 12673 /* vpaddsb */, X86::VPADDSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16144 { 12673 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16145 { 12673 /* vpaddsb */, X86::VPADDSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16146 { 12673 /* vpaddsb */, X86::VPADDSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16147 { 12673 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16148 { 12673 /* vpaddsb */, X86::VPADDSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16149 { 12673 /* vpaddsb */, X86::VPADDSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16150 { 12673 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16151 { 12673 /* vpaddsb */, X86::VPADDSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16152 { 12673 /* vpaddsb */, X86::VPADDSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16153 { 12673 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16154 { 12681 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16155 { 12681 /* vpaddsw */, X86::VPADDSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16156 { 12681 /* vpaddsw */, X86::VPADDSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16157 { 12681 /* vpaddsw */, X86::VPADDSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16158 { 12681 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16159 { 12681 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16160 { 12681 /* vpaddsw */, X86::VPADDSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16161 { 12681 /* vpaddsw */, X86::VPADDSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16162 { 12681 /* vpaddsw */, X86::VPADDSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16163 { 12681 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16164 { 12681 /* vpaddsw */, X86::VPADDSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16165 { 12681 /* vpaddsw */, X86::VPADDSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16166 { 12681 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16167 { 12681 /* vpaddsw */, X86::VPADDSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16168 { 12681 /* vpaddsw */, X86::VPADDSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16169 { 12681 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16170 { 12681 /* vpaddsw */, X86::VPADDSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16171 { 12681 /* vpaddsw */, X86::VPADDSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16172 { 12681 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16173 { 12681 /* vpaddsw */, X86::VPADDSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16174 { 12681 /* vpaddsw */, X86::VPADDSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16175 { 12681 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16176 { 12689 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16177 { 12689 /* vpaddusb */, X86::VPADDUSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16178 { 12689 /* vpaddusb */, X86::VPADDUSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16179 { 12689 /* vpaddusb */, X86::VPADDUSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16180 { 12689 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16181 { 12689 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16182 { 12689 /* vpaddusb */, X86::VPADDUSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16183 { 12689 /* vpaddusb */, X86::VPADDUSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16184 { 12689 /* vpaddusb */, X86::VPADDUSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16185 { 12689 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16186 { 12689 /* vpaddusb */, X86::VPADDUSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16187 { 12689 /* vpaddusb */, X86::VPADDUSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16188 { 12689 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16189 { 12689 /* vpaddusb */, X86::VPADDUSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16190 { 12689 /* vpaddusb */, X86::VPADDUSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16191 { 12689 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16192 { 12689 /* vpaddusb */, X86::VPADDUSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16193 { 12689 /* vpaddusb */, X86::VPADDUSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16194 { 12689 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16195 { 12689 /* vpaddusb */, X86::VPADDUSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16196 { 12689 /* vpaddusb */, X86::VPADDUSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16197 { 12689 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16198 { 12698 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16199 { 12698 /* vpaddusw */, X86::VPADDUSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16200 { 12698 /* vpaddusw */, X86::VPADDUSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16201 { 12698 /* vpaddusw */, X86::VPADDUSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16202 { 12698 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16203 { 12698 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16204 { 12698 /* vpaddusw */, X86::VPADDUSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16205 { 12698 /* vpaddusw */, X86::VPADDUSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16206 { 12698 /* vpaddusw */, X86::VPADDUSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16207 { 12698 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16208 { 12698 /* vpaddusw */, X86::VPADDUSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16209 { 12698 /* vpaddusw */, X86::VPADDUSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16210 { 12698 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16211 { 12698 /* vpaddusw */, X86::VPADDUSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16212 { 12698 /* vpaddusw */, X86::VPADDUSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16213 { 12698 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16214 { 12698 /* vpaddusw */, X86::VPADDUSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16215 { 12698 /* vpaddusw */, X86::VPADDUSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16216 { 12698 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16217 { 12698 /* vpaddusw */, X86::VPADDUSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16218 { 12698 /* vpaddusw */, X86::VPADDUSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16219 { 12698 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16220 { 12707 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16221 { 12707 /* vpaddw */, X86::VPADDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16222 { 12707 /* vpaddw */, X86::VPADDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16223 { 12707 /* vpaddw */, X86::VPADDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16224 { 12707 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16225 { 12707 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16226 { 12707 /* vpaddw */, X86::VPADDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16227 { 12707 /* vpaddw */, X86::VPADDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16228 { 12707 /* vpaddw */, X86::VPADDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16229 { 12707 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16230 { 12707 /* vpaddw */, X86::VPADDWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16231 { 12707 /* vpaddw */, X86::VPADDWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16232 { 12707 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16233 { 12707 /* vpaddw */, X86::VPADDWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16234 { 12707 /* vpaddw */, X86::VPADDWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16235 { 12707 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16236 { 12707 /* vpaddw */, X86::VPADDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16237 { 12707 /* vpaddw */, X86::VPADDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16238 { 12707 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16239 { 12707 /* vpaddw */, X86::VPADDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16240 { 12707 /* vpaddw */, X86::VPADDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16241 { 12707 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16242 { 12714 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16243 { 12714 /* vpalignr */, X86::VPALIGNRYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16244 { 12714 /* vpalignr */, X86::VPALIGNRZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16245 { 12714 /* vpalignr */, X86::VPALIGNRZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16246 { 12714 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
16247 { 12714 /* vpalignr */, X86::VPALIGNRrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16248 { 12714 /* vpalignr */, X86::VPALIGNRZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16249 { 12714 /* vpalignr */, X86::VPALIGNRYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16250 { 12714 /* vpalignr */, X86::VPALIGNRZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16251 { 12714 /* vpalignr */, X86::VPALIGNRZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16252 { 12714 /* vpalignr */, X86::VPALIGNRZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16253 { 12714 /* vpalignr */, X86::VPALIGNRZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16254 { 12714 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16255 { 12714 /* vpalignr */, X86::VPALIGNRZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16256 { 12714 /* vpalignr */, X86::VPALIGNRZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16257 { 12714 /* vpalignr */, X86::VPALIGNRZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16258 { 12714 /* vpalignr */, X86::VPALIGNRZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16259 { 12714 /* vpalignr */, X86::VPALIGNRZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16260 { 12714 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16261 { 12714 /* vpalignr */, X86::VPALIGNRZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16262 { 12714 /* vpalignr */, X86::VPALIGNRZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16263 { 12714 /* vpalignr */, X86::VPALIGNRZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16264 { 12723 /* vpand */, X86::VPANDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16265 { 12723 /* vpand */, X86::VPANDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16266 { 12723 /* vpand */, X86::VPANDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16267 { 12723 /* vpand */, X86::VPANDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16268 { 12729 /* vpandd */, X86::VPANDDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16269 { 12729 /* vpandd */, X86::VPANDDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16270 { 12729 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16271 { 12729 /* vpandd */, X86::VPANDDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16272 { 12729 /* vpandd */, X86::VPANDDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16273 { 12729 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16274 { 12729 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16275 { 12729 /* vpandd */, X86::VPANDDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16276 { 12729 /* vpandd */, X86::VPANDDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16277 { 12729 /* vpandd */, X86::VPANDDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16278 { 12729 /* vpandd */, X86::VPANDDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16279 { 12729 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16280 { 12729 /* vpandd */, X86::VPANDDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16281 { 12729 /* vpandd */, X86::VPANDDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16282 { 12729 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16283 { 12729 /* vpandd */, X86::VPANDDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16284 { 12729 /* vpandd */, X86::VPANDDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16285 { 12729 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16286 { 12729 /* vpandd */, X86::VPANDDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16287 { 12729 /* vpandd */, X86::VPANDDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16288 { 12729 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16289 { 12729 /* vpandd */, X86::VPANDDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16290 { 12729 /* vpandd */, X86::VPANDDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16291 { 12729 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16292 { 12729 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16293 { 12729 /* vpandd */, X86::VPANDDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16294 { 12729 /* vpandd */, X86::VPANDDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16295 { 12736 /* vpandn */, X86::VPANDNrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16296 { 12736 /* vpandn */, X86::VPANDNYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16297 { 12736 /* vpandn */, X86::VPANDNrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16298 { 12736 /* vpandn */, X86::VPANDNYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16299 { 12743 /* vpandnd */, X86::VPANDNDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16300 { 12743 /* vpandnd */, X86::VPANDNDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16301 { 12743 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16302 { 12743 /* vpandnd */, X86::VPANDNDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16303 { 12743 /* vpandnd */, X86::VPANDNDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16304 { 12743 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16305 { 12743 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16306 { 12743 /* vpandnd */, X86::VPANDNDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16307 { 12743 /* vpandnd */, X86::VPANDNDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16308 { 12743 /* vpandnd */, X86::VPANDNDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16309 { 12743 /* vpandnd */, X86::VPANDNDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16310 { 12743 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16311 { 12743 /* vpandnd */, X86::VPANDNDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16312 { 12743 /* vpandnd */, X86::VPANDNDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16313 { 12743 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16314 { 12743 /* vpandnd */, X86::VPANDNDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16315 { 12743 /* vpandnd */, X86::VPANDNDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16316 { 12743 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16317 { 12743 /* vpandnd */, X86::VPANDNDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16318 { 12743 /* vpandnd */, X86::VPANDNDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16319 { 12743 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16320 { 12743 /* vpandnd */, X86::VPANDNDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16321 { 12743 /* vpandnd */, X86::VPANDNDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16322 { 12743 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16323 { 12743 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16324 { 12743 /* vpandnd */, X86::VPANDNDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16325 { 12743 /* vpandnd */, X86::VPANDNDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16326 { 12751 /* vpandnq */, X86::VPANDNQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16327 { 12751 /* vpandnq */, X86::VPANDNQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16328 { 12751 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16329 { 12751 /* vpandnq */, X86::VPANDNQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16330 { 12751 /* vpandnq */, X86::VPANDNQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16331 { 12751 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16332 { 12751 /* vpandnq */, X86::VPANDNQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16333 { 12751 /* vpandnq */, X86::VPANDNQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16334 { 12751 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16335 { 12751 /* vpandnq */, X86::VPANDNQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16336 { 12751 /* vpandnq */, X86::VPANDNQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16337 { 12751 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16338 { 12751 /* vpandnq */, X86::VPANDNQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16339 { 12751 /* vpandnq */, X86::VPANDNQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16340 { 12751 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16341 { 12751 /* vpandnq */, X86::VPANDNQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16342 { 12751 /* vpandnq */, X86::VPANDNQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16343 { 12751 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16344 { 12751 /* vpandnq */, X86::VPANDNQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16345 { 12751 /* vpandnq */, X86::VPANDNQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16346 { 12751 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16347 { 12751 /* vpandnq */, X86::VPANDNQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16348 { 12751 /* vpandnq */, X86::VPANDNQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16349 { 12751 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16350 { 12751 /* vpandnq */, X86::VPANDNQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16351 { 12751 /* vpandnq */, X86::VPANDNQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16352 { 12751 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16353 { 12759 /* vpandq */, X86::VPANDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16354 { 12759 /* vpandq */, X86::VPANDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16355 { 12759 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16356 { 12759 /* vpandq */, X86::VPANDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16357 { 12759 /* vpandq */, X86::VPANDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16358 { 12759 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16359 { 12759 /* vpandq */, X86::VPANDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16360 { 12759 /* vpandq */, X86::VPANDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16361 { 12759 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16362 { 12759 /* vpandq */, X86::VPANDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16363 { 12759 /* vpandq */, X86::VPANDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16364 { 12759 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16365 { 12759 /* vpandq */, X86::VPANDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16366 { 12759 /* vpandq */, X86::VPANDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16367 { 12759 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16368 { 12759 /* vpandq */, X86::VPANDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16369 { 12759 /* vpandq */, X86::VPANDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16370 { 12759 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16371 { 12759 /* vpandq */, X86::VPANDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16372 { 12759 /* vpandq */, X86::VPANDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16373 { 12759 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16374 { 12759 /* vpandq */, X86::VPANDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16375 { 12759 /* vpandq */, X86::VPANDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16376 { 12759 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16377 { 12759 /* vpandq */, X86::VPANDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16378 { 12759 /* vpandq */, X86::VPANDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16379 { 12759 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16380 { 12766 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16381 { 12766 /* vpavgb */, X86::VPAVGBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16382 { 12766 /* vpavgb */, X86::VPAVGBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16383 { 12766 /* vpavgb */, X86::VPAVGBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16384 { 12766 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16385 { 12766 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16386 { 12766 /* vpavgb */, X86::VPAVGBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16387 { 12766 /* vpavgb */, X86::VPAVGBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16388 { 12766 /* vpavgb */, X86::VPAVGBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16389 { 12766 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16390 { 12766 /* vpavgb */, X86::VPAVGBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16391 { 12766 /* vpavgb */, X86::VPAVGBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16392 { 12766 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16393 { 12766 /* vpavgb */, X86::VPAVGBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16394 { 12766 /* vpavgb */, X86::VPAVGBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16395 { 12766 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16396 { 12766 /* vpavgb */, X86::VPAVGBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16397 { 12766 /* vpavgb */, X86::VPAVGBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16398 { 12766 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16399 { 12766 /* vpavgb */, X86::VPAVGBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16400 { 12766 /* vpavgb */, X86::VPAVGBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16401 { 12766 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16402 { 12773 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16403 { 12773 /* vpavgw */, X86::VPAVGWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16404 { 12773 /* vpavgw */, X86::VPAVGWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16405 { 12773 /* vpavgw */, X86::VPAVGWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16406 { 12773 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16407 { 12773 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16408 { 12773 /* vpavgw */, X86::VPAVGWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16409 { 12773 /* vpavgw */, X86::VPAVGWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16410 { 12773 /* vpavgw */, X86::VPAVGWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16411 { 12773 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16412 { 12773 /* vpavgw */, X86::VPAVGWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16413 { 12773 /* vpavgw */, X86::VPAVGWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16414 { 12773 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16415 { 12773 /* vpavgw */, X86::VPAVGWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16416 { 12773 /* vpavgw */, X86::VPAVGWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16417 { 12773 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16418 { 12773 /* vpavgw */, X86::VPAVGWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16419 { 12773 /* vpavgw */, X86::VPAVGWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16420 { 12773 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16421 { 12773 /* vpavgw */, X86::VPAVGWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16422 { 12773 /* vpavgw */, X86::VPAVGWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16423 { 12773 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16424 { 12780 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16425 { 12780 /* vpblendd */, X86::VPBLENDDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16426 { 12780 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16427 { 12780 /* vpblendd */, X86::VPBLENDDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16428 { 12789 /* vpblendmb */, X86::VPBLENDMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16429 { 12789 /* vpblendmb */, X86::VPBLENDMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16430 { 12789 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16431 { 12789 /* vpblendmb */, X86::VPBLENDMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16432 { 12789 /* vpblendmb */, X86::VPBLENDMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16433 { 12789 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16434 { 12789 /* vpblendmb */, X86::VPBLENDMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16435 { 12789 /* vpblendmb */, X86::VPBLENDMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16436 { 12789 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16437 { 12789 /* vpblendmb */, X86::VPBLENDMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16438 { 12789 /* vpblendmb */, X86::VPBLENDMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16439 { 12789 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16440 { 12789 /* vpblendmb */, X86::VPBLENDMBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16441 { 12789 /* vpblendmb */, X86::VPBLENDMBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16442 { 12789 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16443 { 12789 /* vpblendmb */, X86::VPBLENDMBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16444 { 12789 /* vpblendmb */, X86::VPBLENDMBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16445 { 12789 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16446 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16447 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16448 { 12799 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16449 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16450 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16451 { 12799 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16452 { 12799 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16453 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16454 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16455 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16456 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16457 { 12799 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16458 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16459 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16460 { 12799 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16461 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16462 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16463 { 12799 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16464 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16465 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16466 { 12799 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16467 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16468 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16469 { 12799 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16470 { 12799 /* vpblendmd */, X86::VPBLENDMDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16471 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16472 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16473 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16474 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16475 { 12809 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16476 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16477 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16478 { 12809 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16479 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16480 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16481 { 12809 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16482 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16483 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16484 { 12809 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16485 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16486 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16487 { 12809 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16488 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16489 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16490 { 12809 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16491 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16492 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16493 { 12809 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16494 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16495 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16496 { 12809 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16497 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16498 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16499 { 12809 /* vpblendmq */, X86::VPBLENDMQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16500 { 12819 /* vpblendmw */, X86::VPBLENDMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16501 { 12819 /* vpblendmw */, X86::VPBLENDMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16502 { 12819 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16503 { 12819 /* vpblendmw */, X86::VPBLENDMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16504 { 12819 /* vpblendmw */, X86::VPBLENDMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16505 { 12819 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16506 { 12819 /* vpblendmw */, X86::VPBLENDMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16507 { 12819 /* vpblendmw */, X86::VPBLENDMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16508 { 12819 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16509 { 12819 /* vpblendmw */, X86::VPBLENDMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16510 { 12819 /* vpblendmw */, X86::VPBLENDMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16511 { 12819 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16512 { 12819 /* vpblendmw */, X86::VPBLENDMWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16513 { 12819 /* vpblendmw */, X86::VPBLENDMWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16514 { 12819 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16515 { 12819 /* vpblendmw */, X86::VPBLENDMWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16516 { 12819 /* vpblendmw */, X86::VPBLENDMWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16517 { 12819 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16518 { 12829 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16519 { 12829 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16520 { 12829 /* vpblendvb */, X86::VPBLENDVBYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16521 { 12829 /* vpblendvb */, X86::VPBLENDVBYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16522 { 12839 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16523 { 12839 /* vpblendw */, X86::VPBLENDWYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16524 { 12839 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16525 { 12839 /* vpblendw */, X86::VPBLENDWYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16526 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
16527 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
16528 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
16529 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X }, },
16530 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512 }, },
16531 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
16532 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
16533 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
16534 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_FR32 }, },
16535 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBYrm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR256 }, },
16536 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ128rm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_FR32X }, },
16537 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ256rm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR256X }, },
16538 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZrm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR512 }, },
16539 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16540 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16541 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16542 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16543 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16544 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16545 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16546 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16547 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16548 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16549 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16550 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16551 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16552 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16553 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16554 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16555 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16556 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZrmkz, Convert__Reg1_1__Reg1_3__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16557 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
16558 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
16559 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
16560 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X }, },
16561 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512 }, },
16562 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
16563 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
16564 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
16565 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
16566 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDYrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256 }, },
16567 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ128rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
16568 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ256rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X }, },
16569 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512 }, },
16570 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16571 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16572 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16573 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16574 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16575 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16576 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16577 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16578 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16579 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16580 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16581 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16582 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16583 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16584 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16585 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16586 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16587 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZrmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16588 { 12874 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_FR32X }, },
16589 { 12874 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR256X }, },
16590 { 12874 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
16591 { 12890 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_FR32X }, },
16592 { 12890 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR256X }, },
16593 { 12890 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
16594 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
16595 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
16596 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
16597 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR256X }, },
16598 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR512 }, },
16599 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
16600 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
16601 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
16602 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
16603 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQYrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256 }, },
16604 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
16605 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ256rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, },
16606 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
16607 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16608 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16609 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16610 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16611 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16612 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16613 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16614 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16615 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16616 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16617 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16618 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16619 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16620 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16621 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16622 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16623 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16624 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16625 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
16626 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
16627 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
16628 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X }, },
16629 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512 }, },
16630 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
16631 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
16632 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
16633 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32 }, },
16634 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWYrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR256 }, },
16635 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ128rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X }, },
16636 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ256rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR256X }, },
16637 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR512 }, },
16638 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16639 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16640 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16641 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16642 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16643 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16644 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16645 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16646 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16647 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16648 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16649 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16650 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16651 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16652 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16653 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16654 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16655 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZrmkz, Convert__Reg1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16656 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16657 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16658 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16659 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16660 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16661 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16662 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16663 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16664 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16665 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16666 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16667 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16668 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16669 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16670 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16671 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16672 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16673 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16674 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16675 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16676 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16677 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16678 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16679 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16680 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16681 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16682 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16683 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16684 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16685 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16686 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16687 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16688 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16689 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16690 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16691 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16692 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16693 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16694 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16695 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16696 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16697 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16698 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16699 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16700 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
16701 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16702 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16703 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16704 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16705 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16706 { 12999 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16707 { 12999 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16708 { 12999 /* vpcmov */, X86::VPCMOVYrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16709 { 12999 /* vpcmov */, X86::VPCMOVYrmr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16710 { 12999 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16711 { 12999 /* vpcmov */, X86::VPCMOVYrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16712 { 13006 /* vpcmpb */, X86::VPCMPBZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16713 { 13006 /* vpcmpb */, X86::VPCMPBZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16714 { 13006 /* vpcmpb */, X86::VPCMPBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16715 { 13006 /* vpcmpb */, X86::VPCMPBZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16716 { 13006 /* vpcmpb */, X86::VPCMPBZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16717 { 13006 /* vpcmpb */, X86::VPCMPBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16718 { 13006 /* vpcmpb */, X86::VPCMPBZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16719 { 13006 /* vpcmpb */, X86::VPCMPBZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16720 { 13006 /* vpcmpb */, X86::VPCMPBZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16721 { 13006 /* vpcmpb */, X86::VPCMPBZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16722 { 13006 /* vpcmpb */, X86::VPCMPBZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16723 { 13006 /* vpcmpb */, X86::VPCMPBZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16724 { 13013 /* vpcmpd */, X86::VPCMPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16725 { 13013 /* vpcmpd */, X86::VPCMPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16726 { 13013 /* vpcmpd */, X86::VPCMPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16727 { 13013 /* vpcmpd */, X86::VPCMPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16728 { 13013 /* vpcmpd */, X86::VPCMPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16729 { 13013 /* vpcmpd */, X86::VPCMPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16730 { 13013 /* vpcmpd */, X86::VPCMPDZrmib, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
16731 { 13013 /* vpcmpd */, X86::VPCMPDZ128rmib, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
16732 { 13013 /* vpcmpd */, X86::VPCMPDZ256rmib, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
16733 { 13013 /* vpcmpd */, X86::VPCMPDZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16734 { 13013 /* vpcmpd */, X86::VPCMPDZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16735 { 13013 /* vpcmpd */, X86::VPCMPDZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16736 { 13013 /* vpcmpd */, X86::VPCMPDZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16737 { 13013 /* vpcmpd */, X86::VPCMPDZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16738 { 13013 /* vpcmpd */, X86::VPCMPDZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16739 { 13013 /* vpcmpd */, X86::VPCMPDZrmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16740 { 13013 /* vpcmpd */, X86::VPCMPDZ128rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16741 { 13013 /* vpcmpd */, X86::VPCMPDZ256rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16742 { 13020 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16743 { 13020 /* vpcmpeqb */, X86::VPCMPEQBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16744 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16745 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16746 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16747 { 13020 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16748 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16749 { 13020 /* vpcmpeqb */, X86::VPCMPEQBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16750 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16751 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16752 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16753 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16754 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16755 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16756 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16757 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16758 { 13029 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16759 { 13029 /* vpcmpeqd */, X86::VPCMPEQDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16760 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16761 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16762 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16763 { 13029 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16764 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16765 { 13029 /* vpcmpeqd */, X86::VPCMPEQDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16766 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16767 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16768 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
16769 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
16770 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
16771 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16772 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16773 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16774 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16775 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16776 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16777 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16778 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16779 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16780 { 13038 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16781 { 13038 /* vpcmpeqq */, X86::VPCMPEQQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16782 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16783 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16784 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16785 { 13038 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16786 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16787 { 13038 /* vpcmpeqq */, X86::VPCMPEQQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16788 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16789 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16790 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
16791 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
16792 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
16793 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16794 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16795 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16796 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16797 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16798 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16799 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16800 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16801 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16802 { 13047 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16803 { 13047 /* vpcmpeqw */, X86::VPCMPEQWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16804 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16805 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16806 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16807 { 13047 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16808 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16809 { 13047 /* vpcmpeqw */, X86::VPCMPEQWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16810 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16811 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16812 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16813 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16814 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16815 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16816 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16817 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16818 { 13056 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16819 { 13056 /* vpcmpestri */, X86::VPCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
16820 { 13067 /* vpcmpestrm */, X86::VPCMPESTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16821 { 13067 /* vpcmpestrm */, X86::VPCMPESTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
16822 { 13078 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16823 { 13078 /* vpcmpgtb */, X86::VPCMPGTBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16824 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16825 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16826 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16827 { 13078 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16828 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16829 { 13078 /* vpcmpgtb */, X86::VPCMPGTBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16830 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16831 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16832 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16833 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16834 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16835 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16836 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16837 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16838 { 13087 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16839 { 13087 /* vpcmpgtd */, X86::VPCMPGTDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16840 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16841 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16842 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16843 { 13087 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16844 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16845 { 13087 /* vpcmpgtd */, X86::VPCMPGTDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16846 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16847 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16848 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
16849 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
16850 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
16851 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16852 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16853 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16854 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16855 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16856 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16857 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16858 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16859 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16860 { 13096 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16861 { 13096 /* vpcmpgtq */, X86::VPCMPGTQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16862 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16863 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16864 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16865 { 13096 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16866 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16867 { 13096 /* vpcmpgtq */, X86::VPCMPGTQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16868 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16869 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16870 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
16871 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
16872 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
16873 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16874 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16875 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16876 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16877 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16878 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16879 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16880 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16881 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16882 { 13105 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16883 { 13105 /* vpcmpgtw */, X86::VPCMPGTWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16884 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16885 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16886 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16887 { 13105 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16888 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16889 { 13105 /* vpcmpgtw */, X86::VPCMPGTWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16890 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16891 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16892 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16893 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16894 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16895 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16896 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16897 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16898 { 13114 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16899 { 13114 /* vpcmpistri */, X86::VPCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
16900 { 13125 /* vpcmpistrm */, X86::VPCMPISTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16901 { 13125 /* vpcmpistrm */, X86::VPCMPISTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
16902 { 13136 /* vpcmpq */, X86::VPCMPQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16903 { 13136 /* vpcmpq */, X86::VPCMPQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16904 { 13136 /* vpcmpq */, X86::VPCMPQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16905 { 13136 /* vpcmpq */, X86::VPCMPQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16906 { 13136 /* vpcmpq */, X86::VPCMPQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16907 { 13136 /* vpcmpq */, X86::VPCMPQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16908 { 13136 /* vpcmpq */, X86::VPCMPQZ128rmib, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
16909 { 13136 /* vpcmpq */, X86::VPCMPQZ256rmib, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
16910 { 13136 /* vpcmpq */, X86::VPCMPQZrmib, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
16911 { 13136 /* vpcmpq */, X86::VPCMPQZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16912 { 13136 /* vpcmpq */, X86::VPCMPQZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16913 { 13136 /* vpcmpq */, X86::VPCMPQZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16914 { 13136 /* vpcmpq */, X86::VPCMPQZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16915 { 13136 /* vpcmpq */, X86::VPCMPQZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16916 { 13136 /* vpcmpq */, X86::VPCMPQZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16917 { 13136 /* vpcmpq */, X86::VPCMPQZ128rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16918 { 13136 /* vpcmpq */, X86::VPCMPQZ256rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16919 { 13136 /* vpcmpq */, X86::VPCMPQZrmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16920 { 13143 /* vpcmpub */, X86::VPCMPUBZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16921 { 13143 /* vpcmpub */, X86::VPCMPUBZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16922 { 13143 /* vpcmpub */, X86::VPCMPUBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16923 { 13143 /* vpcmpub */, X86::VPCMPUBZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16924 { 13143 /* vpcmpub */, X86::VPCMPUBZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16925 { 13143 /* vpcmpub */, X86::VPCMPUBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16926 { 13143 /* vpcmpub */, X86::VPCMPUBZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16927 { 13143 /* vpcmpub */, X86::VPCMPUBZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16928 { 13143 /* vpcmpub */, X86::VPCMPUBZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16929 { 13143 /* vpcmpub */, X86::VPCMPUBZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16930 { 13143 /* vpcmpub */, X86::VPCMPUBZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16931 { 13143 /* vpcmpub */, X86::VPCMPUBZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16932 { 13151 /* vpcmpud */, X86::VPCMPUDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16933 { 13151 /* vpcmpud */, X86::VPCMPUDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16934 { 13151 /* vpcmpud */, X86::VPCMPUDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16935 { 13151 /* vpcmpud */, X86::VPCMPUDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16936 { 13151 /* vpcmpud */, X86::VPCMPUDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16937 { 13151 /* vpcmpud */, X86::VPCMPUDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16938 { 13151 /* vpcmpud */, X86::VPCMPUDZrmib, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
16939 { 13151 /* vpcmpud */, X86::VPCMPUDZ128rmib, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
16940 { 13151 /* vpcmpud */, X86::VPCMPUDZ256rmib, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
16941 { 13151 /* vpcmpud */, X86::VPCMPUDZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16942 { 13151 /* vpcmpud */, X86::VPCMPUDZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16943 { 13151 /* vpcmpud */, X86::VPCMPUDZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16944 { 13151 /* vpcmpud */, X86::VPCMPUDZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16945 { 13151 /* vpcmpud */, X86::VPCMPUDZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16946 { 13151 /* vpcmpud */, X86::VPCMPUDZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16947 { 13151 /* vpcmpud */, X86::VPCMPUDZrmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16948 { 13151 /* vpcmpud */, X86::VPCMPUDZ128rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16949 { 13151 /* vpcmpud */, X86::VPCMPUDZ256rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16950 { 13159 /* vpcmpuq */, X86::VPCMPUQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16951 { 13159 /* vpcmpuq */, X86::VPCMPUQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16952 { 13159 /* vpcmpuq */, X86::VPCMPUQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16953 { 13159 /* vpcmpuq */, X86::VPCMPUQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16954 { 13159 /* vpcmpuq */, X86::VPCMPUQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16955 { 13159 /* vpcmpuq */, X86::VPCMPUQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16956 { 13159 /* vpcmpuq */, X86::VPCMPUQZ128rmib, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
16957 { 13159 /* vpcmpuq */, X86::VPCMPUQZ256rmib, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
16958 { 13159 /* vpcmpuq */, X86::VPCMPUQZrmib, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
16959 { 13159 /* vpcmpuq */, X86::VPCMPUQZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16960 { 13159 /* vpcmpuq */, X86::VPCMPUQZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16961 { 13159 /* vpcmpuq */, X86::VPCMPUQZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16962 { 13159 /* vpcmpuq */, X86::VPCMPUQZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16963 { 13159 /* vpcmpuq */, X86::VPCMPUQZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16964 { 13159 /* vpcmpuq */, X86::VPCMPUQZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16965 { 13159 /* vpcmpuq */, X86::VPCMPUQZ128rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16966 { 13159 /* vpcmpuq */, X86::VPCMPUQZ256rmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16967 { 13159 /* vpcmpuq */, X86::VPCMPUQZrmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16968 { 13167 /* vpcmpuw */, X86::VPCMPUWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16969 { 13167 /* vpcmpuw */, X86::VPCMPUWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16970 { 13167 /* vpcmpuw */, X86::VPCMPUWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16971 { 13167 /* vpcmpuw */, X86::VPCMPUWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16972 { 13167 /* vpcmpuw */, X86::VPCMPUWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16973 { 13167 /* vpcmpuw */, X86::VPCMPUWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16974 { 13167 /* vpcmpuw */, X86::VPCMPUWZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16975 { 13167 /* vpcmpuw */, X86::VPCMPUWZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16976 { 13167 /* vpcmpuw */, X86::VPCMPUWZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16977 { 13167 /* vpcmpuw */, X86::VPCMPUWZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16978 { 13167 /* vpcmpuw */, X86::VPCMPUWZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16979 { 13167 /* vpcmpuw */, X86::VPCMPUWZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16980 { 13175 /* vpcmpw */, X86::VPCMPWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
16981 { 13175 /* vpcmpw */, X86::VPCMPWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
16982 { 13175 /* vpcmpw */, X86::VPCMPWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16983 { 13175 /* vpcmpw */, X86::VPCMPWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
16984 { 13175 /* vpcmpw */, X86::VPCMPWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
16985 { 13175 /* vpcmpw */, X86::VPCMPWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16986 { 13175 /* vpcmpw */, X86::VPCMPWZ128rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16987 { 13175 /* vpcmpw */, X86::VPCMPWZ256rrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16988 { 13175 /* vpcmpw */, X86::VPCMPWZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16989 { 13175 /* vpcmpw */, X86::VPCMPWZ128rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16990 { 13175 /* vpcmpw */, X86::VPCMPWZ256rmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16991 { 13175 /* vpcmpw */, X86::VPCMPWZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16992 { 13182 /* vpcomb */, X86::VPCOMBri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16993 { 13182 /* vpcomb */, X86::VPCOMBmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16994 { 13189 /* vpcomd */, X86::VPCOMDri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16995 { 13189 /* vpcomd */, X86::VPCOMDmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16996 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
16997 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
16998 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
16999 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
17000 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17001 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
17002 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17003 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17004 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17005 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17006 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17007 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17008 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17009 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17010 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17011 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
17012 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
17013 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
17014 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
17015 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17016 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
17017 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17018 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17019 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17020 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17021 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17022 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17023 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17024 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17025 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17026 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
17027 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
17028 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
17029 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
17030 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17031 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
17032 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17033 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17034 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17035 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17036 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17037 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17038 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17039 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17040 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17041 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
17042 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ128mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
17043 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
17044 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ256mr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
17045 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17046 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
17047 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17048 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17049 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17050 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17051 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17052 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17053 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17054 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17055 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17056 { 13244 /* vpcomq */, X86::VPCOMQri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17057 { 13244 /* vpcomq */, X86::VPCOMQmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17058 { 13251 /* vpcomub */, X86::VPCOMUBri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17059 { 13251 /* vpcomub */, X86::VPCOMUBmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17060 { 13259 /* vpcomud */, X86::VPCOMUDri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17061 { 13259 /* vpcomud */, X86::VPCOMUDmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17062 { 13267 /* vpcomuq */, X86::VPCOMUQri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17063 { 13267 /* vpcomuq */, X86::VPCOMUQmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17064 { 13275 /* vpcomuw */, X86::VPCOMUWri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17065 { 13275 /* vpcomuw */, X86::VPCOMUWmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17066 { 13283 /* vpcomw */, X86::VPCOMWri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17067 { 13283 /* vpcomw */, X86::VPCOMWmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17068 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
17069 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
17070 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17071 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
17072 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
17073 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
17074 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
17075 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
17076 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
17077 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17078 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17079 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17080 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17081 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17082 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17083 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17084 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17085 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17086 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17087 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17088 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17089 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17090 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17091 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17092 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17093 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17094 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17095 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
17096 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
17097 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17098 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
17099 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
17100 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
17101 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
17102 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
17103 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
17104 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17105 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17106 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17107 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17108 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17109 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17110 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17111 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17112 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17113 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17114 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17115 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17116 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17117 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17118 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17119 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17120 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17121 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17122 { 13314 /* vpdpbusd */, X86::VPDPBUSDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17123 { 13314 /* vpdpbusd */, X86::VPDPBUSDYrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17124 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17125 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17126 { 13314 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17127 { 13314 /* vpdpbusd */, X86::VPDPBUSDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17128 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17129 { 13314 /* vpdpbusd */, X86::VPDPBUSDYrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17130 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17131 { 13314 /* vpdpbusd */, X86::VPDPBUSDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17132 { 13314 /* vpdpbusd */, X86::VPDPBUSDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17133 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17134 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17135 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17136 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17137 { 13314 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17138 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17139 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17140 { 13314 /* vpdpbusd */, X86::VPDPBUSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17141 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17142 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17143 { 13314 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17144 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17145 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17146 { 13314 /* vpdpbusd */, X86::VPDPBUSDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17147 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17148 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17149 { 13314 /* vpdpbusd */, X86::VPDPBUSDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17150 { 13314 /* vpdpbusd */, X86::VPDPBUSDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17151 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17152 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17153 { 13323 /* vpdpbusds */, X86::VPDPBUSDSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17154 { 13323 /* vpdpbusds */, X86::VPDPBUSDSYrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17155 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17156 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17157 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17158 { 13323 /* vpdpbusds */, X86::VPDPBUSDSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17159 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17160 { 13323 /* vpdpbusds */, X86::VPDPBUSDSYrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17161 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17162 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17163 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17164 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17165 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17166 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17167 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17168 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17169 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17170 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17171 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17172 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17173 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17174 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17175 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17176 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17177 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17178 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17179 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17180 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17181 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17182 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17183 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17184 { 13333 /* vpdpwssd */, X86::VPDPWSSDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17185 { 13333 /* vpdpwssd */, X86::VPDPWSSDYrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17186 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17187 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17188 { 13333 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17189 { 13333 /* vpdpwssd */, X86::VPDPWSSDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17190 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17191 { 13333 /* vpdpwssd */, X86::VPDPWSSDYrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17192 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17193 { 13333 /* vpdpwssd */, X86::VPDPWSSDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17194 { 13333 /* vpdpwssd */, X86::VPDPWSSDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17195 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17196 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17197 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17198 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17199 { 13333 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17200 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17201 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17202 { 13333 /* vpdpwssd */, X86::VPDPWSSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17203 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17204 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17205 { 13333 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17206 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17207 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17208 { 13333 /* vpdpwssd */, X86::VPDPWSSDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17209 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17210 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17211 { 13333 /* vpdpwssd */, X86::VPDPWSSDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17212 { 13333 /* vpdpwssd */, X86::VPDPWSSDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17213 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17214 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17215 { 13342 /* vpdpwssds */, X86::VPDPWSSDSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17216 { 13342 /* vpdpwssds */, X86::VPDPWSSDSYrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17217 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17218 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17219 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17220 { 13342 /* vpdpwssds */, X86::VPDPWSSDSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17221 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17222 { 13342 /* vpdpwssds */, X86::VPDPWSSDSYrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17223 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17224 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17225 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17226 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17227 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17228 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17229 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17230 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17231 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17232 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17233 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17234 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17235 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17236 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17237 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17238 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17239 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17240 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17241 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17242 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17243 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17244 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17245 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17246 { 13352 /* vperm2f128 */, X86::VPERM2F128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
17247 { 13352 /* vperm2f128 */, X86::VPERM2F128rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17248 { 13363 /* vperm2i128 */, X86::VPERM2I128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
17249 { 13363 /* vperm2i128 */, X86::VPERM2I128rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17250 { 13374 /* vpermb */, X86::VPERMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17251 { 13374 /* vpermb */, X86::VPERMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17252 { 13374 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17253 { 13374 /* vpermb */, X86::VPERMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17254 { 13374 /* vpermb */, X86::VPERMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17255 { 13374 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17256 { 13374 /* vpermb */, X86::VPERMBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17257 { 13374 /* vpermb */, X86::VPERMBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17258 { 13374 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17259 { 13374 /* vpermb */, X86::VPERMBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17260 { 13374 /* vpermb */, X86::VPERMBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17261 { 13374 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17262 { 13374 /* vpermb */, X86::VPERMBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17263 { 13374 /* vpermb */, X86::VPERMBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17264 { 13374 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17265 { 13374 /* vpermb */, X86::VPERMBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17266 { 13374 /* vpermb */, X86::VPERMBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17267 { 13374 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17268 { 13381 /* vpermd */, X86::VPERMDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17269 { 13381 /* vpermd */, X86::VPERMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17270 { 13381 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17271 { 13381 /* vpermd */, X86::VPERMDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17272 { 13381 /* vpermd */, X86::VPERMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17273 { 13381 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17274 { 13381 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17275 { 13381 /* vpermd */, X86::VPERMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17276 { 13381 /* vpermd */, X86::VPERMDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17277 { 13381 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17278 { 13381 /* vpermd */, X86::VPERMDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17279 { 13381 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17280 { 13381 /* vpermd */, X86::VPERMDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17281 { 13381 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17282 { 13381 /* vpermd */, X86::VPERMDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17283 { 13381 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17284 { 13381 /* vpermd */, X86::VPERMDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17285 { 13381 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17286 { 13381 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17287 { 13381 /* vpermd */, X86::VPERMDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17288 { 13388 /* vpermi2b */, X86::VPERMI2B128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17289 { 13388 /* vpermi2b */, X86::VPERMI2B256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17290 { 13388 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17291 { 13388 /* vpermi2b */, X86::VPERMI2B128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17292 { 13388 /* vpermi2b */, X86::VPERMI2B256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17293 { 13388 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17294 { 13388 /* vpermi2b */, X86::VPERMI2B128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17295 { 13388 /* vpermi2b */, X86::VPERMI2B256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17296 { 13388 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17297 { 13388 /* vpermi2b */, X86::VPERMI2B128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17298 { 13388 /* vpermi2b */, X86::VPERMI2B256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17299 { 13388 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17300 { 13388 /* vpermi2b */, X86::VPERMI2B128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17301 { 13388 /* vpermi2b */, X86::VPERMI2B256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17302 { 13388 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17303 { 13388 /* vpermi2b */, X86::VPERMI2B128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17304 { 13388 /* vpermi2b */, X86::VPERMI2B256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17305 { 13388 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17306 { 13397 /* vpermi2d */, X86::VPERMI2D128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17307 { 13397 /* vpermi2d */, X86::VPERMI2D256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17308 { 13397 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17309 { 13397 /* vpermi2d */, X86::VPERMI2D128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17310 { 13397 /* vpermi2d */, X86::VPERMI2D256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17311 { 13397 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17312 { 13397 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17313 { 13397 /* vpermi2d */, X86::VPERMI2D128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17314 { 13397 /* vpermi2d */, X86::VPERMI2D256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17315 { 13397 /* vpermi2d */, X86::VPERMI2D128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17316 { 13397 /* vpermi2d */, X86::VPERMI2D256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17317 { 13397 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17318 { 13397 /* vpermi2d */, X86::VPERMI2D128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17319 { 13397 /* vpermi2d */, X86::VPERMI2D256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17320 { 13397 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17321 { 13397 /* vpermi2d */, X86::VPERMI2D128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17322 { 13397 /* vpermi2d */, X86::VPERMI2D256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17323 { 13397 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17324 { 13397 /* vpermi2d */, X86::VPERMI2D128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17325 { 13397 /* vpermi2d */, X86::VPERMI2D256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17326 { 13397 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17327 { 13397 /* vpermi2d */, X86::VPERMI2D128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17328 { 13397 /* vpermi2d */, X86::VPERMI2D256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17329 { 13397 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17330 { 13397 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17331 { 13397 /* vpermi2d */, X86::VPERMI2D128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17332 { 13397 /* vpermi2d */, X86::VPERMI2D256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17333 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17334 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17335 { 13406 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17336 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17337 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17338 { 13406 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17339 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17340 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17341 { 13406 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17342 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17343 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17344 { 13406 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17345 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17346 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17347 { 13406 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17348 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17349 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17350 { 13406 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17351 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17352 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17353 { 13406 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17354 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17355 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17356 { 13406 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17357 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17358 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17359 { 13406 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17360 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17361 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17362 { 13416 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17363 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17364 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17365 { 13416 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17366 { 13416 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17367 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17368 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17369 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17370 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17371 { 13416 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17372 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17373 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17374 { 13416 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17375 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17376 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17377 { 13416 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17378 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17379 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17380 { 13416 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17381 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17382 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17383 { 13416 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17384 { 13416 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17385 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17386 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17387 { 13426 /* vpermi2q */, X86::VPERMI2Q128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17388 { 13426 /* vpermi2q */, X86::VPERMI2Q256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17389 { 13426 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17390 { 13426 /* vpermi2q */, X86::VPERMI2Q128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17391 { 13426 /* vpermi2q */, X86::VPERMI2Q256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17392 { 13426 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17393 { 13426 /* vpermi2q */, X86::VPERMI2Q128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17394 { 13426 /* vpermi2q */, X86::VPERMI2Q256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17395 { 13426 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17396 { 13426 /* vpermi2q */, X86::VPERMI2Q128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17397 { 13426 /* vpermi2q */, X86::VPERMI2Q256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17398 { 13426 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17399 { 13426 /* vpermi2q */, X86::VPERMI2Q128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17400 { 13426 /* vpermi2q */, X86::VPERMI2Q256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17401 { 13426 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17402 { 13426 /* vpermi2q */, X86::VPERMI2Q128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17403 { 13426 /* vpermi2q */, X86::VPERMI2Q256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17404 { 13426 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17405 { 13426 /* vpermi2q */, X86::VPERMI2Q128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17406 { 13426 /* vpermi2q */, X86::VPERMI2Q256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17407 { 13426 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17408 { 13426 /* vpermi2q */, X86::VPERMI2Q128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17409 { 13426 /* vpermi2q */, X86::VPERMI2Q256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17410 { 13426 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17411 { 13426 /* vpermi2q */, X86::VPERMI2Q128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17412 { 13426 /* vpermi2q */, X86::VPERMI2Q256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17413 { 13426 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17414 { 13435 /* vpermi2w */, X86::VPERMI2W128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17415 { 13435 /* vpermi2w */, X86::VPERMI2W256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17416 { 13435 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17417 { 13435 /* vpermi2w */, X86::VPERMI2W128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17418 { 13435 /* vpermi2w */, X86::VPERMI2W256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17419 { 13435 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17420 { 13435 /* vpermi2w */, X86::VPERMI2W128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17421 { 13435 /* vpermi2w */, X86::VPERMI2W256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17422 { 13435 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17423 { 13435 /* vpermi2w */, X86::VPERMI2W128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17424 { 13435 /* vpermi2w */, X86::VPERMI2W256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17425 { 13435 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17426 { 13435 /* vpermi2w */, X86::VPERMI2W128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17427 { 13435 /* vpermi2w */, X86::VPERMI2W256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17428 { 13435 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17429 { 13435 /* vpermi2w */, X86::VPERMI2W128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17430 { 13435 /* vpermi2w */, X86::VPERMI2W256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17431 { 13435 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17432 { 13444 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17433 { 13444 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17434 { 13444 /* vpermil2pd */, X86::VPERMIL2PDYrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
17435 { 13444 /* vpermil2pd */, X86::VPERMIL2PDYmr, Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17436 { 13444 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17437 { 13444 /* vpermil2pd */, X86::VPERMIL2PDYrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
17438 { 13455 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17439 { 13455 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17440 { 13455 /* vpermil2ps */, X86::VPERMIL2PSYrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
17441 { 13455 /* vpermil2ps */, X86::VPERMIL2PSYmr, Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17442 { 13455 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17443 { 13455 /* vpermil2ps */, X86::VPERMIL2PSYrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
17444 { 13466 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17445 { 13466 /* vpermilpd */, X86::VPERMILPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17446 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17447 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17448 { 13466 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17449 { 13466 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
17450 { 13466 /* vpermilpd */, X86::VPERMILPDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
17451 { 13466 /* vpermilpd */, X86::VPERMILPDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
17452 { 13466 /* vpermilpd */, X86::VPERMILPDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
17453 { 13466 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17454 { 13466 /* vpermilpd */, X86::VPERMILPDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
17455 { 13466 /* vpermilpd */, X86::VPERMILPDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
17456 { 13466 /* vpermilpd */, X86::VPERMILPDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
17457 { 13466 /* vpermilpd */, X86::VPERMILPDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
17458 { 13466 /* vpermilpd */, X86::VPERMILPDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
17459 { 13466 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17460 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17461 { 13466 /* vpermilpd */, X86::VPERMILPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17462 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17463 { 13466 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17464 { 13466 /* vpermilpd */, X86::VPERMILPDZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
17465 { 13466 /* vpermilpd */, X86::VPERMILPDZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
17466 { 13466 /* vpermilpd */, X86::VPERMILPDZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
17467 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17468 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17469 { 13466 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17470 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17471 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17472 { 13466 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17473 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17474 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17475 { 13466 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17476 { 13466 /* vpermilpd */, X86::VPERMILPDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17477 { 13466 /* vpermilpd */, X86::VPERMILPDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17478 { 13466 /* vpermilpd */, X86::VPERMILPDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17479 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17480 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17481 { 13466 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17482 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17483 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17484 { 13466 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17485 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17486 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17487 { 13466 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17488 { 13466 /* vpermilpd */, X86::VPERMILPDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17489 { 13466 /* vpermilpd */, X86::VPERMILPDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17490 { 13466 /* vpermilpd */, X86::VPERMILPDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17491 { 13466 /* vpermilpd */, X86::VPERMILPDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17492 { 13466 /* vpermilpd */, X86::VPERMILPDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17493 { 13466 /* vpermilpd */, X86::VPERMILPDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17494 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17495 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17496 { 13466 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17497 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17498 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17499 { 13466 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17500 { 13466 /* vpermilpd */, X86::VPERMILPDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17501 { 13466 /* vpermilpd */, X86::VPERMILPDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17502 { 13466 /* vpermilpd */, X86::VPERMILPDZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17503 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17504 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17505 { 13466 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17506 { 13476 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17507 { 13476 /* vpermilps */, X86::VPERMILPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17508 { 13476 /* vpermilps */, X86::VPERMILPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17509 { 13476 /* vpermilps */, X86::VPERMILPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17510 { 13476 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17511 { 13476 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
17512 { 13476 /* vpermilps */, X86::VPERMILPSYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
17513 { 13476 /* vpermilps */, X86::VPERMILPSZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
17514 { 13476 /* vpermilps */, X86::VPERMILPSZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
17515 { 13476 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17516 { 13476 /* vpermilps */, X86::VPERMILPSmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
17517 { 13476 /* vpermilps */, X86::VPERMILPSZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
17518 { 13476 /* vpermilps */, X86::VPERMILPSYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
17519 { 13476 /* vpermilps */, X86::VPERMILPSZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
17520 { 13476 /* vpermilps */, X86::VPERMILPSZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
17521 { 13476 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17522 { 13476 /* vpermilps */, X86::VPERMILPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17523 { 13476 /* vpermilps */, X86::VPERMILPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17524 { 13476 /* vpermilps */, X86::VPERMILPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17525 { 13476 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17526 { 13476 /* vpermilps */, X86::VPERMILPSZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
17527 { 13476 /* vpermilps */, X86::VPERMILPSZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
17528 { 13476 /* vpermilps */, X86::VPERMILPSZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
17529 { 13476 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17530 { 13476 /* vpermilps */, X86::VPERMILPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17531 { 13476 /* vpermilps */, X86::VPERMILPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17532 { 13476 /* vpermilps */, X86::VPERMILPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17533 { 13476 /* vpermilps */, X86::VPERMILPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17534 { 13476 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17535 { 13476 /* vpermilps */, X86::VPERMILPSZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17536 { 13476 /* vpermilps */, X86::VPERMILPSZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17537 { 13476 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17538 { 13476 /* vpermilps */, X86::VPERMILPSZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17539 { 13476 /* vpermilps */, X86::VPERMILPSZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17540 { 13476 /* vpermilps */, X86::VPERMILPSZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17541 { 13476 /* vpermilps */, X86::VPERMILPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17542 { 13476 /* vpermilps */, X86::VPERMILPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17543 { 13476 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17544 { 13476 /* vpermilps */, X86::VPERMILPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17545 { 13476 /* vpermilps */, X86::VPERMILPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17546 { 13476 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17547 { 13476 /* vpermilps */, X86::VPERMILPSZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17548 { 13476 /* vpermilps */, X86::VPERMILPSZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17549 { 13476 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17550 { 13476 /* vpermilps */, X86::VPERMILPSZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17551 { 13476 /* vpermilps */, X86::VPERMILPSZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17552 { 13476 /* vpermilps */, X86::VPERMILPSZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17553 { 13476 /* vpermilps */, X86::VPERMILPSZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17554 { 13476 /* vpermilps */, X86::VPERMILPSZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17555 { 13476 /* vpermilps */, X86::VPERMILPSZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17556 { 13476 /* vpermilps */, X86::VPERMILPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17557 { 13476 /* vpermilps */, X86::VPERMILPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17558 { 13476 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17559 { 13476 /* vpermilps */, X86::VPERMILPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17560 { 13476 /* vpermilps */, X86::VPERMILPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17561 { 13476 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17562 { 13476 /* vpermilps */, X86::VPERMILPSZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17563 { 13476 /* vpermilps */, X86::VPERMILPSZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17564 { 13476 /* vpermilps */, X86::VPERMILPSZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17565 { 13476 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17566 { 13476 /* vpermilps */, X86::VPERMILPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17567 { 13476 /* vpermilps */, X86::VPERMILPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17568 { 13486 /* vpermpd */, X86::VPERMPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17569 { 13486 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17570 { 13486 /* vpermpd */, X86::VPERMPDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
17571 { 13486 /* vpermpd */, X86::VPERMPDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
17572 { 13486 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17573 { 13486 /* vpermpd */, X86::VPERMPDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
17574 { 13486 /* vpermpd */, X86::VPERMPDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
17575 { 13486 /* vpermpd */, X86::VPERMPDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
17576 { 13486 /* vpermpd */, X86::VPERMPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17577 { 13486 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17578 { 13486 /* vpermpd */, X86::VPERMPDZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
17579 { 13486 /* vpermpd */, X86::VPERMPDZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
17580 { 13486 /* vpermpd */, X86::VPERMPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17581 { 13486 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17582 { 13486 /* vpermpd */, X86::VPERMPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17583 { 13486 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17584 { 13486 /* vpermpd */, X86::VPERMPDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17585 { 13486 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17586 { 13486 /* vpermpd */, X86::VPERMPDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17587 { 13486 /* vpermpd */, X86::VPERMPDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17588 { 13486 /* vpermpd */, X86::VPERMPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17589 { 13486 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17590 { 13486 /* vpermpd */, X86::VPERMPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17591 { 13486 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17592 { 13486 /* vpermpd */, X86::VPERMPDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17593 { 13486 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17594 { 13486 /* vpermpd */, X86::VPERMPDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17595 { 13486 /* vpermpd */, X86::VPERMPDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17596 { 13486 /* vpermpd */, X86::VPERMPDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17597 { 13486 /* vpermpd */, X86::VPERMPDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17598 { 13486 /* vpermpd */, X86::VPERMPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17599 { 13486 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17600 { 13486 /* vpermpd */, X86::VPERMPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17601 { 13486 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17602 { 13486 /* vpermpd */, X86::VPERMPDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17603 { 13486 /* vpermpd */, X86::VPERMPDZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17604 { 13486 /* vpermpd */, X86::VPERMPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17605 { 13486 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17606 { 13494 /* vpermps */, X86::VPERMPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17607 { 13494 /* vpermps */, X86::VPERMPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17608 { 13494 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17609 { 13494 /* vpermps */, X86::VPERMPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17610 { 13494 /* vpermps */, X86::VPERMPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17611 { 13494 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17612 { 13494 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17613 { 13494 /* vpermps */, X86::VPERMPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17614 { 13494 /* vpermps */, X86::VPERMPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17615 { 13494 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17616 { 13494 /* vpermps */, X86::VPERMPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17617 { 13494 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17618 { 13494 /* vpermps */, X86::VPERMPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17619 { 13494 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17620 { 13494 /* vpermps */, X86::VPERMPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17621 { 13494 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17622 { 13494 /* vpermps */, X86::VPERMPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17623 { 13494 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17624 { 13494 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17625 { 13494 /* vpermps */, X86::VPERMPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17626 { 13502 /* vpermq */, X86::VPERMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17627 { 13502 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17628 { 13502 /* vpermq */, X86::VPERMQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
17629 { 13502 /* vpermq */, X86::VPERMQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
17630 { 13502 /* vpermq */, X86::VPERMQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17631 { 13502 /* vpermq */, X86::VPERMQYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
17632 { 13502 /* vpermq */, X86::VPERMQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
17633 { 13502 /* vpermq */, X86::VPERMQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
17634 { 13502 /* vpermq */, X86::VPERMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17635 { 13502 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17636 { 13502 /* vpermq */, X86::VPERMQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
17637 { 13502 /* vpermq */, X86::VPERMQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
17638 { 13502 /* vpermq */, X86::VPERMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17639 { 13502 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17640 { 13502 /* vpermq */, X86::VPERMQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17641 { 13502 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17642 { 13502 /* vpermq */, X86::VPERMQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17643 { 13502 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17644 { 13502 /* vpermq */, X86::VPERMQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17645 { 13502 /* vpermq */, X86::VPERMQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17646 { 13502 /* vpermq */, X86::VPERMQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17647 { 13502 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17648 { 13502 /* vpermq */, X86::VPERMQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17649 { 13502 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17650 { 13502 /* vpermq */, X86::VPERMQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17651 { 13502 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17652 { 13502 /* vpermq */, X86::VPERMQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17653 { 13502 /* vpermq */, X86::VPERMQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17654 { 13502 /* vpermq */, X86::VPERMQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17655 { 13502 /* vpermq */, X86::VPERMQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17656 { 13502 /* vpermq */, X86::VPERMQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17657 { 13502 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17658 { 13502 /* vpermq */, X86::VPERMQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17659 { 13502 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17660 { 13502 /* vpermq */, X86::VPERMQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17661 { 13502 /* vpermq */, X86::VPERMQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17662 { 13502 /* vpermq */, X86::VPERMQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17663 { 13502 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17664 { 13509 /* vpermt2b */, X86::VPERMT2B128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17665 { 13509 /* vpermt2b */, X86::VPERMT2B256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17666 { 13509 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17667 { 13509 /* vpermt2b */, X86::VPERMT2B128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17668 { 13509 /* vpermt2b */, X86::VPERMT2B256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17669 { 13509 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17670 { 13509 /* vpermt2b */, X86::VPERMT2B128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17671 { 13509 /* vpermt2b */, X86::VPERMT2B256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17672 { 13509 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17673 { 13509 /* vpermt2b */, X86::VPERMT2B128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17674 { 13509 /* vpermt2b */, X86::VPERMT2B256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17675 { 13509 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17676 { 13509 /* vpermt2b */, X86::VPERMT2B128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17677 { 13509 /* vpermt2b */, X86::VPERMT2B256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17678 { 13509 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17679 { 13509 /* vpermt2b */, X86::VPERMT2B128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17680 { 13509 /* vpermt2b */, X86::VPERMT2B256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17681 { 13509 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17682 { 13518 /* vpermt2d */, X86::VPERMT2D128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17683 { 13518 /* vpermt2d */, X86::VPERMT2D256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17684 { 13518 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17685 { 13518 /* vpermt2d */, X86::VPERMT2D128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17686 { 13518 /* vpermt2d */, X86::VPERMT2D256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17687 { 13518 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17688 { 13518 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17689 { 13518 /* vpermt2d */, X86::VPERMT2D128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17690 { 13518 /* vpermt2d */, X86::VPERMT2D256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17691 { 13518 /* vpermt2d */, X86::VPERMT2D128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17692 { 13518 /* vpermt2d */, X86::VPERMT2D256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17693 { 13518 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17694 { 13518 /* vpermt2d */, X86::VPERMT2D128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17695 { 13518 /* vpermt2d */, X86::VPERMT2D256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17696 { 13518 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17697 { 13518 /* vpermt2d */, X86::VPERMT2D128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17698 { 13518 /* vpermt2d */, X86::VPERMT2D256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17699 { 13518 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17700 { 13518 /* vpermt2d */, X86::VPERMT2D128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17701 { 13518 /* vpermt2d */, X86::VPERMT2D256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17702 { 13518 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17703 { 13518 /* vpermt2d */, X86::VPERMT2D128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17704 { 13518 /* vpermt2d */, X86::VPERMT2D256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17705 { 13518 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17706 { 13518 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17707 { 13518 /* vpermt2d */, X86::VPERMT2D128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17708 { 13518 /* vpermt2d */, X86::VPERMT2D256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17709 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17710 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17711 { 13527 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17712 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17713 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17714 { 13527 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17715 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17716 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17717 { 13527 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17718 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17719 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17720 { 13527 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17721 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17722 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17723 { 13527 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17724 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17725 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17726 { 13527 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17727 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17728 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17729 { 13527 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17730 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17731 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17732 { 13527 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17733 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17734 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17735 { 13527 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17736 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17737 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17738 { 13537 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17739 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17740 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17741 { 13537 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17742 { 13537 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17743 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17744 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17745 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17746 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17747 { 13537 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17748 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17749 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17750 { 13537 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17751 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17752 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17753 { 13537 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17754 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17755 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17756 { 13537 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17757 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17758 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17759 { 13537 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17760 { 13537 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17761 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17762 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17763 { 13547 /* vpermt2q */, X86::VPERMT2Q128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17764 { 13547 /* vpermt2q */, X86::VPERMT2Q256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17765 { 13547 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17766 { 13547 /* vpermt2q */, X86::VPERMT2Q128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17767 { 13547 /* vpermt2q */, X86::VPERMT2Q256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17768 { 13547 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17769 { 13547 /* vpermt2q */, X86::VPERMT2Q128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17770 { 13547 /* vpermt2q */, X86::VPERMT2Q256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17771 { 13547 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17772 { 13547 /* vpermt2q */, X86::VPERMT2Q128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17773 { 13547 /* vpermt2q */, X86::VPERMT2Q256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17774 { 13547 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17775 { 13547 /* vpermt2q */, X86::VPERMT2Q128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17776 { 13547 /* vpermt2q */, X86::VPERMT2Q256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17777 { 13547 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17778 { 13547 /* vpermt2q */, X86::VPERMT2Q128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17779 { 13547 /* vpermt2q */, X86::VPERMT2Q256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17780 { 13547 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17781 { 13547 /* vpermt2q */, X86::VPERMT2Q128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17782 { 13547 /* vpermt2q */, X86::VPERMT2Q256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17783 { 13547 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17784 { 13547 /* vpermt2q */, X86::VPERMT2Q128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17785 { 13547 /* vpermt2q */, X86::VPERMT2Q256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17786 { 13547 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17787 { 13547 /* vpermt2q */, X86::VPERMT2Q128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17788 { 13547 /* vpermt2q */, X86::VPERMT2Q256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17789 { 13547 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17790 { 13556 /* vpermt2w */, X86::VPERMT2W128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17791 { 13556 /* vpermt2w */, X86::VPERMT2W256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17792 { 13556 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17793 { 13556 /* vpermt2w */, X86::VPERMT2W128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17794 { 13556 /* vpermt2w */, X86::VPERMT2W256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17795 { 13556 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17796 { 13556 /* vpermt2w */, X86::VPERMT2W128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17797 { 13556 /* vpermt2w */, X86::VPERMT2W256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17798 { 13556 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17799 { 13556 /* vpermt2w */, X86::VPERMT2W128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17800 { 13556 /* vpermt2w */, X86::VPERMT2W256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17801 { 13556 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17802 { 13556 /* vpermt2w */, X86::VPERMT2W128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17803 { 13556 /* vpermt2w */, X86::VPERMT2W256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17804 { 13556 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17805 { 13556 /* vpermt2w */, X86::VPERMT2W128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17806 { 13556 /* vpermt2w */, X86::VPERMT2W256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17807 { 13556 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17808 { 13565 /* vpermw */, X86::VPERMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17809 { 13565 /* vpermw */, X86::VPERMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17810 { 13565 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17811 { 13565 /* vpermw */, X86::VPERMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17812 { 13565 /* vpermw */, X86::VPERMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17813 { 13565 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17814 { 13565 /* vpermw */, X86::VPERMWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17815 { 13565 /* vpermw */, X86::VPERMWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17816 { 13565 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17817 { 13565 /* vpermw */, X86::VPERMWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17818 { 13565 /* vpermw */, X86::VPERMWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17819 { 13565 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17820 { 13565 /* vpermw */, X86::VPERMWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17821 { 13565 /* vpermw */, X86::VPERMWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17822 { 13565 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17823 { 13565 /* vpermw */, X86::VPERMWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17824 { 13565 /* vpermw */, X86::VPERMWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17825 { 13565 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17826 { 13572 /* vpexpandb */, X86::VPEXPANDBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
17827 { 13572 /* vpexpandb */, X86::VPEXPANDBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
17828 { 13572 /* vpexpandb */, X86::VPEXPANDBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17829 { 13572 /* vpexpandb */, X86::VPEXPANDBZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
17830 { 13572 /* vpexpandb */, X86::VPEXPANDBZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
17831 { 13572 /* vpexpandb */, X86::VPEXPANDBZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
17832 { 13572 /* vpexpandb */, X86::VPEXPANDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17833 { 13572 /* vpexpandb */, X86::VPEXPANDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17834 { 13572 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17835 { 13572 /* vpexpandb */, X86::VPEXPANDBZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17836 { 13572 /* vpexpandb */, X86::VPEXPANDBZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17837 { 13572 /* vpexpandb */, X86::VPEXPANDBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17838 { 13572 /* vpexpandb */, X86::VPEXPANDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17839 { 13572 /* vpexpandb */, X86::VPEXPANDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17840 { 13572 /* vpexpandb */, X86::VPEXPANDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17841 { 13572 /* vpexpandb */, X86::VPEXPANDBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17842 { 13572 /* vpexpandb */, X86::VPEXPANDBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17843 { 13572 /* vpexpandb */, X86::VPEXPANDBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17844 { 13582 /* vpexpandd */, X86::VPEXPANDDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
17845 { 13582 /* vpexpandd */, X86::VPEXPANDDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
17846 { 13582 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17847 { 13582 /* vpexpandd */, X86::VPEXPANDDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
17848 { 13582 /* vpexpandd */, X86::VPEXPANDDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
17849 { 13582 /* vpexpandd */, X86::VPEXPANDDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
17850 { 13582 /* vpexpandd */, X86::VPEXPANDDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17851 { 13582 /* vpexpandd */, X86::VPEXPANDDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17852 { 13582 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17853 { 13582 /* vpexpandd */, X86::VPEXPANDDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17854 { 13582 /* vpexpandd */, X86::VPEXPANDDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17855 { 13582 /* vpexpandd */, X86::VPEXPANDDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17856 { 13582 /* vpexpandd */, X86::VPEXPANDDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17857 { 13582 /* vpexpandd */, X86::VPEXPANDDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17858 { 13582 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17859 { 13582 /* vpexpandd */, X86::VPEXPANDDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17860 { 13582 /* vpexpandd */, X86::VPEXPANDDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17861 { 13582 /* vpexpandd */, X86::VPEXPANDDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17862 { 13592 /* vpexpandq */, X86::VPEXPANDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
17863 { 13592 /* vpexpandq */, X86::VPEXPANDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
17864 { 13592 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17865 { 13592 /* vpexpandq */, X86::VPEXPANDQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
17866 { 13592 /* vpexpandq */, X86::VPEXPANDQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
17867 { 13592 /* vpexpandq */, X86::VPEXPANDQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
17868 { 13592 /* vpexpandq */, X86::VPEXPANDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17869 { 13592 /* vpexpandq */, X86::VPEXPANDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17870 { 13592 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17871 { 13592 /* vpexpandq */, X86::VPEXPANDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17872 { 13592 /* vpexpandq */, X86::VPEXPANDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17873 { 13592 /* vpexpandq */, X86::VPEXPANDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17874 { 13592 /* vpexpandq */, X86::VPEXPANDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17875 { 13592 /* vpexpandq */, X86::VPEXPANDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17876 { 13592 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17877 { 13592 /* vpexpandq */, X86::VPEXPANDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17878 { 13592 /* vpexpandq */, X86::VPEXPANDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17879 { 13592 /* vpexpandq */, X86::VPEXPANDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17880 { 13602 /* vpexpandw */, X86::VPEXPANDWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
17881 { 13602 /* vpexpandw */, X86::VPEXPANDWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
17882 { 13602 /* vpexpandw */, X86::VPEXPANDWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17883 { 13602 /* vpexpandw */, X86::VPEXPANDWZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
17884 { 13602 /* vpexpandw */, X86::VPEXPANDWZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
17885 { 13602 /* vpexpandw */, X86::VPEXPANDWZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
17886 { 13602 /* vpexpandw */, X86::VPEXPANDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17887 { 13602 /* vpexpandw */, X86::VPEXPANDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17888 { 13602 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17889 { 13602 /* vpexpandw */, X86::VPEXPANDWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17890 { 13602 /* vpexpandw */, X86::VPEXPANDWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17891 { 13602 /* vpexpandw */, X86::VPEXPANDWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17892 { 13602 /* vpexpandw */, X86::VPEXPANDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17893 { 13602 /* vpexpandw */, X86::VPEXPANDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17894 { 13602 /* vpexpandw */, X86::VPEXPANDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17895 { 13602 /* vpexpandw */, X86::VPEXPANDWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17896 { 13602 /* vpexpandw */, X86::VPEXPANDWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17897 { 13602 /* vpexpandw */, X86::VPEXPANDWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17898 { 13612 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
17899 { 13612 /* vpextrb */, X86::VPEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, },
17900 { 13612 /* vpextrb */, X86::VPEXTRBZrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, },
17901 { 13612 /* vpextrb */, X86::VPEXTRBZmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem8 }, },
17902 { 13620 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
17903 { 13620 /* vpextrd */, X86::VPEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
17904 { 13620 /* vpextrd */, X86::VPEXTRDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32 }, },
17905 { 13620 /* vpextrd */, X86::VPEXTRDZmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem32 }, },
17906 { 13628 /* vpextrq */, X86::VPEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
17907 { 13628 /* vpextrq */, X86::VPEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
17908 { 13628 /* vpextrq */, X86::VPEXTRQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR64 }, },
17909 { 13628 /* vpextrq */, X86::VPEXTRQZmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64 }, },
17910 { 13636 /* vpextrw */, X86::VPEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
17911 { 13636 /* vpextrw */, X86::VPEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, },
17912 { 13636 /* vpextrw */, X86::VPEXTRWZrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, },
17913 { 13636 /* vpextrw */, X86::VPEXTRWZmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem16 }, },
17914 { 13644 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
17915 { 13644 /* vpgatherdd */, X86::VPGATHERDDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
17916 { 13644 /* vpgatherdd */, X86::VPGATHERDDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, AMFBS_None, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17917 { 13644 /* vpgatherdd */, X86::VPGATHERDDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, AMFBS_None, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17918 { 13644 /* vpgatherdd */, X86::VPGATHERDDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17919 { 13655 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
17920 { 13655 /* vpgatherdq */, X86::VPGATHERDQYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
17921 { 13655 /* vpgatherdq */, X86::VPGATHERDQZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, AMFBS_None, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17922 { 13655 /* vpgatherdq */, X86::VPGATHERDQZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0, AMFBS_None, { MCK_Mem256_RC128X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17923 { 13655 /* vpgatherdq */, X86::VPGATHERDQZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0, AMFBS_None, { MCK_Mem512_RC256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17924 { 13666 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
17925 { 13666 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
17926 { 13666 /* vpgatherqd */, X86::VPGATHERQDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0, AMFBS_None, { MCK_Mem128_RC256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17927 { 13666 /* vpgatherqd */, X86::VPGATHERQDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0, AMFBS_None, { MCK_Mem256_RC512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17928 { 13666 /* vpgatherqd */, X86::VPGATHERQDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0, AMFBS_None, { MCK_Mem64_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17929 { 13677 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
17930 { 13677 /* vpgatherqq */, X86::VPGATHERQQYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
17931 { 13677 /* vpgatherqq */, X86::VPGATHERQQZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, AMFBS_None, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17932 { 13677 /* vpgatherqq */, X86::VPGATHERQQZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, AMFBS_None, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17933 { 13677 /* vpgatherqq */, X86::VPGATHERQQZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17934 { 13688 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17935 { 13688 /* vphaddbd */, X86::VPHADDBDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17936 { 13697 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17937 { 13697 /* vphaddbq */, X86::VPHADDBQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17938 { 13706 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17939 { 13706 /* vphaddbw */, X86::VPHADDBWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17940 { 13715 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17941 { 13715 /* vphaddd */, X86::VPHADDDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17942 { 13715 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17943 { 13715 /* vphaddd */, X86::VPHADDDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17944 { 13723 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17945 { 13723 /* vphadddq */, X86::VPHADDDQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17946 { 13732 /* vphaddsw */, X86::VPHADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17947 { 13732 /* vphaddsw */, X86::VPHADDSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17948 { 13732 /* vphaddsw */, X86::VPHADDSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17949 { 13732 /* vphaddsw */, X86::VPHADDSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17950 { 13741 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17951 { 13741 /* vphaddubd */, X86::VPHADDUBDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17952 { 13751 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17953 { 13751 /* vphaddubq */, X86::VPHADDUBQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17954 { 13761 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17955 { 13761 /* vphaddubw */, X86::VPHADDUBWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17956 { 13771 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17957 { 13771 /* vphaddudq */, X86::VPHADDUDQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17958 { 13781 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17959 { 13781 /* vphadduwd */, X86::VPHADDUWDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17960 { 13791 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17961 { 13791 /* vphadduwq */, X86::VPHADDUWQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17962 { 13801 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17963 { 13801 /* vphaddw */, X86::VPHADDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17964 { 13801 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17965 { 13801 /* vphaddw */, X86::VPHADDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17966 { 13809 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17967 { 13809 /* vphaddwd */, X86::VPHADDWDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17968 { 13818 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17969 { 13818 /* vphaddwq */, X86::VPHADDWQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17970 { 13827 /* vphminposuw */, X86::VPHMINPOSUWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17971 { 13827 /* vphminposuw */, X86::VPHMINPOSUWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17972 { 13839 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17973 { 13839 /* vphsubbw */, X86::VPHSUBBWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17974 { 13848 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17975 { 13848 /* vphsubd */, X86::VPHSUBDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17976 { 13848 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17977 { 13848 /* vphsubd */, X86::VPHSUBDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17978 { 13856 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17979 { 13856 /* vphsubdq */, X86::VPHSUBDQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17980 { 13865 /* vphsubsw */, X86::VPHSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17981 { 13865 /* vphsubsw */, X86::VPHSUBSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17982 { 13865 /* vphsubsw */, X86::VPHSUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17983 { 13865 /* vphsubsw */, X86::VPHSUBSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17984 { 13874 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17985 { 13874 /* vphsubw */, X86::VPHSUBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17986 { 13874 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17987 { 13874 /* vphsubw */, X86::VPHSUBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17988 { 13882 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17989 { 13882 /* vphsubwd */, X86::VPHSUBWDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17990 { 13891 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
17991 { 13891 /* vpinsrb */, X86::VPINSRBZrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32X, MCK_FR32X }, },
17992 { 13891 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32, MCK_FR32 }, },
17993 { 13891 /* vpinsrb */, X86::VPINSRBZrm, Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32X, MCK_FR32X }, },
17994 { 13899 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32, MCK_FR32 }, },
17995 { 13899 /* vpinsrd */, X86::VPINSRDZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32X, MCK_FR32X }, },
17996 { 13899 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
17997 { 13899 /* vpinsrd */, X86::VPINSRDZrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
17998 { 13907 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32, MCK_FR32 }, },
17999 { 13907 /* vpinsrq */, X86::VPINSRQZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32X, MCK_FR32X }, },
18000 { 13907 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
18001 { 13907 /* vpinsrq */, X86::VPINSRQZrm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
18002 { 13915 /* vpinsrw */, X86::VPINSRWrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
18003 { 13915 /* vpinsrw */, X86::VPINSRWZrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32X, MCK_FR32X }, },
18004 { 13915 /* vpinsrw */, X86::VPINSRWrm, Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32, MCK_FR32 }, },
18005 { 13915 /* vpinsrw */, X86::VPINSRWZrm, Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32X, MCK_FR32X }, },
18006 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18007 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
18008 { 13923 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
18009 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
18010 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
18011 { 13923 /* vplzcntd */, X86::VPLZCNTDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
18012 { 13923 /* vplzcntd */, X86::VPLZCNTDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
18013 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
18014 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
18015 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18016 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18017 { 13923 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18018 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18019 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18020 { 13923 /* vplzcntd */, X86::VPLZCNTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18021 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18022 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18023 { 13923 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18024 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18025 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18026 { 13923 /* vplzcntd */, X86::VPLZCNTDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18027 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18028 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18029 { 13923 /* vplzcntd */, X86::VPLZCNTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18030 { 13923 /* vplzcntd */, X86::VPLZCNTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18031 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18032 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18033 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18034 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
18035 { 13932 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
18036 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
18037 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
18038 { 13932 /* vplzcntq */, X86::VPLZCNTQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
18039 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
18040 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
18041 { 13932 /* vplzcntq */, X86::VPLZCNTQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
18042 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18043 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18044 { 13932 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18045 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18046 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18047 { 13932 /* vplzcntq */, X86::VPLZCNTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18048 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18049 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18050 { 13932 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18051 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18052 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18053 { 13932 /* vplzcntq */, X86::VPLZCNTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18054 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18055 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18056 { 13932 /* vplzcntq */, X86::VPLZCNTQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18057 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18058 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18059 { 13932 /* vplzcntq */, X86::VPLZCNTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18060 { 13941 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18061 { 13941 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18062 { 13950 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18063 { 13950 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18064 { 13960 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18065 { 13960 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18066 { 13970 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18067 { 13970 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18068 { 13980 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18069 { 13980 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18070 { 13991 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18071 { 13991 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18072 { 14002 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18073 { 14002 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18074 { 14012 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18075 { 14012 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18076 { 14022 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18077 { 14022 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18078 { 14031 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18079 { 14031 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18080 { 14040 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18081 { 14040 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18082 { 14051 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18083 { 14051 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18084 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18085 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18086 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18087 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18088 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18089 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18090 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18091 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18092 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18093 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18094 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18095 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18096 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18097 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18098 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18099 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18100 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18101 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18102 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18103 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18104 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18105 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18106 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18107 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18108 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18109 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18110 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18111 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18112 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18113 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18114 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18115 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18116 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18117 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18118 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18119 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18120 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18121 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18122 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18123 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18124 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18125 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18126 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18127 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18128 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18129 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18130 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18131 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18132 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18133 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18134 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18135 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18136 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18137 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18138 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18139 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18140 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18141 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18142 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18143 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18144 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18145 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18146 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18147 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18148 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18149 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18150 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18151 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18152 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18153 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18154 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18155 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18156 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18157 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18158 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18159 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18160 { 14096 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18161 { 14096 /* vpmaddwd */, X86::VPMADDWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18162 { 14096 /* vpmaddwd */, X86::VPMADDWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18163 { 14096 /* vpmaddwd */, X86::VPMADDWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18164 { 14096 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18165 { 14096 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18166 { 14096 /* vpmaddwd */, X86::VPMADDWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18167 { 14096 /* vpmaddwd */, X86::VPMADDWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18168 { 14096 /* vpmaddwd */, X86::VPMADDWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18169 { 14096 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18170 { 14096 /* vpmaddwd */, X86::VPMADDWDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18171 { 14096 /* vpmaddwd */, X86::VPMADDWDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18172 { 14096 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18173 { 14096 /* vpmaddwd */, X86::VPMADDWDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18174 { 14096 /* vpmaddwd */, X86::VPMADDWDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18175 { 14096 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18176 { 14096 /* vpmaddwd */, X86::VPMADDWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18177 { 14096 /* vpmaddwd */, X86::VPMADDWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18178 { 14096 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18179 { 14096 /* vpmaddwd */, X86::VPMADDWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18180 { 14096 /* vpmaddwd */, X86::VPMADDWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18181 { 14096 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18182 { 14105 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
18183 { 14105 /* vpmaskmovd */, X86::VPMASKMOVDYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
18184 { 14105 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18185 { 14105 /* vpmaskmovd */, X86::VPMASKMOVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18186 { 14116 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
18187 { 14116 /* vpmaskmovq */, X86::VPMASKMOVQYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
18188 { 14116 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18189 { 14116 /* vpmaskmovq */, X86::VPMASKMOVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18190 { 14127 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18191 { 14127 /* vpmaxsb */, X86::VPMAXSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18192 { 14127 /* vpmaxsb */, X86::VPMAXSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18193 { 14127 /* vpmaxsb */, X86::VPMAXSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18194 { 14127 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18195 { 14127 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18196 { 14127 /* vpmaxsb */, X86::VPMAXSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18197 { 14127 /* vpmaxsb */, X86::VPMAXSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18198 { 14127 /* vpmaxsb */, X86::VPMAXSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18199 { 14127 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18200 { 14127 /* vpmaxsb */, X86::VPMAXSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18201 { 14127 /* vpmaxsb */, X86::VPMAXSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18202 { 14127 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18203 { 14127 /* vpmaxsb */, X86::VPMAXSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18204 { 14127 /* vpmaxsb */, X86::VPMAXSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18205 { 14127 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18206 { 14127 /* vpmaxsb */, X86::VPMAXSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18207 { 14127 /* vpmaxsb */, X86::VPMAXSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18208 { 14127 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18209 { 14127 /* vpmaxsb */, X86::VPMAXSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18210 { 14127 /* vpmaxsb */, X86::VPMAXSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18211 { 14127 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18212 { 14135 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18213 { 14135 /* vpmaxsd */, X86::VPMAXSDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18214 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18215 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18216 { 14135 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18217 { 14135 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18218 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18219 { 14135 /* vpmaxsd */, X86::VPMAXSDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18220 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18221 { 14135 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18222 { 14135 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18223 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18224 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18225 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18226 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18227 { 14135 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18228 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18229 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18230 { 14135 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18231 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18232 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18233 { 14135 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18234 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18235 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18236 { 14135 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18237 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18238 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18239 { 14135 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18240 { 14135 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18241 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18242 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18243 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18244 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18245 { 14143 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18246 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18247 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18248 { 14143 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18249 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18250 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18251 { 14143 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18252 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18253 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18254 { 14143 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18255 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18256 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18257 { 14143 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18258 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18259 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18260 { 14143 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18261 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18262 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18263 { 14143 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18264 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18265 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18266 { 14143 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18267 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18268 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18269 { 14143 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18270 { 14151 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18271 { 14151 /* vpmaxsw */, X86::VPMAXSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18272 { 14151 /* vpmaxsw */, X86::VPMAXSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18273 { 14151 /* vpmaxsw */, X86::VPMAXSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18274 { 14151 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18275 { 14151 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18276 { 14151 /* vpmaxsw */, X86::VPMAXSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18277 { 14151 /* vpmaxsw */, X86::VPMAXSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18278 { 14151 /* vpmaxsw */, X86::VPMAXSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18279 { 14151 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18280 { 14151 /* vpmaxsw */, X86::VPMAXSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18281 { 14151 /* vpmaxsw */, X86::VPMAXSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18282 { 14151 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18283 { 14151 /* vpmaxsw */, X86::VPMAXSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18284 { 14151 /* vpmaxsw */, X86::VPMAXSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18285 { 14151 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18286 { 14151 /* vpmaxsw */, X86::VPMAXSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18287 { 14151 /* vpmaxsw */, X86::VPMAXSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18288 { 14151 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18289 { 14151 /* vpmaxsw */, X86::VPMAXSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18290 { 14151 /* vpmaxsw */, X86::VPMAXSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18291 { 14151 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18292 { 14159 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18293 { 14159 /* vpmaxub */, X86::VPMAXUBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18294 { 14159 /* vpmaxub */, X86::VPMAXUBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18295 { 14159 /* vpmaxub */, X86::VPMAXUBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18296 { 14159 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18297 { 14159 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18298 { 14159 /* vpmaxub */, X86::VPMAXUBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18299 { 14159 /* vpmaxub */, X86::VPMAXUBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18300 { 14159 /* vpmaxub */, X86::VPMAXUBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18301 { 14159 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18302 { 14159 /* vpmaxub */, X86::VPMAXUBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18303 { 14159 /* vpmaxub */, X86::VPMAXUBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18304 { 14159 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18305 { 14159 /* vpmaxub */, X86::VPMAXUBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18306 { 14159 /* vpmaxub */, X86::VPMAXUBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18307 { 14159 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18308 { 14159 /* vpmaxub */, X86::VPMAXUBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18309 { 14159 /* vpmaxub */, X86::VPMAXUBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18310 { 14159 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18311 { 14159 /* vpmaxub */, X86::VPMAXUBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18312 { 14159 /* vpmaxub */, X86::VPMAXUBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18313 { 14159 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18314 { 14167 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18315 { 14167 /* vpmaxud */, X86::VPMAXUDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18316 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18317 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18318 { 14167 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18319 { 14167 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18320 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18321 { 14167 /* vpmaxud */, X86::VPMAXUDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18322 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18323 { 14167 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18324 { 14167 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18325 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18326 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18327 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18328 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18329 { 14167 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18330 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18331 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18332 { 14167 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18333 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18334 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18335 { 14167 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18336 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18337 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18338 { 14167 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18339 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18340 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18341 { 14167 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18342 { 14167 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18343 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18344 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18345 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18346 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18347 { 14175 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18348 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18349 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18350 { 14175 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18351 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18352 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18353 { 14175 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18354 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18355 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18356 { 14175 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18357 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18358 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18359 { 14175 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18360 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18361 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18362 { 14175 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18363 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18364 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18365 { 14175 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18366 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18367 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18368 { 14175 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18369 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18370 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18371 { 14175 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18372 { 14183 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18373 { 14183 /* vpmaxuw */, X86::VPMAXUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18374 { 14183 /* vpmaxuw */, X86::VPMAXUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18375 { 14183 /* vpmaxuw */, X86::VPMAXUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18376 { 14183 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18377 { 14183 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18378 { 14183 /* vpmaxuw */, X86::VPMAXUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18379 { 14183 /* vpmaxuw */, X86::VPMAXUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18380 { 14183 /* vpmaxuw */, X86::VPMAXUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18381 { 14183 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18382 { 14183 /* vpmaxuw */, X86::VPMAXUWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18383 { 14183 /* vpmaxuw */, X86::VPMAXUWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18384 { 14183 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18385 { 14183 /* vpmaxuw */, X86::VPMAXUWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18386 { 14183 /* vpmaxuw */, X86::VPMAXUWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18387 { 14183 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18388 { 14183 /* vpmaxuw */, X86::VPMAXUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18389 { 14183 /* vpmaxuw */, X86::VPMAXUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18390 { 14183 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18391 { 14183 /* vpmaxuw */, X86::VPMAXUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18392 { 14183 /* vpmaxuw */, X86::VPMAXUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18393 { 14183 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18394 { 14191 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18395 { 14191 /* vpminsb */, X86::VPMINSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18396 { 14191 /* vpminsb */, X86::VPMINSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18397 { 14191 /* vpminsb */, X86::VPMINSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18398 { 14191 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18399 { 14191 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18400 { 14191 /* vpminsb */, X86::VPMINSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18401 { 14191 /* vpminsb */, X86::VPMINSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18402 { 14191 /* vpminsb */, X86::VPMINSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18403 { 14191 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18404 { 14191 /* vpminsb */, X86::VPMINSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18405 { 14191 /* vpminsb */, X86::VPMINSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18406 { 14191 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18407 { 14191 /* vpminsb */, X86::VPMINSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18408 { 14191 /* vpminsb */, X86::VPMINSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18409 { 14191 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18410 { 14191 /* vpminsb */, X86::VPMINSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18411 { 14191 /* vpminsb */, X86::VPMINSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18412 { 14191 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18413 { 14191 /* vpminsb */, X86::VPMINSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18414 { 14191 /* vpminsb */, X86::VPMINSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18415 { 14191 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18416 { 14199 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18417 { 14199 /* vpminsd */, X86::VPMINSDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18418 { 14199 /* vpminsd */, X86::VPMINSDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18419 { 14199 /* vpminsd */, X86::VPMINSDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18420 { 14199 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18421 { 14199 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18422 { 14199 /* vpminsd */, X86::VPMINSDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18423 { 14199 /* vpminsd */, X86::VPMINSDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18424 { 14199 /* vpminsd */, X86::VPMINSDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18425 { 14199 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18426 { 14199 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18427 { 14199 /* vpminsd */, X86::VPMINSDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18428 { 14199 /* vpminsd */, X86::VPMINSDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18429 { 14199 /* vpminsd */, X86::VPMINSDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18430 { 14199 /* vpminsd */, X86::VPMINSDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18431 { 14199 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18432 { 14199 /* vpminsd */, X86::VPMINSDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18433 { 14199 /* vpminsd */, X86::VPMINSDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18434 { 14199 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18435 { 14199 /* vpminsd */, X86::VPMINSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18436 { 14199 /* vpminsd */, X86::VPMINSDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18437 { 14199 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18438 { 14199 /* vpminsd */, X86::VPMINSDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18439 { 14199 /* vpminsd */, X86::VPMINSDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18440 { 14199 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18441 { 14199 /* vpminsd */, X86::VPMINSDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18442 { 14199 /* vpminsd */, X86::VPMINSDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18443 { 14199 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18444 { 14199 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18445 { 14199 /* vpminsd */, X86::VPMINSDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18446 { 14199 /* vpminsd */, X86::VPMINSDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18447 { 14207 /* vpminsq */, X86::VPMINSQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18448 { 14207 /* vpminsq */, X86::VPMINSQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18449 { 14207 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18450 { 14207 /* vpminsq */, X86::VPMINSQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18451 { 14207 /* vpminsq */, X86::VPMINSQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18452 { 14207 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18453 { 14207 /* vpminsq */, X86::VPMINSQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18454 { 14207 /* vpminsq */, X86::VPMINSQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18455 { 14207 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18456 { 14207 /* vpminsq */, X86::VPMINSQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18457 { 14207 /* vpminsq */, X86::VPMINSQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18458 { 14207 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18459 { 14207 /* vpminsq */, X86::VPMINSQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18460 { 14207 /* vpminsq */, X86::VPMINSQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18461 { 14207 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18462 { 14207 /* vpminsq */, X86::VPMINSQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18463 { 14207 /* vpminsq */, X86::VPMINSQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18464 { 14207 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18465 { 14207 /* vpminsq */, X86::VPMINSQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18466 { 14207 /* vpminsq */, X86::VPMINSQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18467 { 14207 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18468 { 14207 /* vpminsq */, X86::VPMINSQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18469 { 14207 /* vpminsq */, X86::VPMINSQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18470 { 14207 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18471 { 14207 /* vpminsq */, X86::VPMINSQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18472 { 14207 /* vpminsq */, X86::VPMINSQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18473 { 14207 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18474 { 14215 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18475 { 14215 /* vpminsw */, X86::VPMINSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18476 { 14215 /* vpminsw */, X86::VPMINSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18477 { 14215 /* vpminsw */, X86::VPMINSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18478 { 14215 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18479 { 14215 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18480 { 14215 /* vpminsw */, X86::VPMINSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18481 { 14215 /* vpminsw */, X86::VPMINSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18482 { 14215 /* vpminsw */, X86::VPMINSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18483 { 14215 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18484 { 14215 /* vpminsw */, X86::VPMINSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18485 { 14215 /* vpminsw */, X86::VPMINSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18486 { 14215 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18487 { 14215 /* vpminsw */, X86::VPMINSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18488 { 14215 /* vpminsw */, X86::VPMINSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18489 { 14215 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18490 { 14215 /* vpminsw */, X86::VPMINSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18491 { 14215 /* vpminsw */, X86::VPMINSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18492 { 14215 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18493 { 14215 /* vpminsw */, X86::VPMINSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18494 { 14215 /* vpminsw */, X86::VPMINSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18495 { 14215 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18496 { 14223 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18497 { 14223 /* vpminub */, X86::VPMINUBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18498 { 14223 /* vpminub */, X86::VPMINUBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18499 { 14223 /* vpminub */, X86::VPMINUBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18500 { 14223 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18501 { 14223 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18502 { 14223 /* vpminub */, X86::VPMINUBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18503 { 14223 /* vpminub */, X86::VPMINUBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18504 { 14223 /* vpminub */, X86::VPMINUBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18505 { 14223 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18506 { 14223 /* vpminub */, X86::VPMINUBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18507 { 14223 /* vpminub */, X86::VPMINUBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18508 { 14223 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18509 { 14223 /* vpminub */, X86::VPMINUBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18510 { 14223 /* vpminub */, X86::VPMINUBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18511 { 14223 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18512 { 14223 /* vpminub */, X86::VPMINUBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18513 { 14223 /* vpminub */, X86::VPMINUBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18514 { 14223 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18515 { 14223 /* vpminub */, X86::VPMINUBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18516 { 14223 /* vpminub */, X86::VPMINUBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18517 { 14223 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18518 { 14231 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18519 { 14231 /* vpminud */, X86::VPMINUDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18520 { 14231 /* vpminud */, X86::VPMINUDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18521 { 14231 /* vpminud */, X86::VPMINUDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18522 { 14231 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18523 { 14231 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18524 { 14231 /* vpminud */, X86::VPMINUDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18525 { 14231 /* vpminud */, X86::VPMINUDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18526 { 14231 /* vpminud */, X86::VPMINUDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18527 { 14231 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18528 { 14231 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18529 { 14231 /* vpminud */, X86::VPMINUDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18530 { 14231 /* vpminud */, X86::VPMINUDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18531 { 14231 /* vpminud */, X86::VPMINUDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18532 { 14231 /* vpminud */, X86::VPMINUDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18533 { 14231 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18534 { 14231 /* vpminud */, X86::VPMINUDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18535 { 14231 /* vpminud */, X86::VPMINUDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18536 { 14231 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18537 { 14231 /* vpminud */, X86::VPMINUDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18538 { 14231 /* vpminud */, X86::VPMINUDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18539 { 14231 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18540 { 14231 /* vpminud */, X86::VPMINUDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18541 { 14231 /* vpminud */, X86::VPMINUDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18542 { 14231 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18543 { 14231 /* vpminud */, X86::VPMINUDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18544 { 14231 /* vpminud */, X86::VPMINUDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18545 { 14231 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18546 { 14231 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18547 { 14231 /* vpminud */, X86::VPMINUDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18548 { 14231 /* vpminud */, X86::VPMINUDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18549 { 14239 /* vpminuq */, X86::VPMINUQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18550 { 14239 /* vpminuq */, X86::VPMINUQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18551 { 14239 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18552 { 14239 /* vpminuq */, X86::VPMINUQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18553 { 14239 /* vpminuq */, X86::VPMINUQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18554 { 14239 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18555 { 14239 /* vpminuq */, X86::VPMINUQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18556 { 14239 /* vpminuq */, X86::VPMINUQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18557 { 14239 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18558 { 14239 /* vpminuq */, X86::VPMINUQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18559 { 14239 /* vpminuq */, X86::VPMINUQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18560 { 14239 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18561 { 14239 /* vpminuq */, X86::VPMINUQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18562 { 14239 /* vpminuq */, X86::VPMINUQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18563 { 14239 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18564 { 14239 /* vpminuq */, X86::VPMINUQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18565 { 14239 /* vpminuq */, X86::VPMINUQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18566 { 14239 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18567 { 14239 /* vpminuq */, X86::VPMINUQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18568 { 14239 /* vpminuq */, X86::VPMINUQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18569 { 14239 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18570 { 14239 /* vpminuq */, X86::VPMINUQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18571 { 14239 /* vpminuq */, X86::VPMINUQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18572 { 14239 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18573 { 14239 /* vpminuq */, X86::VPMINUQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18574 { 14239 /* vpminuq */, X86::VPMINUQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18575 { 14239 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18576 { 14247 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18577 { 14247 /* vpminuw */, X86::VPMINUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18578 { 14247 /* vpminuw */, X86::VPMINUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18579 { 14247 /* vpminuw */, X86::VPMINUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18580 { 14247 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18581 { 14247 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18582 { 14247 /* vpminuw */, X86::VPMINUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18583 { 14247 /* vpminuw */, X86::VPMINUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18584 { 14247 /* vpminuw */, X86::VPMINUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18585 { 14247 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18586 { 14247 /* vpminuw */, X86::VPMINUWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18587 { 14247 /* vpminuw */, X86::VPMINUWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18588 { 14247 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18589 { 14247 /* vpminuw */, X86::VPMINUWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18590 { 14247 /* vpminuw */, X86::VPMINUWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18591 { 14247 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18592 { 14247 /* vpminuw */, X86::VPMINUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18593 { 14247 /* vpminuw */, X86::VPMINUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18594 { 14247 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18595 { 14247 /* vpminuw */, X86::VPMINUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18596 { 14247 /* vpminuw */, X86::VPMINUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18597 { 14247 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18598 { 14255 /* vpmovb2m */, X86::VPMOVB2MZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
18599 { 14255 /* vpmovb2m */, X86::VPMOVB2MZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
18600 { 14255 /* vpmovb2m */, X86::VPMOVB2MZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
18601 { 14264 /* vpmovd2m */, X86::VPMOVD2MZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
18602 { 14264 /* vpmovd2m */, X86::VPMOVD2MZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
18603 { 14264 /* vpmovd2m */, X86::VPMOVD2MZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
18604 { 14273 /* vpmovdb */, X86::VPMOVDBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18605 { 14273 /* vpmovdb */, X86::VPMOVDBZ128mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
18606 { 14273 /* vpmovdb */, X86::VPMOVDBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18607 { 14273 /* vpmovdb */, X86::VPMOVDBZ256mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, },
18608 { 14273 /* vpmovdb */, X86::VPMOVDBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18609 { 14273 /* vpmovdb */, X86::VPMOVDBZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
18610 { 14273 /* vpmovdb */, X86::VPMOVDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18611 { 14273 /* vpmovdb */, X86::VPMOVDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18612 { 14273 /* vpmovdb */, X86::VPMOVDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18613 { 14273 /* vpmovdb */, X86::VPMOVDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18614 { 14273 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18615 { 14273 /* vpmovdb */, X86::VPMOVDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18616 { 14273 /* vpmovdb */, X86::VPMOVDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18617 { 14273 /* vpmovdb */, X86::VPMOVDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18618 { 14273 /* vpmovdb */, X86::VPMOVDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18619 { 14281 /* vpmovdw */, X86::VPMOVDWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18620 { 14281 /* vpmovdw */, X86::VPMOVDWZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
18621 { 14281 /* vpmovdw */, X86::VPMOVDWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18622 { 14281 /* vpmovdw */, X86::VPMOVDWZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
18623 { 14281 /* vpmovdw */, X86::VPMOVDWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18624 { 14281 /* vpmovdw */, X86::VPMOVDWZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18625 { 14281 /* vpmovdw */, X86::VPMOVDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18626 { 14281 /* vpmovdw */, X86::VPMOVDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18627 { 14281 /* vpmovdw */, X86::VPMOVDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18628 { 14281 /* vpmovdw */, X86::VPMOVDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18629 { 14281 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18630 { 14281 /* vpmovdw */, X86::VPMOVDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18631 { 14281 /* vpmovdw */, X86::VPMOVDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18632 { 14281 /* vpmovdw */, X86::VPMOVDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18633 { 14281 /* vpmovdw */, X86::VPMOVDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18634 { 14289 /* vpmovm2b */, X86::VPMOVM2BZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_FR32X }, },
18635 { 14289 /* vpmovm2b */, X86::VPMOVM2BZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR256X }, },
18636 { 14289 /* vpmovm2b */, X86::VPMOVM2BZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
18637 { 14298 /* vpmovm2d */, X86::VPMOVM2DZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_FR32X }, },
18638 { 14298 /* vpmovm2d */, X86::VPMOVM2DZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR256X }, },
18639 { 14298 /* vpmovm2d */, X86::VPMOVM2DZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
18640 { 14307 /* vpmovm2q */, X86::VPMOVM2QZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_FR32X }, },
18641 { 14307 /* vpmovm2q */, X86::VPMOVM2QZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR256X }, },
18642 { 14307 /* vpmovm2q */, X86::VPMOVM2QZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
18643 { 14316 /* vpmovm2w */, X86::VPMOVM2WZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_FR32X }, },
18644 { 14316 /* vpmovm2w */, X86::VPMOVM2WZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR256X }, },
18645 { 14316 /* vpmovm2w */, X86::VPMOVM2WZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
18646 { 14325 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
18647 { 14325 /* vpmovmskb */, X86::VPMOVMSKBYrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_GR32orGR64 }, },
18648 { 14335 /* vpmovq2m */, X86::VPMOVQ2MZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
18649 { 14335 /* vpmovq2m */, X86::VPMOVQ2MZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
18650 { 14335 /* vpmovq2m */, X86::VPMOVQ2MZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
18651 { 14344 /* vpmovqb */, X86::VPMOVQBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18652 { 14344 /* vpmovqb */, X86::VPMOVQBZ128mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem16 }, },
18653 { 14344 /* vpmovqb */, X86::VPMOVQBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18654 { 14344 /* vpmovqb */, X86::VPMOVQBZ256mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem32 }, },
18655 { 14344 /* vpmovqb */, X86::VPMOVQBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18656 { 14344 /* vpmovqb */, X86::VPMOVQBZmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
18657 { 14344 /* vpmovqb */, X86::VPMOVQBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18658 { 14344 /* vpmovqb */, X86::VPMOVQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18659 { 14344 /* vpmovqb */, X86::VPMOVQBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18660 { 14344 /* vpmovqb */, X86::VPMOVQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18661 { 14344 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18662 { 14344 /* vpmovqb */, X86::VPMOVQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18663 { 14344 /* vpmovqb */, X86::VPMOVQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18664 { 14344 /* vpmovqb */, X86::VPMOVQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18665 { 14344 /* vpmovqb */, X86::VPMOVQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18666 { 14352 /* vpmovqd */, X86::VPMOVQDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18667 { 14352 /* vpmovqd */, X86::VPMOVQDZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
18668 { 14352 /* vpmovqd */, X86::VPMOVQDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18669 { 14352 /* vpmovqd */, X86::VPMOVQDZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
18670 { 14352 /* vpmovqd */, X86::VPMOVQDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18671 { 14352 /* vpmovqd */, X86::VPMOVQDZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18672 { 14352 /* vpmovqd */, X86::VPMOVQDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18673 { 14352 /* vpmovqd */, X86::VPMOVQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18674 { 14352 /* vpmovqd */, X86::VPMOVQDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18675 { 14352 /* vpmovqd */, X86::VPMOVQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18676 { 14352 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18677 { 14352 /* vpmovqd */, X86::VPMOVQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18678 { 14352 /* vpmovqd */, X86::VPMOVQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18679 { 14352 /* vpmovqd */, X86::VPMOVQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18680 { 14352 /* vpmovqd */, X86::VPMOVQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18681 { 14360 /* vpmovqw */, X86::VPMOVQWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18682 { 14360 /* vpmovqw */, X86::VPMOVQWZ128mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
18683 { 14360 /* vpmovqw */, X86::VPMOVQWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18684 { 14360 /* vpmovqw */, X86::VPMOVQWZ256mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, },
18685 { 14360 /* vpmovqw */, X86::VPMOVQWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18686 { 14360 /* vpmovqw */, X86::VPMOVQWZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
18687 { 14360 /* vpmovqw */, X86::VPMOVQWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18688 { 14360 /* vpmovqw */, X86::VPMOVQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18689 { 14360 /* vpmovqw */, X86::VPMOVQWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18690 { 14360 /* vpmovqw */, X86::VPMOVQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18691 { 14360 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18692 { 14360 /* vpmovqw */, X86::VPMOVQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18693 { 14360 /* vpmovqw */, X86::VPMOVQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18694 { 14360 /* vpmovqw */, X86::VPMOVQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18695 { 14360 /* vpmovqw */, X86::VPMOVQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18696 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18697 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ128mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
18698 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18699 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ256mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, },
18700 { 14368 /* vpmovsdb */, X86::VPMOVSDBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18701 { 14368 /* vpmovsdb */, X86::VPMOVSDBZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
18702 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18703 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18704 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18705 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18706 { 14368 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18707 { 14368 /* vpmovsdb */, X86::VPMOVSDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18708 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18709 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18710 { 14368 /* vpmovsdb */, X86::VPMOVSDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18711 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18712 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
18713 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18714 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
18715 { 14377 /* vpmovsdw */, X86::VPMOVSDWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18716 { 14377 /* vpmovsdw */, X86::VPMOVSDWZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18717 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18718 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18719 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18720 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18721 { 14377 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18722 { 14377 /* vpmovsdw */, X86::VPMOVSDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18723 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18724 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18725 { 14377 /* vpmovsdw */, X86::VPMOVSDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18726 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18727 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ128mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem16 }, },
18728 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18729 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ256mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem32 }, },
18730 { 14386 /* vpmovsqb */, X86::VPMOVSQBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18731 { 14386 /* vpmovsqb */, X86::VPMOVSQBZmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
18732 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18733 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18734 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18735 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18736 { 14386 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18737 { 14386 /* vpmovsqb */, X86::VPMOVSQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18738 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18739 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18740 { 14386 /* vpmovsqb */, X86::VPMOVSQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18741 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18742 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
18743 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18744 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
18745 { 14395 /* vpmovsqd */, X86::VPMOVSQDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18746 { 14395 /* vpmovsqd */, X86::VPMOVSQDZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18747 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18748 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18749 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18750 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18751 { 14395 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18752 { 14395 /* vpmovsqd */, X86::VPMOVSQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18753 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18754 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18755 { 14395 /* vpmovsqd */, X86::VPMOVSQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18756 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18757 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ128mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
18758 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18759 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ256mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, },
18760 { 14404 /* vpmovsqw */, X86::VPMOVSQWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18761 { 14404 /* vpmovsqw */, X86::VPMOVSQWZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
18762 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18763 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18764 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18765 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18766 { 14404 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18767 { 14404 /* vpmovsqw */, X86::VPMOVSQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18768 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18769 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18770 { 14404 /* vpmovsqw */, X86::VPMOVSQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18771 { 14413 /* vpmovswb */, X86::VPMOVSWBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18772 { 14413 /* vpmovswb */, X86::VPMOVSWBZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
18773 { 14413 /* vpmovswb */, X86::VPMOVSWBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18774 { 14413 /* vpmovswb */, X86::VPMOVSWBZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
18775 { 14413 /* vpmovswb */, X86::VPMOVSWBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18776 { 14413 /* vpmovswb */, X86::VPMOVSWBZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18777 { 14413 /* vpmovswb */, X86::VPMOVSWBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18778 { 14413 /* vpmovswb */, X86::VPMOVSWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18779 { 14413 /* vpmovswb */, X86::VPMOVSWBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18780 { 14413 /* vpmovswb */, X86::VPMOVSWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18781 { 14413 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18782 { 14413 /* vpmovswb */, X86::VPMOVSWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18783 { 14413 /* vpmovswb */, X86::VPMOVSWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18784 { 14413 /* vpmovswb */, X86::VPMOVSWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18785 { 14413 /* vpmovswb */, X86::VPMOVSWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18786 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18787 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18788 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18789 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
18790 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
18791 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
18792 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
18793 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ128rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
18794 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDYrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256 }, },
18795 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ256rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, },
18796 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18797 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18798 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18799 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18800 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18801 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18802 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18803 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18804 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18805 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18806 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18807 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18808 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18809 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18810 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18811 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
18812 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
18813 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32 }, },
18814 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ128rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X }, },
18815 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQYrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256 }, },
18816 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ256rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X }, },
18817 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
18818 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18819 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18820 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18821 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18822 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18823 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18824 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18825 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18826 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18827 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18828 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18829 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18830 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18831 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18832 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18833 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
18834 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
18835 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, },
18836 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
18837 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
18838 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
18839 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
18840 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18841 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18842 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18843 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18844 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18845 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18846 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18847 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18848 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18849 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18850 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18851 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18852 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18853 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18854 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18855 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
18856 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
18857 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, },
18858 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
18859 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
18860 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
18861 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
18862 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18863 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18864 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18865 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18866 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18867 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18868 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18869 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18870 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18871 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18872 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18873 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18874 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18875 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18876 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18877 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
18878 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
18879 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, },
18880 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
18881 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
18882 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
18883 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
18884 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18885 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18886 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18887 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18888 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18889 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18890 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18891 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18892 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18893 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18894 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18895 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18896 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18897 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18898 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18899 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
18900 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
18901 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
18902 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
18903 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ128rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
18904 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQYrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256 }, },
18905 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ256rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, },
18906 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18907 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18908 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18909 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18910 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18911 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18912 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18913 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18914 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18915 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18916 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18917 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18918 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18919 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ128mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
18920 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18921 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ256mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, },
18922 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18923 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
18924 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18925 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18926 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18927 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18928 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18929 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18930 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18931 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18932 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18933 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18934 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
18935 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18936 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
18937 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18938 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18939 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18940 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18941 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18942 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18943 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18944 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18945 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18946 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18947 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18948 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18949 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ128mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem16 }, },
18950 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18951 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ256mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem32 }, },
18952 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18953 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
18954 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18955 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18956 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18957 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18958 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18959 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18960 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18961 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18962 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18963 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18964 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
18965 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18966 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
18967 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18968 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18969 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18970 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18971 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18972 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18973 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18974 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18975 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18976 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18977 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18978 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18979 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ128mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
18980 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18981 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ256mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, },
18982 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18983 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
18984 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18985 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18986 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18987 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18988 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18989 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18990 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18991 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18992 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18993 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
18994 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
18995 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
18996 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
18997 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18998 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18999 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19000 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19001 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19002 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19003 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19004 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19005 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19006 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19007 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19008 { 14542 /* vpmovw2m */, X86::VPMOVW2MZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
19009 { 14542 /* vpmovw2m */, X86::VPMOVW2MZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
19010 { 14542 /* vpmovw2m */, X86::VPMOVW2MZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
19011 { 14551 /* vpmovwb */, X86::VPMOVWBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
19012 { 14551 /* vpmovwb */, X86::VPMOVWBZ128mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
19013 { 14551 /* vpmovwb */, X86::VPMOVWBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
19014 { 14551 /* vpmovwb */, X86::VPMOVWBZ256mr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
19015 { 14551 /* vpmovwb */, X86::VPMOVWBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
19016 { 14551 /* vpmovwb */, X86::VPMOVWBZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
19017 { 14551 /* vpmovwb */, X86::VPMOVWBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19018 { 14551 /* vpmovwb */, X86::VPMOVWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19019 { 14551 /* vpmovwb */, X86::VPMOVWBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19020 { 14551 /* vpmovwb */, X86::VPMOVWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19021 { 14551 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19022 { 14551 /* vpmovwb */, X86::VPMOVWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19023 { 14551 /* vpmovwb */, X86::VPMOVWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19024 { 14551 /* vpmovwb */, X86::VPMOVWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19025 { 14551 /* vpmovwb */, X86::VPMOVWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19026 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
19027 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
19028 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
19029 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
19030 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
19031 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
19032 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
19033 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ128rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
19034 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDYrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256 }, },
19035 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ256rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, },
19036 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19037 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19038 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19039 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19040 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19041 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19042 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19043 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19044 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19045 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19046 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19047 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19048 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
19049 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
19050 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
19051 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
19052 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
19053 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32 }, },
19054 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ128rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X }, },
19055 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQYrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256 }, },
19056 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ256rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X }, },
19057 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
19058 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19059 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19060 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19061 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19062 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19063 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19064 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19065 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19066 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19067 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19068 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19069 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19070 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
19071 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
19072 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
19073 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
19074 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
19075 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, },
19076 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
19077 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
19078 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
19079 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
19080 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19081 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19082 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19083 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19084 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19085 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19086 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19087 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19088 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19089 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19090 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19091 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19092 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
19093 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
19094 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
19095 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
19096 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
19097 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, },
19098 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
19099 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
19100 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
19101 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
19102 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19103 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19104 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19105 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19106 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19107 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19108 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19109 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19110 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19111 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19112 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19113 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19114 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
19115 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
19116 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
19117 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
19118 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
19119 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDYrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256 }, },
19120 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ256rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
19121 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
19122 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
19123 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ128rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
19124 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19125 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19126 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19127 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19128 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19129 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19130 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19131 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19132 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19133 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19134 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19135 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19136 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
19137 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
19138 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
19139 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
19140 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
19141 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
19142 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
19143 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ128rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
19144 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQYrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256 }, },
19145 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ256rm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X }, },
19146 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19147 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19148 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19149 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19150 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19151 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19152 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19153 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19154 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19155 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19156 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19157 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19158 { 14619 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19159 { 14619 /* vpmuldq */, X86::VPMULDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19160 { 14619 /* vpmuldq */, X86::VPMULDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19161 { 14619 /* vpmuldq */, X86::VPMULDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19162 { 14619 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19163 { 14619 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19164 { 14619 /* vpmuldq */, X86::VPMULDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19165 { 14619 /* vpmuldq */, X86::VPMULDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19166 { 14619 /* vpmuldq */, X86::VPMULDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19167 { 14619 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19168 { 14619 /* vpmuldq */, X86::VPMULDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19169 { 14619 /* vpmuldq */, X86::VPMULDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19170 { 14619 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19171 { 14619 /* vpmuldq */, X86::VPMULDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19172 { 14619 /* vpmuldq */, X86::VPMULDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19173 { 14619 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19174 { 14619 /* vpmuldq */, X86::VPMULDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19175 { 14619 /* vpmuldq */, X86::VPMULDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19176 { 14619 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19177 { 14619 /* vpmuldq */, X86::VPMULDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19178 { 14619 /* vpmuldq */, X86::VPMULDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19179 { 14619 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19180 { 14619 /* vpmuldq */, X86::VPMULDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19181 { 14619 /* vpmuldq */, X86::VPMULDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19182 { 14619 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19183 { 14619 /* vpmuldq */, X86::VPMULDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19184 { 14619 /* vpmuldq */, X86::VPMULDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19185 { 14619 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19186 { 14619 /* vpmuldq */, X86::VPMULDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19187 { 14619 /* vpmuldq */, X86::VPMULDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19188 { 14619 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19189 { 14627 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19190 { 14627 /* vpmulhrsw */, X86::VPMULHRSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19191 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19192 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19193 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19194 { 14627 /* vpmulhrsw */, X86::VPMULHRSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19195 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19196 { 14627 /* vpmulhrsw */, X86::VPMULHRSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19197 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19198 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19199 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19200 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19201 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19202 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19203 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19204 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19205 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19206 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19207 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19208 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19209 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19210 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19211 { 14637 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19212 { 14637 /* vpmulhuw */, X86::VPMULHUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19213 { 14637 /* vpmulhuw */, X86::VPMULHUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19214 { 14637 /* vpmulhuw */, X86::VPMULHUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19215 { 14637 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19216 { 14637 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19217 { 14637 /* vpmulhuw */, X86::VPMULHUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19218 { 14637 /* vpmulhuw */, X86::VPMULHUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19219 { 14637 /* vpmulhuw */, X86::VPMULHUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19220 { 14637 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19221 { 14637 /* vpmulhuw */, X86::VPMULHUWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19222 { 14637 /* vpmulhuw */, X86::VPMULHUWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19223 { 14637 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19224 { 14637 /* vpmulhuw */, X86::VPMULHUWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19225 { 14637 /* vpmulhuw */, X86::VPMULHUWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19226 { 14637 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19227 { 14637 /* vpmulhuw */, X86::VPMULHUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19228 { 14637 /* vpmulhuw */, X86::VPMULHUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19229 { 14637 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19230 { 14637 /* vpmulhuw */, X86::VPMULHUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19231 { 14637 /* vpmulhuw */, X86::VPMULHUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19232 { 14637 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19233 { 14646 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19234 { 14646 /* vpmulhw */, X86::VPMULHWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19235 { 14646 /* vpmulhw */, X86::VPMULHWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19236 { 14646 /* vpmulhw */, X86::VPMULHWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19237 { 14646 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19238 { 14646 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19239 { 14646 /* vpmulhw */, X86::VPMULHWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19240 { 14646 /* vpmulhw */, X86::VPMULHWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19241 { 14646 /* vpmulhw */, X86::VPMULHWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19242 { 14646 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19243 { 14646 /* vpmulhw */, X86::VPMULHWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19244 { 14646 /* vpmulhw */, X86::VPMULHWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19245 { 14646 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19246 { 14646 /* vpmulhw */, X86::VPMULHWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19247 { 14646 /* vpmulhw */, X86::VPMULHWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19248 { 14646 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19249 { 14646 /* vpmulhw */, X86::VPMULHWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19250 { 14646 /* vpmulhw */, X86::VPMULHWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19251 { 14646 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19252 { 14646 /* vpmulhw */, X86::VPMULHWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19253 { 14646 /* vpmulhw */, X86::VPMULHWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19254 { 14646 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19255 { 14654 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19256 { 14654 /* vpmulld */, X86::VPMULLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19257 { 14654 /* vpmulld */, X86::VPMULLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19258 { 14654 /* vpmulld */, X86::VPMULLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19259 { 14654 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19260 { 14654 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19261 { 14654 /* vpmulld */, X86::VPMULLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19262 { 14654 /* vpmulld */, X86::VPMULLDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19263 { 14654 /* vpmulld */, X86::VPMULLDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19264 { 14654 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19265 { 14654 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19266 { 14654 /* vpmulld */, X86::VPMULLDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19267 { 14654 /* vpmulld */, X86::VPMULLDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19268 { 14654 /* vpmulld */, X86::VPMULLDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19269 { 14654 /* vpmulld */, X86::VPMULLDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19270 { 14654 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19271 { 14654 /* vpmulld */, X86::VPMULLDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19272 { 14654 /* vpmulld */, X86::VPMULLDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19273 { 14654 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19274 { 14654 /* vpmulld */, X86::VPMULLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19275 { 14654 /* vpmulld */, X86::VPMULLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19276 { 14654 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19277 { 14654 /* vpmulld */, X86::VPMULLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19278 { 14654 /* vpmulld */, X86::VPMULLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19279 { 14654 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19280 { 14654 /* vpmulld */, X86::VPMULLDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19281 { 14654 /* vpmulld */, X86::VPMULLDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19282 { 14654 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19283 { 14654 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19284 { 14654 /* vpmulld */, X86::VPMULLDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19285 { 14654 /* vpmulld */, X86::VPMULLDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19286 { 14662 /* vpmullq */, X86::VPMULLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19287 { 14662 /* vpmullq */, X86::VPMULLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19288 { 14662 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19289 { 14662 /* vpmullq */, X86::VPMULLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19290 { 14662 /* vpmullq */, X86::VPMULLQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19291 { 14662 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19292 { 14662 /* vpmullq */, X86::VPMULLQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19293 { 14662 /* vpmullq */, X86::VPMULLQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19294 { 14662 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19295 { 14662 /* vpmullq */, X86::VPMULLQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19296 { 14662 /* vpmullq */, X86::VPMULLQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19297 { 14662 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19298 { 14662 /* vpmullq */, X86::VPMULLQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19299 { 14662 /* vpmullq */, X86::VPMULLQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19300 { 14662 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19301 { 14662 /* vpmullq */, X86::VPMULLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19302 { 14662 /* vpmullq */, X86::VPMULLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19303 { 14662 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19304 { 14662 /* vpmullq */, X86::VPMULLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19305 { 14662 /* vpmullq */, X86::VPMULLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19306 { 14662 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19307 { 14662 /* vpmullq */, X86::VPMULLQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19308 { 14662 /* vpmullq */, X86::VPMULLQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19309 { 14662 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19310 { 14662 /* vpmullq */, X86::VPMULLQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19311 { 14662 /* vpmullq */, X86::VPMULLQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19312 { 14662 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19313 { 14670 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19314 { 14670 /* vpmullw */, X86::VPMULLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19315 { 14670 /* vpmullw */, X86::VPMULLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19316 { 14670 /* vpmullw */, X86::VPMULLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19317 { 14670 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19318 { 14670 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19319 { 14670 /* vpmullw */, X86::VPMULLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19320 { 14670 /* vpmullw */, X86::VPMULLWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19321 { 14670 /* vpmullw */, X86::VPMULLWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19322 { 14670 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19323 { 14670 /* vpmullw */, X86::VPMULLWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19324 { 14670 /* vpmullw */, X86::VPMULLWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19325 { 14670 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19326 { 14670 /* vpmullw */, X86::VPMULLWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19327 { 14670 /* vpmullw */, X86::VPMULLWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19328 { 14670 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19329 { 14670 /* vpmullw */, X86::VPMULLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19330 { 14670 /* vpmullw */, X86::VPMULLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19331 { 14670 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19332 { 14670 /* vpmullw */, X86::VPMULLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19333 { 14670 /* vpmullw */, X86::VPMULLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19334 { 14670 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19335 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19336 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19337 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19338 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19339 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19340 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19341 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19342 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19343 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19344 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19345 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19346 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19347 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19348 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19349 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19350 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19351 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19352 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19353 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19354 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19355 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19356 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19357 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19358 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19359 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19360 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19361 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19362 { 14693 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19363 { 14693 /* vpmuludq */, X86::VPMULUDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19364 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19365 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19366 { 14693 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19367 { 14693 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19368 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19369 { 14693 /* vpmuludq */, X86::VPMULUDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19370 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19371 { 14693 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19372 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19373 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19374 { 14693 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19375 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19376 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19377 { 14693 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19378 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19379 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19380 { 14693 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19381 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19382 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19383 { 14693 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19384 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19385 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19386 { 14693 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19387 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19388 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19389 { 14693 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19390 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19391 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19392 { 14693 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19393 { 14702 /* vpopcntb */, X86::VPOPCNTBZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
19394 { 14702 /* vpopcntb */, X86::VPOPCNTBZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
19395 { 14702 /* vpopcntb */, X86::VPOPCNTBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
19396 { 14702 /* vpopcntb */, X86::VPOPCNTBZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
19397 { 14702 /* vpopcntb */, X86::VPOPCNTBZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
19398 { 14702 /* vpopcntb */, X86::VPOPCNTBZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
19399 { 14702 /* vpopcntb */, X86::VPOPCNTBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19400 { 14702 /* vpopcntb */, X86::VPOPCNTBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19401 { 14702 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19402 { 14702 /* vpopcntb */, X86::VPOPCNTBZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19403 { 14702 /* vpopcntb */, X86::VPOPCNTBZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19404 { 14702 /* vpopcntb */, X86::VPOPCNTBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19405 { 14702 /* vpopcntb */, X86::VPOPCNTBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19406 { 14702 /* vpopcntb */, X86::VPOPCNTBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19407 { 14702 /* vpopcntb */, X86::VPOPCNTBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19408 { 14702 /* vpopcntb */, X86::VPOPCNTBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19409 { 14702 /* vpopcntb */, X86::VPOPCNTBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19410 { 14702 /* vpopcntb */, X86::VPOPCNTBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19411 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
19412 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
19413 { 14711 /* vpopcntd */, X86::VPOPCNTDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
19414 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
19415 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
19416 { 14711 /* vpopcntd */, X86::VPOPCNTDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
19417 { 14711 /* vpopcntd */, X86::VPOPCNTDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
19418 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
19419 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
19420 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19421 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19422 { 14711 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19423 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19424 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19425 { 14711 /* vpopcntd */, X86::VPOPCNTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19426 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19427 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19428 { 14711 /* vpopcntd */, X86::VPOPCNTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19429 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19430 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19431 { 14711 /* vpopcntd */, X86::VPOPCNTDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19432 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19433 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19434 { 14711 /* vpopcntd */, X86::VPOPCNTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19435 { 14711 /* vpopcntd */, X86::VPOPCNTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19436 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19437 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19438 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
19439 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
19440 { 14720 /* vpopcntq */, X86::VPOPCNTQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
19441 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
19442 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
19443 { 14720 /* vpopcntq */, X86::VPOPCNTQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
19444 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
19445 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
19446 { 14720 /* vpopcntq */, X86::VPOPCNTQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
19447 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19448 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19449 { 14720 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19450 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19451 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19452 { 14720 /* vpopcntq */, X86::VPOPCNTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19453 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19454 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19455 { 14720 /* vpopcntq */, X86::VPOPCNTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19456 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19457 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19458 { 14720 /* vpopcntq */, X86::VPOPCNTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19459 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19460 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19461 { 14720 /* vpopcntq */, X86::VPOPCNTQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19462 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19463 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19464 { 14720 /* vpopcntq */, X86::VPOPCNTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19465 { 14729 /* vpopcntw */, X86::VPOPCNTWZ128rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
19466 { 14729 /* vpopcntw */, X86::VPOPCNTWZ256rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
19467 { 14729 /* vpopcntw */, X86::VPOPCNTWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
19468 { 14729 /* vpopcntw */, X86::VPOPCNTWZ128rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
19469 { 14729 /* vpopcntw */, X86::VPOPCNTWZ256rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
19470 { 14729 /* vpopcntw */, X86::VPOPCNTWZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
19471 { 14729 /* vpopcntw */, X86::VPOPCNTWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19472 { 14729 /* vpopcntw */, X86::VPOPCNTWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19473 { 14729 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19474 { 14729 /* vpopcntw */, X86::VPOPCNTWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19475 { 14729 /* vpopcntw */, X86::VPOPCNTWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19476 { 14729 /* vpopcntw */, X86::VPOPCNTWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19477 { 14729 /* vpopcntw */, X86::VPOPCNTWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19478 { 14729 /* vpopcntw */, X86::VPOPCNTWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19479 { 14729 /* vpopcntw */, X86::VPOPCNTWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19480 { 14729 /* vpopcntw */, X86::VPOPCNTWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19481 { 14729 /* vpopcntw */, X86::VPOPCNTWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19482 { 14729 /* vpopcntw */, X86::VPOPCNTWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19483 { 14738 /* vpor */, X86::VPORrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19484 { 14738 /* vpor */, X86::VPORYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19485 { 14738 /* vpor */, X86::VPORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19486 { 14738 /* vpor */, X86::VPORYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19487 { 14743 /* vpord */, X86::VPORDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19488 { 14743 /* vpord */, X86::VPORDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19489 { 14743 /* vpord */, X86::VPORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19490 { 14743 /* vpord */, X86::VPORDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19491 { 14743 /* vpord */, X86::VPORDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19492 { 14743 /* vpord */, X86::VPORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19493 { 14743 /* vpord */, X86::VPORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19494 { 14743 /* vpord */, X86::VPORDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19495 { 14743 /* vpord */, X86::VPORDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19496 { 14743 /* vpord */, X86::VPORDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19497 { 14743 /* vpord */, X86::VPORDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19498 { 14743 /* vpord */, X86::VPORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19499 { 14743 /* vpord */, X86::VPORDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19500 { 14743 /* vpord */, X86::VPORDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19501 { 14743 /* vpord */, X86::VPORDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19502 { 14743 /* vpord */, X86::VPORDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19503 { 14743 /* vpord */, X86::VPORDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19504 { 14743 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19505 { 14743 /* vpord */, X86::VPORDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19506 { 14743 /* vpord */, X86::VPORDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19507 { 14743 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19508 { 14743 /* vpord */, X86::VPORDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19509 { 14743 /* vpord */, X86::VPORDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19510 { 14743 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19511 { 14743 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19512 { 14743 /* vpord */, X86::VPORDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19513 { 14743 /* vpord */, X86::VPORDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19514 { 14749 /* vporq */, X86::VPORQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19515 { 14749 /* vporq */, X86::VPORQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19516 { 14749 /* vporq */, X86::VPORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19517 { 14749 /* vporq */, X86::VPORQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19518 { 14749 /* vporq */, X86::VPORQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19519 { 14749 /* vporq */, X86::VPORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19520 { 14749 /* vporq */, X86::VPORQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19521 { 14749 /* vporq */, X86::VPORQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19522 { 14749 /* vporq */, X86::VPORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19523 { 14749 /* vporq */, X86::VPORQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19524 { 14749 /* vporq */, X86::VPORQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19525 { 14749 /* vporq */, X86::VPORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19526 { 14749 /* vporq */, X86::VPORQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19527 { 14749 /* vporq */, X86::VPORQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19528 { 14749 /* vporq */, X86::VPORQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19529 { 14749 /* vporq */, X86::VPORQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19530 { 14749 /* vporq */, X86::VPORQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19531 { 14749 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19532 { 14749 /* vporq */, X86::VPORQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19533 { 14749 /* vporq */, X86::VPORQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19534 { 14749 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19535 { 14749 /* vporq */, X86::VPORQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19536 { 14749 /* vporq */, X86::VPORQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19537 { 14749 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19538 { 14749 /* vporq */, X86::VPORQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19539 { 14749 /* vporq */, X86::VPORQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19540 { 14749 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19541 { 14755 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
19542 { 14755 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19543 { 14755 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
19544 { 14762 /* vprold */, X86::VPROLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19545 { 14762 /* vprold */, X86::VPROLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19546 { 14762 /* vprold */, X86::VPROLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19547 { 14762 /* vprold */, X86::VPROLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19548 { 14762 /* vprold */, X86::VPROLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19549 { 14762 /* vprold */, X86::VPROLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19550 { 14762 /* vprold */, X86::VPROLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
19551 { 14762 /* vprold */, X86::VPROLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
19552 { 14762 /* vprold */, X86::VPROLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
19553 { 14762 /* vprold */, X86::VPROLDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19554 { 14762 /* vprold */, X86::VPROLDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19555 { 14762 /* vprold */, X86::VPROLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19556 { 14762 /* vprold */, X86::VPROLDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19557 { 14762 /* vprold */, X86::VPROLDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19558 { 14762 /* vprold */, X86::VPROLDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19559 { 14762 /* vprold */, X86::VPROLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19560 { 14762 /* vprold */, X86::VPROLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19561 { 14762 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19562 { 14762 /* vprold */, X86::VPROLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19563 { 14762 /* vprold */, X86::VPROLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19564 { 14762 /* vprold */, X86::VPROLDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19565 { 14762 /* vprold */, X86::VPROLDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19566 { 14762 /* vprold */, X86::VPROLDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19567 { 14762 /* vprold */, X86::VPROLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19568 { 14762 /* vprold */, X86::VPROLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19569 { 14762 /* vprold */, X86::VPROLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19570 { 14762 /* vprold */, X86::VPROLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19571 { 14769 /* vprolq */, X86::VPROLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19572 { 14769 /* vprolq */, X86::VPROLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19573 { 14769 /* vprolq */, X86::VPROLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19574 { 14769 /* vprolq */, X86::VPROLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19575 { 14769 /* vprolq */, X86::VPROLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19576 { 14769 /* vprolq */, X86::VPROLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19577 { 14769 /* vprolq */, X86::VPROLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
19578 { 14769 /* vprolq */, X86::VPROLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
19579 { 14769 /* vprolq */, X86::VPROLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
19580 { 14769 /* vprolq */, X86::VPROLQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19581 { 14769 /* vprolq */, X86::VPROLQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19582 { 14769 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19583 { 14769 /* vprolq */, X86::VPROLQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19584 { 14769 /* vprolq */, X86::VPROLQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19585 { 14769 /* vprolq */, X86::VPROLQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19586 { 14769 /* vprolq */, X86::VPROLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19587 { 14769 /* vprolq */, X86::VPROLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19588 { 14769 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19589 { 14769 /* vprolq */, X86::VPROLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19590 { 14769 /* vprolq */, X86::VPROLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19591 { 14769 /* vprolq */, X86::VPROLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19592 { 14769 /* vprolq */, X86::VPROLQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19593 { 14769 /* vprolq */, X86::VPROLQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19594 { 14769 /* vprolq */, X86::VPROLQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19595 { 14769 /* vprolq */, X86::VPROLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19596 { 14769 /* vprolq */, X86::VPROLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19597 { 14769 /* vprolq */, X86::VPROLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19598 { 14776 /* vprolvd */, X86::VPROLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19599 { 14776 /* vprolvd */, X86::VPROLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19600 { 14776 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19601 { 14776 /* vprolvd */, X86::VPROLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19602 { 14776 /* vprolvd */, X86::VPROLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19603 { 14776 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19604 { 14776 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19605 { 14776 /* vprolvd */, X86::VPROLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19606 { 14776 /* vprolvd */, X86::VPROLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19607 { 14776 /* vprolvd */, X86::VPROLVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19608 { 14776 /* vprolvd */, X86::VPROLVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19609 { 14776 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19610 { 14776 /* vprolvd */, X86::VPROLVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19611 { 14776 /* vprolvd */, X86::VPROLVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19612 { 14776 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19613 { 14776 /* vprolvd */, X86::VPROLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19614 { 14776 /* vprolvd */, X86::VPROLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19615 { 14776 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19616 { 14776 /* vprolvd */, X86::VPROLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19617 { 14776 /* vprolvd */, X86::VPROLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19618 { 14776 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19619 { 14776 /* vprolvd */, X86::VPROLVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19620 { 14776 /* vprolvd */, X86::VPROLVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19621 { 14776 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19622 { 14776 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19623 { 14776 /* vprolvd */, X86::VPROLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19624 { 14776 /* vprolvd */, X86::VPROLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19625 { 14784 /* vprolvq */, X86::VPROLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19626 { 14784 /* vprolvq */, X86::VPROLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19627 { 14784 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19628 { 14784 /* vprolvq */, X86::VPROLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19629 { 14784 /* vprolvq */, X86::VPROLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19630 { 14784 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19631 { 14784 /* vprolvq */, X86::VPROLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19632 { 14784 /* vprolvq */, X86::VPROLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19633 { 14784 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19634 { 14784 /* vprolvq */, X86::VPROLVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19635 { 14784 /* vprolvq */, X86::VPROLVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19636 { 14784 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19637 { 14784 /* vprolvq */, X86::VPROLVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19638 { 14784 /* vprolvq */, X86::VPROLVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19639 { 14784 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19640 { 14784 /* vprolvq */, X86::VPROLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19641 { 14784 /* vprolvq */, X86::VPROLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19642 { 14784 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19643 { 14784 /* vprolvq */, X86::VPROLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19644 { 14784 /* vprolvq */, X86::VPROLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19645 { 14784 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19646 { 14784 /* vprolvq */, X86::VPROLVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19647 { 14784 /* vprolvq */, X86::VPROLVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19648 { 14784 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19649 { 14784 /* vprolvq */, X86::VPROLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19650 { 14784 /* vprolvq */, X86::VPROLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19651 { 14784 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19652 { 14792 /* vprord */, X86::VPRORDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19653 { 14792 /* vprord */, X86::VPRORDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19654 { 14792 /* vprord */, X86::VPRORDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19655 { 14792 /* vprord */, X86::VPRORDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19656 { 14792 /* vprord */, X86::VPRORDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19657 { 14792 /* vprord */, X86::VPRORDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19658 { 14792 /* vprord */, X86::VPRORDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
19659 { 14792 /* vprord */, X86::VPRORDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
19660 { 14792 /* vprord */, X86::VPRORDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
19661 { 14792 /* vprord */, X86::VPRORDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19662 { 14792 /* vprord */, X86::VPRORDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19663 { 14792 /* vprord */, X86::VPRORDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19664 { 14792 /* vprord */, X86::VPRORDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19665 { 14792 /* vprord */, X86::VPRORDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19666 { 14792 /* vprord */, X86::VPRORDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19667 { 14792 /* vprord */, X86::VPRORDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19668 { 14792 /* vprord */, X86::VPRORDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19669 { 14792 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19670 { 14792 /* vprord */, X86::VPRORDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19671 { 14792 /* vprord */, X86::VPRORDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19672 { 14792 /* vprord */, X86::VPRORDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19673 { 14792 /* vprord */, X86::VPRORDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19674 { 14792 /* vprord */, X86::VPRORDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19675 { 14792 /* vprord */, X86::VPRORDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19676 { 14792 /* vprord */, X86::VPRORDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19677 { 14792 /* vprord */, X86::VPRORDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19678 { 14792 /* vprord */, X86::VPRORDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19679 { 14799 /* vprorq */, X86::VPRORQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19680 { 14799 /* vprorq */, X86::VPRORQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19681 { 14799 /* vprorq */, X86::VPRORQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19682 { 14799 /* vprorq */, X86::VPRORQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19683 { 14799 /* vprorq */, X86::VPRORQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19684 { 14799 /* vprorq */, X86::VPRORQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19685 { 14799 /* vprorq */, X86::VPRORQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
19686 { 14799 /* vprorq */, X86::VPRORQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
19687 { 14799 /* vprorq */, X86::VPRORQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
19688 { 14799 /* vprorq */, X86::VPRORQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19689 { 14799 /* vprorq */, X86::VPRORQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19690 { 14799 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19691 { 14799 /* vprorq */, X86::VPRORQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19692 { 14799 /* vprorq */, X86::VPRORQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19693 { 14799 /* vprorq */, X86::VPRORQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19694 { 14799 /* vprorq */, X86::VPRORQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19695 { 14799 /* vprorq */, X86::VPRORQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19696 { 14799 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19697 { 14799 /* vprorq */, X86::VPRORQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19698 { 14799 /* vprorq */, X86::VPRORQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19699 { 14799 /* vprorq */, X86::VPRORQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19700 { 14799 /* vprorq */, X86::VPRORQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19701 { 14799 /* vprorq */, X86::VPRORQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19702 { 14799 /* vprorq */, X86::VPRORQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19703 { 14799 /* vprorq */, X86::VPRORQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19704 { 14799 /* vprorq */, X86::VPRORQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19705 { 14799 /* vprorq */, X86::VPRORQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19706 { 14806 /* vprorvd */, X86::VPRORVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19707 { 14806 /* vprorvd */, X86::VPRORVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19708 { 14806 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19709 { 14806 /* vprorvd */, X86::VPRORVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19710 { 14806 /* vprorvd */, X86::VPRORVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19711 { 14806 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19712 { 14806 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19713 { 14806 /* vprorvd */, X86::VPRORVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19714 { 14806 /* vprorvd */, X86::VPRORVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19715 { 14806 /* vprorvd */, X86::VPRORVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19716 { 14806 /* vprorvd */, X86::VPRORVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19717 { 14806 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19718 { 14806 /* vprorvd */, X86::VPRORVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19719 { 14806 /* vprorvd */, X86::VPRORVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19720 { 14806 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19721 { 14806 /* vprorvd */, X86::VPRORVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19722 { 14806 /* vprorvd */, X86::VPRORVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19723 { 14806 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19724 { 14806 /* vprorvd */, X86::VPRORVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19725 { 14806 /* vprorvd */, X86::VPRORVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19726 { 14806 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19727 { 14806 /* vprorvd */, X86::VPRORVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19728 { 14806 /* vprorvd */, X86::VPRORVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19729 { 14806 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19730 { 14806 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19731 { 14806 /* vprorvd */, X86::VPRORVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19732 { 14806 /* vprorvd */, X86::VPRORVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19733 { 14814 /* vprorvq */, X86::VPRORVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19734 { 14814 /* vprorvq */, X86::VPRORVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19735 { 14814 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19736 { 14814 /* vprorvq */, X86::VPRORVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19737 { 14814 /* vprorvq */, X86::VPRORVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19738 { 14814 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19739 { 14814 /* vprorvq */, X86::VPRORVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19740 { 14814 /* vprorvq */, X86::VPRORVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19741 { 14814 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19742 { 14814 /* vprorvq */, X86::VPRORVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19743 { 14814 /* vprorvq */, X86::VPRORVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19744 { 14814 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19745 { 14814 /* vprorvq */, X86::VPRORVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19746 { 14814 /* vprorvq */, X86::VPRORVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19747 { 14814 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19748 { 14814 /* vprorvq */, X86::VPRORVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19749 { 14814 /* vprorvq */, X86::VPRORVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19750 { 14814 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19751 { 14814 /* vprorvq */, X86::VPRORVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19752 { 14814 /* vprorvq */, X86::VPRORVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19753 { 14814 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19754 { 14814 /* vprorvq */, X86::VPRORVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19755 { 14814 /* vprorvq */, X86::VPRORVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19756 { 14814 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19757 { 14814 /* vprorvq */, X86::VPRORVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19758 { 14814 /* vprorvq */, X86::VPRORVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19759 { 14814 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19760 { 14822 /* vprotb */, X86::VPROTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19761 { 14822 /* vprotb */, X86::VPROTBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19762 { 14822 /* vprotb */, X86::VPROTBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19763 { 14822 /* vprotb */, X86::VPROTBmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
19764 { 14822 /* vprotb */, X86::VPROTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19765 { 14829 /* vprotd */, X86::VPROTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19766 { 14829 /* vprotd */, X86::VPROTDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19767 { 14829 /* vprotd */, X86::VPROTDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19768 { 14829 /* vprotd */, X86::VPROTDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
19769 { 14829 /* vprotd */, X86::VPROTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19770 { 14836 /* vprotq */, X86::VPROTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19771 { 14836 /* vprotq */, X86::VPROTQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19772 { 14836 /* vprotq */, X86::VPROTQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19773 { 14836 /* vprotq */, X86::VPROTQmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
19774 { 14836 /* vprotq */, X86::VPROTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19775 { 14843 /* vprotw */, X86::VPROTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19776 { 14843 /* vprotw */, X86::VPROTWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19777 { 14843 /* vprotw */, X86::VPROTWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19778 { 14843 /* vprotw */, X86::VPROTWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
19779 { 14843 /* vprotw */, X86::VPROTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19780 { 14850 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19781 { 14850 /* vpsadbw */, X86::VPSADBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19782 { 14850 /* vpsadbw */, X86::VPSADBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19783 { 14850 /* vpsadbw */, X86::VPSADBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19784 { 14850 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19785 { 14850 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19786 { 14850 /* vpsadbw */, X86::VPSADBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19787 { 14850 /* vpsadbw */, X86::VPSADBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19788 { 14850 /* vpsadbw */, X86::VPSADBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19789 { 14850 /* vpsadbw */, X86::VPSADBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19790 { 14858 /* vpscatterdd */, X86::VPSCATTERDDZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19791 { 14858 /* vpscatterdd */, X86::VPSCATTERDDZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19792 { 14858 /* vpscatterdd */, X86::VPSCATTERDDZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19793 { 14870 /* vpscatterdq */, X86::VPSCATTERDQZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19794 { 14870 /* vpscatterdq */, X86::VPSCATTERDQZ256mr, Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19795 { 14870 /* vpscatterdq */, X86::VPSCATTERDQZmr, Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19796 { 14882 /* vpscatterqd */, X86::VPSCATTERQDZ256mr, Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19797 { 14882 /* vpscatterqd */, X86::VPSCATTERQDZ128mr, Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19798 { 14882 /* vpscatterqd */, X86::VPSCATTERQDZmr, Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19799 { 14894 /* vpscatterqq */, X86::VPSCATTERQQZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19800 { 14894 /* vpscatterqq */, X86::VPSCATTERQQZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19801 { 14894 /* vpscatterqq */, X86::VPSCATTERQQZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19802 { 14906 /* vpshab */, X86::VPSHABrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19803 { 14906 /* vpshab */, X86::VPSHABmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19804 { 14906 /* vpshab */, X86::VPSHABrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19805 { 14913 /* vpshad */, X86::VPSHADrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19806 { 14913 /* vpshad */, X86::VPSHADmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19807 { 14913 /* vpshad */, X86::VPSHADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19808 { 14920 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19809 { 14920 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19810 { 14920 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19811 { 14927 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19812 { 14927 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19813 { 14927 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19814 { 14934 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19815 { 14934 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19816 { 14934 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19817 { 14941 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19818 { 14941 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19819 { 14941 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19820 { 14948 /* vpshldd */, X86::VPSHLDDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19821 { 14948 /* vpshldd */, X86::VPSHLDDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19822 { 14948 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19823 { 14948 /* vpshldd */, X86::VPSHLDDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19824 { 14948 /* vpshldd */, X86::VPSHLDDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19825 { 14948 /* vpshldd */, X86::VPSHLDDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19826 { 14948 /* vpshldd */, X86::VPSHLDDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19827 { 14948 /* vpshldd */, X86::VPSHLDDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19828 { 14948 /* vpshldd */, X86::VPSHLDDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19829 { 14948 /* vpshldd */, X86::VPSHLDDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19830 { 14948 /* vpshldd */, X86::VPSHLDDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19831 { 14948 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19832 { 14948 /* vpshldd */, X86::VPSHLDDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19833 { 14948 /* vpshldd */, X86::VPSHLDDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19834 { 14948 /* vpshldd */, X86::VPSHLDDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19835 { 14948 /* vpshldd */, X86::VPSHLDDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19836 { 14948 /* vpshldd */, X86::VPSHLDDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19837 { 14948 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19838 { 14948 /* vpshldd */, X86::VPSHLDDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19839 { 14948 /* vpshldd */, X86::VPSHLDDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19840 { 14948 /* vpshldd */, X86::VPSHLDDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19841 { 14948 /* vpshldd */, X86::VPSHLDDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19842 { 14948 /* vpshldd */, X86::VPSHLDDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19843 { 14948 /* vpshldd */, X86::VPSHLDDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19844 { 14948 /* vpshldd */, X86::VPSHLDDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19845 { 14948 /* vpshldd */, X86::VPSHLDDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19846 { 14948 /* vpshldd */, X86::VPSHLDDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19847 { 14956 /* vpshldq */, X86::VPSHLDQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19848 { 14956 /* vpshldq */, X86::VPSHLDQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19849 { 14956 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19850 { 14956 /* vpshldq */, X86::VPSHLDQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19851 { 14956 /* vpshldq */, X86::VPSHLDQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19852 { 14956 /* vpshldq */, X86::VPSHLDQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19853 { 14956 /* vpshldq */, X86::VPSHLDQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19854 { 14956 /* vpshldq */, X86::VPSHLDQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19855 { 14956 /* vpshldq */, X86::VPSHLDQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19856 { 14956 /* vpshldq */, X86::VPSHLDQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19857 { 14956 /* vpshldq */, X86::VPSHLDQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19858 { 14956 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19859 { 14956 /* vpshldq */, X86::VPSHLDQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19860 { 14956 /* vpshldq */, X86::VPSHLDQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19861 { 14956 /* vpshldq */, X86::VPSHLDQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19862 { 14956 /* vpshldq */, X86::VPSHLDQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19863 { 14956 /* vpshldq */, X86::VPSHLDQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19864 { 14956 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19865 { 14956 /* vpshldq */, X86::VPSHLDQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19866 { 14956 /* vpshldq */, X86::VPSHLDQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19867 { 14956 /* vpshldq */, X86::VPSHLDQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19868 { 14956 /* vpshldq */, X86::VPSHLDQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19869 { 14956 /* vpshldq */, X86::VPSHLDQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19870 { 14956 /* vpshldq */, X86::VPSHLDQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19871 { 14956 /* vpshldq */, X86::VPSHLDQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19872 { 14956 /* vpshldq */, X86::VPSHLDQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19873 { 14956 /* vpshldq */, X86::VPSHLDQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19874 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19875 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19876 { 14964 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19877 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19878 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19879 { 14964 /* vpshldvd */, X86::VPSHLDVDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19880 { 14964 /* vpshldvd */, X86::VPSHLDVDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19881 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19882 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19883 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19884 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19885 { 14964 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19886 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19887 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19888 { 14964 /* vpshldvd */, X86::VPSHLDVDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19889 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19890 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19891 { 14964 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19892 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19893 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19894 { 14964 /* vpshldvd */, X86::VPSHLDVDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19895 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19896 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19897 { 14964 /* vpshldvd */, X86::VPSHLDVDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19898 { 14964 /* vpshldvd */, X86::VPSHLDVDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19899 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19900 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19901 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19902 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19903 { 14973 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19904 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19905 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19906 { 14973 /* vpshldvq */, X86::VPSHLDVQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19907 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19908 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19909 { 14973 /* vpshldvq */, X86::VPSHLDVQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19910 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19911 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19912 { 14973 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19913 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19914 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19915 { 14973 /* vpshldvq */, X86::VPSHLDVQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19916 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19917 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19918 { 14973 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19919 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19920 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19921 { 14973 /* vpshldvq */, X86::VPSHLDVQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19922 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19923 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19924 { 14973 /* vpshldvq */, X86::VPSHLDVQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19925 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19926 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19927 { 14973 /* vpshldvq */, X86::VPSHLDVQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19928 { 14982 /* vpshldvw */, X86::VPSHLDVWZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19929 { 14982 /* vpshldvw */, X86::VPSHLDVWZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19930 { 14982 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19931 { 14982 /* vpshldvw */, X86::VPSHLDVWZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19932 { 14982 /* vpshldvw */, X86::VPSHLDVWZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19933 { 14982 /* vpshldvw */, X86::VPSHLDVWZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19934 { 14982 /* vpshldvw */, X86::VPSHLDVWZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19935 { 14982 /* vpshldvw */, X86::VPSHLDVWZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19936 { 14982 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19937 { 14982 /* vpshldvw */, X86::VPSHLDVWZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19938 { 14982 /* vpshldvw */, X86::VPSHLDVWZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19939 { 14982 /* vpshldvw */, X86::VPSHLDVWZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19940 { 14982 /* vpshldvw */, X86::VPSHLDVWZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19941 { 14982 /* vpshldvw */, X86::VPSHLDVWZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19942 { 14982 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19943 { 14982 /* vpshldvw */, X86::VPSHLDVWZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19944 { 14982 /* vpshldvw */, X86::VPSHLDVWZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19945 { 14982 /* vpshldvw */, X86::VPSHLDVWZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19946 { 14991 /* vpshldw */, X86::VPSHLDWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19947 { 14991 /* vpshldw */, X86::VPSHLDWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19948 { 14991 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19949 { 14991 /* vpshldw */, X86::VPSHLDWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19950 { 14991 /* vpshldw */, X86::VPSHLDWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19951 { 14991 /* vpshldw */, X86::VPSHLDWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19952 { 14991 /* vpshldw */, X86::VPSHLDWZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19953 { 14991 /* vpshldw */, X86::VPSHLDWZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19954 { 14991 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19955 { 14991 /* vpshldw */, X86::VPSHLDWZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19956 { 14991 /* vpshldw */, X86::VPSHLDWZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19957 { 14991 /* vpshldw */, X86::VPSHLDWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19958 { 14991 /* vpshldw */, X86::VPSHLDWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19959 { 14991 /* vpshldw */, X86::VPSHLDWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19960 { 14991 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19961 { 14991 /* vpshldw */, X86::VPSHLDWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19962 { 14991 /* vpshldw */, X86::VPSHLDWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19963 { 14991 /* vpshldw */, X86::VPSHLDWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19964 { 14999 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19965 { 14999 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19966 { 14999 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19967 { 15006 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19968 { 15006 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19969 { 15006 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19970 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19971 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19972 { 15013 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19973 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19974 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19975 { 15013 /* vpshrdd */, X86::VPSHRDDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19976 { 15013 /* vpshrdd */, X86::VPSHRDDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19977 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19978 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19979 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19980 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19981 { 15013 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19982 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19983 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19984 { 15013 /* vpshrdd */, X86::VPSHRDDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19985 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19986 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19987 { 15013 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19988 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19989 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19990 { 15013 /* vpshrdd */, X86::VPSHRDDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19991 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19992 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19993 { 15013 /* vpshrdd */, X86::VPSHRDDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19994 { 15013 /* vpshrdd */, X86::VPSHRDDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19995 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19996 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19997 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19998 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19999 { 15021 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20000 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20001 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20002 { 15021 /* vpshrdq */, X86::VPSHRDQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20003 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20004 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20005 { 15021 /* vpshrdq */, X86::VPSHRDQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20006 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20007 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20008 { 15021 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20009 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20010 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20011 { 15021 /* vpshrdq */, X86::VPSHRDQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20012 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20013 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20014 { 15021 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20015 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20016 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20017 { 15021 /* vpshrdq */, X86::VPSHRDQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20018 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20019 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20020 { 15021 /* vpshrdq */, X86::VPSHRDQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20021 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20022 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20023 { 15021 /* vpshrdq */, X86::VPSHRDQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20024 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20025 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20026 { 15029 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20027 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20028 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20029 { 15029 /* vpshrdvd */, X86::VPSHRDVDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20030 { 15029 /* vpshrdvd */, X86::VPSHRDVDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20031 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20032 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20033 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20034 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20035 { 15029 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20036 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20037 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20038 { 15029 /* vpshrdvd */, X86::VPSHRDVDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20039 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20040 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20041 { 15029 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20042 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20043 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20044 { 15029 /* vpshrdvd */, X86::VPSHRDVDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20045 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20046 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20047 { 15029 /* vpshrdvd */, X86::VPSHRDVDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20048 { 15029 /* vpshrdvd */, X86::VPSHRDVDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20049 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20050 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20051 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20052 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20053 { 15038 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20054 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20055 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20056 { 15038 /* vpshrdvq */, X86::VPSHRDVQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20057 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20058 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20059 { 15038 /* vpshrdvq */, X86::VPSHRDVQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20060 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20061 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20062 { 15038 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20063 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20064 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20065 { 15038 /* vpshrdvq */, X86::VPSHRDVQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20066 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20067 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20068 { 15038 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20069 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20070 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20071 { 15038 /* vpshrdvq */, X86::VPSHRDVQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20072 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20073 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20074 { 15038 /* vpshrdvq */, X86::VPSHRDVQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20075 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20076 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20077 { 15038 /* vpshrdvq */, X86::VPSHRDVQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20078 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20079 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20080 { 15047 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20081 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20082 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20083 { 15047 /* vpshrdvw */, X86::VPSHRDVWZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20084 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20085 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20086 { 15047 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20087 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20088 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20089 { 15047 /* vpshrdvw */, X86::VPSHRDVWZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20090 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20091 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20092 { 15047 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20093 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20094 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20095 { 15047 /* vpshrdvw */, X86::VPSHRDVWZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20096 { 15056 /* vpshrdw */, X86::VPSHRDWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20097 { 15056 /* vpshrdw */, X86::VPSHRDWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20098 { 15056 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20099 { 15056 /* vpshrdw */, X86::VPSHRDWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20100 { 15056 /* vpshrdw */, X86::VPSHRDWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20101 { 15056 /* vpshrdw */, X86::VPSHRDWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20102 { 15056 /* vpshrdw */, X86::VPSHRDWZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20103 { 15056 /* vpshrdw */, X86::VPSHRDWZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20104 { 15056 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20105 { 15056 /* vpshrdw */, X86::VPSHRDWZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20106 { 15056 /* vpshrdw */, X86::VPSHRDWZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20107 { 15056 /* vpshrdw */, X86::VPSHRDWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20108 { 15056 /* vpshrdw */, X86::VPSHRDWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20109 { 15056 /* vpshrdw */, X86::VPSHRDWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20110 { 15056 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20111 { 15056 /* vpshrdw */, X86::VPSHRDWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20112 { 15056 /* vpshrdw */, X86::VPSHRDWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20113 { 15056 /* vpshrdw */, X86::VPSHRDWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20114 { 15064 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20115 { 15064 /* vpshufb */, X86::VPSHUFBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20116 { 15064 /* vpshufb */, X86::VPSHUFBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20117 { 15064 /* vpshufb */, X86::VPSHUFBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20118 { 15064 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20119 { 15064 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20120 { 15064 /* vpshufb */, X86::VPSHUFBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20121 { 15064 /* vpshufb */, X86::VPSHUFBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20122 { 15064 /* vpshufb */, X86::VPSHUFBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20123 { 15064 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20124 { 15064 /* vpshufb */, X86::VPSHUFBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20125 { 15064 /* vpshufb */, X86::VPSHUFBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20126 { 15064 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20127 { 15064 /* vpshufb */, X86::VPSHUFBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20128 { 15064 /* vpshufb */, X86::VPSHUFBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20129 { 15064 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20130 { 15064 /* vpshufb */, X86::VPSHUFBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20131 { 15064 /* vpshufb */, X86::VPSHUFBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20132 { 15064 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20133 { 15064 /* vpshufb */, X86::VPSHUFBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20134 { 15064 /* vpshufb */, X86::VPSHUFBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20135 { 15064 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20136 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
20137 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
20138 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20139 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
20140 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
20141 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
20142 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20143 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20144 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20145 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20146 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20147 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20148 { 15085 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20149 { 15085 /* vpshufd */, X86::VPSHUFDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20150 { 15085 /* vpshufd */, X86::VPSHUFDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20151 { 15085 /* vpshufd */, X86::VPSHUFDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20152 { 15085 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20153 { 15085 /* vpshufd */, X86::VPSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
20154 { 15085 /* vpshufd */, X86::VPSHUFDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20155 { 15085 /* vpshufd */, X86::VPSHUFDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
20156 { 15085 /* vpshufd */, X86::VPSHUFDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20157 { 15085 /* vpshufd */, X86::VPSHUFDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20158 { 15085 /* vpshufd */, X86::VPSHUFDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20159 { 15085 /* vpshufd */, X86::VPSHUFDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20160 { 15085 /* vpshufd */, X86::VPSHUFDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20161 { 15085 /* vpshufd */, X86::VPSHUFDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20162 { 15085 /* vpshufd */, X86::VPSHUFDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20163 { 15085 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20164 { 15085 /* vpshufd */, X86::VPSHUFDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20165 { 15085 /* vpshufd */, X86::VPSHUFDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20166 { 15085 /* vpshufd */, X86::VPSHUFDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20167 { 15085 /* vpshufd */, X86::VPSHUFDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20168 { 15085 /* vpshufd */, X86::VPSHUFDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20169 { 15085 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20170 { 15085 /* vpshufd */, X86::VPSHUFDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20171 { 15085 /* vpshufd */, X86::VPSHUFDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20172 { 15085 /* vpshufd */, X86::VPSHUFDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20173 { 15085 /* vpshufd */, X86::VPSHUFDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20174 { 15085 /* vpshufd */, X86::VPSHUFDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20175 { 15085 /* vpshufd */, X86::VPSHUFDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20176 { 15085 /* vpshufd */, X86::VPSHUFDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20177 { 15085 /* vpshufd */, X86::VPSHUFDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20178 { 15085 /* vpshufd */, X86::VPSHUFDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20179 { 15093 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20180 { 15093 /* vpshufhw */, X86::VPSHUFHWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20181 { 15093 /* vpshufhw */, X86::VPSHUFHWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20182 { 15093 /* vpshufhw */, X86::VPSHUFHWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20183 { 15093 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20184 { 15093 /* vpshufhw */, X86::VPSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
20185 { 15093 /* vpshufhw */, X86::VPSHUFHWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20186 { 15093 /* vpshufhw */, X86::VPSHUFHWYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
20187 { 15093 /* vpshufhw */, X86::VPSHUFHWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20188 { 15093 /* vpshufhw */, X86::VPSHUFHWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20189 { 15093 /* vpshufhw */, X86::VPSHUFHWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20190 { 15093 /* vpshufhw */, X86::VPSHUFHWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20191 { 15093 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20192 { 15093 /* vpshufhw */, X86::VPSHUFHWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20193 { 15093 /* vpshufhw */, X86::VPSHUFHWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20194 { 15093 /* vpshufhw */, X86::VPSHUFHWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20195 { 15093 /* vpshufhw */, X86::VPSHUFHWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20196 { 15093 /* vpshufhw */, X86::VPSHUFHWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20197 { 15093 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20198 { 15093 /* vpshufhw */, X86::VPSHUFHWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20199 { 15093 /* vpshufhw */, X86::VPSHUFHWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20200 { 15093 /* vpshufhw */, X86::VPSHUFHWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20201 { 15102 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20202 { 15102 /* vpshuflw */, X86::VPSHUFLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20203 { 15102 /* vpshuflw */, X86::VPSHUFLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20204 { 15102 /* vpshuflw */, X86::VPSHUFLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20205 { 15102 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20206 { 15102 /* vpshuflw */, X86::VPSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
20207 { 15102 /* vpshuflw */, X86::VPSHUFLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20208 { 15102 /* vpshuflw */, X86::VPSHUFLWYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
20209 { 15102 /* vpshuflw */, X86::VPSHUFLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20210 { 15102 /* vpshuflw */, X86::VPSHUFLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20211 { 15102 /* vpshuflw */, X86::VPSHUFLWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20212 { 15102 /* vpshuflw */, X86::VPSHUFLWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20213 { 15102 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20214 { 15102 /* vpshuflw */, X86::VPSHUFLWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20215 { 15102 /* vpshuflw */, X86::VPSHUFLWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20216 { 15102 /* vpshuflw */, X86::VPSHUFLWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20217 { 15102 /* vpshuflw */, X86::VPSHUFLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20218 { 15102 /* vpshuflw */, X86::VPSHUFLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20219 { 15102 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20220 { 15102 /* vpshuflw */, X86::VPSHUFLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20221 { 15102 /* vpshuflw */, X86::VPSHUFLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20222 { 15102 /* vpshuflw */, X86::VPSHUFLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20223 { 15111 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20224 { 15111 /* vpsignb */, X86::VPSIGNBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20225 { 15111 /* vpsignb */, X86::VPSIGNBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20226 { 15111 /* vpsignb */, X86::VPSIGNBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20227 { 15119 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20228 { 15119 /* vpsignd */, X86::VPSIGNDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20229 { 15119 /* vpsignd */, X86::VPSIGNDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20230 { 15119 /* vpsignd */, X86::VPSIGNDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20231 { 15127 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20232 { 15127 /* vpsignw */, X86::VPSIGNWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20233 { 15127 /* vpsignw */, X86::VPSIGNWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20234 { 15127 /* vpsignw */, X86::VPSIGNWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20235 { 15135 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20236 { 15135 /* vpslld */, X86::VPSLLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20237 { 15135 /* vpslld */, X86::VPSLLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20238 { 15135 /* vpslld */, X86::VPSLLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
20239 { 15135 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20240 { 15135 /* vpslld */, X86::VPSLLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20241 { 15135 /* vpslld */, X86::VPSLLDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20242 { 15135 /* vpslld */, X86::VPSLLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20243 { 15135 /* vpslld */, X86::VPSLLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20244 { 15135 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20245 { 15135 /* vpslld */, X86::VPSLLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20246 { 15135 /* vpslld */, X86::VPSLLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20247 { 15135 /* vpslld */, X86::VPSLLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20248 { 15135 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20249 { 15135 /* vpslld */, X86::VPSLLDYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
20250 { 15135 /* vpslld */, X86::VPSLLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20251 { 15135 /* vpslld */, X86::VPSLLDZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
20252 { 15135 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20253 { 15135 /* vpslld */, X86::VPSLLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20254 { 15135 /* vpslld */, X86::VPSLLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20255 { 15135 /* vpslld */, X86::VPSLLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20256 { 15135 /* vpslld */, X86::VPSLLDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20257 { 15135 /* vpslld */, X86::VPSLLDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20258 { 15135 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20259 { 15135 /* vpslld */, X86::VPSLLDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20260 { 15135 /* vpslld */, X86::VPSLLDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20261 { 15135 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20262 { 15135 /* vpslld */, X86::VPSLLDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20263 { 15135 /* vpslld */, X86::VPSLLDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20264 { 15135 /* vpslld */, X86::VPSLLDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20265 { 15135 /* vpslld */, X86::VPSLLDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20266 { 15135 /* vpslld */, X86::VPSLLDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20267 { 15135 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20268 { 15135 /* vpslld */, X86::VPSLLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20269 { 15135 /* vpslld */, X86::VPSLLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20270 { 15135 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20271 { 15135 /* vpslld */, X86::VPSLLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20272 { 15135 /* vpslld */, X86::VPSLLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20273 { 15135 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20274 { 15135 /* vpslld */, X86::VPSLLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20275 { 15135 /* vpslld */, X86::VPSLLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20276 { 15135 /* vpslld */, X86::VPSLLDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20277 { 15135 /* vpslld */, X86::VPSLLDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20278 { 15135 /* vpslld */, X86::VPSLLDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20279 { 15135 /* vpslld */, X86::VPSLLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20280 { 15135 /* vpslld */, X86::VPSLLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20281 { 15135 /* vpslld */, X86::VPSLLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20282 { 15135 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20283 { 15135 /* vpslld */, X86::VPSLLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20284 { 15135 /* vpslld */, X86::VPSLLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20285 { 15135 /* vpslld */, X86::VPSLLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20286 { 15142 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20287 { 15142 /* vpslldq */, X86::VPSLLDQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20288 { 15142 /* vpslldq */, X86::VPSLLDQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20289 { 15142 /* vpslldq */, X86::VPSLLDQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20290 { 15142 /* vpslldq */, X86::VPSLLDQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20291 { 15142 /* vpslldq */, X86::VPSLLDQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20292 { 15142 /* vpslldq */, X86::VPSLLDQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20293 { 15142 /* vpslldq */, X86::VPSLLDQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20294 { 15150 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20295 { 15150 /* vpsllq */, X86::VPSLLQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20296 { 15150 /* vpsllq */, X86::VPSLLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20297 { 15150 /* vpsllq */, X86::VPSLLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
20298 { 15150 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20299 { 15150 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20300 { 15150 /* vpsllq */, X86::VPSLLQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20301 { 15150 /* vpsllq */, X86::VPSLLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20302 { 15150 /* vpsllq */, X86::VPSLLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20303 { 15150 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20304 { 15150 /* vpsllq */, X86::VPSLLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20305 { 15150 /* vpsllq */, X86::VPSLLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20306 { 15150 /* vpsllq */, X86::VPSLLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20307 { 15150 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20308 { 15150 /* vpsllq */, X86::VPSLLQYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
20309 { 15150 /* vpsllq */, X86::VPSLLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20310 { 15150 /* vpsllq */, X86::VPSLLQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
20311 { 15150 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20312 { 15150 /* vpsllq */, X86::VPSLLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20313 { 15150 /* vpsllq */, X86::VPSLLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20314 { 15150 /* vpsllq */, X86::VPSLLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20315 { 15150 /* vpsllq */, X86::VPSLLQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20316 { 15150 /* vpsllq */, X86::VPSLLQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20317 { 15150 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20318 { 15150 /* vpsllq */, X86::VPSLLQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20319 { 15150 /* vpsllq */, X86::VPSLLQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20320 { 15150 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20321 { 15150 /* vpsllq */, X86::VPSLLQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20322 { 15150 /* vpsllq */, X86::VPSLLQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20323 { 15150 /* vpsllq */, X86::VPSLLQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20324 { 15150 /* vpsllq */, X86::VPSLLQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20325 { 15150 /* vpsllq */, X86::VPSLLQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20326 { 15150 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20327 { 15150 /* vpsllq */, X86::VPSLLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20328 { 15150 /* vpsllq */, X86::VPSLLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20329 { 15150 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20330 { 15150 /* vpsllq */, X86::VPSLLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20331 { 15150 /* vpsllq */, X86::VPSLLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20332 { 15150 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20333 { 15150 /* vpsllq */, X86::VPSLLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20334 { 15150 /* vpsllq */, X86::VPSLLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20335 { 15150 /* vpsllq */, X86::VPSLLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20336 { 15150 /* vpsllq */, X86::VPSLLQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20337 { 15150 /* vpsllq */, X86::VPSLLQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20338 { 15150 /* vpsllq */, X86::VPSLLQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20339 { 15150 /* vpsllq */, X86::VPSLLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20340 { 15150 /* vpsllq */, X86::VPSLLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20341 { 15150 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20342 { 15150 /* vpsllq */, X86::VPSLLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20343 { 15150 /* vpsllq */, X86::VPSLLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20344 { 15150 /* vpsllq */, X86::VPSLLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20345 { 15157 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20346 { 15157 /* vpsllvd */, X86::VPSLLVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20347 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20348 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20349 { 15157 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20350 { 15157 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20351 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20352 { 15157 /* vpsllvd */, X86::VPSLLVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20353 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20354 { 15157 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20355 { 15157 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20356 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20357 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20358 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20359 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20360 { 15157 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20361 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20362 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20363 { 15157 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20364 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20365 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20366 { 15157 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20367 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20368 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20369 { 15157 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20370 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20371 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20372 { 15157 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20373 { 15157 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20374 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20375 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20376 { 15165 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20377 { 15165 /* vpsllvq */, X86::VPSLLVQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20378 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20379 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20380 { 15165 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20381 { 15165 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20382 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20383 { 15165 /* vpsllvq */, X86::VPSLLVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20384 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20385 { 15165 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20386 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20387 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20388 { 15165 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20389 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20390 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20391 { 15165 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20392 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20393 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20394 { 15165 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20395 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20396 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20397 { 15165 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20398 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20399 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20400 { 15165 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20401 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20402 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20403 { 15165 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20404 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20405 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20406 { 15165 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20407 { 15173 /* vpsllvw */, X86::VPSLLVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20408 { 15173 /* vpsllvw */, X86::VPSLLVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20409 { 15173 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20410 { 15173 /* vpsllvw */, X86::VPSLLVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20411 { 15173 /* vpsllvw */, X86::VPSLLVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20412 { 15173 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20413 { 15173 /* vpsllvw */, X86::VPSLLVWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20414 { 15173 /* vpsllvw */, X86::VPSLLVWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20415 { 15173 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20416 { 15173 /* vpsllvw */, X86::VPSLLVWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20417 { 15173 /* vpsllvw */, X86::VPSLLVWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20418 { 15173 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20419 { 15173 /* vpsllvw */, X86::VPSLLVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20420 { 15173 /* vpsllvw */, X86::VPSLLVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20421 { 15173 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20422 { 15173 /* vpsllvw */, X86::VPSLLVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20423 { 15173 /* vpsllvw */, X86::VPSLLVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20424 { 15173 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20425 { 15181 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20426 { 15181 /* vpsllw */, X86::VPSLLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20427 { 15181 /* vpsllw */, X86::VPSLLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20428 { 15181 /* vpsllw */, X86::VPSLLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
20429 { 15181 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20430 { 15181 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20431 { 15181 /* vpsllw */, X86::VPSLLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20432 { 15181 /* vpsllw */, X86::VPSLLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20433 { 15181 /* vpsllw */, X86::VPSLLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20434 { 15181 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20435 { 15181 /* vpsllw */, X86::VPSLLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20436 { 15181 /* vpsllw */, X86::VPSLLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20437 { 15181 /* vpsllw */, X86::VPSLLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20438 { 15181 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20439 { 15181 /* vpsllw */, X86::VPSLLWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
20440 { 15181 /* vpsllw */, X86::VPSLLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20441 { 15181 /* vpsllw */, X86::VPSLLWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
20442 { 15181 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20443 { 15181 /* vpsllw */, X86::VPSLLWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20444 { 15181 /* vpsllw */, X86::VPSLLWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20445 { 15181 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20446 { 15181 /* vpsllw */, X86::VPSLLWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20447 { 15181 /* vpsllw */, X86::VPSLLWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20448 { 15181 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20449 { 15181 /* vpsllw */, X86::VPSLLWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20450 { 15181 /* vpsllw */, X86::VPSLLWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20451 { 15181 /* vpsllw */, X86::VPSLLWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20452 { 15181 /* vpsllw */, X86::VPSLLWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20453 { 15181 /* vpsllw */, X86::VPSLLWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20454 { 15181 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20455 { 15181 /* vpsllw */, X86::VPSLLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20456 { 15181 /* vpsllw */, X86::VPSLLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20457 { 15181 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20458 { 15181 /* vpsllw */, X86::VPSLLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20459 { 15181 /* vpsllw */, X86::VPSLLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20460 { 15181 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20461 { 15181 /* vpsllw */, X86::VPSLLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20462 { 15181 /* vpsllw */, X86::VPSLLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20463 { 15181 /* vpsllw */, X86::VPSLLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20464 { 15181 /* vpsllw */, X86::VPSLLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20465 { 15181 /* vpsllw */, X86::VPSLLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20466 { 15181 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20467 { 15188 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20468 { 15188 /* vpsrad */, X86::VPSRADYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20469 { 15188 /* vpsrad */, X86::VPSRADZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20470 { 15188 /* vpsrad */, X86::VPSRADZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
20471 { 15188 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20472 { 15188 /* vpsrad */, X86::VPSRADri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20473 { 15188 /* vpsrad */, X86::VPSRADYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20474 { 15188 /* vpsrad */, X86::VPSRADZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20475 { 15188 /* vpsrad */, X86::VPSRADZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20476 { 15188 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20477 { 15188 /* vpsrad */, X86::VPSRADZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20478 { 15188 /* vpsrad */, X86::VPSRADZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20479 { 15188 /* vpsrad */, X86::VPSRADZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20480 { 15188 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20481 { 15188 /* vpsrad */, X86::VPSRADYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
20482 { 15188 /* vpsrad */, X86::VPSRADZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20483 { 15188 /* vpsrad */, X86::VPSRADZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
20484 { 15188 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20485 { 15188 /* vpsrad */, X86::VPSRADZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20486 { 15188 /* vpsrad */, X86::VPSRADZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20487 { 15188 /* vpsrad */, X86::VPSRADZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20488 { 15188 /* vpsrad */, X86::VPSRADZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20489 { 15188 /* vpsrad */, X86::VPSRADZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20490 { 15188 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20491 { 15188 /* vpsrad */, X86::VPSRADZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20492 { 15188 /* vpsrad */, X86::VPSRADZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20493 { 15188 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20494 { 15188 /* vpsrad */, X86::VPSRADZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20495 { 15188 /* vpsrad */, X86::VPSRADZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20496 { 15188 /* vpsrad */, X86::VPSRADZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20497 { 15188 /* vpsrad */, X86::VPSRADZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20498 { 15188 /* vpsrad */, X86::VPSRADZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20499 { 15188 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20500 { 15188 /* vpsrad */, X86::VPSRADZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20501 { 15188 /* vpsrad */, X86::VPSRADZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20502 { 15188 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20503 { 15188 /* vpsrad */, X86::VPSRADZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20504 { 15188 /* vpsrad */, X86::VPSRADZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20505 { 15188 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20506 { 15188 /* vpsrad */, X86::VPSRADZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20507 { 15188 /* vpsrad */, X86::VPSRADZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20508 { 15188 /* vpsrad */, X86::VPSRADZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20509 { 15188 /* vpsrad */, X86::VPSRADZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20510 { 15188 /* vpsrad */, X86::VPSRADZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20511 { 15188 /* vpsrad */, X86::VPSRADZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20512 { 15188 /* vpsrad */, X86::VPSRADZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20513 { 15188 /* vpsrad */, X86::VPSRADZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20514 { 15188 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20515 { 15188 /* vpsrad */, X86::VPSRADZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20516 { 15188 /* vpsrad */, X86::VPSRADZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20517 { 15188 /* vpsrad */, X86::VPSRADZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20518 { 15195 /* vpsraq */, X86::VPSRAQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20519 { 15195 /* vpsraq */, X86::VPSRAQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
20520 { 15195 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20521 { 15195 /* vpsraq */, X86::VPSRAQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20522 { 15195 /* vpsraq */, X86::VPSRAQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20523 { 15195 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20524 { 15195 /* vpsraq */, X86::VPSRAQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20525 { 15195 /* vpsraq */, X86::VPSRAQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20526 { 15195 /* vpsraq */, X86::VPSRAQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20527 { 15195 /* vpsraq */, X86::VPSRAQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20528 { 15195 /* vpsraq */, X86::VPSRAQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
20529 { 15195 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20530 { 15195 /* vpsraq */, X86::VPSRAQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20531 { 15195 /* vpsraq */, X86::VPSRAQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20532 { 15195 /* vpsraq */, X86::VPSRAQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20533 { 15195 /* vpsraq */, X86::VPSRAQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20534 { 15195 /* vpsraq */, X86::VPSRAQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20535 { 15195 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20536 { 15195 /* vpsraq */, X86::VPSRAQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20537 { 15195 /* vpsraq */, X86::VPSRAQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20538 { 15195 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20539 { 15195 /* vpsraq */, X86::VPSRAQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20540 { 15195 /* vpsraq */, X86::VPSRAQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20541 { 15195 /* vpsraq */, X86::VPSRAQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20542 { 15195 /* vpsraq */, X86::VPSRAQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20543 { 15195 /* vpsraq */, X86::VPSRAQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20544 { 15195 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20545 { 15195 /* vpsraq */, X86::VPSRAQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20546 { 15195 /* vpsraq */, X86::VPSRAQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20547 { 15195 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20548 { 15195 /* vpsraq */, X86::VPSRAQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20549 { 15195 /* vpsraq */, X86::VPSRAQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20550 { 15195 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20551 { 15195 /* vpsraq */, X86::VPSRAQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20552 { 15195 /* vpsraq */, X86::VPSRAQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20553 { 15195 /* vpsraq */, X86::VPSRAQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20554 { 15195 /* vpsraq */, X86::VPSRAQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20555 { 15195 /* vpsraq */, X86::VPSRAQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20556 { 15195 /* vpsraq */, X86::VPSRAQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20557 { 15195 /* vpsraq */, X86::VPSRAQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20558 { 15195 /* vpsraq */, X86::VPSRAQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20559 { 15195 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20560 { 15195 /* vpsraq */, X86::VPSRAQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20561 { 15195 /* vpsraq */, X86::VPSRAQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20562 { 15195 /* vpsraq */, X86::VPSRAQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20563 { 15202 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20564 { 15202 /* vpsravd */, X86::VPSRAVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20565 { 15202 /* vpsravd */, X86::VPSRAVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20566 { 15202 /* vpsravd */, X86::VPSRAVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20567 { 15202 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20568 { 15202 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20569 { 15202 /* vpsravd */, X86::VPSRAVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20570 { 15202 /* vpsravd */, X86::VPSRAVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20571 { 15202 /* vpsravd */, X86::VPSRAVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20572 { 15202 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20573 { 15202 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20574 { 15202 /* vpsravd */, X86::VPSRAVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20575 { 15202 /* vpsravd */, X86::VPSRAVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20576 { 15202 /* vpsravd */, X86::VPSRAVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20577 { 15202 /* vpsravd */, X86::VPSRAVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20578 { 15202 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20579 { 15202 /* vpsravd */, X86::VPSRAVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20580 { 15202 /* vpsravd */, X86::VPSRAVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20581 { 15202 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20582 { 15202 /* vpsravd */, X86::VPSRAVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20583 { 15202 /* vpsravd */, X86::VPSRAVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20584 { 15202 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20585 { 15202 /* vpsravd */, X86::VPSRAVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20586 { 15202 /* vpsravd */, X86::VPSRAVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20587 { 15202 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20588 { 15202 /* vpsravd */, X86::VPSRAVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20589 { 15202 /* vpsravd */, X86::VPSRAVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20590 { 15202 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20591 { 15202 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20592 { 15202 /* vpsravd */, X86::VPSRAVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20593 { 15202 /* vpsravd */, X86::VPSRAVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20594 { 15210 /* vpsravq */, X86::VPSRAVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20595 { 15210 /* vpsravq */, X86::VPSRAVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20596 { 15210 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20597 { 15210 /* vpsravq */, X86::VPSRAVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20598 { 15210 /* vpsravq */, X86::VPSRAVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20599 { 15210 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20600 { 15210 /* vpsravq */, X86::VPSRAVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20601 { 15210 /* vpsravq */, X86::VPSRAVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20602 { 15210 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20603 { 15210 /* vpsravq */, X86::VPSRAVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20604 { 15210 /* vpsravq */, X86::VPSRAVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20605 { 15210 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20606 { 15210 /* vpsravq */, X86::VPSRAVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20607 { 15210 /* vpsravq */, X86::VPSRAVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20608 { 15210 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20609 { 15210 /* vpsravq */, X86::VPSRAVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20610 { 15210 /* vpsravq */, X86::VPSRAVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20611 { 15210 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20612 { 15210 /* vpsravq */, X86::VPSRAVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20613 { 15210 /* vpsravq */, X86::VPSRAVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20614 { 15210 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20615 { 15210 /* vpsravq */, X86::VPSRAVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20616 { 15210 /* vpsravq */, X86::VPSRAVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20617 { 15210 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20618 { 15210 /* vpsravq */, X86::VPSRAVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20619 { 15210 /* vpsravq */, X86::VPSRAVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20620 { 15210 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20621 { 15218 /* vpsravw */, X86::VPSRAVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20622 { 15218 /* vpsravw */, X86::VPSRAVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20623 { 15218 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20624 { 15218 /* vpsravw */, X86::VPSRAVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20625 { 15218 /* vpsravw */, X86::VPSRAVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20626 { 15218 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20627 { 15218 /* vpsravw */, X86::VPSRAVWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20628 { 15218 /* vpsravw */, X86::VPSRAVWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20629 { 15218 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20630 { 15218 /* vpsravw */, X86::VPSRAVWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20631 { 15218 /* vpsravw */, X86::VPSRAVWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20632 { 15218 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20633 { 15218 /* vpsravw */, X86::VPSRAVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20634 { 15218 /* vpsravw */, X86::VPSRAVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20635 { 15218 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20636 { 15218 /* vpsravw */, X86::VPSRAVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20637 { 15218 /* vpsravw */, X86::VPSRAVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20638 { 15218 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20639 { 15226 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20640 { 15226 /* vpsraw */, X86::VPSRAWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20641 { 15226 /* vpsraw */, X86::VPSRAWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20642 { 15226 /* vpsraw */, X86::VPSRAWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
20643 { 15226 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20644 { 15226 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20645 { 15226 /* vpsraw */, X86::VPSRAWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20646 { 15226 /* vpsraw */, X86::VPSRAWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20647 { 15226 /* vpsraw */, X86::VPSRAWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20648 { 15226 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20649 { 15226 /* vpsraw */, X86::VPSRAWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20650 { 15226 /* vpsraw */, X86::VPSRAWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20651 { 15226 /* vpsraw */, X86::VPSRAWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20652 { 15226 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20653 { 15226 /* vpsraw */, X86::VPSRAWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
20654 { 15226 /* vpsraw */, X86::VPSRAWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20655 { 15226 /* vpsraw */, X86::VPSRAWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
20656 { 15226 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20657 { 15226 /* vpsraw */, X86::VPSRAWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20658 { 15226 /* vpsraw */, X86::VPSRAWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20659 { 15226 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20660 { 15226 /* vpsraw */, X86::VPSRAWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20661 { 15226 /* vpsraw */, X86::VPSRAWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20662 { 15226 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20663 { 15226 /* vpsraw */, X86::VPSRAWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20664 { 15226 /* vpsraw */, X86::VPSRAWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20665 { 15226 /* vpsraw */, X86::VPSRAWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20666 { 15226 /* vpsraw */, X86::VPSRAWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20667 { 15226 /* vpsraw */, X86::VPSRAWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20668 { 15226 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20669 { 15226 /* vpsraw */, X86::VPSRAWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20670 { 15226 /* vpsraw */, X86::VPSRAWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20671 { 15226 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20672 { 15226 /* vpsraw */, X86::VPSRAWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20673 { 15226 /* vpsraw */, X86::VPSRAWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20674 { 15226 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20675 { 15226 /* vpsraw */, X86::VPSRAWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20676 { 15226 /* vpsraw */, X86::VPSRAWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20677 { 15226 /* vpsraw */, X86::VPSRAWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20678 { 15226 /* vpsraw */, X86::VPSRAWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20679 { 15226 /* vpsraw */, X86::VPSRAWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20680 { 15226 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20681 { 15233 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20682 { 15233 /* vpsrld */, X86::VPSRLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20683 { 15233 /* vpsrld */, X86::VPSRLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20684 { 15233 /* vpsrld */, X86::VPSRLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
20685 { 15233 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20686 { 15233 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20687 { 15233 /* vpsrld */, X86::VPSRLDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20688 { 15233 /* vpsrld */, X86::VPSRLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20689 { 15233 /* vpsrld */, X86::VPSRLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20690 { 15233 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20691 { 15233 /* vpsrld */, X86::VPSRLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20692 { 15233 /* vpsrld */, X86::VPSRLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20693 { 15233 /* vpsrld */, X86::VPSRLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20694 { 15233 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20695 { 15233 /* vpsrld */, X86::VPSRLDYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
20696 { 15233 /* vpsrld */, X86::VPSRLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20697 { 15233 /* vpsrld */, X86::VPSRLDZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
20698 { 15233 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20699 { 15233 /* vpsrld */, X86::VPSRLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20700 { 15233 /* vpsrld */, X86::VPSRLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20701 { 15233 /* vpsrld */, X86::VPSRLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20702 { 15233 /* vpsrld */, X86::VPSRLDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20703 { 15233 /* vpsrld */, X86::VPSRLDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20704 { 15233 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20705 { 15233 /* vpsrld */, X86::VPSRLDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20706 { 15233 /* vpsrld */, X86::VPSRLDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20707 { 15233 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20708 { 15233 /* vpsrld */, X86::VPSRLDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20709 { 15233 /* vpsrld */, X86::VPSRLDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20710 { 15233 /* vpsrld */, X86::VPSRLDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20711 { 15233 /* vpsrld */, X86::VPSRLDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20712 { 15233 /* vpsrld */, X86::VPSRLDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20713 { 15233 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20714 { 15233 /* vpsrld */, X86::VPSRLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20715 { 15233 /* vpsrld */, X86::VPSRLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20716 { 15233 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20717 { 15233 /* vpsrld */, X86::VPSRLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20718 { 15233 /* vpsrld */, X86::VPSRLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20719 { 15233 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20720 { 15233 /* vpsrld */, X86::VPSRLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20721 { 15233 /* vpsrld */, X86::VPSRLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20722 { 15233 /* vpsrld */, X86::VPSRLDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20723 { 15233 /* vpsrld */, X86::VPSRLDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20724 { 15233 /* vpsrld */, X86::VPSRLDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20725 { 15233 /* vpsrld */, X86::VPSRLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20726 { 15233 /* vpsrld */, X86::VPSRLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20727 { 15233 /* vpsrld */, X86::VPSRLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20728 { 15233 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20729 { 15233 /* vpsrld */, X86::VPSRLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20730 { 15233 /* vpsrld */, X86::VPSRLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20731 { 15233 /* vpsrld */, X86::VPSRLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20732 { 15240 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20733 { 15240 /* vpsrldq */, X86::VPSRLDQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20734 { 15240 /* vpsrldq */, X86::VPSRLDQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20735 { 15240 /* vpsrldq */, X86::VPSRLDQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20736 { 15240 /* vpsrldq */, X86::VPSRLDQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20737 { 15240 /* vpsrldq */, X86::VPSRLDQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20738 { 15240 /* vpsrldq */, X86::VPSRLDQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20739 { 15240 /* vpsrldq */, X86::VPSRLDQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20740 { 15248 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20741 { 15248 /* vpsrlq */, X86::VPSRLQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20742 { 15248 /* vpsrlq */, X86::VPSRLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20743 { 15248 /* vpsrlq */, X86::VPSRLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
20744 { 15248 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20745 { 15248 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20746 { 15248 /* vpsrlq */, X86::VPSRLQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20747 { 15248 /* vpsrlq */, X86::VPSRLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20748 { 15248 /* vpsrlq */, X86::VPSRLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20749 { 15248 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20750 { 15248 /* vpsrlq */, X86::VPSRLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20751 { 15248 /* vpsrlq */, X86::VPSRLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20752 { 15248 /* vpsrlq */, X86::VPSRLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20753 { 15248 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20754 { 15248 /* vpsrlq */, X86::VPSRLQYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
20755 { 15248 /* vpsrlq */, X86::VPSRLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20756 { 15248 /* vpsrlq */, X86::VPSRLQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
20757 { 15248 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20758 { 15248 /* vpsrlq */, X86::VPSRLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20759 { 15248 /* vpsrlq */, X86::VPSRLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20760 { 15248 /* vpsrlq */, X86::VPSRLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20761 { 15248 /* vpsrlq */, X86::VPSRLQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20762 { 15248 /* vpsrlq */, X86::VPSRLQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20763 { 15248 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20764 { 15248 /* vpsrlq */, X86::VPSRLQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20765 { 15248 /* vpsrlq */, X86::VPSRLQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20766 { 15248 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20767 { 15248 /* vpsrlq */, X86::VPSRLQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20768 { 15248 /* vpsrlq */, X86::VPSRLQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20769 { 15248 /* vpsrlq */, X86::VPSRLQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20770 { 15248 /* vpsrlq */, X86::VPSRLQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20771 { 15248 /* vpsrlq */, X86::VPSRLQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20772 { 15248 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20773 { 15248 /* vpsrlq */, X86::VPSRLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20774 { 15248 /* vpsrlq */, X86::VPSRLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20775 { 15248 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20776 { 15248 /* vpsrlq */, X86::VPSRLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20777 { 15248 /* vpsrlq */, X86::VPSRLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20778 { 15248 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20779 { 15248 /* vpsrlq */, X86::VPSRLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20780 { 15248 /* vpsrlq */, X86::VPSRLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20781 { 15248 /* vpsrlq */, X86::VPSRLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20782 { 15248 /* vpsrlq */, X86::VPSRLQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20783 { 15248 /* vpsrlq */, X86::VPSRLQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20784 { 15248 /* vpsrlq */, X86::VPSRLQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20785 { 15248 /* vpsrlq */, X86::VPSRLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20786 { 15248 /* vpsrlq */, X86::VPSRLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20787 { 15248 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20788 { 15248 /* vpsrlq */, X86::VPSRLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20789 { 15248 /* vpsrlq */, X86::VPSRLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20790 { 15248 /* vpsrlq */, X86::VPSRLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20791 { 15255 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20792 { 15255 /* vpsrlvd */, X86::VPSRLVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20793 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20794 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20795 { 15255 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20796 { 15255 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20797 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20798 { 15255 /* vpsrlvd */, X86::VPSRLVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20799 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20800 { 15255 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20801 { 15255 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20802 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20803 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20804 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20805 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20806 { 15255 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20807 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20808 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20809 { 15255 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20810 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20811 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20812 { 15255 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20813 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20814 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20815 { 15255 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20816 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20817 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20818 { 15255 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20819 { 15255 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20820 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20821 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20822 { 15263 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20823 { 15263 /* vpsrlvq */, X86::VPSRLVQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20824 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20825 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20826 { 15263 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20827 { 15263 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20828 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20829 { 15263 /* vpsrlvq */, X86::VPSRLVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20830 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20831 { 15263 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20832 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20833 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20834 { 15263 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20835 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20836 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20837 { 15263 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20838 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20839 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20840 { 15263 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20841 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20842 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20843 { 15263 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20844 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20845 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20846 { 15263 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20847 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20848 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20849 { 15263 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20850 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20851 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20852 { 15263 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20853 { 15271 /* vpsrlvw */, X86::VPSRLVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20854 { 15271 /* vpsrlvw */, X86::VPSRLVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20855 { 15271 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20856 { 15271 /* vpsrlvw */, X86::VPSRLVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20857 { 15271 /* vpsrlvw */, X86::VPSRLVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20858 { 15271 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20859 { 15271 /* vpsrlvw */, X86::VPSRLVWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20860 { 15271 /* vpsrlvw */, X86::VPSRLVWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20861 { 15271 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20862 { 15271 /* vpsrlvw */, X86::VPSRLVWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20863 { 15271 /* vpsrlvw */, X86::VPSRLVWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20864 { 15271 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20865 { 15271 /* vpsrlvw */, X86::VPSRLVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20866 { 15271 /* vpsrlvw */, X86::VPSRLVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20867 { 15271 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20868 { 15271 /* vpsrlvw */, X86::VPSRLVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20869 { 15271 /* vpsrlvw */, X86::VPSRLVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20870 { 15271 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20871 { 15279 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20872 { 15279 /* vpsrlw */, X86::VPSRLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20873 { 15279 /* vpsrlw */, X86::VPSRLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20874 { 15279 /* vpsrlw */, X86::VPSRLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
20875 { 15279 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20876 { 15279 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20877 { 15279 /* vpsrlw */, X86::VPSRLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20878 { 15279 /* vpsrlw */, X86::VPSRLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20879 { 15279 /* vpsrlw */, X86::VPSRLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20880 { 15279 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20881 { 15279 /* vpsrlw */, X86::VPSRLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20882 { 15279 /* vpsrlw */, X86::VPSRLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20883 { 15279 /* vpsrlw */, X86::VPSRLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20884 { 15279 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20885 { 15279 /* vpsrlw */, X86::VPSRLWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
20886 { 15279 /* vpsrlw */, X86::VPSRLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20887 { 15279 /* vpsrlw */, X86::VPSRLWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
20888 { 15279 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20889 { 15279 /* vpsrlw */, X86::VPSRLWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20890 { 15279 /* vpsrlw */, X86::VPSRLWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20891 { 15279 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20892 { 15279 /* vpsrlw */, X86::VPSRLWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20893 { 15279 /* vpsrlw */, X86::VPSRLWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20894 { 15279 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20895 { 15279 /* vpsrlw */, X86::VPSRLWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20896 { 15279 /* vpsrlw */, X86::VPSRLWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20897 { 15279 /* vpsrlw */, X86::VPSRLWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20898 { 15279 /* vpsrlw */, X86::VPSRLWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20899 { 15279 /* vpsrlw */, X86::VPSRLWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20900 { 15279 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20901 { 15279 /* vpsrlw */, X86::VPSRLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20902 { 15279 /* vpsrlw */, X86::VPSRLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20903 { 15279 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20904 { 15279 /* vpsrlw */, X86::VPSRLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20905 { 15279 /* vpsrlw */, X86::VPSRLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20906 { 15279 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20907 { 15279 /* vpsrlw */, X86::VPSRLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20908 { 15279 /* vpsrlw */, X86::VPSRLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20909 { 15279 /* vpsrlw */, X86::VPSRLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20910 { 15279 /* vpsrlw */, X86::VPSRLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20911 { 15279 /* vpsrlw */, X86::VPSRLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20912 { 15279 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20913 { 15286 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20914 { 15286 /* vpsubb */, X86::VPSUBBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20915 { 15286 /* vpsubb */, X86::VPSUBBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20916 { 15286 /* vpsubb */, X86::VPSUBBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20917 { 15286 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20918 { 15286 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20919 { 15286 /* vpsubb */, X86::VPSUBBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20920 { 15286 /* vpsubb */, X86::VPSUBBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20921 { 15286 /* vpsubb */, X86::VPSUBBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20922 { 15286 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20923 { 15286 /* vpsubb */, X86::VPSUBBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20924 { 15286 /* vpsubb */, X86::VPSUBBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20925 { 15286 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20926 { 15286 /* vpsubb */, X86::VPSUBBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20927 { 15286 /* vpsubb */, X86::VPSUBBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20928 { 15286 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20929 { 15286 /* vpsubb */, X86::VPSUBBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20930 { 15286 /* vpsubb */, X86::VPSUBBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20931 { 15286 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20932 { 15286 /* vpsubb */, X86::VPSUBBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20933 { 15286 /* vpsubb */, X86::VPSUBBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20934 { 15286 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20935 { 15293 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20936 { 15293 /* vpsubd */, X86::VPSUBDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20937 { 15293 /* vpsubd */, X86::VPSUBDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20938 { 15293 /* vpsubd */, X86::VPSUBDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20939 { 15293 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20940 { 15293 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20941 { 15293 /* vpsubd */, X86::VPSUBDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20942 { 15293 /* vpsubd */, X86::VPSUBDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20943 { 15293 /* vpsubd */, X86::VPSUBDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20944 { 15293 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20945 { 15293 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20946 { 15293 /* vpsubd */, X86::VPSUBDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20947 { 15293 /* vpsubd */, X86::VPSUBDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20948 { 15293 /* vpsubd */, X86::VPSUBDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20949 { 15293 /* vpsubd */, X86::VPSUBDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20950 { 15293 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20951 { 15293 /* vpsubd */, X86::VPSUBDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20952 { 15293 /* vpsubd */, X86::VPSUBDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20953 { 15293 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20954 { 15293 /* vpsubd */, X86::VPSUBDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20955 { 15293 /* vpsubd */, X86::VPSUBDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20956 { 15293 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20957 { 15293 /* vpsubd */, X86::VPSUBDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20958 { 15293 /* vpsubd */, X86::VPSUBDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20959 { 15293 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20960 { 15293 /* vpsubd */, X86::VPSUBDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20961 { 15293 /* vpsubd */, X86::VPSUBDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20962 { 15293 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20963 { 15293 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20964 { 15293 /* vpsubd */, X86::VPSUBDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20965 { 15293 /* vpsubd */, X86::VPSUBDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20966 { 15300 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20967 { 15300 /* vpsubq */, X86::VPSUBQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20968 { 15300 /* vpsubq */, X86::VPSUBQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20969 { 15300 /* vpsubq */, X86::VPSUBQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20970 { 15300 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20971 { 15300 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20972 { 15300 /* vpsubq */, X86::VPSUBQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20973 { 15300 /* vpsubq */, X86::VPSUBQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20974 { 15300 /* vpsubq */, X86::VPSUBQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20975 { 15300 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20976 { 15300 /* vpsubq */, X86::VPSUBQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20977 { 15300 /* vpsubq */, X86::VPSUBQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20978 { 15300 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20979 { 15300 /* vpsubq */, X86::VPSUBQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20980 { 15300 /* vpsubq */, X86::VPSUBQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20981 { 15300 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20982 { 15300 /* vpsubq */, X86::VPSUBQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20983 { 15300 /* vpsubq */, X86::VPSUBQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20984 { 15300 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20985 { 15300 /* vpsubq */, X86::VPSUBQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20986 { 15300 /* vpsubq */, X86::VPSUBQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20987 { 15300 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20988 { 15300 /* vpsubq */, X86::VPSUBQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20989 { 15300 /* vpsubq */, X86::VPSUBQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20990 { 15300 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20991 { 15300 /* vpsubq */, X86::VPSUBQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20992 { 15300 /* vpsubq */, X86::VPSUBQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20993 { 15300 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20994 { 15300 /* vpsubq */, X86::VPSUBQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20995 { 15300 /* vpsubq */, X86::VPSUBQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20996 { 15300 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20997 { 15307 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20998 { 15307 /* vpsubsb */, X86::VPSUBSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20999 { 15307 /* vpsubsb */, X86::VPSUBSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21000 { 15307 /* vpsubsb */, X86::VPSUBSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21001 { 15307 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21002 { 15307 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21003 { 15307 /* vpsubsb */, X86::VPSUBSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21004 { 15307 /* vpsubsb */, X86::VPSUBSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21005 { 15307 /* vpsubsb */, X86::VPSUBSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21006 { 15307 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21007 { 15307 /* vpsubsb */, X86::VPSUBSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21008 { 15307 /* vpsubsb */, X86::VPSUBSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21009 { 15307 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21010 { 15307 /* vpsubsb */, X86::VPSUBSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21011 { 15307 /* vpsubsb */, X86::VPSUBSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21012 { 15307 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21013 { 15307 /* vpsubsb */, X86::VPSUBSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21014 { 15307 /* vpsubsb */, X86::VPSUBSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21015 { 15307 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21016 { 15307 /* vpsubsb */, X86::VPSUBSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21017 { 15307 /* vpsubsb */, X86::VPSUBSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21018 { 15307 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21019 { 15315 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21020 { 15315 /* vpsubsw */, X86::VPSUBSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21021 { 15315 /* vpsubsw */, X86::VPSUBSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21022 { 15315 /* vpsubsw */, X86::VPSUBSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21023 { 15315 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21024 { 15315 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21025 { 15315 /* vpsubsw */, X86::VPSUBSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21026 { 15315 /* vpsubsw */, X86::VPSUBSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21027 { 15315 /* vpsubsw */, X86::VPSUBSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21028 { 15315 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21029 { 15315 /* vpsubsw */, X86::VPSUBSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21030 { 15315 /* vpsubsw */, X86::VPSUBSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21031 { 15315 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21032 { 15315 /* vpsubsw */, X86::VPSUBSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21033 { 15315 /* vpsubsw */, X86::VPSUBSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21034 { 15315 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21035 { 15315 /* vpsubsw */, X86::VPSUBSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21036 { 15315 /* vpsubsw */, X86::VPSUBSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21037 { 15315 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21038 { 15315 /* vpsubsw */, X86::VPSUBSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21039 { 15315 /* vpsubsw */, X86::VPSUBSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21040 { 15315 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21041 { 15323 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21042 { 15323 /* vpsubusb */, X86::VPSUBUSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21043 { 15323 /* vpsubusb */, X86::VPSUBUSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21044 { 15323 /* vpsubusb */, X86::VPSUBUSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21045 { 15323 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21046 { 15323 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21047 { 15323 /* vpsubusb */, X86::VPSUBUSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21048 { 15323 /* vpsubusb */, X86::VPSUBUSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21049 { 15323 /* vpsubusb */, X86::VPSUBUSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21050 { 15323 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21051 { 15323 /* vpsubusb */, X86::VPSUBUSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21052 { 15323 /* vpsubusb */, X86::VPSUBUSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21053 { 15323 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21054 { 15323 /* vpsubusb */, X86::VPSUBUSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21055 { 15323 /* vpsubusb */, X86::VPSUBUSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21056 { 15323 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21057 { 15323 /* vpsubusb */, X86::VPSUBUSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21058 { 15323 /* vpsubusb */, X86::VPSUBUSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21059 { 15323 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21060 { 15323 /* vpsubusb */, X86::VPSUBUSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21061 { 15323 /* vpsubusb */, X86::VPSUBUSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21062 { 15323 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21063 { 15332 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21064 { 15332 /* vpsubusw */, X86::VPSUBUSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21065 { 15332 /* vpsubusw */, X86::VPSUBUSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21066 { 15332 /* vpsubusw */, X86::VPSUBUSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21067 { 15332 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21068 { 15332 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21069 { 15332 /* vpsubusw */, X86::VPSUBUSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21070 { 15332 /* vpsubusw */, X86::VPSUBUSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21071 { 15332 /* vpsubusw */, X86::VPSUBUSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21072 { 15332 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21073 { 15332 /* vpsubusw */, X86::VPSUBUSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21074 { 15332 /* vpsubusw */, X86::VPSUBUSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21075 { 15332 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21076 { 15332 /* vpsubusw */, X86::VPSUBUSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21077 { 15332 /* vpsubusw */, X86::VPSUBUSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21078 { 15332 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21079 { 15332 /* vpsubusw */, X86::VPSUBUSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21080 { 15332 /* vpsubusw */, X86::VPSUBUSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21081 { 15332 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21082 { 15332 /* vpsubusw */, X86::VPSUBUSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21083 { 15332 /* vpsubusw */, X86::VPSUBUSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21084 { 15332 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21085 { 15341 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21086 { 15341 /* vpsubw */, X86::VPSUBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21087 { 15341 /* vpsubw */, X86::VPSUBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21088 { 15341 /* vpsubw */, X86::VPSUBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21089 { 15341 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21090 { 15341 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21091 { 15341 /* vpsubw */, X86::VPSUBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21092 { 15341 /* vpsubw */, X86::VPSUBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21093 { 15341 /* vpsubw */, X86::VPSUBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21094 { 15341 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21095 { 15341 /* vpsubw */, X86::VPSUBWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21096 { 15341 /* vpsubw */, X86::VPSUBWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21097 { 15341 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21098 { 15341 /* vpsubw */, X86::VPSUBWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21099 { 15341 /* vpsubw */, X86::VPSUBWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21100 { 15341 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21101 { 15341 /* vpsubw */, X86::VPSUBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21102 { 15341 /* vpsubw */, X86::VPSUBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21103 { 15341 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21104 { 15341 /* vpsubw */, X86::VPSUBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21105 { 15341 /* vpsubw */, X86::VPSUBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21106 { 15341 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21107 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21108 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21109 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21110 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21111 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21112 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21113 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21114 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21115 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21116 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21117 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21118 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21119 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21120 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21121 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21122 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21123 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21124 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21125 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21126 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21127 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21128 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21129 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21130 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21131 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21132 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21133 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21134 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21135 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21136 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21137 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21138 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21139 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21140 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21141 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21142 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21143 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21144 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21145 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21146 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21147 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21148 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21149 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21150 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21151 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21152 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21153 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21154 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21155 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21156 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21157 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21158 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21159 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21160 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21161 { 15370 /* vptest */, X86::VPTESTrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
21162 { 15370 /* vptest */, X86::VPTESTYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
21163 { 15370 /* vptest */, X86::VPTESTrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
21164 { 15370 /* vptest */, X86::VPTESTYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
21165 { 15377 /* vptestmb */, X86::VPTESTMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
21166 { 15377 /* vptestmb */, X86::VPTESTMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
21167 { 15377 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21168 { 15377 /* vptestmb */, X86::VPTESTMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
21169 { 15377 /* vptestmb */, X86::VPTESTMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
21170 { 15377 /* vptestmb */, X86::VPTESTMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
21171 { 15377 /* vptestmb */, X86::VPTESTMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21172 { 15377 /* vptestmb */, X86::VPTESTMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21173 { 15377 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21174 { 15377 /* vptestmb */, X86::VPTESTMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21175 { 15377 /* vptestmb */, X86::VPTESTMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21176 { 15377 /* vptestmb */, X86::VPTESTMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21177 { 15386 /* vptestmd */, X86::VPTESTMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
21178 { 15386 /* vptestmd */, X86::VPTESTMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
21179 { 15386 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21180 { 15386 /* vptestmd */, X86::VPTESTMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
21181 { 15386 /* vptestmd */, X86::VPTESTMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
21182 { 15386 /* vptestmd */, X86::VPTESTMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
21183 { 15386 /* vptestmd */, X86::VPTESTMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
21184 { 15386 /* vptestmd */, X86::VPTESTMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
21185 { 15386 /* vptestmd */, X86::VPTESTMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
21186 { 15386 /* vptestmd */, X86::VPTESTMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21187 { 15386 /* vptestmd */, X86::VPTESTMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21188 { 15386 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21189 { 15386 /* vptestmd */, X86::VPTESTMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21190 { 15386 /* vptestmd */, X86::VPTESTMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21191 { 15386 /* vptestmd */, X86::VPTESTMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21192 { 15386 /* vptestmd */, X86::VPTESTMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21193 { 15386 /* vptestmd */, X86::VPTESTMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21194 { 15386 /* vptestmd */, X86::VPTESTMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21195 { 15395 /* vptestmq */, X86::VPTESTMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
21196 { 15395 /* vptestmq */, X86::VPTESTMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
21197 { 15395 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21198 { 15395 /* vptestmq */, X86::VPTESTMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
21199 { 15395 /* vptestmq */, X86::VPTESTMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
21200 { 15395 /* vptestmq */, X86::VPTESTMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
21201 { 15395 /* vptestmq */, X86::VPTESTMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
21202 { 15395 /* vptestmq */, X86::VPTESTMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
21203 { 15395 /* vptestmq */, X86::VPTESTMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
21204 { 15395 /* vptestmq */, X86::VPTESTMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21205 { 15395 /* vptestmq */, X86::VPTESTMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21206 { 15395 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21207 { 15395 /* vptestmq */, X86::VPTESTMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21208 { 15395 /* vptestmq */, X86::VPTESTMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21209 { 15395 /* vptestmq */, X86::VPTESTMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21210 { 15395 /* vptestmq */, X86::VPTESTMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21211 { 15395 /* vptestmq */, X86::VPTESTMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21212 { 15395 /* vptestmq */, X86::VPTESTMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21213 { 15404 /* vptestmw */, X86::VPTESTMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
21214 { 15404 /* vptestmw */, X86::VPTESTMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
21215 { 15404 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21216 { 15404 /* vptestmw */, X86::VPTESTMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
21217 { 15404 /* vptestmw */, X86::VPTESTMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
21218 { 15404 /* vptestmw */, X86::VPTESTMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
21219 { 15404 /* vptestmw */, X86::VPTESTMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21220 { 15404 /* vptestmw */, X86::VPTESTMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21221 { 15404 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21222 { 15404 /* vptestmw */, X86::VPTESTMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21223 { 15404 /* vptestmw */, X86::VPTESTMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21224 { 15404 /* vptestmw */, X86::VPTESTMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21225 { 15413 /* vptestnmb */, X86::VPTESTNMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
21226 { 15413 /* vptestnmb */, X86::VPTESTNMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
21227 { 15413 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21228 { 15413 /* vptestnmb */, X86::VPTESTNMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
21229 { 15413 /* vptestnmb */, X86::VPTESTNMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
21230 { 15413 /* vptestnmb */, X86::VPTESTNMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
21231 { 15413 /* vptestnmb */, X86::VPTESTNMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21232 { 15413 /* vptestnmb */, X86::VPTESTNMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21233 { 15413 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21234 { 15413 /* vptestnmb */, X86::VPTESTNMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21235 { 15413 /* vptestnmb */, X86::VPTESTNMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21236 { 15413 /* vptestnmb */, X86::VPTESTNMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21237 { 15423 /* vptestnmd */, X86::VPTESTNMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
21238 { 15423 /* vptestnmd */, X86::VPTESTNMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
21239 { 15423 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21240 { 15423 /* vptestnmd */, X86::VPTESTNMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
21241 { 15423 /* vptestnmd */, X86::VPTESTNMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
21242 { 15423 /* vptestnmd */, X86::VPTESTNMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
21243 { 15423 /* vptestnmd */, X86::VPTESTNMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
21244 { 15423 /* vptestnmd */, X86::VPTESTNMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
21245 { 15423 /* vptestnmd */, X86::VPTESTNMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
21246 { 15423 /* vptestnmd */, X86::VPTESTNMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21247 { 15423 /* vptestnmd */, X86::VPTESTNMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21248 { 15423 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21249 { 15423 /* vptestnmd */, X86::VPTESTNMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21250 { 15423 /* vptestnmd */, X86::VPTESTNMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21251 { 15423 /* vptestnmd */, X86::VPTESTNMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21252 { 15423 /* vptestnmd */, X86::VPTESTNMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21253 { 15423 /* vptestnmd */, X86::VPTESTNMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21254 { 15423 /* vptestnmd */, X86::VPTESTNMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21255 { 15433 /* vptestnmq */, X86::VPTESTNMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
21256 { 15433 /* vptestnmq */, X86::VPTESTNMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
21257 { 15433 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21258 { 15433 /* vptestnmq */, X86::VPTESTNMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
21259 { 15433 /* vptestnmq */, X86::VPTESTNMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
21260 { 15433 /* vptestnmq */, X86::VPTESTNMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
21261 { 15433 /* vptestnmq */, X86::VPTESTNMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
21262 { 15433 /* vptestnmq */, X86::VPTESTNMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
21263 { 15433 /* vptestnmq */, X86::VPTESTNMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
21264 { 15433 /* vptestnmq */, X86::VPTESTNMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21265 { 15433 /* vptestnmq */, X86::VPTESTNMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21266 { 15433 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21267 { 15433 /* vptestnmq */, X86::VPTESTNMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21268 { 15433 /* vptestnmq */, X86::VPTESTNMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21269 { 15433 /* vptestnmq */, X86::VPTESTNMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21270 { 15433 /* vptestnmq */, X86::VPTESTNMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21271 { 15433 /* vptestnmq */, X86::VPTESTNMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21272 { 15433 /* vptestnmq */, X86::VPTESTNMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21273 { 15443 /* vptestnmw */, X86::VPTESTNMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
21274 { 15443 /* vptestnmw */, X86::VPTESTNMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
21275 { 15443 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21276 { 15443 /* vptestnmw */, X86::VPTESTNMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
21277 { 15443 /* vptestnmw */, X86::VPTESTNMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
21278 { 15443 /* vptestnmw */, X86::VPTESTNMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
21279 { 15443 /* vptestnmw */, X86::VPTESTNMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21280 { 15443 /* vptestnmw */, X86::VPTESTNMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21281 { 15443 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21282 { 15443 /* vptestnmw */, X86::VPTESTNMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21283 { 15443 /* vptestnmw */, X86::VPTESTNMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21284 { 15443 /* vptestnmw */, X86::VPTESTNMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21285 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21286 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21287 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21288 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21289 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21290 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21291 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21292 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21293 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21294 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21295 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21296 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21297 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21298 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21299 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21300 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21301 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21302 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21303 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21304 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21305 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21306 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21307 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21308 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21309 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21310 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21311 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21312 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21313 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21314 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21315 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21316 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21317 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21318 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21319 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21320 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21321 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21322 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21323 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21324 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21325 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21326 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21327 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21328 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21329 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21330 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21331 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21332 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21333 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21334 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21335 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21336 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21337 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21338 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21339 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21340 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21341 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21342 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21343 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21344 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21345 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21346 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21347 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21348 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21349 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21350 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21351 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21352 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21353 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21354 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21355 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21356 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21357 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21358 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21359 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21360 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21361 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21362 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21363 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21364 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21365 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21366 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21367 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21368 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21369 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21370 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21371 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21372 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21373 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21374 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21375 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21376 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21377 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21378 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21379 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21380 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21381 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21382 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21383 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21384 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21385 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21386 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21387 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21388 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21389 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21390 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21391 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21392 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21393 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21394 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21395 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21396 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21397 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21398 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21399 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21400 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21401 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21402 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21403 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21404 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21405 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21406 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21407 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21408 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21409 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21410 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21411 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21412 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21413 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21414 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21415 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21416 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21417 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21418 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21419 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21420 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21421 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21422 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21423 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21424 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21425 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21426 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21427 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21428 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21429 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21430 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21431 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21432 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21433 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21434 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21435 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21436 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21437 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21438 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21439 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21440 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21441 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21442 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21443 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21444 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21445 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21446 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21447 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21448 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21449 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21450 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21451 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21452 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21453 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21454 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21455 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21456 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21457 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21458 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21459 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21460 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21461 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21462 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21463 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21464 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21465 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21466 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21467 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21468 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21469 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21470 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21471 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21472 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21473 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21474 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21475 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21476 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21477 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21478 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21479 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21480 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21481 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21482 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21483 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21484 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21485 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21486 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21487 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21488 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21489 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21490 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21491 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21492 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21493 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21494 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21495 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21496 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21497 { 15543 /* vpxor */, X86::VPXORrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21498 { 15543 /* vpxor */, X86::VPXORYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21499 { 15543 /* vpxor */, X86::VPXORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21500 { 15543 /* vpxor */, X86::VPXORYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21501 { 15549 /* vpxord */, X86::VPXORDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21502 { 15549 /* vpxord */, X86::VPXORDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21503 { 15549 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21504 { 15549 /* vpxord */, X86::VPXORDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21505 { 15549 /* vpxord */, X86::VPXORDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21506 { 15549 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21507 { 15549 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21508 { 15549 /* vpxord */, X86::VPXORDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21509 { 15549 /* vpxord */, X86::VPXORDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21510 { 15549 /* vpxord */, X86::VPXORDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21511 { 15549 /* vpxord */, X86::VPXORDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21512 { 15549 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21513 { 15549 /* vpxord */, X86::VPXORDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21514 { 15549 /* vpxord */, X86::VPXORDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21515 { 15549 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21516 { 15549 /* vpxord */, X86::VPXORDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21517 { 15549 /* vpxord */, X86::VPXORDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21518 { 15549 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21519 { 15549 /* vpxord */, X86::VPXORDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21520 { 15549 /* vpxord */, X86::VPXORDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21521 { 15549 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21522 { 15549 /* vpxord */, X86::VPXORDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21523 { 15549 /* vpxord */, X86::VPXORDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21524 { 15549 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21525 { 15549 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21526 { 15549 /* vpxord */, X86::VPXORDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21527 { 15549 /* vpxord */, X86::VPXORDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21528 { 15556 /* vpxorq */, X86::VPXORQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21529 { 15556 /* vpxorq */, X86::VPXORQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21530 { 15556 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21531 { 15556 /* vpxorq */, X86::VPXORQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21532 { 15556 /* vpxorq */, X86::VPXORQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21533 { 15556 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21534 { 15556 /* vpxorq */, X86::VPXORQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21535 { 15556 /* vpxorq */, X86::VPXORQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21536 { 15556 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21537 { 15556 /* vpxorq */, X86::VPXORQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21538 { 15556 /* vpxorq */, X86::VPXORQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21539 { 15556 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21540 { 15556 /* vpxorq */, X86::VPXORQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21541 { 15556 /* vpxorq */, X86::VPXORQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21542 { 15556 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21543 { 15556 /* vpxorq */, X86::VPXORQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21544 { 15556 /* vpxorq */, X86::VPXORQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21545 { 15556 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21546 { 15556 /* vpxorq */, X86::VPXORQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21547 { 15556 /* vpxorq */, X86::VPXORQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21548 { 15556 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21549 { 15556 /* vpxorq */, X86::VPXORQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21550 { 15556 /* vpxorq */, X86::VPXORQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21551 { 15556 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21552 { 15556 /* vpxorq */, X86::VPXORQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21553 { 15556 /* vpxorq */, X86::VPXORQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21554 { 15556 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21555 { 15563 /* vrangepd */, X86::VRANGEPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21556 { 15563 /* vrangepd */, X86::VRANGEPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21557 { 15563 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21558 { 15563 /* vrangepd */, X86::VRANGEPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21559 { 15563 /* vrangepd */, X86::VRANGEPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21560 { 15563 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21561 { 15563 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21562 { 15563 /* vrangepd */, X86::VRANGEPDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21563 { 15563 /* vrangepd */, X86::VRANGEPDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21564 { 15563 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21565 { 15563 /* vrangepd */, X86::VRANGEPDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21566 { 15563 /* vrangepd */, X86::VRANGEPDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21567 { 15563 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21568 { 15563 /* vrangepd */, X86::VRANGEPDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21569 { 15563 /* vrangepd */, X86::VRANGEPDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21570 { 15563 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21571 { 15563 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21572 { 15563 /* vrangepd */, X86::VRANGEPDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21573 { 15563 /* vrangepd */, X86::VRANGEPDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21574 { 15563 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21575 { 15563 /* vrangepd */, X86::VRANGEPDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21576 { 15563 /* vrangepd */, X86::VRANGEPDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21577 { 15563 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21578 { 15563 /* vrangepd */, X86::VRANGEPDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21579 { 15563 /* vrangepd */, X86::VRANGEPDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21580 { 15563 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21581 { 15563 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21582 { 15563 /* vrangepd */, X86::VRANGEPDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21583 { 15563 /* vrangepd */, X86::VRANGEPDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21584 { 15563 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21585 { 15572 /* vrangeps */, X86::VRANGEPSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21586 { 15572 /* vrangeps */, X86::VRANGEPSZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21587 { 15572 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21588 { 15572 /* vrangeps */, X86::VRANGEPSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21589 { 15572 /* vrangeps */, X86::VRANGEPSZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21590 { 15572 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21591 { 15572 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21592 { 15572 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21593 { 15572 /* vrangeps */, X86::VRANGEPSZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21594 { 15572 /* vrangeps */, X86::VRANGEPSZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21595 { 15572 /* vrangeps */, X86::VRANGEPSZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21596 { 15572 /* vrangeps */, X86::VRANGEPSZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21597 { 15572 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21598 { 15572 /* vrangeps */, X86::VRANGEPSZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21599 { 15572 /* vrangeps */, X86::VRANGEPSZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21600 { 15572 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21601 { 15572 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21602 { 15572 /* vrangeps */, X86::VRANGEPSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21603 { 15572 /* vrangeps */, X86::VRANGEPSZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21604 { 15572 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21605 { 15572 /* vrangeps */, X86::VRANGEPSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21606 { 15572 /* vrangeps */, X86::VRANGEPSZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21607 { 15572 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21608 { 15572 /* vrangeps */, X86::VRANGEPSZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21609 { 15572 /* vrangeps */, X86::VRANGEPSZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21610 { 15572 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21611 { 15572 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21612 { 15572 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21613 { 15572 /* vrangeps */, X86::VRANGEPSZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21614 { 15572 /* vrangeps */, X86::VRANGEPSZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21615 { 15581 /* vrangesd */, X86::VRANGESDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21616 { 15581 /* vrangesd */, X86::VRANGESDZrmi, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
21617 { 15581 /* vrangesd */, X86::VRANGESDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21618 { 15581 /* vrangesd */, X86::VRANGESDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21619 { 15581 /* vrangesd */, X86::VRANGESDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21620 { 15581 /* vrangesd */, X86::VRANGESDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21621 { 15581 /* vrangesd */, X86::VRANGESDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21622 { 15581 /* vrangesd */, X86::VRANGESDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21623 { 15581 /* vrangesd */, X86::VRANGESDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21624 { 15590 /* vrangess */, X86::VRANGESSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21625 { 15590 /* vrangess */, X86::VRANGESSZrmi, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
21626 { 15590 /* vrangess */, X86::VRANGESSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21627 { 15590 /* vrangess */, X86::VRANGESSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21628 { 15590 /* vrangess */, X86::VRANGESSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21629 { 15590 /* vrangess */, X86::VRANGESSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21630 { 15590 /* vrangess */, X86::VRANGESSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21631 { 15590 /* vrangess */, X86::VRANGESSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21632 { 15590 /* vrangess */, X86::VRANGESSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21633 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
21634 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
21635 { 15599 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21636 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
21637 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
21638 { 15599 /* vrcp14pd */, X86::VRCP14PDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21639 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
21640 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
21641 { 15599 /* vrcp14pd */, X86::VRCP14PDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
21642 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21643 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21644 { 15599 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21645 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21646 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21647 { 15599 /* vrcp14pd */, X86::VRCP14PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21648 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21649 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21650 { 15599 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21651 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21652 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21653 { 15599 /* vrcp14pd */, X86::VRCP14PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21654 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21655 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21656 { 15599 /* vrcp14pd */, X86::VRCP14PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21657 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21658 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21659 { 15599 /* vrcp14pd */, X86::VRCP14PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21660 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
21661 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
21662 { 15608 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21663 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
21664 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
21665 { 15608 /* vrcp14ps */, X86::VRCP14PSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21666 { 15608 /* vrcp14ps */, X86::VRCP14PSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
21667 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
21668 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
21669 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21670 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21671 { 15608 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21672 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21673 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21674 { 15608 /* vrcp14ps */, X86::VRCP14PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21675 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21676 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21677 { 15608 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21678 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21679 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21680 { 15608 /* vrcp14ps */, X86::VRCP14PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21681 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21682 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21683 { 15608 /* vrcp14ps */, X86::VRCP14PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21684 { 15608 /* vrcp14ps */, X86::VRCP14PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21685 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21686 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21687 { 15617 /* vrcp14sd */, X86::VRCP14SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21688 { 15617 /* vrcp14sd */, X86::VRCP14SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
21689 { 15617 /* vrcp14sd */, X86::VRCP14SDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21690 { 15617 /* vrcp14sd */, X86::VRCP14SDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21691 { 15617 /* vrcp14sd */, X86::VRCP14SDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21692 { 15617 /* vrcp14sd */, X86::VRCP14SDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21693 { 15626 /* vrcp14ss */, X86::VRCP14SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21694 { 15626 /* vrcp14ss */, X86::VRCP14SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
21695 { 15626 /* vrcp14ss */, X86::VRCP14SSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21696 { 15626 /* vrcp14ss */, X86::VRCP14SSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21697 { 15626 /* vrcp14ss */, X86::VRCP14SSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21698 { 15626 /* vrcp14ss */, X86::VRCP14SSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21699 { 15635 /* vrcp28pd */, X86::VRCP28PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21700 { 15635 /* vrcp28pd */, X86::VRCP28PDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21701 { 15635 /* vrcp28pd */, X86::VRCP28PDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21702 { 15635 /* vrcp28pd */, X86::VRCP28PDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
21703 { 15635 /* vrcp28pd */, X86::VRCP28PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21704 { 15635 /* vrcp28pd */, X86::VRCP28PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21705 { 15635 /* vrcp28pd */, X86::VRCP28PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21706 { 15635 /* vrcp28pd */, X86::VRCP28PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21707 { 15635 /* vrcp28pd */, X86::VRCP28PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21708 { 15635 /* vrcp28pd */, X86::VRCP28PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21709 { 15635 /* vrcp28pd */, X86::VRCP28PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21710 { 15635 /* vrcp28pd */, X86::VRCP28PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21711 { 15644 /* vrcp28ps */, X86::VRCP28PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21712 { 15644 /* vrcp28ps */, X86::VRCP28PSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21713 { 15644 /* vrcp28ps */, X86::VRCP28PSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21714 { 15644 /* vrcp28ps */, X86::VRCP28PSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
21715 { 15644 /* vrcp28ps */, X86::VRCP28PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21716 { 15644 /* vrcp28ps */, X86::VRCP28PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21717 { 15644 /* vrcp28ps */, X86::VRCP28PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21718 { 15644 /* vrcp28ps */, X86::VRCP28PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21719 { 15644 /* vrcp28ps */, X86::VRCP28PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21720 { 15644 /* vrcp28ps */, X86::VRCP28PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21721 { 15644 /* vrcp28ps */, X86::VRCP28PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21722 { 15644 /* vrcp28ps */, X86::VRCP28PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21723 { 15653 /* vrcp28sd */, X86::VRCP28SDZr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21724 { 15653 /* vrcp28sd */, X86::VRCP28SDZm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
21725 { 15653 /* vrcp28sd */, X86::VRCP28SDZrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21726 { 15653 /* vrcp28sd */, X86::VRCP28SDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21727 { 15653 /* vrcp28sd */, X86::VRCP28SDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21728 { 15653 /* vrcp28sd */, X86::VRCP28SDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21729 { 15653 /* vrcp28sd */, X86::VRCP28SDZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21730 { 15653 /* vrcp28sd */, X86::VRCP28SDZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21731 { 15653 /* vrcp28sd */, X86::VRCP28SDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21732 { 15662 /* vrcp28ss */, X86::VRCP28SSZr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21733 { 15662 /* vrcp28ss */, X86::VRCP28SSZm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
21734 { 15662 /* vrcp28ss */, X86::VRCP28SSZrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21735 { 15662 /* vrcp28ss */, X86::VRCP28SSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21736 { 15662 /* vrcp28ss */, X86::VRCP28SSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21737 { 15662 /* vrcp28ss */, X86::VRCP28SSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21738 { 15662 /* vrcp28ss */, X86::VRCP28SSZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21739 { 15662 /* vrcp28ss */, X86::VRCP28SSZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21740 { 15662 /* vrcp28ss */, X86::VRCP28SSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21741 { 15671 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
21742 { 15671 /* vrcpps */, X86::VRCPPSYr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
21743 { 15671 /* vrcpps */, X86::VRCPPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
21744 { 15671 /* vrcpps */, X86::VRCPPSYm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
21745 { 15678 /* vrcpss */, X86::VRCPSSr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21746 { 15678 /* vrcpss */, X86::VRCPSSm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
21747 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
21748 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
21749 { 15685 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21750 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
21751 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
21752 { 15685 /* vreducepd */, X86::VREDUCEPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
21753 { 15685 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21754 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
21755 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
21756 { 15685 /* vreducepd */, X86::VREDUCEPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
21757 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21758 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21759 { 15685 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21760 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21761 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21762 { 15685 /* vreducepd */, X86::VREDUCEPDZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21763 { 15685 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21764 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21765 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21766 { 15685 /* vreducepd */, X86::VREDUCEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21767 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21768 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21769 { 15685 /* vreducepd */, X86::VREDUCEPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21770 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21771 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21772 { 15685 /* vreducepd */, X86::VREDUCEPDZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21773 { 15685 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21774 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21775 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21776 { 15685 /* vreducepd */, X86::VREDUCEPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21777 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
21778 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
21779 { 15695 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21780 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
21781 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
21782 { 15695 /* vreduceps */, X86::VREDUCEPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
21783 { 15695 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21784 { 15695 /* vreduceps */, X86::VREDUCEPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
21785 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
21786 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
21787 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21788 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21789 { 15695 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21790 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21791 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21792 { 15695 /* vreduceps */, X86::VREDUCEPSZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21793 { 15695 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21794 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21795 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21796 { 15695 /* vreduceps */, X86::VREDUCEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21797 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21798 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21799 { 15695 /* vreduceps */, X86::VREDUCEPSZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21800 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21801 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21802 { 15695 /* vreduceps */, X86::VREDUCEPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21803 { 15695 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21804 { 15695 /* vreduceps */, X86::VREDUCEPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21805 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21806 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21807 { 15705 /* vreducesd */, X86::VREDUCESDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21808 { 15705 /* vreducesd */, X86::VREDUCESDZrmi, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
21809 { 15705 /* vreducesd */, X86::VREDUCESDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21810 { 15705 /* vreducesd */, X86::VREDUCESDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21811 { 15705 /* vreducesd */, X86::VREDUCESDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21812 { 15705 /* vreducesd */, X86::VREDUCESDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21813 { 15705 /* vreducesd */, X86::VREDUCESDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21814 { 15705 /* vreducesd */, X86::VREDUCESDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21815 { 15705 /* vreducesd */, X86::VREDUCESDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21816 { 15715 /* vreducess */, X86::VREDUCESSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21817 { 15715 /* vreducess */, X86::VREDUCESSZrmi, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
21818 { 15715 /* vreducess */, X86::VREDUCESSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21819 { 15715 /* vreducess */, X86::VREDUCESSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21820 { 15715 /* vreducess */, X86::VREDUCESSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21821 { 15715 /* vreducess */, X86::VREDUCESSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21822 { 15715 /* vreducess */, X86::VREDUCESSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21823 { 15715 /* vreducess */, X86::VREDUCESSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21824 { 15715 /* vreducess */, X86::VREDUCESSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21825 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
21826 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
21827 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21828 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
21829 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
21830 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
21831 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21832 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
21833 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
21834 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
21835 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21836 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21837 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21838 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21839 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21840 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21841 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21842 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21843 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21844 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21845 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21846 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21847 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21848 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21849 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21850 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21851 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21852 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21853 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21854 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21855 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
21856 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
21857 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21858 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
21859 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
21860 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
21861 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21862 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
21863 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
21864 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
21865 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21866 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21867 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21868 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21869 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21870 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21871 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21872 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21873 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21874 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21875 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21876 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21877 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21878 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21879 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21880 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21881 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21882 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21883 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21884 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21885 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21886 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZm_Int, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
21887 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZrb_Int, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21888 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZr_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21889 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZm_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21890 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21891 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZr_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21892 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZm_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21893 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21894 { 15761 /* vrndscaless */, X86::VRNDSCALESSZr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21895 { 15761 /* vrndscaless */, X86::VRNDSCALESSZm_Int, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
21896 { 15761 /* vrndscaless */, X86::VRNDSCALESSZrb_Int, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21897 { 15761 /* vrndscaless */, X86::VRNDSCALESSZr_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21898 { 15761 /* vrndscaless */, X86::VRNDSCALESSZm_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21899 { 15761 /* vrndscaless */, X86::VRNDSCALESSZrb_Intk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21900 { 15761 /* vrndscaless */, X86::VRNDSCALESSZr_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21901 { 15761 /* vrndscaless */, X86::VRNDSCALESSZm_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21902 { 15761 /* vrndscaless */, X86::VRNDSCALESSZrb_Intkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21903 { 15773 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
21904 { 15773 /* vroundpd */, X86::VROUNDPDYr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
21905 { 15773 /* vroundpd */, X86::VROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
21906 { 15773 /* vroundpd */, X86::VROUNDPDYm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
21907 { 15782 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
21908 { 15782 /* vroundps */, X86::VROUNDPSYr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
21909 { 15782 /* vroundps */, X86::VROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
21910 { 15782 /* vroundps */, X86::VROUNDPSYm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
21911 { 15791 /* vroundsd */, X86::VROUNDSDr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
21912 { 15791 /* vroundsd */, X86::VROUNDSDm_Int, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
21913 { 15800 /* vroundss */, X86::VROUNDSSr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
21914 { 15800 /* vroundss */, X86::VROUNDSSm_Int, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
21915 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
21916 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
21917 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21918 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
21919 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
21920 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21921 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
21922 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
21923 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
21924 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21925 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21926 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21927 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21928 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21929 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21930 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21931 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21932 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21933 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21934 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21935 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21936 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21937 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21938 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21939 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21940 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21941 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21942 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
21943 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
21944 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21945 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
21946 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
21947 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21948 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
21949 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
21950 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
21951 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21952 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21953 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21954 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21955 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21956 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21957 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21958 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21959 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21960 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21961 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21962 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21963 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21964 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21965 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21966 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21967 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21968 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21969 { 15831 /* vrsqrt14sd */, X86::VRSQRT14SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21970 { 15831 /* vrsqrt14sd */, X86::VRSQRT14SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
21971 { 15831 /* vrsqrt14sd */, X86::VRSQRT14SDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21972 { 15831 /* vrsqrt14sd */, X86::VRSQRT14SDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21973 { 15831 /* vrsqrt14sd */, X86::VRSQRT14SDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21974 { 15831 /* vrsqrt14sd */, X86::VRSQRT14SDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21975 { 15842 /* vrsqrt14ss */, X86::VRSQRT14SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21976 { 15842 /* vrsqrt14ss */, X86::VRSQRT14SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
21977 { 15842 /* vrsqrt14ss */, X86::VRSQRT14SSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21978 { 15842 /* vrsqrt14ss */, X86::VRSQRT14SSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21979 { 15842 /* vrsqrt14ss */, X86::VRSQRT14SSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21980 { 15842 /* vrsqrt14ss */, X86::VRSQRT14SSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21981 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21982 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21983 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21984 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
21985 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21986 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21987 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21988 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21989 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21990 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21991 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21992 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21993 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21994 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21995 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21996 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
21997 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21998 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21999 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22000 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22001 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22002 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22003 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22004 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22005 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22006 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
22007 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22008 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22009 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22010 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22011 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22012 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22013 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22014 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22015 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
22016 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22017 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22018 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22019 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22020 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22021 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22022 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22023 { 15897 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22024 { 15897 /* vrsqrtps */, X86::VRSQRTPSYr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
22025 { 15897 /* vrsqrtps */, X86::VRSQRTPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
22026 { 15897 /* vrsqrtps */, X86::VRSQRTPSYm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
22027 { 15906 /* vrsqrtss */, X86::VRSQRTSSr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22028 { 15906 /* vrsqrtss */, X86::VRSQRTSSm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
22029 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22030 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22031 { 15915 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22032 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
22033 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22034 { 15915 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22035 { 15915 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22036 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
22037 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
22038 { 15915 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22039 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22040 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22041 { 15915 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22042 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22043 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22044 { 15915 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22045 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22046 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22047 { 15915 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22048 { 15915 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22049 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22050 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22051 { 15915 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22052 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22053 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22054 { 15915 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22055 { 15915 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22056 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22057 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22058 { 15915 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22059 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22060 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22061 { 15925 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22062 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
22063 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22064 { 15925 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22065 { 15925 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22066 { 15925 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22067 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
22068 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
22069 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22070 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22071 { 15925 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22072 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22073 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22074 { 15925 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22075 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22076 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22077 { 15925 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22078 { 15925 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22079 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22080 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22081 { 15925 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22082 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22083 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22084 { 15925 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22085 { 15925 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22086 { 15925 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22087 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22088 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22089 { 15935 /* vscalefsd */, X86::VSCALEFSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22090 { 15935 /* vscalefsd */, X86::VSCALEFSDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
22091 { 15935 /* vscalefsd */, X86::VSCALEFSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22092 { 15935 /* vscalefsd */, X86::VSCALEFSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22093 { 15935 /* vscalefsd */, X86::VSCALEFSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22094 { 15935 /* vscalefsd */, X86::VSCALEFSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22095 { 15935 /* vscalefsd */, X86::VSCALEFSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22096 { 15935 /* vscalefsd */, X86::VSCALEFSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22097 { 15935 /* vscalefsd */, X86::VSCALEFSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22098 { 15945 /* vscalefss */, X86::VSCALEFSSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22099 { 15945 /* vscalefss */, X86::VSCALEFSSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
22100 { 15945 /* vscalefss */, X86::VSCALEFSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22101 { 15945 /* vscalefss */, X86::VSCALEFSSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22102 { 15945 /* vscalefss */, X86::VSCALEFSSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22103 { 15945 /* vscalefss */, X86::VSCALEFSSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22104 { 15945 /* vscalefss */, X86::VSCALEFSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22105 { 15945 /* vscalefss */, X86::VSCALEFSSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22106 { 15945 /* vscalefss */, X86::VSCALEFSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22107 { 15955 /* vscatterdpd */, X86::VSCATTERDPDZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22108 { 15955 /* vscatterdpd */, X86::VSCATTERDPDZ256mr, Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22109 { 15955 /* vscatterdpd */, X86::VSCATTERDPDZmr, Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22110 { 15967 /* vscatterdps */, X86::VSCATTERDPSZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22111 { 15967 /* vscatterdps */, X86::VSCATTERDPSZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22112 { 15967 /* vscatterdps */, X86::VSCATTERDPSZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22113 { 15979 /* vscatterpf0dpd */, X86::VSCATTERPF0DPDm, Convert__Reg1_2__Mem512_RC256X5_0, AMFBS_None, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22114 { 15994 /* vscatterpf0dps */, X86::VSCATTERPF0DPSm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22115 { 16009 /* vscatterpf0qpd */, X86::VSCATTERPF0QPDm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22116 { 16024 /* vscatterpf0qps */, X86::VSCATTERPF0QPSm, Convert__Reg1_2__Mem256_RC5125_0, AMFBS_None, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22117 { 16039 /* vscatterpf1dpd */, X86::VSCATTERPF1DPDm, Convert__Reg1_2__Mem512_RC256X5_0, AMFBS_None, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22118 { 16054 /* vscatterpf1dps */, X86::VSCATTERPF1DPSm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22119 { 16069 /* vscatterpf1qpd */, X86::VSCATTERPF1QPDm, Convert__Reg1_2__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22120 { 16084 /* vscatterpf1qps */, X86::VSCATTERPF1QPSm, Convert__Reg1_2__Mem256_RC5125_0, AMFBS_None, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22121 { 16099 /* vscatterqpd */, X86::VSCATTERQPDZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22122 { 16099 /* vscatterqpd */, X86::VSCATTERQPDZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22123 { 16099 /* vscatterqpd */, X86::VSCATTERQPDZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22124 { 16111 /* vscatterqps */, X86::VSCATTERQPSZ256mr, Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22125 { 16111 /* vscatterqps */, X86::VSCATTERQPSZ128mr, Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22126 { 16111 /* vscatterqps */, X86::VSCATTERQPSZmr, Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22127 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22128 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22129 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22130 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22131 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22132 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
22133 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22134 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22135 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22136 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22137 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22138 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22139 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22140 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22141 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22142 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22143 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22144 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22145 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22146 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22147 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22148 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22149 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
22150 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22151 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22152 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22153 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22154 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22155 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22156 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22157 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22158 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22159 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22160 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22161 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22162 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22163 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22164 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22165 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22166 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22167 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22168 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
22169 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22170 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22171 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22172 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22173 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22174 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22175 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22176 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22177 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22178 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22179 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22180 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22181 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22182 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22183 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22184 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22185 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
22186 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22187 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22188 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22189 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22190 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22191 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22192 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22193 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22194 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22195 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22196 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22197 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22198 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22199 { 16167 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
22200 { 16167 /* vshufpd */, X86::VSHUFPDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
22201 { 16167 /* vshufpd */, X86::VSHUFPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22202 { 16167 /* vshufpd */, X86::VSHUFPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22203 { 16167 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22204 { 16167 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22205 { 16167 /* vshufpd */, X86::VSHUFPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
22206 { 16167 /* vshufpd */, X86::VSHUFPDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
22207 { 16167 /* vshufpd */, X86::VSHUFPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22208 { 16167 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22209 { 16167 /* vshufpd */, X86::VSHUFPDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
22210 { 16167 /* vshufpd */, X86::VSHUFPDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
22211 { 16167 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22212 { 16167 /* vshufpd */, X86::VSHUFPDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22213 { 16167 /* vshufpd */, X86::VSHUFPDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22214 { 16167 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22215 { 16167 /* vshufpd */, X86::VSHUFPDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22216 { 16167 /* vshufpd */, X86::VSHUFPDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22217 { 16167 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22218 { 16167 /* vshufpd */, X86::VSHUFPDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22219 { 16167 /* vshufpd */, X86::VSHUFPDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22220 { 16167 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22221 { 16167 /* vshufpd */, X86::VSHUFPDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22222 { 16167 /* vshufpd */, X86::VSHUFPDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22223 { 16167 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22224 { 16167 /* vshufpd */, X86::VSHUFPDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22225 { 16167 /* vshufpd */, X86::VSHUFPDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22226 { 16167 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22227 { 16167 /* vshufpd */, X86::VSHUFPDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22228 { 16167 /* vshufpd */, X86::VSHUFPDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22229 { 16167 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22230 { 16175 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
22231 { 16175 /* vshufps */, X86::VSHUFPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
22232 { 16175 /* vshufps */, X86::VSHUFPSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22233 { 16175 /* vshufps */, X86::VSHUFPSZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22234 { 16175 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22235 { 16175 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22236 { 16175 /* vshufps */, X86::VSHUFPSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
22237 { 16175 /* vshufps */, X86::VSHUFPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
22238 { 16175 /* vshufps */, X86::VSHUFPSZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22239 { 16175 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22240 { 16175 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22241 { 16175 /* vshufps */, X86::VSHUFPSZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
22242 { 16175 /* vshufps */, X86::VSHUFPSZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
22243 { 16175 /* vshufps */, X86::VSHUFPSZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22244 { 16175 /* vshufps */, X86::VSHUFPSZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22245 { 16175 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22246 { 16175 /* vshufps */, X86::VSHUFPSZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22247 { 16175 /* vshufps */, X86::VSHUFPSZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22248 { 16175 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22249 { 16175 /* vshufps */, X86::VSHUFPSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22250 { 16175 /* vshufps */, X86::VSHUFPSZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22251 { 16175 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22252 { 16175 /* vshufps */, X86::VSHUFPSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22253 { 16175 /* vshufps */, X86::VSHUFPSZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22254 { 16175 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22255 { 16175 /* vshufps */, X86::VSHUFPSZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22256 { 16175 /* vshufps */, X86::VSHUFPSZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22257 { 16175 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22258 { 16175 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22259 { 16175 /* vshufps */, X86::VSHUFPSZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22260 { 16175 /* vshufps */, X86::VSHUFPSZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22261 { 16183 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22262 { 16183 /* vsqrtpd */, X86::VSQRTPDYr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
22263 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
22264 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
22265 { 16183 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
22266 { 16183 /* vsqrtpd */, X86::VSQRTPDm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
22267 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
22268 { 16183 /* vsqrtpd */, X86::VSQRTPDYm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
22269 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
22270 { 16183 /* vsqrtpd */, X86::VSQRTPDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
22271 { 16183 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
22272 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
22273 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256mb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
22274 { 16183 /* vsqrtpd */, X86::VSQRTPDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
22275 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22276 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22277 { 16183 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22278 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22279 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22280 { 16183 /* vsqrtpd */, X86::VSQRTPDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22281 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22282 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22283 { 16183 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22284 { 16183 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22285 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22286 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22287 { 16183 /* vsqrtpd */, X86::VSQRTPDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22288 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22289 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22290 { 16183 /* vsqrtpd */, X86::VSQRTPDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22291 { 16183 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22292 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22293 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22294 { 16183 /* vsqrtpd */, X86::VSQRTPDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22295 { 16191 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22296 { 16191 /* vsqrtps */, X86::VSQRTPSYr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
22297 { 16191 /* vsqrtps */, X86::VSQRTPSZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
22298 { 16191 /* vsqrtps */, X86::VSQRTPSZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
22299 { 16191 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
22300 { 16191 /* vsqrtps */, X86::VSQRTPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
22301 { 16191 /* vsqrtps */, X86::VSQRTPSZ128m, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
22302 { 16191 /* vsqrtps */, X86::VSQRTPSYm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
22303 { 16191 /* vsqrtps */, X86::VSQRTPSZ256m, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
22304 { 16191 /* vsqrtps */, X86::VSQRTPSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
22305 { 16191 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
22306 { 16191 /* vsqrtps */, X86::VSQRTPSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
22307 { 16191 /* vsqrtps */, X86::VSQRTPSZ128mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
22308 { 16191 /* vsqrtps */, X86::VSQRTPSZ256mb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
22309 { 16191 /* vsqrtps */, X86::VSQRTPSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22310 { 16191 /* vsqrtps */, X86::VSQRTPSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22311 { 16191 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22312 { 16191 /* vsqrtps */, X86::VSQRTPSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22313 { 16191 /* vsqrtps */, X86::VSQRTPSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22314 { 16191 /* vsqrtps */, X86::VSQRTPSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22315 { 16191 /* vsqrtps */, X86::VSQRTPSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22316 { 16191 /* vsqrtps */, X86::VSQRTPSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22317 { 16191 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22318 { 16191 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22319 { 16191 /* vsqrtps */, X86::VSQRTPSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22320 { 16191 /* vsqrtps */, X86::VSQRTPSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22321 { 16191 /* vsqrtps */, X86::VSQRTPSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22322 { 16191 /* vsqrtps */, X86::VSQRTPSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22323 { 16191 /* vsqrtps */, X86::VSQRTPSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22324 { 16191 /* vsqrtps */, X86::VSQRTPSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22325 { 16191 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22326 { 16191 /* vsqrtps */, X86::VSQRTPSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22327 { 16191 /* vsqrtps */, X86::VSQRTPSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22328 { 16191 /* vsqrtps */, X86::VSQRTPSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22329 { 16199 /* vsqrtsd */, X86::VSQRTSDr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22330 { 16199 /* vsqrtsd */, X86::VSQRTSDZr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22331 { 16199 /* vsqrtsd */, X86::VSQRTSDm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
22332 { 16199 /* vsqrtsd */, X86::VSQRTSDZm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
22333 { 16199 /* vsqrtsd */, X86::VSQRTSDZrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22334 { 16199 /* vsqrtsd */, X86::VSQRTSDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22335 { 16199 /* vsqrtsd */, X86::VSQRTSDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22336 { 16199 /* vsqrtsd */, X86::VSQRTSDZr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22337 { 16199 /* vsqrtsd */, X86::VSQRTSDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22338 { 16199 /* vsqrtsd */, X86::VSQRTSDZm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22339 { 16199 /* vsqrtsd */, X86::VSQRTSDZrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22340 { 16207 /* vsqrtss */, X86::VSQRTSSr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22341 { 16207 /* vsqrtss */, X86::VSQRTSSZr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22342 { 16207 /* vsqrtss */, X86::VSQRTSSm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
22343 { 16207 /* vsqrtss */, X86::VSQRTSSZm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
22344 { 16207 /* vsqrtss */, X86::VSQRTSSZrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22345 { 16207 /* vsqrtss */, X86::VSQRTSSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22346 { 16207 /* vsqrtss */, X86::VSQRTSSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22347 { 16207 /* vsqrtss */, X86::VSQRTSSZr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22348 { 16207 /* vsqrtss */, X86::VSQRTSSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22349 { 16207 /* vsqrtss */, X86::VSQRTSSZm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22350 { 16207 /* vsqrtss */, X86::VSQRTSSZrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22351 { 16215 /* vstmxcsr */, X86::VSTMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
22352 { 16224 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22353 { 16224 /* vsubpd */, X86::VSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
22354 { 16224 /* vsubpd */, X86::VSUBPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22355 { 16224 /* vsubpd */, X86::VSUBPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22356 { 16224 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22357 { 16224 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22358 { 16224 /* vsubpd */, X86::VSUBPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
22359 { 16224 /* vsubpd */, X86::VSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
22360 { 16224 /* vsubpd */, X86::VSUBPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22361 { 16224 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22362 { 16224 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22363 { 16224 /* vsubpd */, X86::VSUBPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
22364 { 16224 /* vsubpd */, X86::VSUBPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
22365 { 16224 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22366 { 16224 /* vsubpd */, X86::VSUBPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22367 { 16224 /* vsubpd */, X86::VSUBPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22368 { 16224 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22369 { 16224 /* vsubpd */, X86::VSUBPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22370 { 16224 /* vsubpd */, X86::VSUBPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22371 { 16224 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22372 { 16224 /* vsubpd */, X86::VSUBPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22373 { 16224 /* vsubpd */, X86::VSUBPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22374 { 16224 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22375 { 16224 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22376 { 16224 /* vsubpd */, X86::VSUBPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22377 { 16224 /* vsubpd */, X86::VSUBPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22378 { 16224 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22379 { 16224 /* vsubpd */, X86::VSUBPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22380 { 16224 /* vsubpd */, X86::VSUBPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22381 { 16224 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22382 { 16224 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22383 { 16224 /* vsubpd */, X86::VSUBPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22384 { 16224 /* vsubpd */, X86::VSUBPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22385 { 16224 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22386 { 16231 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22387 { 16231 /* vsubps */, X86::VSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
22388 { 16231 /* vsubps */, X86::VSUBPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22389 { 16231 /* vsubps */, X86::VSUBPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22390 { 16231 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22391 { 16231 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22392 { 16231 /* vsubps */, X86::VSUBPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
22393 { 16231 /* vsubps */, X86::VSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
22394 { 16231 /* vsubps */, X86::VSUBPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22395 { 16231 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22396 { 16231 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22397 { 16231 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22398 { 16231 /* vsubps */, X86::VSUBPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
22399 { 16231 /* vsubps */, X86::VSUBPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
22400 { 16231 /* vsubps */, X86::VSUBPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22401 { 16231 /* vsubps */, X86::VSUBPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22402 { 16231 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22403 { 16231 /* vsubps */, X86::VSUBPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22404 { 16231 /* vsubps */, X86::VSUBPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22405 { 16231 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22406 { 16231 /* vsubps */, X86::VSUBPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22407 { 16231 /* vsubps */, X86::VSUBPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22408 { 16231 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22409 { 16231 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22410 { 16231 /* vsubps */, X86::VSUBPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22411 { 16231 /* vsubps */, X86::VSUBPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22412 { 16231 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22413 { 16231 /* vsubps */, X86::VSUBPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22414 { 16231 /* vsubps */, X86::VSUBPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22415 { 16231 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22416 { 16231 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22417 { 16231 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22418 { 16231 /* vsubps */, X86::VSUBPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22419 { 16231 /* vsubps */, X86::VSUBPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22420 { 16238 /* vsubsd */, X86::VSUBSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22421 { 16238 /* vsubsd */, X86::VSUBSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22422 { 16238 /* vsubsd */, X86::VSUBSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
22423 { 16238 /* vsubsd */, X86::VSUBSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
22424 { 16238 /* vsubsd */, X86::VSUBSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22425 { 16238 /* vsubsd */, X86::VSUBSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22426 { 16238 /* vsubsd */, X86::VSUBSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22427 { 16238 /* vsubsd */, X86::VSUBSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22428 { 16238 /* vsubsd */, X86::VSUBSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22429 { 16238 /* vsubsd */, X86::VSUBSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22430 { 16238 /* vsubsd */, X86::VSUBSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22431 { 16245 /* vsubss */, X86::VSUBSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22432 { 16245 /* vsubss */, X86::VSUBSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22433 { 16245 /* vsubss */, X86::VSUBSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
22434 { 16245 /* vsubss */, X86::VSUBSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
22435 { 16245 /* vsubss */, X86::VSUBSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22436 { 16245 /* vsubss */, X86::VSUBSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22437 { 16245 /* vsubss */, X86::VSUBSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22438 { 16245 /* vsubss */, X86::VSUBSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22439 { 16245 /* vsubss */, X86::VSUBSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22440 { 16245 /* vsubss */, X86::VSUBSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22441 { 16245 /* vsubss */, X86::VSUBSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22442 { 16252 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22443 { 16252 /* vtestpd */, X86::VTESTPDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
22444 { 16252 /* vtestpd */, X86::VTESTPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
22445 { 16252 /* vtestpd */, X86::VTESTPDYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
22446 { 16260 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22447 { 16260 /* vtestps */, X86::VTESTPSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
22448 { 16260 /* vtestps */, X86::VTESTPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
22449 { 16260 /* vtestps */, X86::VTESTPSYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
22450 { 16268 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22451 { 16268 /* vucomisd */, X86::VUCOMISDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
22452 { 16268 /* vucomisd */, X86::VUCOMISDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
22453 { 16268 /* vucomisd */, X86::VUCOMISDZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
22454 { 16268 /* vucomisd */, X86::VUCOMISDZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
22455 { 16277 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22456 { 16277 /* vucomiss */, X86::VUCOMISSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
22457 { 16277 /* vucomiss */, X86::VUCOMISSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
22458 { 16277 /* vucomiss */, X86::VUCOMISSZrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
22459 { 16277 /* vucomiss */, X86::VUCOMISSZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
22460 { 16286 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22461 { 16286 /* vunpckhpd */, X86::VUNPCKHPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
22462 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22463 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22464 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22465 { 16286 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22466 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
22467 { 16286 /* vunpckhpd */, X86::VUNPCKHPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
22468 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22469 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22470 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
22471 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
22472 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22473 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22474 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22475 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22476 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22477 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22478 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22479 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22480 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22481 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22482 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22483 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22484 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22485 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22486 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22487 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22488 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22489 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22490 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22491 { 16296 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22492 { 16296 /* vunpckhps */, X86::VUNPCKHPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
22493 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22494 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22495 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22496 { 16296 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22497 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
22498 { 16296 /* vunpckhps */, X86::VUNPCKHPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
22499 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22500 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22501 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22502 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
22503 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
22504 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22505 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22506 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22507 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22508 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22509 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22510 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22511 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22512 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22513 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22514 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22515 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22516 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22517 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22518 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22519 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22520 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22521 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22522 { 16306 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22523 { 16306 /* vunpcklpd */, X86::VUNPCKLPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
22524 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22525 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22526 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22527 { 16306 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22528 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
22529 { 16306 /* vunpcklpd */, X86::VUNPCKLPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
22530 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22531 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22532 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
22533 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
22534 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22535 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22536 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22537 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22538 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22539 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22540 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22541 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22542 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22543 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22544 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22545 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22546 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22547 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22548 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22549 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22550 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22551 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22552 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22553 { 16316 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22554 { 16316 /* vunpcklps */, X86::VUNPCKLPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
22555 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22556 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22557 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22558 { 16316 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22559 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
22560 { 16316 /* vunpcklps */, X86::VUNPCKLPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
22561 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22562 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22563 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22564 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
22565 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
22566 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22567 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22568 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22569 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22570 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22571 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22572 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22573 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22574 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22575 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22576 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22577 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22578 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22579 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22580 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22581 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22582 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22583 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22584 { 16326 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22585 { 16326 /* vxorpd */, X86::VXORPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
22586 { 16326 /* vxorpd */, X86::VXORPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22587 { 16326 /* vxorpd */, X86::VXORPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22588 { 16326 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22589 { 16326 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22590 { 16326 /* vxorpd */, X86::VXORPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
22591 { 16326 /* vxorpd */, X86::VXORPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
22592 { 16326 /* vxorpd */, X86::VXORPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22593 { 16326 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22594 { 16326 /* vxorpd */, X86::VXORPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
22595 { 16326 /* vxorpd */, X86::VXORPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
22596 { 16326 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22597 { 16326 /* vxorpd */, X86::VXORPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22598 { 16326 /* vxorpd */, X86::VXORPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22599 { 16326 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22600 { 16326 /* vxorpd */, X86::VXORPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22601 { 16326 /* vxorpd */, X86::VXORPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22602 { 16326 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22603 { 16326 /* vxorpd */, X86::VXORPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22604 { 16326 /* vxorpd */, X86::VXORPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22605 { 16326 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22606 { 16326 /* vxorpd */, X86::VXORPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22607 { 16326 /* vxorpd */, X86::VXORPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22608 { 16326 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22609 { 16326 /* vxorpd */, X86::VXORPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22610 { 16326 /* vxorpd */, X86::VXORPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22611 { 16326 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22612 { 16326 /* vxorpd */, X86::VXORPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22613 { 16326 /* vxorpd */, X86::VXORPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22614 { 16326 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22615 { 16333 /* vxorps */, X86::VXORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22616 { 16333 /* vxorps */, X86::VXORPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
22617 { 16333 /* vxorps */, X86::VXORPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
22618 { 16333 /* vxorps */, X86::VXORPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
22619 { 16333 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22620 { 16333 /* vxorps */, X86::VXORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22621 { 16333 /* vxorps */, X86::VXORPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
22622 { 16333 /* vxorps */, X86::VXORPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
22623 { 16333 /* vxorps */, X86::VXORPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
22624 { 16333 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22625 { 16333 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22626 { 16333 /* vxorps */, X86::VXORPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
22627 { 16333 /* vxorps */, X86::VXORPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
22628 { 16333 /* vxorps */, X86::VXORPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22629 { 16333 /* vxorps */, X86::VXORPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22630 { 16333 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22631 { 16333 /* vxorps */, X86::VXORPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22632 { 16333 /* vxorps */, X86::VXORPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22633 { 16333 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22634 { 16333 /* vxorps */, X86::VXORPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22635 { 16333 /* vxorps */, X86::VXORPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22636 { 16333 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22637 { 16333 /* vxorps */, X86::VXORPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22638 { 16333 /* vxorps */, X86::VXORPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22639 { 16333 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22640 { 16333 /* vxorps */, X86::VXORPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22641 { 16333 /* vxorps */, X86::VXORPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22642 { 16333 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22643 { 16333 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22644 { 16333 /* vxorps */, X86::VXORPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22645 { 16333 /* vxorps */, X86::VXORPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22646 { 16340 /* vzeroall */, X86::VZEROALL, Convert_NoOperands, AMFBS_None, { }, },
22647 { 16349 /* vzeroupper */, X86::VZEROUPPER, Convert_NoOperands, AMFBS_None, { }, },
22648 { 16360 /* wait */, X86::WAIT, Convert_NoOperands, AMFBS_None, { }, },
22649 { 16365 /* wbinvd */, X86::WBINVD, Convert_NoOperands, AMFBS_None, { }, },
22650 { 16372 /* wbnoinvd */, X86::WBNOINVD, Convert_NoOperands, AMFBS_None, { }, },
22651 { 16390 /* wrfsbasel */, X86::WRFSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
22652 { 16400 /* wrfsbaseq */, X86::WRFSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
22653 { 16419 /* wrgsbasel */, X86::WRGSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
22654 { 16429 /* wrgsbaseq */, X86::WRGSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
22655 { 16439 /* wrmsr */, X86::WRMSR, Convert_NoOperands, AMFBS_None, { }, },
22656 { 16445 /* wrpkru */, X86::WRPKRUr, Convert_NoOperands, AMFBS_None, { }, },
22657 { 16452 /* wrssd */, X86::WRSSD, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22658 { 16458 /* wrssq */, X86::WRSSQ, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22659 { 16464 /* wrussd */, X86::WRUSSD, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22660 { 16471 /* wrussq */, X86::WRUSSQ, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22661 { 16478 /* xabort */, X86::XABORT, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
22662 { 16485 /* xacquire */, X86::XACQUIRE_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
22663 { 16499 /* xaddb */, X86::XADD8rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22664 { 16499 /* xaddb */, X86::XADD8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
22665 { 16505 /* xaddl */, X86::XADD32rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22666 { 16505 /* xaddl */, X86::XADD32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22667 { 16511 /* xaddq */, X86::XADD64rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22668 { 16511 /* xaddq */, X86::XADD64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22669 { 16517 /* xaddw */, X86::XADD16rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22670 { 16517 /* xaddw */, X86::XADD16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22671 { 16523 /* xbegin */, X86::XBEGIN_2, Convert__AbsMem161_0, AMFBS_None, { MCK_AbsMem16 }, },
22672 { 16523 /* xbegin */, X86::XBEGIN_4, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, },
22673 { 16535 /* xchgb */, X86::XCHG8rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22674 { 16535 /* xchgb */, X86::XCHG8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
22675 { 16535 /* xchgb */, X86::XCHG8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
22676 { 16541 /* xchgl */, X86::XCHG32rr, Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1, AMFBS_In64BitMode, { MCK_EAX, MCK_EAX }, },
22677 { 16541 /* xchgl */, X86::XCHG32ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_EAX, MCK_GR32 }, },
22678 { 16541 /* xchgl */, X86::XCHG32ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_EAX }, },
22679 { 16541 /* xchgl */, X86::XCHG32rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22680 { 16541 /* xchgl */, X86::XCHG32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22681 { 16541 /* xchgl */, X86::XCHG32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
22682 { 16547 /* xchgq */, X86::NOOP, Convert_NoOperands, AMFBS_None, { MCK_RAX, MCK_RAX }, },
22683 { 16547 /* xchgq */, X86::XCHG64ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_RAX, MCK_GR64 }, },
22684 { 16547 /* xchgq */, X86::XCHG64ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_RAX }, },
22685 { 16547 /* xchgq */, X86::XCHG64rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22686 { 16547 /* xchgq */, X86::XCHG64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22687 { 16547 /* xchgq */, X86::XCHG64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
22688 { 16553 /* xchgw */, X86::XCHG16ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_AX, MCK_GR16 }, },
22689 { 16553 /* xchgw */, X86::XCHG16ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_AX }, },
22690 { 16553 /* xchgw */, X86::XCHG16rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22691 { 16553 /* xchgw */, X86::XCHG16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22692 { 16553 /* xchgw */, X86::XCHG16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
22693 { 16559 /* xcryptcbc */, X86::XCRYPTCBC, Convert_NoOperands, AMFBS_None, { }, },
22694 { 16569 /* xcryptcfb */, X86::XCRYPTCFB, Convert_NoOperands, AMFBS_None, { }, },
22695 { 16579 /* xcryptctr */, X86::XCRYPTCTR, Convert_NoOperands, AMFBS_None, { }, },
22696 { 16589 /* xcryptecb */, X86::XCRYPTECB, Convert_NoOperands, AMFBS_None, { }, },
22697 { 16599 /* xcryptofb */, X86::XCRYPTOFB, Convert_NoOperands, AMFBS_None, { }, },
22698 { 16609 /* xend */, X86::XEND, Convert_NoOperands, AMFBS_None, { }, },
22699 { 16614 /* xgetbv */, X86::XGETBV, Convert_NoOperands, AMFBS_None, { }, },
22700 { 16621 /* xlatb */, X86::XLAT, Convert_NoOperands, AMFBS_None, { }, },
22701 { 16631 /* xorb */, X86::XOR8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22702 { 16631 /* xorb */, X86::XOR8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
22703 { 16631 /* xorb */, X86::XOR8i8, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AL }, },
22704 { 16631 /* xorb */, X86::XOR8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
22705 { 16631 /* xorb */, X86::XOR8mi, Convert__Mem85_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem8 }, },
22706 { 16631 /* xorb */, X86::XOR8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
22707 { 16636 /* xorl */, X86::XOR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22708 { 16636 /* xorl */, X86::XOR32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22709 { 16636 /* xorl */, X86::XOR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_EAX }, },
22710 { 16636 /* xorl */, X86::XOR32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
22711 { 16636 /* xorl */, X86::XOR32mi8, Convert__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32 }, },
22712 { 16636 /* xorl */, X86::XOR32i32, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_EAX }, },
22713 { 16636 /* xorl */, X86::XOR32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
22714 { 16636 /* xorl */, X86::XOR32mi, Convert__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32 }, },
22715 { 16636 /* xorl */, X86::XOR32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
22716 { 16641 /* xorpd */, X86::XORPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22717 { 16641 /* xorpd */, X86::XORPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
22718 { 16647 /* xorps */, X86::XORPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22719 { 16647 /* xorps */, X86::XORPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
22720 { 16653 /* xorq */, X86::XOR64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22721 { 16653 /* xorq */, X86::XOR64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22722 { 16653 /* xorq */, X86::XOR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_RAX }, },
22723 { 16653 /* xorq */, X86::XOR64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, AMFBS_None, { MCK_ImmSExti64i8, MCK_GR64 }, },
22724 { 16653 /* xorq */, X86::XOR64mi8, Convert__Mem645_1__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
22725 { 16653 /* xorq */, X86::XOR64i32, Convert__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_RAX }, },
22726 { 16653 /* xorq */, X86::XOR64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, },
22727 { 16653 /* xorq */, X86::XOR64mi32, Convert__Mem645_1__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
22728 { 16653 /* xorq */, X86::XOR64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
22729 { 16658 /* xorw */, X86::XOR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22730 { 16658 /* xorw */, X86::XOR16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22731 { 16658 /* xorw */, X86::XOR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_AX }, },
22732 { 16658 /* xorw */, X86::XOR16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
22733 { 16658 /* xorw */, X86::XOR16mi8, Convert__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16 }, },
22734 { 16658 /* xorw */, X86::XOR16i16, Convert__Imm1_0, AMFBS_None, { MCK_Imm, MCK_AX }, },
22735 { 16658 /* xorw */, X86::XOR16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
22736 { 16658 /* xorw */, X86::XOR16mi, Convert__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16 }, },
22737 { 16658 /* xorw */, X86::XOR16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
22738 { 16663 /* xrelease */, X86::XRELEASE_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
22739 { 16672 /* xresldtrk */, X86::XRESLDTRK, Convert_NoOperands, AMFBS_None, { }, },
22740 { 16682 /* xrstor */, X86::XRSTOR, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
22741 { 16689 /* xrstor64 */, X86::XRSTOR64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
22742 { 16698 /* xrstors */, X86::XRSTORS, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
22743 { 16706 /* xrstors64 */, X86::XRSTORS64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
22744 { 16716 /* xsave */, X86::XSAVE, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
22745 { 16722 /* xsave64 */, X86::XSAVE64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
22746 { 16730 /* xsavec */, X86::XSAVEC, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
22747 { 16737 /* xsavec64 */, X86::XSAVEC64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
22748 { 16746 /* xsaveopt */, X86::XSAVEOPT, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
22749 { 16755 /* xsaveopt64 */, X86::XSAVEOPT64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
22750 { 16766 /* xsaves */, X86::XSAVES, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
22751 { 16773 /* xsaves64 */, X86::XSAVES64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
22752 { 16782 /* xsetbv */, X86::XSETBV, Convert_NoOperands, AMFBS_None, { }, },
22753 { 16789 /* xsha1 */, X86::XSHA1, Convert_NoOperands, AMFBS_None, { }, },
22754 { 16795 /* xsha256 */, X86::XSHA256, Convert_NoOperands, AMFBS_None, { }, },
22755 { 16803 /* xstore */, X86::XSTORE, Convert_NoOperands, AMFBS_None, { }, },
22756 { 16810 /* xstorerng */, X86::XSTORE, Convert_NoOperands, AMFBS_None, { }, },
22757 { 16820 /* xsusldtrk */, X86::XSUSLDTRK, Convert_NoOperands, AMFBS_None, { }, },
22758 { 16830 /* xtest */, X86::XTEST, Convert_NoOperands, AMFBS_None, { }, },
22759};
22760
22761static const MatchEntry MatchTable1[] = {
22762 { 0 /* aaa */, X86::AAA, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
22763 { 4 /* aad */, X86::AAD8i8, Convert__imm_95_10, AMFBS_Not64BitMode, { }, },
22764 { 4 /* aad */, X86::AAD8i8, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, },
22765 { 8 /* aam */, X86::AAM8i8, Convert__imm_95_10, AMFBS_Not64BitMode, { }, },
22766 { 8 /* aam */, X86::AAM8i8, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, },
22767 { 12 /* aas */, X86::AAS, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
22768 { 16 /* adc */, X86::ADC8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, },
22769 { 16 /* adc */, X86::ADC16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, },
22770 { 16 /* adc */, X86::ADC16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, },
22771 { 16 /* adc */, X86::ADC32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, },
22772 { 16 /* adc */, X86::ADC32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, },
22773 { 16 /* adc */, X86::ADC64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, },
22774 { 16 /* adc */, X86::ADC64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, },
22775 { 16 /* adc */, X86::ADC16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22776 { 16 /* adc */, X86::ADC16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
22777 { 16 /* adc */, X86::ADC16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
22778 { 16 /* adc */, X86::ADC16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22779 { 16 /* adc */, X86::ADC32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22780 { 16 /* adc */, X86::ADC32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
22781 { 16 /* adc */, X86::ADC32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
22782 { 16 /* adc */, X86::ADC32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22783 { 16 /* adc */, X86::ADC64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22784 { 16 /* adc */, X86::ADC64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, },
22785 { 16 /* adc */, X86::ADC64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, },
22786 { 16 /* adc */, X86::ADC64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22787 { 16 /* adc */, X86::ADC8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22788 { 16 /* adc */, X86::ADC8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
22789 { 16 /* adc */, X86::ADC8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
22790 { 16 /* adc */, X86::ADC16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
22791 { 16 /* adc */, X86::ADC16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, },
22792 { 16 /* adc */, X86::ADC16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, },
22793 { 16 /* adc */, X86::ADC32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
22794 { 16 /* adc */, X86::ADC32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, },
22795 { 16 /* adc */, X86::ADC32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, },
22796 { 16 /* adc */, X86::ADC64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
22797 { 16 /* adc */, X86::ADC64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
22798 { 16 /* adc */, X86::ADC64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
22799 { 16 /* adc */, X86::ADC8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
22800 { 16 /* adc */, X86::ADC8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, },
22801 { 40 /* adcx */, X86::ADCX32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22802 { 40 /* adcx */, X86::ADCX32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22803 { 40 /* adcx */, X86::ADCX64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22804 { 40 /* adcx */, X86::ADCX64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22805 { 57 /* add */, X86::ADD8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, },
22806 { 57 /* add */, X86::ADD16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, },
22807 { 57 /* add */, X86::ADD16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, },
22808 { 57 /* add */, X86::ADD32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, },
22809 { 57 /* add */, X86::ADD32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, },
22810 { 57 /* add */, X86::ADD64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, },
22811 { 57 /* add */, X86::ADD64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, },
22812 { 57 /* add */, X86::ADD16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22813 { 57 /* add */, X86::ADD16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
22814 { 57 /* add */, X86::ADD16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
22815 { 57 /* add */, X86::ADD16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22816 { 57 /* add */, X86::ADD32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22817 { 57 /* add */, X86::ADD32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
22818 { 57 /* add */, X86::ADD32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
22819 { 57 /* add */, X86::ADD32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22820 { 57 /* add */, X86::ADD64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22821 { 57 /* add */, X86::ADD64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, },
22822 { 57 /* add */, X86::ADD64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, },
22823 { 57 /* add */, X86::ADD64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22824 { 57 /* add */, X86::ADD8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22825 { 57 /* add */, X86::ADD8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
22826 { 57 /* add */, X86::ADD8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
22827 { 57 /* add */, X86::ADD16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
22828 { 57 /* add */, X86::ADD16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, },
22829 { 57 /* add */, X86::ADD16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, },
22830 { 57 /* add */, X86::ADD32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
22831 { 57 /* add */, X86::ADD32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, },
22832 { 57 /* add */, X86::ADD32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, },
22833 { 57 /* add */, X86::ADD64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
22834 { 57 /* add */, X86::ADD64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
22835 { 57 /* add */, X86::ADD64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
22836 { 57 /* add */, X86::ADD8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
22837 { 57 /* add */, X86::ADD8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, },
22838 { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22839 { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22840 { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22841 { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22842 { 88 /* addr16 */, X86::ADDR16_PREFIX, Convert_NoOperands, AMFBS_In32BitMode, { }, },
22843 { 95 /* addr32 */, X86::ADDR32_PREFIX, Convert_NoOperands, AMFBS_In64BitMode, { }, },
22844 { 102 /* addsd */, X86::ADDSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22845 { 102 /* addsd */, X86::ADDSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
22846 { 108 /* addss */, X86::ADDSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22847 { 108 /* addss */, X86::ADDSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
22848 { 114 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22849 { 114 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22850 { 123 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22851 { 123 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22852 { 137 /* adox */, X86::ADOX32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22853 { 137 /* adox */, X86::ADOX32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22854 { 137 /* adox */, X86::ADOX64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22855 { 137 /* adox */, X86::ADOX64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22856 { 154 /* aesdec */, X86::AESDECrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22857 { 154 /* aesdec */, X86::AESDECrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22858 { 161 /* aesdec128kl */, X86::AESDEC128KL, Convert__Reg1_0__Tie0_1_1__Mem5_1, AMFBS_None, { MCK_FR32, MCK_Mem }, },
22859 { 173 /* aesdec256kl */, X86::AESDEC256KL, Convert__Reg1_0__Tie0_1_1__Mem5_1, AMFBS_None, { MCK_FR32, MCK_Mem }, },
22860 { 185 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22861 { 185 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22862 { 196 /* aesdecwide128kl */, X86::AESDECWIDE128KL, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
22863 { 212 /* aesdecwide256kl */, X86::AESDECWIDE256KL, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
22864 { 228 /* aesenc */, X86::AESENCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22865 { 228 /* aesenc */, X86::AESENCrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22866 { 235 /* aesenc128kl */, X86::AESENC128KL, Convert__Reg1_0__Tie0_1_1__Mem5_1, AMFBS_None, { MCK_FR32, MCK_Mem }, },
22867 { 247 /* aesenc256kl */, X86::AESENC256KL, Convert__Reg1_0__Tie0_1_1__Mem5_1, AMFBS_None, { MCK_FR32, MCK_Mem }, },
22868 { 259 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22869 { 259 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22870 { 270 /* aesencwide128kl */, X86::AESENCWIDE128KL, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
22871 { 286 /* aesencwide256kl */, X86::AESENCWIDE256KL, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
22872 { 302 /* aesimc */, X86::AESIMCrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22873 { 302 /* aesimc */, X86::AESIMCrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22874 { 309 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22875 { 309 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22876 { 325 /* and */, X86::AND8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, },
22877 { 325 /* and */, X86::AND16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, },
22878 { 325 /* and */, X86::AND16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, },
22879 { 325 /* and */, X86::AND32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, },
22880 { 325 /* and */, X86::AND32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, },
22881 { 325 /* and */, X86::AND64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, },
22882 { 325 /* and */, X86::AND64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, },
22883 { 325 /* and */, X86::AND16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22884 { 325 /* and */, X86::AND16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
22885 { 325 /* and */, X86::AND16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
22886 { 325 /* and */, X86::AND16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22887 { 325 /* and */, X86::AND32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22888 { 325 /* and */, X86::AND32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
22889 { 325 /* and */, X86::AND32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
22890 { 325 /* and */, X86::AND32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22891 { 325 /* and */, X86::AND64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22892 { 325 /* and */, X86::AND64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, },
22893 { 325 /* and */, X86::AND64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, },
22894 { 325 /* and */, X86::AND64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22895 { 325 /* and */, X86::AND8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22896 { 325 /* and */, X86::AND8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
22897 { 325 /* and */, X86::AND8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
22898 { 325 /* and */, X86::AND16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
22899 { 325 /* and */, X86::AND16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, },
22900 { 325 /* and */, X86::AND16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, },
22901 { 325 /* and */, X86::AND32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
22902 { 325 /* and */, X86::AND32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, },
22903 { 325 /* and */, X86::AND32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, },
22904 { 325 /* and */, X86::AND64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
22905 { 325 /* and */, X86::AND64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
22906 { 325 /* and */, X86::AND64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
22907 { 325 /* and */, X86::AND8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
22908 { 325 /* and */, X86::AND8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, },
22909 { 339 /* andn */, X86::ANDN32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
22910 { 339 /* andn */, X86::ANDN32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
22911 { 339 /* andn */, X86::ANDN64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
22912 { 339 /* andn */, X86::ANDN64rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
22913 { 350 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22914 { 350 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22915 { 357 /* andnps */, X86::ANDNPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22916 { 357 /* andnps */, X86::ANDNPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22917 { 370 /* andpd */, X86::ANDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22918 { 370 /* andpd */, X86::ANDPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22919 { 376 /* andps */, X86::ANDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22920 { 376 /* andps */, X86::ANDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22921 { 392 /* arpl */, X86::ARPL16rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
22922 { 392 /* arpl */, X86::ARPL16mr, Convert__Mem165_0__Reg1_1, AMFBS_Not64BitMode, { MCK_Mem16, MCK_GR16 }, },
22923 { 397 /* bextr */, X86::BEXTR32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
22924 { 397 /* bextr */, X86::BEXTRI32ri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, },
22925 { 397 /* bextr */, X86::BEXTR32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
22926 { 397 /* bextr */, X86::BEXTRI32mi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
22927 { 397 /* bextr */, X86::BEXTR64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
22928 { 397 /* bextr */, X86::BEXTRI64ri, Convert__Reg1_0__Reg1_1__ImmSExti64i321_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i32 }, },
22929 { 397 /* bextr */, X86::BEXTR64rm, Convert__Reg1_0__Mem645_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
22930 { 397 /* bextr */, X86::BEXTRI64mi, Convert__Reg1_0__Mem645_1__ImmSExti64i321_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i32 }, },
22931 { 417 /* blcfill */, X86::BLCFILL32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22932 { 417 /* blcfill */, X86::BLCFILL32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22933 { 417 /* blcfill */, X86::BLCFILL64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22934 { 417 /* blcfill */, X86::BLCFILL64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22935 { 443 /* blci */, X86::BLCI32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22936 { 443 /* blci */, X86::BLCI32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22937 { 443 /* blci */, X86::BLCI64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22938 { 443 /* blci */, X86::BLCI64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22939 { 448 /* blcic */, X86::BLCIC32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22940 { 448 /* blcic */, X86::BLCIC32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22941 { 448 /* blcic */, X86::BLCIC64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22942 { 448 /* blcic */, X86::BLCIC64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22943 { 480 /* blcmsk */, X86::BLCMSK32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22944 { 480 /* blcmsk */, X86::BLCMSK32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22945 { 480 /* blcmsk */, X86::BLCMSK64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22946 { 480 /* blcmsk */, X86::BLCMSK64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22947 { 503 /* blcs */, X86::BLCS32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22948 { 503 /* blcs */, X86::BLCS32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22949 { 503 /* blcs */, X86::BLCS64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22950 { 503 /* blcs */, X86::BLCS64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22951 { 520 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22952 { 520 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22953 { 528 /* blendps */, X86::BLENDPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22954 { 528 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22955 { 536 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22956 { 536 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22957 { 536 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
22958 { 536 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
22959 { 545 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22960 { 545 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22961 { 545 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
22962 { 545 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
22963 { 554 /* blsfill */, X86::BLSFILL32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22964 { 554 /* blsfill */, X86::BLSFILL32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22965 { 554 /* blsfill */, X86::BLSFILL64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22966 { 554 /* blsfill */, X86::BLSFILL64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22967 { 580 /* blsi */, X86::BLSI32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22968 { 580 /* blsi */, X86::BLSI32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22969 { 580 /* blsi */, X86::BLSI64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22970 { 580 /* blsi */, X86::BLSI64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22971 { 585 /* blsic */, X86::BLSIC32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22972 { 585 /* blsic */, X86::BLSIC32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22973 { 585 /* blsic */, X86::BLSIC64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22974 { 585 /* blsic */, X86::BLSIC64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22975 { 617 /* blsmsk */, X86::BLSMSK32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22976 { 617 /* blsmsk */, X86::BLSMSK32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22977 { 617 /* blsmsk */, X86::BLSMSK64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22978 { 617 /* blsmsk */, X86::BLSMSK64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22979 { 640 /* blsr */, X86::BLSR32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22980 { 640 /* blsr */, X86::BLSR32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22981 { 640 /* blsr */, X86::BLSR64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22982 { 640 /* blsr */, X86::BLSR64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
22983 { 657 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
22984 { 657 /* bndcl */, X86::BNDCL64rr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
22985 { 657 /* bndcl */, X86::BNDCL32rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_Mem }, },
22986 { 657 /* bndcl */, X86::BNDCL64rm, Convert__Reg1_0__Mem5_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_Mem }, },
22987 { 663 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
22988 { 663 /* bndcn */, X86::BNDCN64rr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
22989 { 663 /* bndcn */, X86::BNDCN32rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_Mem }, },
22990 { 663 /* bndcn */, X86::BNDCN64rm, Convert__Reg1_0__Mem5_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_Mem }, },
22991 { 669 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
22992 { 669 /* bndcu */, X86::BNDCU64rr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
22993 { 669 /* bndcu */, X86::BNDCU32rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_Mem }, },
22994 { 669 /* bndcu */, X86::BNDCU64rm, Convert__Reg1_0__Mem5_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_Mem }, },
22995 { 675 /* bndldx */, X86::BNDLDXrm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_BNDR, MCK_Mem }, },
22996 { 682 /* bndmk */, X86::BNDMK32rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_Mem }, },
22997 { 682 /* bndmk */, X86::BNDMK64rm, Convert__Reg1_0__Mem5_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_Mem }, },
22998 { 688 /* bndmov */, X86::BNDMOVrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_BNDR, MCK_BNDR }, },
22999 { 688 /* bndmov */, X86::BNDMOV64rm, Convert__Reg1_0__Mem1285_1, AMFBS_In64BitMode, { MCK_BNDR, MCK_Mem128 }, },
23000 { 688 /* bndmov */, X86::BNDMOV32rm, Convert__Reg1_0__Mem645_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_Mem64 }, },
23001 { 688 /* bndmov */, X86::BNDMOV64mr, Convert__Mem1285_0__Reg1_1, AMFBS_In64BitMode, { MCK_Mem128, MCK_BNDR }, },
23002 { 688 /* bndmov */, X86::BNDMOV32mr, Convert__Mem645_0__Reg1_1, AMFBS_Not64BitMode, { MCK_Mem64, MCK_BNDR }, },
23003 { 695 /* bndstx */, X86::BNDSTXmr, Convert__Mem5_0__Reg1_1, AMFBS_None, { MCK_Mem, MCK_BNDR }, },
23004 { 702 /* bound */, X86::BOUNDS16rm, Convert__Reg1_0__Mem165_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
23005 { 702 /* bound */, X86::BOUNDS32rm, Convert__Reg1_0__Mem325_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
23006 { 708 /* bsf */, X86::BSF16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23007 { 708 /* bsf */, X86::BSF16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23008 { 708 /* bsf */, X86::BSF32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23009 { 708 /* bsf */, X86::BSF32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23010 { 708 /* bsf */, X86::BSF64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23011 { 708 /* bsf */, X86::BSF64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23012 { 727 /* bsr */, X86::BSR16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23013 { 727 /* bsr */, X86::BSR16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23014 { 727 /* bsr */, X86::BSR32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23015 { 727 /* bsr */, X86::BSR32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23016 { 727 /* bsr */, X86::BSR64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23017 { 727 /* bsr */, X86::BSR64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23018 { 746 /* bswap */, X86::BSWAP32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
23019 { 746 /* bswap */, X86::BSWAP64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
23020 { 766 /* bt */, X86::BT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23021 { 766 /* bt */, X86::BT16ri8, Convert__Reg1_0__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23022 { 766 /* bt */, X86::BT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23023 { 766 /* bt */, X86::BT32ri8, Convert__Reg1_0__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23024 { 766 /* bt */, X86::BT64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23025 { 766 /* bt */, X86::BT64ri8, Convert__Reg1_0__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23026 { 766 /* bt */, X86::BT16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
23027 { 766 /* bt */, X86::BT16mi8, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23028 { 766 /* bt */, X86::BT32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
23029 { 766 /* bt */, X86::BT32mi8, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23030 { 766 /* bt */, X86::BT64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
23031 { 766 /* bt */, X86::BT64mi8, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23032 { 769 /* btc */, X86::BTC16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23033 { 769 /* btc */, X86::BTC16ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23034 { 769 /* btc */, X86::BTC32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23035 { 769 /* btc */, X86::BTC32ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23036 { 769 /* btc */, X86::BTC64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23037 { 769 /* btc */, X86::BTC64ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23038 { 769 /* btc */, X86::BTC16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
23039 { 769 /* btc */, X86::BTC16mi8, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23040 { 769 /* btc */, X86::BTC32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
23041 { 769 /* btc */, X86::BTC32mi8, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23042 { 769 /* btc */, X86::BTC64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
23043 { 769 /* btc */, X86::BTC64mi8, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23044 { 796 /* btr */, X86::BTR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23045 { 796 /* btr */, X86::BTR16ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23046 { 796 /* btr */, X86::BTR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23047 { 796 /* btr */, X86::BTR32ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23048 { 796 /* btr */, X86::BTR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23049 { 796 /* btr */, X86::BTR64ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23050 { 796 /* btr */, X86::BTR16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
23051 { 796 /* btr */, X86::BTR16mi8, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23052 { 796 /* btr */, X86::BTR32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
23053 { 796 /* btr */, X86::BTR32mi8, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23054 { 796 /* btr */, X86::BTR64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
23055 { 796 /* btr */, X86::BTR64mi8, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23056 { 815 /* bts */, X86::BTS16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23057 { 815 /* bts */, X86::BTS16ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23058 { 815 /* bts */, X86::BTS32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23059 { 815 /* bts */, X86::BTS32ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23060 { 815 /* bts */, X86::BTS64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23061 { 815 /* bts */, X86::BTS64ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23062 { 815 /* bts */, X86::BTS16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
23063 { 815 /* bts */, X86::BTS16mi8, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23064 { 815 /* bts */, X86::BTS32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
23065 { 815 /* bts */, X86::BTS32mi8, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23066 { 815 /* bts */, X86::BTS64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
23067 { 815 /* bts */, X86::BTS64mi8, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23068 { 838 /* bzhi */, X86::BZHI32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23069 { 838 /* bzhi */, X86::BZHI32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
23070 { 838 /* bzhi */, X86::BZHI64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
23071 { 838 /* bzhi */, X86::BZHI64rm, Convert__Reg1_0__Mem645_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
23072 { 855 /* call */, X86::CALL16r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16 }, },
23073 { 855 /* call */, X86::CALL32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
23074 { 855 /* call */, X86::CALL64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
23075 { 855 /* call */, X86::CALL64pcrel32, Convert__AbsMem1_0, AMFBS_In64BitMode, { MCK_AbsMem }, },
23076 { 855 /* call */, X86::CALLpcrel32, Convert__AbsMem1_0, AMFBS_Not64BitMode, { MCK_AbsMem }, },
23077 { 855 /* call */, X86::CALLpcrel16, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, },
23078 { 855 /* call */, X86::CALL16m, Convert__Mem165_0, AMFBS_Not64BitMode, { MCK_Mem16 }, },
23079 { 855 /* call */, X86::CALL32m, Convert__Mem325_0, AMFBS_Not64BitMode, { MCK_Mem32 }, },
23080 { 855 /* call */, X86::CALL64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
23081 { 855 /* call */, X86::FARCALL32m, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
23082 { 855 /* call */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, },
23083 { 855 /* call */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, },
23084 { 860 /* calll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, },
23085 { 872 /* callw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, },
23086 { 883 /* cbw */, X86::CBW, Convert_NoOperands, AMFBS_None, { }, },
23087 { 887 /* cdq */, X86::CDQ, Convert_NoOperands, AMFBS_None, { }, },
23088 { 891 /* cdqe */, X86::CDQE, Convert_NoOperands, AMFBS_In64BitMode, { }, },
23089 { 896 /* clac */, X86::CLAC, Convert_NoOperands, AMFBS_None, { }, },
23090 { 901 /* clc */, X86::CLC, Convert_NoOperands, AMFBS_None, { }, },
23091 { 905 /* cld */, X86::CLD, Convert_NoOperands, AMFBS_None, { }, },
23092 { 909 /* cldemote */, X86::CLDEMOTE, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
23093 { 918 /* clflush */, X86::CLFLUSH, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
23094 { 926 /* clflushopt */, X86::CLFLUSHOPT, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
23095 { 937 /* clgi */, X86::CLGI, Convert_NoOperands, AMFBS_None, { }, },
23096 { 942 /* cli */, X86::CLI, Convert_NoOperands, AMFBS_None, { }, },
23097 { 946 /* clr */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR16 }, },
23098 { 946 /* clr */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32 }, },
23099 { 946 /* clr */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64 }, },
23100 { 946 /* clr */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR8 }, },
23101 { 965 /* clrssbsy */, X86::CLRSSBSY, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23102 { 989 /* clts */, X86::CLTS, Convert_NoOperands, AMFBS_None, { }, },
23103 { 994 /* clui */, X86::CLUI, Convert_NoOperands, AMFBS_In64BitMode, { }, },
23104 { 999 /* clwb */, X86::CLWB, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
23105 { 1004 /* clzero */, X86::CLZERO32r, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
23106 { 1004 /* clzero */, X86::CLZERO64r, Convert_NoOperands, AMFBS_In64BitMode, { }, },
23107 { 1004 /* clzero */, X86::CLZERO32r, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, },
23108 { 1004 /* clzero */, X86::CLZERO64r, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
23109 { 1011 /* cmc */, X86::CMC, Convert_NoOperands, AMFBS_None, { }, },
23110 { 1015 /* cmova */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_7, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23111 { 1015 /* cmova */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_7, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23112 { 1015 /* cmova */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_7, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23113 { 1015 /* cmova */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_7, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23114 { 1015 /* cmova */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_7, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23115 { 1015 /* cmova */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_7, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23116 { 1021 /* cmovae */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_3, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23117 { 1021 /* cmovae */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_3, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23118 { 1021 /* cmovae */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_3, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23119 { 1021 /* cmovae */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_3, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23120 { 1021 /* cmovae */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_3, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23121 { 1021 /* cmovae */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_3, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23122 { 1073 /* cmovb */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23123 { 1073 /* cmovb */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_2, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23124 { 1073 /* cmovb */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23125 { 1073 /* cmovb */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_2, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23126 { 1073 /* cmovb */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_2, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23127 { 1073 /* cmovb */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_2, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23128 { 1079 /* cmovbe */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_6, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23129 { 1079 /* cmovbe */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_6, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23130 { 1079 /* cmovbe */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_6, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23131 { 1079 /* cmovbe */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_6, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23132 { 1079 /* cmovbe */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_6, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23133 { 1079 /* cmovbe */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_6, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23134 { 1131 /* cmove */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_4, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23135 { 1131 /* cmove */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_4, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23136 { 1131 /* cmove */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_4, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23137 { 1131 /* cmove */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_4, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23138 { 1131 /* cmove */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_4, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23139 { 1131 /* cmove */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_4, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23140 { 1158 /* cmovg */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_15, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23141 { 1158 /* cmovg */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_15, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23142 { 1158 /* cmovg */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_15, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23143 { 1158 /* cmovg */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_15, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23144 { 1158 /* cmovg */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_15, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23145 { 1158 /* cmovg */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_15, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23146 { 1164 /* cmovge */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_13, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23147 { 1164 /* cmovge */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_13, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23148 { 1164 /* cmovge */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_13, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23149 { 1164 /* cmovge */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_13, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23150 { 1164 /* cmovge */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_13, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23151 { 1164 /* cmovge */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_13, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23152 { 1216 /* cmovl */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_12, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23153 { 1216 /* cmovl */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_12, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23154 { 1216 /* cmovl */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_12, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23155 { 1216 /* cmovl */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_12, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23156 { 1216 /* cmovl */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_12, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23157 { 1216 /* cmovl */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_12, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23158 { 1222 /* cmovle */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_14, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23159 { 1222 /* cmovle */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_14, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23160 { 1222 /* cmovle */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_14, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23161 { 1222 /* cmovle */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_14, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23162 { 1222 /* cmovle */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_14, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23163 { 1222 /* cmovle */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_14, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23164 { 1274 /* cmovne */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_5, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23165 { 1274 /* cmovne */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_5, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23166 { 1274 /* cmovne */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_5, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23167 { 1274 /* cmovne */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_5, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23168 { 1274 /* cmovne */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_5, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23169 { 1274 /* cmovne */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_5, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23170 { 1305 /* cmovno */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23171 { 1305 /* cmovno */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23172 { 1305 /* cmovno */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23173 { 1305 /* cmovno */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23174 { 1305 /* cmovno */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23175 { 1305 /* cmovno */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23176 { 1336 /* cmovnp */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_11, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23177 { 1336 /* cmovnp */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_11, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23178 { 1336 /* cmovnp */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_11, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23179 { 1336 /* cmovnp */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_11, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23180 { 1336 /* cmovnp */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_11, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23181 { 1336 /* cmovnp */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_11, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23182 { 1367 /* cmovns */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_9, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23183 { 1367 /* cmovns */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_9, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23184 { 1367 /* cmovns */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_9, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23185 { 1367 /* cmovns */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_9, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23186 { 1367 /* cmovns */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_9, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23187 { 1367 /* cmovns */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_9, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23188 { 1398 /* cmovo */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23189 { 1398 /* cmovo */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23190 { 1398 /* cmovo */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23191 { 1398 /* cmovo */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23192 { 1398 /* cmovo */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23193 { 1398 /* cmovo */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23194 { 1425 /* cmovp */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_10, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23195 { 1425 /* cmovp */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_10, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23196 { 1425 /* cmovp */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_10, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23197 { 1425 /* cmovp */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_10, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23198 { 1425 /* cmovp */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_10, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23199 { 1425 /* cmovp */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_10, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23200 { 1452 /* cmovs */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_8, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23201 { 1452 /* cmovs */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_8, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23202 { 1452 /* cmovs */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_8, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23203 { 1452 /* cmovs */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_8, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23204 { 1452 /* cmovs */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_8, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23205 { 1452 /* cmovs */, X86::CMOV64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1__imm_95_8, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23206 { 1479 /* cmp */, X86::CMP8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, },
23207 { 1479 /* cmp */, X86::CMP16ri8, Convert__regAX__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, },
23208 { 1479 /* cmp */, X86::CMP16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, },
23209 { 1479 /* cmp */, X86::CMP32ri8, Convert__regEAX__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, },
23210 { 1479 /* cmp */, X86::CMP32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, },
23211 { 1479 /* cmp */, X86::CMP64ri8, Convert__regRAX__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, },
23212 { 1479 /* cmp */, X86::CMP64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, },
23213 { 1479 /* cmp */, X86::CMP16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23214 { 1479 /* cmp */, X86::CMP16ri8, Convert__Reg1_0__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
23215 { 1479 /* cmp */, X86::CMP16ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
23216 { 1479 /* cmp */, X86::CMP16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23217 { 1479 /* cmp */, X86::CMP32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23218 { 1479 /* cmp */, X86::CMP32ri8, Convert__Reg1_0__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
23219 { 1479 /* cmp */, X86::CMP32ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
23220 { 1479 /* cmp */, X86::CMP32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23221 { 1479 /* cmp */, X86::CMP64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23222 { 1479 /* cmp */, X86::CMP64ri8, Convert__Reg1_0__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, },
23223 { 1479 /* cmp */, X86::CMP64ri32, Convert__Reg1_0__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, },
23224 { 1479 /* cmp */, X86::CMP64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23225 { 1479 /* cmp */, X86::CMP8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23226 { 1479 /* cmp */, X86::CMP8ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
23227 { 1479 /* cmp */, X86::CMP8rm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
23228 { 1479 /* cmp */, X86::CMP16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
23229 { 1479 /* cmp */, X86::CMP16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, },
23230 { 1479 /* cmp */, X86::CMP16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, },
23231 { 1479 /* cmp */, X86::CMP32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
23232 { 1479 /* cmp */, X86::CMP32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, },
23233 { 1479 /* cmp */, X86::CMP32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, },
23234 { 1479 /* cmp */, X86::CMP64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
23235 { 1479 /* cmp */, X86::CMP64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
23236 { 1479 /* cmp */, X86::CMP64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
23237 { 1479 /* cmp */, X86::CMP8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
23238 { 1479 /* cmp */, X86::CMP8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, },
23239 { 1493 /* cmppd */, X86::CMPPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23240 { 1493 /* cmppd */, X86::CMPPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23241 { 1499 /* cmpps */, X86::CMPPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23242 { 1499 /* cmpps */, X86::CMPPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23243 { 1510 /* cmps */, X86::CMPSW, Convert__DstIdx161_1__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16, MCK_DstIdx16 }, },
23244 { 1510 /* cmps */, X86::CMPSL, Convert__DstIdx321_1__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32, MCK_DstIdx32 }, },
23245 { 1510 /* cmps */, X86::CMPSQ, Convert__DstIdx641_1__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, },
23246 { 1510 /* cmps */, X86::CMPSB, Convert__DstIdx81_1__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8, MCK_DstIdx8 }, },
23247 { 1515 /* cmpsb */, X86::CMPSB, Convert__DstIdx81_1__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8, MCK_DstIdx8 }, },
23248 { 1521 /* cmpsd */, X86::CMPSL, Convert__DstIdx321_1__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32, MCK_DstIdx32 }, },
23249 { 1521 /* cmpsd */, X86::CMPSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23250 { 1521 /* cmpsd */, X86::CMPSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23251 { 1533 /* cmpsq */, X86::CMPSQ, Convert__DstIdx641_1__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, },
23252 { 1539 /* cmpss */, X86::CMPSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23253 { 1539 /* cmpss */, X86::CMPSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
23254 { 1545 /* cmpsw */, X86::CMPSW, Convert__DstIdx161_1__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16, MCK_DstIdx16 }, },
23255 { 1556 /* cmpxchg */, X86::CMPXCHG16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23256 { 1556 /* cmpxchg */, X86::CMPXCHG32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23257 { 1556 /* cmpxchg */, X86::CMPXCHG64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23258 { 1556 /* cmpxchg */, X86::CMPXCHG8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23259 { 1556 /* cmpxchg */, X86::CMPXCHG16rm, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
23260 { 1556 /* cmpxchg */, X86::CMPXCHG32rm, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
23261 { 1556 /* cmpxchg */, X86::CMPXCHG64rm, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
23262 { 1556 /* cmpxchg */, X86::CMPXCHG8rm, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
23263 { 1564 /* cmpxchg16b */, X86::CMPXCHG16B, Convert__Mem1285_0, AMFBS_In64BitMode, { MCK_Mem128 }, },
23264 { 1575 /* cmpxchg8b */, X86::CMPXCHG8B, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
23265 { 1621 /* comisd */, X86::COMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23266 { 1621 /* comisd */, X86::COMISDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23267 { 1628 /* comiss */, X86::COMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23268 { 1628 /* comiss */, X86::COMISSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23269 { 1635 /* cpuid */, X86::CPUID, Convert_NoOperands, AMFBS_None, { }, },
23270 { 1641 /* cqo */, X86::CQO, Convert_NoOperands, AMFBS_In64BitMode, { }, },
23271 { 1650 /* crc32 */, X86::CRC32r32r16, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR16 }, },
23272 { 1650 /* crc32 */, X86::CRC32r32r32, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23273 { 1650 /* crc32 */, X86::CRC32r32r8, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, },
23274 { 1650 /* crc32 */, X86::CRC32r32m16, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR32, MCK_Mem16 }, },
23275 { 1650 /* crc32 */, X86::CRC32r32m32, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23276 { 1650 /* crc32 */, X86::CRC32r32m8, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR32, MCK_Mem8 }, },
23277 { 1650 /* crc32 */, X86::CRC32r64r64, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23278 { 1650 /* crc32 */, X86::CRC32r64r8, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR8 }, },
23279 { 1650 /* crc32 */, X86::CRC32r64m64, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23280 { 1650 /* crc32 */, X86::CRC32r64m8, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR64, MCK_Mem8 }, },
23281 { 1684 /* cs */, X86::CS_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
23282 { 1687 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23283 { 1687 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23284 { 1696 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23285 { 1696 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23286 { 1705 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23287 { 1705 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23288 { 1714 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
23289 { 1714 /* cvtpd2pi */, X86::MMX_CVTPD2PIirm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR64, MCK_Mem128 }, },
23290 { 1723 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23291 { 1723 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23292 { 1732 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
23293 { 1732 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23294 { 1741 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
23295 { 1741 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23296 { 1750 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23297 { 1750 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23298 { 1759 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23299 { 1759 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23300 { 1768 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
23301 { 1768 /* cvtps2pi */, X86::MMX_CVTPS2PIirm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
23302 { 1777 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23303 { 1777 /* cvtsd2si */, X86::CVTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
23304 { 1777 /* cvtsd2si */, X86::CVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23305 { 1777 /* cvtsd2si */, X86::CVTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23306 { 1806 /* cvtsd2ss */, X86::CVTSD2SSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23307 { 1806 /* cvtsd2ss */, X86::CVTSD2SSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23308 { 1815 /* cvtsi2sd */, X86::CVTSI2SDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
23309 { 1815 /* cvtsi2sd */, X86::CVTSI642SDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
23310 { 1815 /* cvtsi2sd */, X86::CVTSI2SDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23311 { 1815 /* cvtsi2sd */, X86::CVTSI642SDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23312 { 1844 /* cvtsi2ss */, X86::CVTSI2SSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
23313 { 1844 /* cvtsi2ss */, X86::CVTSI642SSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
23314 { 1844 /* cvtsi2ss */, X86::CVTSI2SSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23315 { 1844 /* cvtsi2ss */, X86::CVTSI642SSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23316 { 1873 /* cvtss2sd */, X86::CVTSS2SDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23317 { 1873 /* cvtss2sd */, X86::CVTSS2SDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23318 { 1882 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23319 { 1882 /* cvtss2si */, X86::CVTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23320 { 1882 /* cvtss2si */, X86::CVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23321 { 1882 /* cvtss2si */, X86::CVTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, },
23322 { 1911 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23323 { 1911 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23324 { 1921 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
23325 { 1921 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR64, MCK_Mem128 }, },
23326 { 1931 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23327 { 1931 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23328 { 1941 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
23329 { 1941 /* cvttps2pi */, X86::MMX_CVTTPS2PIirm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
23330 { 1951 /* cvttsd2si */, X86::CVTTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23331 { 1951 /* cvttsd2si */, X86::CVTTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
23332 { 1951 /* cvttsd2si */, X86::CVTTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23333 { 1951 /* cvttsd2si */, X86::CVTTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23334 { 1983 /* cvttss2si */, X86::CVTTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23335 { 1983 /* cvttss2si */, X86::CVTTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23336 { 1983 /* cvttss2si */, X86::CVTTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23337 { 1983 /* cvttss2si */, X86::CVTTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, },
23338 { 2015 /* cwd */, X86::CWD, Convert_NoOperands, AMFBS_None, { }, },
23339 { 2019 /* cwde */, X86::CWDE, Convert_NoOperands, AMFBS_None, { }, },
23340 { 2034 /* daa */, X86::DAA, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
23341 { 2038 /* das */, X86::DAS, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
23342 { 2042 /* data16 */, X86::DATA16_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
23343 { 2049 /* dec */, X86::DEC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, },
23344 { 2049 /* dec */, X86::DEC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
23345 { 2049 /* dec */, X86::DEC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, },
23346 { 2049 /* dec */, X86::DEC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
23347 { 2049 /* dec */, X86::DEC64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
23348 { 2049 /* dec */, X86::DEC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
23349 { 2049 /* dec */, X86::DEC16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23350 { 2049 /* dec */, X86::DEC32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23351 { 2049 /* dec */, X86::DEC64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
23352 { 2049 /* dec */, X86::DEC8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
23353 { 2073 /* div */, X86::DIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
23354 { 2073 /* div */, X86::DIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
23355 { 2073 /* div */, X86::DIV64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
23356 { 2073 /* div */, X86::DIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
23357 { 2073 /* div */, X86::DIV16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23358 { 2073 /* div */, X86::DIV32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23359 { 2073 /* div */, X86::DIV64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
23360 { 2073 /* div */, X86::DIV8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
23361 { 2073 /* div */, X86::DIV8r, Convert__Reg1_1, AMFBS_None, { MCK_AL, MCK_GR8 }, },
23362 { 2073 /* div */, X86::DIV8m, Convert__Mem85_1, AMFBS_None, { MCK_AL, MCK_Mem8 }, },
23363 { 2073 /* div */, X86::DIV16r, Convert__Reg1_1, AMFBS_None, { MCK_AX, MCK_GR16 }, },
23364 { 2073 /* div */, X86::DIV16m, Convert__Mem165_1, AMFBS_None, { MCK_AX, MCK_Mem16 }, },
23365 { 2073 /* div */, X86::DIV32r, Convert__Reg1_1, AMFBS_None, { MCK_EAX, MCK_GR32 }, },
23366 { 2073 /* div */, X86::DIV32m, Convert__Mem325_1, AMFBS_None, { MCK_EAX, MCK_Mem32 }, },
23367 { 2073 /* div */, X86::DIV64r, Convert__Reg1_1, AMFBS_None, { MCK_RAX, MCK_GR64 }, },
23368 { 2073 /* div */, X86::DIV64m, Convert__Mem645_1, AMFBS_None, { MCK_RAX, MCK_Mem64 }, },
23369 { 2087 /* divpd */, X86::DIVPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23370 { 2087 /* divpd */, X86::DIVPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23371 { 2093 /* divps */, X86::DIVPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23372 { 2093 /* divps */, X86::DIVPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23373 { 2104 /* divsd */, X86::DIVSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23374 { 2104 /* divsd */, X86::DIVSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23375 { 2110 /* divss */, X86::DIVSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23376 { 2110 /* divss */, X86::DIVSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23377 { 2121 /* dppd */, X86::DPPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23378 { 2121 /* dppd */, X86::DPPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23379 { 2126 /* dpps */, X86::DPPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23380 { 2126 /* dpps */, X86::DPPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23381 { 2131 /* ds */, X86::DS_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
23382 { 2134 /* emms */, X86::MMX_EMMS, Convert_NoOperands, AMFBS_None, { }, },
23383 { 2139 /* encls */, X86::ENCLS, Convert_NoOperands, AMFBS_None, { }, },
23384 { 2145 /* enclu */, X86::ENCLU, Convert_NoOperands, AMFBS_None, { }, },
23385 { 2151 /* enclv */, X86::ENCLV, Convert_NoOperands, AMFBS_None, { }, },
23386 { 2157 /* encodekey128 */, X86::ENCODEKEY128, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23387 { 2170 /* encodekey256 */, X86::ENCODEKEY256, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23388 { 2183 /* endbr32 */, X86::ENDBR32, Convert_NoOperands, AMFBS_None, { }, },
23389 { 2191 /* endbr64 */, X86::ENDBR64, Convert_NoOperands, AMFBS_None, { }, },
23390 { 2199 /* enqcmd */, X86::ENQCMD16, Convert__Reg1_0__Mem5125_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem512 }, },
23391 { 2199 /* enqcmd */, X86::ENQCMD32, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_GR32, MCK_Mem512 }, },
23392 { 2199 /* enqcmd */, X86::ENQCMD64, Convert__Reg1_0__Mem5125_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem512 }, },
23393 { 2206 /* enqcmds */, X86::ENQCMDS16, Convert__Reg1_0__Mem5125_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem512 }, },
23394 { 2206 /* enqcmds */, X86::ENQCMDS32, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_GR32, MCK_Mem512 }, },
23395 { 2206 /* enqcmds */, X86::ENQCMDS64, Convert__Reg1_0__Mem5125_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem512 }, },
23396 { 2214 /* enter */, X86::ENTER, Convert__Imm1_0__Imm1_1, AMFBS_None, { MCK_Imm, MCK_Imm }, },
23397 { 2220 /* es */, X86::ES_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
23398 { 2223 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
23399 { 2223 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23400 { 2233 /* extrq */, X86::EXTRQ, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23401 { 2233 /* extrq */, X86::EXTRQI, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8, MCK_ImmUnsignedi8 }, },
23402 { 2239 /* f2xm1 */, X86::F2XM1, Convert_NoOperands, AMFBS_None, { }, },
23403 { 2245 /* fabs */, X86::ABS_F, Convert_NoOperands, AMFBS_None, { }, },
23404 { 2250 /* fadd */, X86::ADD_FPrST0, Convert__regST1, AMFBS_None, { }, },
23405 { 2250 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23406 { 2250 /* fadd */, X86::ADD_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23407 { 2250 /* fadd */, X86::ADD_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
23408 { 2250 /* fadd */, X86::ADD_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23409 { 2250 /* fadd */, X86::ADD_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23410 { 2250 /* fadd */, X86::ADD_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23411 { 2261 /* faddp */, X86::ADD_FPrST0, Convert__regST1, AMFBS_None, { }, },
23412 { 2261 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23413 { 2261 /* faddp */, X86::ADD_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23414 { 2261 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23415 { 2261 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23416 { 2273 /* fbld */, X86::FBLDm, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, },
23417 { 2278 /* fbstp */, X86::FBSTPm, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, },
23418 { 2284 /* fchs */, X86::CHS_F, Convert_NoOperands, AMFBS_None, { }, },
23419 { 2289 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23420 { 2296 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23421 { 2304 /* fcmove */, X86::CMOVE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23422 { 2311 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23423 { 2319 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23424 { 2328 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23425 { 2336 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23426 { 2344 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23427 { 2351 /* fcom */, X86::COM_FST0r, Convert__regST1, AMFBS_None, { }, },
23428 { 2351 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23429 { 2351 /* fcom */, X86::FCOM32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23430 { 2351 /* fcom */, X86::FCOM64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
23431 { 2356 /* fcomi */, X86::COM_FIr, Convert__regST1, AMFBS_None, { }, },
23432 { 2356 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23433 { 2356 /* fcomi */, X86::COM_FIr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23434 { 2356 /* fcomi */, X86::COM_FIr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23435 { 2368 /* fcomp */, X86::COMP_FST0r, Convert__regST1, AMFBS_None, { }, },
23436 { 2368 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23437 { 2368 /* fcomp */, X86::FCOMP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23438 { 2368 /* fcomp */, X86::FCOMP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
23439 { 2374 /* fcompi */, X86::COM_FIPr, Convert__regST1, AMFBS_None, { }, },
23440 { 2374 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23441 { 2374 /* fcompi */, X86::COM_FIPr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23442 { 2374 /* fcompi */, X86::COM_FIPr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23443 { 2388 /* fcompp */, X86::FCOMPP, Convert_NoOperands, AMFBS_None, { }, },
23444 { 2408 /* fcos */, X86::FCOS, Convert_NoOperands, AMFBS_None, { }, },
23445 { 2413 /* fdecstp */, X86::FDECSTP, Convert_NoOperands, AMFBS_None, { }, },
23446 { 2421 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23447 { 2421 /* fdiv */, X86::DIV_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23448 { 2421 /* fdiv */, X86::DIV_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
23449 { 2421 /* fdiv */, X86::DIV_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23450 { 2421 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23451 { 2421 /* fdiv */, X86::DIV_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23452 { 2432 /* fdivp */, X86::DIV_FPrST0, Convert__regST1, AMFBS_None, { }, },
23453 { 2432 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23454 { 2432 /* fdivp */, X86::DIV_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23455 { 2432 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23456 { 2432 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23457 { 2438 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23458 { 2438 /* fdivr */, X86::DIVR_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23459 { 2438 /* fdivr */, X86::DIVR_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
23460 { 2438 /* fdivr */, X86::DIVR_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23461 { 2438 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23462 { 2438 /* fdivr */, X86::DIVR_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23463 { 2451 /* fdivrp */, X86::DIVR_FPrST0, Convert__regST1, AMFBS_None, { }, },
23464 { 2451 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23465 { 2451 /* fdivrp */, X86::DIVR_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23466 { 2451 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23467 { 2451 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23468 { 2471 /* femms */, X86::FEMMS, Convert_NoOperands, AMFBS_None, { }, },
23469 { 2477 /* ffree */, X86::FFREE, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23470 { 2483 /* ffreep */, X86::FFREEP, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23471 { 2490 /* fiadd */, X86::ADD_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23472 { 2490 /* fiadd */, X86::ADD_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23473 { 2510 /* ficom */, X86::FICOM16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23474 { 2510 /* ficom */, X86::FICOM32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23475 { 2523 /* ficomp */, X86::FICOMP16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23476 { 2523 /* ficomp */, X86::FICOMP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23477 { 2553 /* fidiv */, X86::DIV_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23478 { 2553 /* fidiv */, X86::DIV_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23479 { 2566 /* fidivr */, X86::DIVR_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23480 { 2566 /* fidivr */, X86::DIVR_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23481 { 2596 /* fild */, X86::ILD_F16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23482 { 2596 /* fild */, X86::ILD_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23483 { 2596 /* fild */, X86::ILD_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
23484 { 2620 /* fimul */, X86::MUL_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23485 { 2620 /* fimul */, X86::MUL_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23486 { 2640 /* fincstp */, X86::FINCSTP, Convert_NoOperands, AMFBS_None, { }, },
23487 { 2648 /* fist */, X86::IST_F16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23488 { 2648 /* fist */, X86::IST_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23489 { 2659 /* fistp */, X86::IST_FP16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23490 { 2659 /* fistp */, X86::IST_FP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23491 { 2659 /* fistp */, X86::IST_FP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
23492 { 2693 /* fisttp */, X86::ISTT_FP16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23493 { 2693 /* fisttp */, X86::ISTT_FP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23494 { 2693 /* fisttp */, X86::ISTT_FP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
23495 { 2725 /* fisub */, X86::SUB_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23496 { 2725 /* fisub */, X86::SUB_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23497 { 2738 /* fisubr */, X86::SUBR_FI16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23498 { 2738 /* fisubr */, X86::SUBR_FI32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23499 { 2768 /* fld */, X86::LD_Frr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23500 { 2768 /* fld */, X86::LD_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23501 { 2768 /* fld */, X86::LD_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
23502 { 2768 /* fld */, X86::LD_F80m, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, },
23503 { 2772 /* fld1 */, X86::LD_F1, Convert_NoOperands, AMFBS_None, { }, },
23504 { 2777 /* fldcw */, X86::FLDCW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23505 { 2783 /* fldenv */, X86::FLDENVm, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
23506 { 2795 /* fldl2e */, X86::FLDL2E, Convert_NoOperands, AMFBS_None, { }, },
23507 { 2802 /* fldl2t */, X86::FLDL2T, Convert_NoOperands, AMFBS_None, { }, },
23508 { 2809 /* fldlg2 */, X86::FLDLG2, Convert_NoOperands, AMFBS_None, { }, },
23509 { 2816 /* fldln2 */, X86::FLDLN2, Convert_NoOperands, AMFBS_None, { }, },
23510 { 2823 /* fldpi */, X86::FLDPI, Convert_NoOperands, AMFBS_None, { }, },
23511 { 2839 /* fldz */, X86::LD_F0, Convert_NoOperands, AMFBS_None, { }, },
23512 { 2844 /* fmul */, X86::MUL_FPrST0, Convert__regST1, AMFBS_None, { }, },
23513 { 2844 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23514 { 2844 /* fmul */, X86::MUL_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23515 { 2844 /* fmul */, X86::MUL_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
23516 { 2844 /* fmul */, X86::MUL_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23517 { 2844 /* fmul */, X86::MUL_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23518 { 2844 /* fmul */, X86::MUL_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23519 { 2855 /* fmulp */, X86::MUL_FPrST0, Convert__regST1, AMFBS_None, { }, },
23520 { 2855 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23521 { 2855 /* fmulp */, X86::MUL_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23522 { 2855 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23523 { 2855 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23524 { 2867 /* fnclex */, X86::FNCLEX, Convert_NoOperands, AMFBS_None, { }, },
23525 { 2874 /* fninit */, X86::FNINIT, Convert_NoOperands, AMFBS_None, { }, },
23526 { 2881 /* fnop */, X86::FNOP, Convert_NoOperands, AMFBS_None, { }, },
23527 { 2886 /* fnsave */, X86::FSAVEm, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
23528 { 2893 /* fnstcw */, X86::FNSTCW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23529 { 2900 /* fnstenv */, X86::FSTENVm, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
23530 { 2908 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, AMFBS_None, { }, },
23531 { 2908 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, AMFBS_None, { MCK_AX }, },
23532 { 2908 /* fnstsw */, X86::FNSTSWm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23533 { 2915 /* fpatan */, X86::FPATAN, Convert_NoOperands, AMFBS_None, { }, },
23534 { 2922 /* fprem */, X86::FPREM, Convert_NoOperands, AMFBS_None, { }, },
23535 { 2928 /* fprem1 */, X86::FPREM1, Convert_NoOperands, AMFBS_None, { }, },
23536 { 2935 /* fptan */, X86::FPTAN, Convert_NoOperands, AMFBS_None, { }, },
23537 { 2941 /* frndint */, X86::FRNDINT, Convert_NoOperands, AMFBS_None, { }, },
23538 { 2949 /* frstor */, X86::FRSTORm, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
23539 { 2956 /* fs */, X86::FS_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
23540 { 2959 /* fscale */, X86::FSCALE, Convert_NoOperands, AMFBS_None, { }, },
23541 { 2966 /* fsin */, X86::FSIN, Convert_NoOperands, AMFBS_None, { }, },
23542 { 2971 /* fsincos */, X86::FSINCOS, Convert_NoOperands, AMFBS_None, { }, },
23543 { 2979 /* fsqrt */, X86::SQRT_F, Convert_NoOperands, AMFBS_None, { }, },
23544 { 2985 /* fst */, X86::ST_Frr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23545 { 2985 /* fst */, X86::ST_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23546 { 2985 /* fst */, X86::ST_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
23547 { 2994 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23548 { 2994 /* fstp */, X86::ST_FP32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23549 { 2994 /* fstp */, X86::ST_FP64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
23550 { 2994 /* fstp */, X86::ST_FP80m, Convert__Mem805_0, AMFBS_None, { MCK_Mem80 }, },
23551 { 3022 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23552 { 3022 /* fsub */, X86::SUB_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23553 { 3022 /* fsub */, X86::SUB_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
23554 { 3022 /* fsub */, X86::SUB_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23555 { 3022 /* fsub */, X86::SUB_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23556 { 3022 /* fsub */, X86::SUB_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23557 { 3033 /* fsubp */, X86::SUB_FPrST0, Convert__regST1, AMFBS_None, { }, },
23558 { 3033 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23559 { 3033 /* fsubp */, X86::SUB_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23560 { 3033 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23561 { 3033 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23562 { 3039 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23563 { 3039 /* fsubr */, X86::SUBR_F32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23564 { 3039 /* fsubr */, X86::SUBR_F64m, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
23565 { 3039 /* fsubr */, X86::SUBR_FST0r, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23566 { 3039 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23567 { 3039 /* fsubr */, X86::SUBR_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23568 { 3052 /* fsubrp */, X86::SUBR_FPrST0, Convert__regST1, AMFBS_None, { }, },
23569 { 3052 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23570 { 3052 /* fsubrp */, X86::SUBR_FPrST0, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23571 { 3052 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23572 { 3052 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23573 { 3072 /* ftst */, X86::TST_F, Convert_NoOperands, AMFBS_None, { }, },
23574 { 3077 /* fucom */, X86::UCOM_Fr, Convert__regST1, AMFBS_None, { }, },
23575 { 3077 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23576 { 3083 /* fucomi */, X86::UCOM_FIr, Convert__regST1, AMFBS_None, { }, },
23577 { 3083 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23578 { 3083 /* fucomi */, X86::UCOM_FIr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23579 { 3083 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23580 { 3090 /* fucomp */, X86::UCOM_FPr, Convert__regST1, AMFBS_None, { }, },
23581 { 3090 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23582 { 3097 /* fucompi */, X86::UCOM_FIPr, Convert__regST1, AMFBS_None, { }, },
23583 { 3097 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23584 { 3097 /* fucompi */, X86::UCOM_FIPr, Convert__regST0, AMFBS_None, { MCK_ST0, MCK_ST0 }, },
23585 { 3097 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23586 { 3105 /* fucompp */, X86::UCOM_FPPr, Convert_NoOperands, AMFBS_None, { }, },
23587 { 3113 /* fxam */, X86::FXAM, Convert_NoOperands, AMFBS_None, { }, },
23588 { 3118 /* fxch */, X86::XCH_F, Convert__regST1, AMFBS_None, { }, },
23589 { 3118 /* fxch */, X86::XCH_F, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23590 { 3123 /* fxrstor */, X86::FXRSTOR, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
23591 { 3131 /* fxrstor64 */, X86::FXRSTOR64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
23592 { 3141 /* fxsave */, X86::FXSAVE, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
23593 { 3148 /* fxsave64 */, X86::FXSAVE64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
23594 { 3157 /* fxtract */, X86::FXTRACT, Convert_NoOperands, AMFBS_None, { }, },
23595 { 3165 /* fyl2x */, X86::FYL2X, Convert_NoOperands, AMFBS_None, { }, },
23596 { 3171 /* fyl2xp1 */, X86::FYL2XP1, Convert_NoOperands, AMFBS_None, { }, },
23597 { 3179 /* getsec */, X86::GETSEC, Convert_NoOperands, AMFBS_None, { }, },
23598 { 3186 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23599 { 3186 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23600 { 3203 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23601 { 3203 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23602 { 3217 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23603 { 3217 /* gf2p8mulb */, X86::GF2P8MULBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23604 { 3227 /* gs */, X86::GS_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
23605 { 3230 /* haddpd */, X86::HADDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23606 { 3230 /* haddpd */, X86::HADDPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23607 { 3237 /* haddps */, X86::HADDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23608 { 3237 /* haddps */, X86::HADDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23609 { 3244 /* hlt */, X86::HLT, Convert_NoOperands, AMFBS_None, { }, },
23610 { 3248 /* hreset */, X86::HRESET, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
23611 { 3255 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23612 { 3255 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23613 { 3262 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23614 { 3262 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23615 { 3269 /* idiv */, X86::IDIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
23616 { 3269 /* idiv */, X86::IDIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
23617 { 3269 /* idiv */, X86::IDIV64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
23618 { 3269 /* idiv */, X86::IDIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
23619 { 3269 /* idiv */, X86::IDIV16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23620 { 3269 /* idiv */, X86::IDIV32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23621 { 3269 /* idiv */, X86::IDIV64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
23622 { 3269 /* idiv */, X86::IDIV8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
23623 { 3269 /* idiv */, X86::IDIV8r, Convert__Reg1_1, AMFBS_None, { MCK_AL, MCK_GR8 }, },
23624 { 3269 /* idiv */, X86::IDIV8m, Convert__Mem85_1, AMFBS_None, { MCK_AL, MCK_Mem8 }, },
23625 { 3269 /* idiv */, X86::IDIV16r, Convert__Reg1_1, AMFBS_None, { MCK_AX, MCK_GR16 }, },
23626 { 3269 /* idiv */, X86::IDIV16m, Convert__Mem165_1, AMFBS_None, { MCK_AX, MCK_Mem16 }, },
23627 { 3269 /* idiv */, X86::IDIV32r, Convert__Reg1_1, AMFBS_None, { MCK_EAX, MCK_GR32 }, },
23628 { 3269 /* idiv */, X86::IDIV32m, Convert__Mem325_1, AMFBS_None, { MCK_EAX, MCK_Mem32 }, },
23629 { 3269 /* idiv */, X86::IDIV64r, Convert__Reg1_1, AMFBS_None, { MCK_RAX, MCK_GR64 }, },
23630 { 3269 /* idiv */, X86::IDIV64m, Convert__Mem645_1, AMFBS_None, { MCK_RAX, MCK_Mem64 }, },
23631 { 3298 /* imul */, X86::IMUL16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
23632 { 3298 /* imul */, X86::IMUL32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
23633 { 3298 /* imul */, X86::IMUL64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
23634 { 3298 /* imul */, X86::IMUL8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
23635 { 3298 /* imul */, X86::IMUL16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23636 { 3298 /* imul */, X86::IMUL32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23637 { 3298 /* imul */, X86::IMUL64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
23638 { 3298 /* imul */, X86::IMUL8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
23639 { 3298 /* imul */, X86::IMUL16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23640 { 3298 /* imul */, X86::IMUL16rri8, Convert__Reg1_0__Reg1_0__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
23641 { 3298 /* imul */, X86::IMUL16rri, Convert__Reg1_0__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
23642 { 3298 /* imul */, X86::IMUL16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23643 { 3298 /* imul */, X86::IMUL32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23644 { 3298 /* imul */, X86::IMUL32rri8, Convert__Reg1_0__Reg1_0__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
23645 { 3298 /* imul */, X86::IMUL32rri, Convert__Reg1_0__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
23646 { 3298 /* imul */, X86::IMUL32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23647 { 3298 /* imul */, X86::IMUL64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23648 { 3298 /* imul */, X86::IMUL64rri8, Convert__Reg1_0__Reg1_0__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, },
23649 { 3298 /* imul */, X86::IMUL64rri32, Convert__Reg1_0__Reg1_0__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, },
23650 { 3298 /* imul */, X86::IMUL64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23651 { 3298 /* imul */, X86::IMUL16rri8, Convert__Reg1_0__Reg1_1__ImmSExti16i81_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_ImmSExti16i8 }, },
23652 { 3298 /* imul */, X86::IMUL16rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_Imm }, },
23653 { 3298 /* imul */, X86::IMUL16rmi8, Convert__Reg1_0__Mem165_1__ImmSExti16i81_2, AMFBS_None, { MCK_GR16, MCK_Mem16, MCK_ImmSExti16i8 }, },
23654 { 3298 /* imul */, X86::IMUL16rmi, Convert__Reg1_0__Mem165_1__Imm1_2, AMFBS_None, { MCK_GR16, MCK_Mem16, MCK_Imm }, },
23655 { 3298 /* imul */, X86::IMUL32rri8, Convert__Reg1_0__Reg1_1__ImmSExti32i81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmSExti32i8 }, },
23656 { 3298 /* imul */, X86::IMUL32rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, },
23657 { 3298 /* imul */, X86::IMUL32rmi8, Convert__Reg1_0__Mem325_1__ImmSExti32i81_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_ImmSExti32i8 }, },
23658 { 3298 /* imul */, X86::IMUL32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
23659 { 3298 /* imul */, X86::IMUL64rri8, Convert__Reg1_0__Reg1_1__ImmSExti64i81_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i8 }, },
23660 { 3298 /* imul */, X86::IMUL64rri32, Convert__Reg1_0__Reg1_1__ImmSExti64i321_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i32 }, },
23661 { 3298 /* imul */, X86::IMUL64rmi8, Convert__Reg1_0__Mem645_1__ImmSExti64i81_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i8 }, },
23662 { 3298 /* imul */, X86::IMUL64rmi32, Convert__Reg1_0__Mem645_1__ImmSExti64i321_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i32 }, },
23663 { 3327 /* in */, X86::IN8rr, Convert_NoOperands, AMFBS_None, { MCK_AL, MCK_DX }, },
23664 { 3327 /* in */, X86::IN8ri, Convert__ImmUnsignedi81_1, AMFBS_None, { MCK_AL, MCK_ImmUnsignedi8 }, },
23665 { 3327 /* in */, X86::IN16rr, Convert_NoOperands, AMFBS_None, { MCK_AX, MCK_DX }, },
23666 { 3327 /* in */, X86::IN16ri, Convert__ImmUnsignedi81_1, AMFBS_None, { MCK_AX, MCK_ImmUnsignedi8 }, },
23667 { 3327 /* in */, X86::IN32rr, Convert_NoOperands, AMFBS_None, { MCK_EAX, MCK_DX }, },
23668 { 3327 /* in */, X86::IN32ri, Convert__ImmUnsignedi81_1, AMFBS_None, { MCK_EAX, MCK_ImmUnsignedi8 }, },
23669 { 3330 /* inb */, X86::IN8rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, },
23670 { 3330 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
23671 { 3334 /* inc */, X86::INC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, },
23672 { 3334 /* inc */, X86::INC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
23673 { 3334 /* inc */, X86::INC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, },
23674 { 3334 /* inc */, X86::INC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
23675 { 3334 /* inc */, X86::INC64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
23676 { 3334 /* inc */, X86::INC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
23677 { 3334 /* inc */, X86::INC16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23678 { 3334 /* inc */, X86::INC32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23679 { 3334 /* inc */, X86::INC64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
23680 { 3334 /* inc */, X86::INC8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
23681 { 3353 /* incsspd */, X86::INCSSPD, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
23682 { 3361 /* incsspq */, X86::INCSSPQ, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
23683 { 3374 /* inl */, X86::IN32rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, },
23684 { 3374 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
23685 { 3378 /* ins */, X86::INSW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16, MCK_DX }, },
23686 { 3378 /* ins */, X86::INSL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32, MCK_DX }, },
23687 { 3378 /* ins */, X86::INSB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8, MCK_DX }, },
23688 { 3382 /* insb */, X86::INSB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8, MCK_DX }, },
23689 { 3387 /* insd */, X86::INSL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32, MCK_DX }, },
23690 { 3392 /* insertps */, X86::INSERTPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23691 { 3392 /* insertps */, X86::INSERTPSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
23692 { 3401 /* insertq */, X86::INSERTQ, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23693 { 3401 /* insertq */, X86::INSERTQI, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8, MCK_ImmUnsignedi8 }, },
23694 { 3414 /* insw */, X86::INSW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16, MCK_DX }, },
23695 { 3419 /* int */, X86::INT, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
23696 { 3423 /* int3 */, X86::INT3, Convert_NoOperands, AMFBS_None, { }, },
23697 { 3428 /* into */, X86::INTO, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
23698 { 3433 /* invd */, X86::INVD, Convert_NoOperands, AMFBS_None, { }, },
23699 { 3438 /* invept */, X86::INVEPT32, Convert__Reg1_0__Mem1285_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
23700 { 3438 /* invept */, X86::INVEPT64, Convert__Reg1_0__Mem1285_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem128 }, },
23701 { 3445 /* invlpg */, X86::INVLPG, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
23702 { 3452 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
23703 { 3452 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
23704 { 3452 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX, MCK_ECX }, },
23705 { 3452 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX, MCK_ECX }, },
23706 { 3460 /* invlpgb */, X86::INVLPGB64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
23707 { 3460 /* invlpgb */, X86::INVLPGB32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX, MCK_EDX }, },
23708 { 3460 /* invlpgb */, X86::INVLPGB64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX, MCK_EDX }, },
23709 { 3468 /* invlpgb} */, X86::INVLPGB32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
23710 { 3477 /* invpcid */, X86::INVPCID32, Convert__Reg1_0__Mem1285_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
23711 { 3477 /* invpcid */, X86::INVPCID64, Convert__Reg1_0__Mem1285_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem128 }, },
23712 { 3485 /* invvpid */, X86::INVVPID32, Convert__Reg1_0__Mem1285_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
23713 { 3485 /* invvpid */, X86::INVVPID64, Convert__Reg1_0__Mem1285_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem128 }, },
23714 { 3493 /* inw */, X86::IN16rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, },
23715 { 3493 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
23716 { 3497 /* iret */, X86::IRET16, Convert_NoOperands, AMFBS_None, { }, },
23717 { 3502 /* iretd */, X86::IRET32, Convert_NoOperands, AMFBS_None, { }, },
23718 { 3514 /* iretq */, X86::IRET64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
23719 { 3526 /* ja */, X86::JCC_1, Convert__AbsMem1_0__imm_95_7, AMFBS_None, { MCK_AbsMem }, },
23720 { 3529 /* jae */, X86::JCC_1, Convert__AbsMem1_0__imm_95_3, AMFBS_None, { MCK_AbsMem }, },
23721 { 3533 /* jb */, X86::JCC_1, Convert__AbsMem1_0__imm_95_2, AMFBS_None, { MCK_AbsMem }, },
23722 { 3536 /* jbe */, X86::JCC_1, Convert__AbsMem1_0__imm_95_6, AMFBS_None, { MCK_AbsMem }, },
23723 { 3540 /* jcxz */, X86::JCXZ, Convert__AbsMem1_0, AMFBS_Not64BitMode, { MCK_AbsMem }, },
23724 { 3545 /* je */, X86::JCC_1, Convert__AbsMem1_0__imm_95_4, AMFBS_None, { MCK_AbsMem }, },
23725 { 3548 /* jecxz */, X86::JECXZ, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, },
23726 { 3554 /* jg */, X86::JCC_1, Convert__AbsMem1_0__imm_95_15, AMFBS_None, { MCK_AbsMem }, },
23727 { 3557 /* jge */, X86::JCC_1, Convert__AbsMem1_0__imm_95_13, AMFBS_None, { MCK_AbsMem }, },
23728 { 3561 /* jl */, X86::JCC_1, Convert__AbsMem1_0__imm_95_12, AMFBS_None, { MCK_AbsMem }, },
23729 { 3564 /* jle */, X86::JCC_1, Convert__AbsMem1_0__imm_95_14, AMFBS_None, { MCK_AbsMem }, },
23730 { 3568 /* jmp */, X86::JMP16r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16 }, },
23731 { 3568 /* jmp */, X86::JMP32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
23732 { 3568 /* jmp */, X86::JMP64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
23733 { 3568 /* jmp */, X86::JMP_1, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, },
23734 { 3568 /* jmp */, X86::JMP16m, Convert__Mem165_0, AMFBS_Not64BitMode, { MCK_Mem16 }, },
23735 { 3568 /* jmp */, X86::JMP32m, Convert__Mem325_0, AMFBS_Not64BitMode, { MCK_Mem32 }, },
23736 { 3568 /* jmp */, X86::JMP64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
23737 { 3568 /* jmp */, X86::FARJMP32m, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
23738 { 3568 /* jmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, },
23739 { 3568 /* jmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, },
23740 { 3572 /* jmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, },
23741 { 3582 /* jmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm, MCK_Imm }, },
23742 { 3587 /* jne */, X86::JCC_1, Convert__AbsMem1_0__imm_95_5, AMFBS_None, { MCK_AbsMem }, },
23743 { 3591 /* jno */, X86::JCC_1, Convert__AbsMem1_0__imm_95_1, AMFBS_None, { MCK_AbsMem }, },
23744 { 3595 /* jnp */, X86::JCC_1, Convert__AbsMem1_0__imm_95_11, AMFBS_None, { MCK_AbsMem }, },
23745 { 3599 /* jns */, X86::JCC_1, Convert__AbsMem1_0__imm_95_9, AMFBS_None, { MCK_AbsMem }, },
23746 { 3603 /* jo */, X86::JCC_1, Convert__AbsMem1_0__imm_95_0, AMFBS_None, { MCK_AbsMem }, },
23747 { 3606 /* jp */, X86::JCC_1, Convert__AbsMem1_0__imm_95_10, AMFBS_None, { MCK_AbsMem }, },
23748 { 3609 /* jrcxz */, X86::JRCXZ, Convert__AbsMem1_0, AMFBS_In64BitMode, { MCK_AbsMem }, },
23749 { 3615 /* js */, X86::JCC_1, Convert__AbsMem1_0__imm_95_8, AMFBS_None, { MCK_AbsMem }, },
23750 { 3618 /* kaddb */, X86::KADDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23751 { 3624 /* kaddd */, X86::KADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23752 { 3630 /* kaddq */, X86::KADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23753 { 3636 /* kaddw */, X86::KADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23754 { 3642 /* kandb */, X86::KANDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23755 { 3648 /* kandd */, X86::KANDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23756 { 3654 /* kandnb */, X86::KANDNBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23757 { 3661 /* kandnd */, X86::KANDNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23758 { 3668 /* kandnq */, X86::KANDNQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23759 { 3675 /* kandnw */, X86::KANDNWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23760 { 3682 /* kandq */, X86::KANDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23761 { 3688 /* kandw */, X86::KANDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23762 { 3694 /* kmovb */, X86::KMOVBkk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23763 { 3694 /* kmovb */, X86::KMOVBkr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_GR32 }, },
23764 { 3694 /* kmovb */, X86::KMOVBkm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_VK1, MCK_Mem8 }, },
23765 { 3694 /* kmovb */, X86::KMOVBrk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VK1 }, },
23766 { 3694 /* kmovb */, X86::KMOVBmk, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_VK1 }, },
23767 { 3700 /* kmovd */, X86::KMOVDkk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23768 { 3700 /* kmovd */, X86::KMOVDkr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_GR32 }, },
23769 { 3700 /* kmovd */, X86::KMOVDkm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VK1, MCK_Mem32 }, },
23770 { 3700 /* kmovd */, X86::KMOVDrk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VK1 }, },
23771 { 3700 /* kmovd */, X86::KMOVDmk, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_VK1 }, },
23772 { 3706 /* kmovq */, X86::KMOVQkk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23773 { 3706 /* kmovq */, X86::KMOVQkr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_GR64 }, },
23774 { 3706 /* kmovq */, X86::KMOVQkm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VK1, MCK_Mem64 }, },
23775 { 3706 /* kmovq */, X86::KMOVQrk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_VK1 }, },
23776 { 3706 /* kmovq */, X86::KMOVQmk, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VK1 }, },
23777 { 3712 /* kmovw */, X86::KMOVWkk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23778 { 3712 /* kmovw */, X86::KMOVWkr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_GR32 }, },
23779 { 3712 /* kmovw */, X86::KMOVWkm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_VK1, MCK_Mem16 }, },
23780 { 3712 /* kmovw */, X86::KMOVWrk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VK1 }, },
23781 { 3712 /* kmovw */, X86::KMOVWmk, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_VK1 }, },
23782 { 3718 /* knotb */, X86::KNOTBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23783 { 3724 /* knotd */, X86::KNOTDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23784 { 3730 /* knotq */, X86::KNOTQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23785 { 3736 /* knotw */, X86::KNOTWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23786 { 3742 /* korb */, X86::KORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23787 { 3747 /* kord */, X86::KORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23788 { 3752 /* korq */, X86::KORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23789 { 3757 /* kortestb */, X86::KORTESTBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23790 { 3766 /* kortestd */, X86::KORTESTDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23791 { 3775 /* kortestq */, X86::KORTESTQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23792 { 3784 /* kortestw */, X86::KORTESTWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23793 { 3793 /* korw */, X86::KORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23794 { 3798 /* kshiftlb */, X86::KSHIFTLBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
23795 { 3807 /* kshiftld */, X86::KSHIFTLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
23796 { 3816 /* kshiftlq */, X86::KSHIFTLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
23797 { 3825 /* kshiftlw */, X86::KSHIFTLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
23798 { 3834 /* kshiftrb */, X86::KSHIFTRBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
23799 { 3843 /* kshiftrd */, X86::KSHIFTRDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
23800 { 3852 /* kshiftrq */, X86::KSHIFTRQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
23801 { 3861 /* kshiftrw */, X86::KSHIFTRWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
23802 { 3870 /* ktestb */, X86::KTESTBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23803 { 3877 /* ktestd */, X86::KTESTDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23804 { 3884 /* ktestq */, X86::KTESTQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23805 { 3891 /* ktestw */, X86::KTESTWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VK1 }, },
23806 { 3898 /* kunpckbw */, X86::KUNPCKBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23807 { 3907 /* kunpckdq */, X86::KUNPCKDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23808 { 3916 /* kunpckwd */, X86::KUNPCKWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23809 { 3925 /* kxnorb */, X86::KXNORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23810 { 3932 /* kxnord */, X86::KXNORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23811 { 3939 /* kxnorq */, X86::KXNORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23812 { 3946 /* kxnorw */, X86::KXNORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23813 { 3953 /* kxorb */, X86::KXORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23814 { 3959 /* kxord */, X86::KXORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23815 { 3965 /* kxorq */, X86::KXORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23816 { 3971 /* kxorw */, X86::KXORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
23817 { 3977 /* lahf */, X86::LAHF, Convert_NoOperands, AMFBS_None, { }, },
23818 { 3982 /* lar */, X86::LAR16rr, Convert__Reg1_0__GR16orGR32orGR641_1, AMFBS_None, { MCK_GR16, MCK_GR16orGR32orGR64 }, },
23819 { 3982 /* lar */, X86::LAR16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23820 { 3982 /* lar */, X86::LAR32rr, Convert__Reg1_0__GR16orGR32orGR641_1, AMFBS_None, { MCK_GR32, MCK_GR16orGR32orGR64 }, },
23821 { 3982 /* lar */, X86::LAR32rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR32, MCK_Mem16 }, },
23822 { 3982 /* lar */, X86::LAR64rr, Convert__Reg1_0__GR16orGR32orGR641_1, AMFBS_None, { MCK_GR64, MCK_GR16orGR32orGR64 }, },
23823 { 3982 /* lar */, X86::LAR64rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR64, MCK_Mem16 }, },
23824 { 4001 /* lcall */, X86::FARCALL32m, Convert__Mem5_0, AMFBS_Not16BitMode, { MCK_Mem }, },
23825 { 4001 /* lcall */, X86::FARCALL16m, Convert__Mem5_0, AMFBS_In16BitMode, { MCK_Mem }, },
23826 { 4001 /* lcall */, X86::FARCALL16m, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
23827 { 4001 /* lcall */, X86::FARCALL64m, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
23828 { 4001 /* lcall */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, },
23829 { 4001 /* lcall */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, },
23830 { 4028 /* lddqu */, X86::LDDQUrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23831 { 4034 /* ldmxcsr */, X86::LDMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
23832 { 4042 /* lds */, X86::LDS16rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem }, },
23833 { 4042 /* lds */, X86::LDS32rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem }, },
23834 { 4056 /* ldtilecfg */, X86::LDTILECFG, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
23835 { 4066 /* lea */, X86::LEA16r, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR16, MCK_Mem }, },
23836 { 4066 /* lea */, X86::LEA32r, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem }, },
23837 { 4066 /* lea */, X86::LEA64_32r, Convert__Reg1_0__Mem5_1, AMFBS_In64BitMode, { MCK_GR32, MCK_Mem }, },
23838 { 4066 /* lea */, X86::LEA64r, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR64, MCK_Mem }, },
23839 { 4080 /* leave */, X86::LEAVE, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
23840 { 4080 /* leave */, X86::LEAVE64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
23841 { 4091 /* les */, X86::LES16rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem }, },
23842 { 4091 /* les */, X86::LES32rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem }, },
23843 { 4105 /* lfence */, X86::LFENCE, Convert_NoOperands, AMFBS_None, { }, },
23844 { 4112 /* lfs */, X86::LFS16rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR16, MCK_Mem }, },
23845 { 4112 /* lfs */, X86::LFS32rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR32, MCK_Mem }, },
23846 { 4112 /* lfs */, X86::LFS64rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR64, MCK_Mem }, },
23847 { 4131 /* lgdt */, X86::LGDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
23848 { 4136 /* lgdtd */, X86::LGDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
23849 { 4154 /* lgdtw */, X86::LGDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
23850 { 4160 /* lgs */, X86::LGS16rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR16, MCK_Mem }, },
23851 { 4160 /* lgs */, X86::LGS32rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR32, MCK_Mem }, },
23852 { 4160 /* lgs */, X86::LGS64rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR64, MCK_Mem }, },
23853 { 4179 /* lidt */, X86::LIDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
23854 { 4184 /* lidtd */, X86::LIDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
23855 { 4202 /* lidtw */, X86::LIDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
23856 { 4208 /* ljmp */, X86::FARJMP64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
23857 { 4208 /* ljmp */, X86::FARJMP32m, Convert__Mem5_0, AMFBS_Not16BitMode, { MCK_Mem }, },
23858 { 4208 /* ljmp */, X86::FARJMP16m, Convert__Mem5_0, AMFBS_In16BitMode, { MCK_Mem }, },
23859 { 4208 /* ljmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, AMFBS_In32BitMode, { MCK_Imm, MCK_Imm }, },
23860 { 4208 /* ljmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, AMFBS_In16BitMode, { MCK_Imm, MCK_Imm }, },
23861 { 4231 /* lldt */, X86::LLDT16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
23862 { 4231 /* lldt */, X86::LLDT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23863 { 4242 /* llwpcb */, X86::LLWPCB, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
23864 { 4242 /* llwpcb */, X86::LLWPCB64, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
23865 { 4249 /* lmsw */, X86::LMSW16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
23866 { 4249 /* lmsw */, X86::LMSW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23867 { 4260 /* loadiwkey */, X86::LOADIWKEY, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23868 { 4270 /* lock */, X86::LOCK_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
23869 { 4275 /* lods */, X86::LODSW, Convert__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16 }, },
23870 { 4275 /* lods */, X86::LODSL, Convert__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32 }, },
23871 { 4275 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64 }, },
23872 { 4275 /* lods */, X86::LODSB, Convert__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8 }, },
23873 { 4275 /* lods */, X86::LODSB, Convert__SrcIdx82_1, AMFBS_None, { MCK_AL, MCK_SrcIdx8 }, },
23874 { 4275 /* lods */, X86::LODSW, Convert__SrcIdx162_1, AMFBS_None, { MCK_AX, MCK_SrcIdx16 }, },
23875 { 4275 /* lods */, X86::LODSL, Convert__SrcIdx322_1, AMFBS_None, { MCK_EAX, MCK_SrcIdx32 }, },
23876 { 4275 /* lods */, X86::LODSQ, Convert__SrcIdx642_1, AMFBS_In64BitMode, { MCK_RAX, MCK_SrcIdx64 }, },
23877 { 4280 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, AMFBS_None, { MCK_SrcIdx8 }, },
23878 { 4280 /* lodsb */, X86::LODSB, Convert__SrcIdx82_1, AMFBS_None, { MCK_AL, MCK_SrcIdx8 }, },
23879 { 4286 /* lodsd */, X86::LODSL, Convert__SrcIdx322_0, AMFBS_None, { MCK_SrcIdx32 }, },
23880 { 4286 /* lodsd */, X86::LODSL, Convert__SrcIdx322_1, AMFBS_None, { MCK_EAX, MCK_SrcIdx32 }, },
23881 { 4298 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, AMFBS_In64BitMode, { MCK_SrcIdx64 }, },
23882 { 4298 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_1, AMFBS_In64BitMode, { MCK_RAX, MCK_SrcIdx64 }, },
23883 { 4304 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, AMFBS_None, { MCK_SrcIdx16 }, },
23884 { 4304 /* lodsw */, X86::LODSW, Convert__SrcIdx162_1, AMFBS_None, { MCK_AX, MCK_SrcIdx16 }, },
23885 { 4310 /* loop */, X86::LOOP, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, },
23886 { 4315 /* loope */, X86::LOOPE, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, },
23887 { 4321 /* loopne */, X86::LOOPNE, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, },
23888 { 4346 /* lsl */, X86::LSL16rr, Convert__Reg1_0__GR16orGR32orGR641_1, AMFBS_None, { MCK_GR16, MCK_GR16orGR32orGR64 }, },
23889 { 4346 /* lsl */, X86::LSL16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23890 { 4346 /* lsl */, X86::LSL32rr, Convert__Reg1_0__GR16orGR32orGR641_1, AMFBS_None, { MCK_GR32, MCK_GR16orGR32orGR64 }, },
23891 { 4346 /* lsl */, X86::LSL32rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR32, MCK_Mem16 }, },
23892 { 4346 /* lsl */, X86::LSL64rr, Convert__Reg1_0__GR16orGR32orGR641_1, AMFBS_None, { MCK_GR64, MCK_GR16orGR32orGR64 }, },
23893 { 4346 /* lsl */, X86::LSL64rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR64, MCK_Mem16 }, },
23894 { 4365 /* lss */, X86::LSS16rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR16, MCK_Mem }, },
23895 { 4365 /* lss */, X86::LSS32rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR32, MCK_Mem }, },
23896 { 4365 /* lss */, X86::LSS64rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR64, MCK_Mem }, },
23897 { 4384 /* ltr */, X86::LTRr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
23898 { 4384 /* ltr */, X86::LTRm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
23899 { 4393 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, },
23900 { 4393 /* lwpins */, X86::LWPINS32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
23901 { 4393 /* lwpins */, X86::LWPINS64rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR64, MCK_GR32, MCK_Imm }, },
23902 { 4393 /* lwpins */, X86::LWPINS64rmi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR64, MCK_Mem32, MCK_Imm }, },
23903 { 4400 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, },
23904 { 4400 /* lwpval */, X86::LWPVAL32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
23905 { 4400 /* lwpval */, X86::LWPVAL64rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR64, MCK_GR32, MCK_Imm }, },
23906 { 4400 /* lwpval */, X86::LWPVAL64rmi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR64, MCK_Mem32, MCK_Imm }, },
23907 { 4407 /* lzcnt */, X86::LZCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23908 { 4407 /* lzcnt */, X86::LZCNT16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23909 { 4407 /* lzcnt */, X86::LZCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23910 { 4407 /* lzcnt */, X86::LZCNT32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23911 { 4407 /* lzcnt */, X86::LZCNT64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23912 { 4407 /* lzcnt */, X86::LZCNT64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23913 { 4434 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
23914 { 4434 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, },
23915 { 4445 /* maskmovq */, X86::MMX_MASKMOVQ, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_VR64, MCK_VR64 }, },
23916 { 4445 /* maskmovq */, X86::MMX_MASKMOVQ64, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_VR64, MCK_VR64 }, },
23917 { 4454 /* maxpd */, X86::MAXPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23918 { 4454 /* maxpd */, X86::MAXPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23919 { 4460 /* maxps */, X86::MAXPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23920 { 4460 /* maxps */, X86::MAXPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23921 { 4466 /* maxsd */, X86::MAXSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23922 { 4466 /* maxsd */, X86::MAXSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23923 { 4472 /* maxss */, X86::MAXSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23924 { 4472 /* maxss */, X86::MAXSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23925 { 4478 /* mfence */, X86::MFENCE, Convert_NoOperands, AMFBS_None, { }, },
23926 { 4485 /* minpd */, X86::MINPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23927 { 4485 /* minpd */, X86::MINPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23928 { 4491 /* minps */, X86::MINPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23929 { 4491 /* minps */, X86::MINPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23930 { 4497 /* minsd */, X86::MINSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23931 { 4497 /* minsd */, X86::MINSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23932 { 4503 /* minss */, X86::MINSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23933 { 4503 /* minss */, X86::MINSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23934 { 4509 /* monitor */, X86::MONITOR32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
23935 { 4509 /* monitor */, X86::MONITOR64rrr, Convert_NoOperands, AMFBS_In64BitMode, { }, },
23936 { 4509 /* monitor */, X86::MONITOR32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EDX, MCK_ECX, MCK_EAX }, },
23937 { 4509 /* monitor */, X86::MONITOR64rrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RDX, MCK_RCX, MCK_RAX }, },
23938 { 4517 /* monitorx */, X86::MONITORX32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
23939 { 4517 /* monitorx */, X86::MONITORX64rrr, Convert_NoOperands, AMFBS_In64BitMode, { }, },
23940 { 4517 /* monitorx */, X86::MONITORX32rrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EDX, MCK_ECX, MCK_EAX }, },
23941 { 4517 /* monitorx */, X86::MONITORX64rrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RDX, MCK_RCX, MCK_RAX }, },
23942 { 4526 /* montmul */, X86::MONTMUL, Convert_NoOperands, AMFBS_None, { }, },
23943 { 4534 /* mov */, X86::MOV8ao16, Convert__MemOffs16_82_1, AMFBS_None, { MCK_AL, MCK_MemOffs16_8 }, },
23944 { 4534 /* mov */, X86::MOV8ao32, Convert__MemOffs32_82_1, AMFBS_None, { MCK_AL, MCK_MemOffs32_8 }, },
23945 { 4534 /* mov */, X86::MOV16ao16, Convert__MemOffs16_162_1, AMFBS_None, { MCK_AX, MCK_MemOffs16_16 }, },
23946 { 4534 /* mov */, X86::MOV16ao32, Convert__MemOffs32_162_1, AMFBS_None, { MCK_AX, MCK_MemOffs32_16 }, },
23947 { 4534 /* mov */, X86::MOV32ao16, Convert__MemOffs16_322_1, AMFBS_None, { MCK_EAX, MCK_MemOffs16_32 }, },
23948 { 4534 /* mov */, X86::MOV32ao32, Convert__MemOffs32_322_1, AMFBS_None, { MCK_EAX, MCK_MemOffs32_32 }, },
23949 { 4534 /* mov */, X86::MOV64ao32, Convert__MemOffs32_642_1, AMFBS_None, { MCK_RAX, MCK_MemOffs32_64 }, },
23950 { 4534 /* mov */, X86::MOV16sr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR16 }, },
23951 { 4534 /* mov */, X86::MOV32sr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR32 }, },
23952 { 4534 /* mov */, X86::MOV64sr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR64 }, },
23953 { 4534 /* mov */, X86::MOV16sm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_SEGMENT_REG, MCK_Mem16 }, },
23954 { 4534 /* mov */, X86::MOV32cr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, },
23955 { 4534 /* mov */, X86::MOV64cr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_CONTROL_REG, MCK_GR64 }, },
23956 { 4534 /* mov */, X86::MOV32dr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, },
23957 { 4534 /* mov */, X86::MOV64dr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_DEBUG_REG, MCK_GR64 }, },
23958 { 4534 /* mov */, X86::MOV16rs, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_SEGMENT_REG }, },
23959 { 4534 /* mov */, X86::MOV16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23960 { 4534 /* mov */, X86::MOV16ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
23961 { 4534 /* mov */, X86::MOV16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23962 { 4534 /* mov */, X86::MOV32rs, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_SEGMENT_REG }, },
23963 { 4534 /* mov */, X86::MOV32rc, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, },
23964 { 4534 /* mov */, X86::MOV32rd, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, },
23965 { 4534 /* mov */, X86::MOV32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23966 { 4534 /* mov */, X86::MOV32ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
23967 { 4534 /* mov */, X86::MOV32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23968 { 4534 /* mov */, X86::MOV64rs, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_SEGMENT_REG }, },
23969 { 4534 /* mov */, X86::MOV64rc, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_CONTROL_REG }, },
23970 { 4534 /* mov */, X86::MOV64rd, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_DEBUG_REG }, },
23971 { 4534 /* mov */, X86::MOV64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23972 { 4534 /* mov */, X86::MOV64ri32, Convert__Reg1_0__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, },
23973 { 4534 /* mov */, X86::MOV64ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR64, MCK_Imm }, },
23974 { 4534 /* mov */, X86::MOV64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
23975 { 4534 /* mov */, X86::MOV8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23976 { 4534 /* mov */, X86::MOV8ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
23977 { 4534 /* mov */, X86::MOV8rm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
23978 { 4534 /* mov */, X86::MOV16o16a, Convert__MemOffs16_162_0, AMFBS_None, { MCK_MemOffs16_16, MCK_AX }, },
23979 { 4534 /* mov */, X86::MOV32o16a, Convert__MemOffs16_322_0, AMFBS_None, { MCK_MemOffs16_32, MCK_EAX }, },
23980 { 4534 /* mov */, X86::MOV8o16a, Convert__MemOffs16_82_0, AMFBS_None, { MCK_MemOffs16_8, MCK_AL }, },
23981 { 4534 /* mov */, X86::MOV16o32a, Convert__MemOffs32_162_0, AMFBS_None, { MCK_MemOffs32_16, MCK_AX }, },
23982 { 4534 /* mov */, X86::MOV32o32a, Convert__MemOffs32_322_0, AMFBS_None, { MCK_MemOffs32_32, MCK_EAX }, },
23983 { 4534 /* mov */, X86::MOV64o32a, Convert__MemOffs32_642_0, AMFBS_None, { MCK_MemOffs32_64, MCK_RAX }, },
23984 { 4534 /* mov */, X86::MOV8o32a, Convert__MemOffs32_82_0, AMFBS_None, { MCK_MemOffs32_8, MCK_AL }, },
23985 { 4534 /* mov */, X86::MOV16ms, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_SEGMENT_REG }, },
23986 { 4534 /* mov */, X86::MOV16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
23987 { 4534 /* mov */, X86::MOV16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, },
23988 { 4534 /* mov */, X86::MOV32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
23989 { 4534 /* mov */, X86::MOV32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, },
23990 { 4534 /* mov */, X86::MOV64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
23991 { 4534 /* mov */, X86::MOV64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
23992 { 4534 /* mov */, X86::MOV8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
23993 { 4534 /* mov */, X86::MOV8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, },
23994 { 4538 /* mov.s */, X86::MOV16rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23995 { 4538 /* mov.s */, X86::MOV32rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23996 { 4538 /* mov.s */, X86::MOV64rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
23997 { 4538 /* mov.s */, X86::MOV8rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23998 { 4544 /* movabs */, X86::MOV8ao64, Convert__MemOffs64_82_1, AMFBS_None, { MCK_AL, MCK_MemOffs64_8 }, },
23999 { 4544 /* movabs */, X86::MOV16ao64, Convert__MemOffs64_162_1, AMFBS_None, { MCK_AX, MCK_MemOffs64_16 }, },
24000 { 4544 /* movabs */, X86::MOV32ao64, Convert__MemOffs64_322_1, AMFBS_None, { MCK_EAX, MCK_MemOffs64_32 }, },
24001 { 4544 /* movabs */, X86::MOV64ao64, Convert__MemOffs64_642_1, AMFBS_None, { MCK_RAX, MCK_MemOffs64_64 }, },
24002 { 4544 /* movabs */, X86::MOV64ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR64, MCK_Imm }, },
24003 { 4544 /* movabs */, X86::MOV16o64a, Convert__MemOffs64_162_0, AMFBS_None, { MCK_MemOffs64_16, MCK_AX }, },
24004 { 4544 /* movabs */, X86::MOV32o64a, Convert__MemOffs64_322_0, AMFBS_None, { MCK_MemOffs64_32, MCK_EAX }, },
24005 { 4544 /* movabs */, X86::MOV64o64a, Convert__MemOffs64_642_0, AMFBS_None, { MCK_MemOffs64_64, MCK_RAX }, },
24006 { 4544 /* movabs */, X86::MOV8o64a, Convert__MemOffs64_82_0, AMFBS_None, { MCK_MemOffs64_8, MCK_AL }, },
24007 { 4583 /* movapd */, X86::MOVAPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24008 { 4583 /* movapd */, X86::MOVAPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24009 { 4583 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
24010 { 4590 /* movapd.s */, X86::MOVAPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24011 { 4599 /* movaps */, X86::MOVAPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24012 { 4599 /* movaps */, X86::MOVAPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24013 { 4599 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
24014 { 4606 /* movaps.s */, X86::MOVAPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24015 { 4627 /* movbe */, X86::MOVBE16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
24016 { 4627 /* movbe */, X86::MOVBE32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
24017 { 4627 /* movbe */, X86::MOVBE64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
24018 { 4627 /* movbe */, X86::MOVBE16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
24019 { 4627 /* movbe */, X86::MOVBE32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
24020 { 4627 /* movbe */, X86::MOVBE64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
24021 { 4654 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_GR32 }, },
24022 { 4654 /* movd */, X86::MMX_MOVD64to64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_GR64 }, },
24023 { 4654 /* movd */, X86::MMX_MOVD64rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR64, MCK_Mem32 }, },
24024 { 4654 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
24025 { 4654 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
24026 { 4654 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
24027 { 4654 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VR64 }, },
24028 { 4654 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
24029 { 4654 /* movd */, X86::MMX_MOVD64from64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_VR64 }, },
24030 { 4654 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
24031 { 4654 /* movd */, X86::MMX_MOVD64mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_VR64 }, },
24032 { 4654 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
24033 { 4659 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24034 { 4659 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24035 { 4667 /* movdir64b */, X86::MOVDIR64B16, Convert__Reg1_0__Mem5125_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem512 }, },
24036 { 4667 /* movdir64b */, X86::MOVDIR64B32, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_GR32, MCK_Mem512 }, },
24037 { 4667 /* movdir64b */, X86::MOVDIR64B64, Convert__Reg1_0__Mem5125_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem512 }, },
24038 { 4677 /* movdiri */, X86::MOVDIRI32, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
24039 { 4677 /* movdiri */, X86::MOVDIRI64, Convert__Mem645_0__Reg1_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_GR64 }, },
24040 { 4685 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
24041 { 4693 /* movdqa */, X86::MOVDQArr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24042 { 4693 /* movdqa */, X86::MOVDQArm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24043 { 4693 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
24044 { 4700 /* movdqa.s */, X86::MOVDQArr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24045 { 4709 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24046 { 4709 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24047 { 4709 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
24048 { 4716 /* movdqu.s */, X86::MOVDQUrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24049 { 4725 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24050 { 4733 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24051 { 4733 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
24052 { 4740 /* movhps */, X86::MOVHPSrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24053 { 4740 /* movhps */, X86::MOVHPSmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
24054 { 4759 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24055 { 4767 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24056 { 4767 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
24057 { 4774 /* movlps */, X86::MOVLPSrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24058 { 4774 /* movlps */, X86::MOVLPSmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
24059 { 4781 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
24060 { 4790 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
24061 { 4799 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
24062 { 4807 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24063 { 4816 /* movnti */, X86::MOVNTImr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
24064 { 4816 /* movnti */, X86::MOVNTI_64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
24065 { 4839 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
24066 { 4847 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
24067 { 4855 /* movntq */, X86::MMX_MOVNTQmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
24068 { 4862 /* movntsd */, X86::MOVNTSD, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
24069 { 4870 /* movntss */, X86::MOVNTSS, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
24070 { 4878 /* movq */, X86::MMX_MOVQ64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24071 { 4878 /* movq */, X86::MMX_MOVD64to64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_GR64 }, },
24072 { 4878 /* movq */, X86::MMX_MOVQ64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24073 { 4878 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24074 { 4878 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
24075 { 4878 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24076 { 4878 /* movq */, X86::MMX_MOVD64from64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_VR64 }, },
24077 { 4878 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
24078 { 4878 /* movq */, X86::MMX_MOVQ64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR64 }, },
24079 { 4878 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
24080 { 4883 /* movq.s */, X86::MMX_MOVQ64rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24081 { 4883 /* movq.s */, X86::MOVPQI2QIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24082 { 4890 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
24083 { 4898 /* movs */, X86::MOVSW, Convert__DstIdx161_0__SrcIdx162_1, AMFBS_None, { MCK_DstIdx16, MCK_SrcIdx16 }, },
24084 { 4898 /* movs */, X86::MOVSL, Convert__DstIdx321_0__SrcIdx322_1, AMFBS_None, { MCK_DstIdx32, MCK_SrcIdx32 }, },
24085 { 4898 /* movs */, X86::MOVSQ, Convert__DstIdx641_0__SrcIdx642_1, AMFBS_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, },
24086 { 4898 /* movs */, X86::MOVSB, Convert__DstIdx81_0__SrcIdx82_1, AMFBS_None, { MCK_DstIdx8, MCK_SrcIdx8 }, },
24087 { 4903 /* movsb */, X86::MOVSB, Convert__DstIdx81_0__SrcIdx82_1, AMFBS_None, { MCK_DstIdx8, MCK_SrcIdx8 }, },
24088 { 4930 /* movsd */, X86::MOVSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24089 { 4930 /* movsd */, X86::MOVSDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24090 { 4930 /* movsd */, X86::MOVSL, Convert__DstIdx321_0__SrcIdx322_1, AMFBS_None, { MCK_DstIdx32, MCK_SrcIdx32 }, },
24091 { 4930 /* movsd */, X86::MOVSDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
24092 { 4936 /* movsd.s */, X86::MOVSDrr_REV, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24093 { 4944 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24094 { 4944 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24095 { 4959 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24096 { 4959 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24097 { 4975 /* movsq */, X86::MOVSQ, Convert__DstIdx641_0__SrcIdx642_1, AMFBS_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, },
24098 { 4981 /* movss */, X86::MOVSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24099 { 4981 /* movss */, X86::MOVSSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
24100 { 4981 /* movss */, X86::MOVSSmr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
24101 { 4987 /* movss.s */, X86::MOVSSrr_REV, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24102 { 4995 /* movsw */, X86::MOVSW, Convert__DstIdx161_0__SrcIdx162_1, AMFBS_None, { MCK_DstIdx16, MCK_SrcIdx16 }, },
24103 { 5015 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR8 }, },
24104 { 5015 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR16, MCK_Mem8 }, },
24105 { 5015 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR16 }, },
24106 { 5015 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, },
24107 { 5015 /* movsx */, X86::MOVSX32rm16, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR32, MCK_Mem16 }, },
24108 { 5015 /* movsx */, X86::MOVSX32rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR32, MCK_Mem8 }, },
24109 { 5015 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR16 }, },
24110 { 5015 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR8 }, },
24111 { 5015 /* movsx */, X86::MOVSX64rm16, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR64, MCK_Mem16 }, },
24112 { 5015 /* movsx */, X86::MOVSX64rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR64, MCK_Mem8 }, },
24113 { 5021 /* movsxd */, X86::MOVSX64rr32, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_GR32 }, },
24114 { 5021 /* movsxd */, X86::MOVSX64rm32, Convert__Reg1_0__Mem325_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem32 }, },
24115 { 5028 /* movupd */, X86::MOVUPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24116 { 5028 /* movupd */, X86::MOVUPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24117 { 5028 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
24118 { 5035 /* movupd.s */, X86::MOVUPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24119 { 5044 /* movups */, X86::MOVUPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24120 { 5044 /* movups */, X86::MOVUPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24121 { 5044 /* movups */, X86::MOVUPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
24122 { 5051 /* movups.s */, X86::MOVUPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24123 { 5107 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR8 }, },
24124 { 5107 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR16, MCK_Mem8 }, },
24125 { 5107 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR16 }, },
24126 { 5107 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, },
24127 { 5107 /* movzx */, X86::MOVZX32rm16, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR32, MCK_Mem16 }, },
24128 { 5107 /* movzx */, X86::MOVZX32rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR32, MCK_Mem8 }, },
24129 { 5107 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR16 }, },
24130 { 5107 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR8 }, },
24131 { 5107 /* movzx */, X86::MOVZX64rm16, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR64, MCK_Mem16 }, },
24132 { 5107 /* movzx */, X86::MOVZX64rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR64, MCK_Mem8 }, },
24133 { 5113 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24134 { 5113 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24135 { 5121 /* mul */, X86::MUL16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
24136 { 5121 /* mul */, X86::MUL32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
24137 { 5121 /* mul */, X86::MUL64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
24138 { 5121 /* mul */, X86::MUL8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
24139 { 5121 /* mul */, X86::MUL16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
24140 { 5121 /* mul */, X86::MUL32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
24141 { 5121 /* mul */, X86::MUL64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
24142 { 5121 /* mul */, X86::MUL8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
24143 { 5135 /* mulpd */, X86::MULPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24144 { 5135 /* mulpd */, X86::MULPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24145 { 5141 /* mulps */, X86::MULPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24146 { 5141 /* mulps */, X86::MULPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24147 { 5152 /* mulsd */, X86::MULSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24148 { 5152 /* mulsd */, X86::MULSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24149 { 5158 /* mulss */, X86::MULSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24150 { 5158 /* mulss */, X86::MULSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
24151 { 5169 /* mulx */, X86::MULX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24152 { 5169 /* mulx */, X86::MULX32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
24153 { 5169 /* mulx */, X86::MULX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
24154 { 5169 /* mulx */, X86::MULX64rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
24155 { 5186 /* mwait */, X86::MWAITrr, Convert_NoOperands, AMFBS_None, { }, },
24156 { 5186 /* mwait */, X86::MWAITrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ECX, MCK_EAX }, },
24157 { 5186 /* mwait */, X86::MWAITrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RCX, MCK_RAX }, },
24158 { 5192 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, AMFBS_None, { }, },
24159 { 5192 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EBX, MCK_ECX, MCK_EAX }, },
24160 { 5192 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RBX, MCK_RCX, MCK_RAX }, },
24161 { 5199 /* neg */, X86::NEG16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24162 { 5199 /* neg */, X86::NEG32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24163 { 5199 /* neg */, X86::NEG64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24164 { 5199 /* neg */, X86::NEG8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24165 { 5199 /* neg */, X86::NEG16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
24166 { 5199 /* neg */, X86::NEG32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
24167 { 5199 /* neg */, X86::NEG64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
24168 { 5199 /* neg */, X86::NEG8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
24169 { 5223 /* nop */, X86::NOOP, Convert_NoOperands, AMFBS_None, { }, },
24170 { 5223 /* nop */, X86::NOOPWr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
24171 { 5223 /* nop */, X86::NOOPLr, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
24172 { 5223 /* nop */, X86::NOOPQr, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
24173 { 5223 /* nop */, X86::NOOPW, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
24174 { 5223 /* nop */, X86::NOOPL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
24175 { 5223 /* nop */, X86::NOOPQ, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
24176 { 5242 /* not */, X86::NOT16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24177 { 5242 /* not */, X86::NOT32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24178 { 5242 /* not */, X86::NOT64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24179 { 5242 /* not */, X86::NOT8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24180 { 5242 /* not */, X86::NOT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
24181 { 5242 /* not */, X86::NOT32m, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
24182 { 5242 /* not */, X86::NOT64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
24183 { 5242 /* not */, X86::NOT8m, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
24184 { 5266 /* or */, X86::OR8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, },
24185 { 5266 /* or */, X86::OR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, },
24186 { 5266 /* or */, X86::OR16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, },
24187 { 5266 /* or */, X86::OR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, },
24188 { 5266 /* or */, X86::OR32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, },
24189 { 5266 /* or */, X86::OR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, },
24190 { 5266 /* or */, X86::OR64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, },
24191 { 5266 /* or */, X86::OR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24192 { 5266 /* or */, X86::OR16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
24193 { 5266 /* or */, X86::OR16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
24194 { 5266 /* or */, X86::OR16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
24195 { 5266 /* or */, X86::OR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24196 { 5266 /* or */, X86::OR32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
24197 { 5266 /* or */, X86::OR32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
24198 { 5266 /* or */, X86::OR32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
24199 { 5266 /* or */, X86::OR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
24200 { 5266 /* or */, X86::OR64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, },
24201 { 5266 /* or */, X86::OR64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, },
24202 { 5266 /* or */, X86::OR64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
24203 { 5266 /* or */, X86::OR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
24204 { 5266 /* or */, X86::OR8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
24205 { 5266 /* or */, X86::OR8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
24206 { 5266 /* or */, X86::OR16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
24207 { 5266 /* or */, X86::OR16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, },
24208 { 5266 /* or */, X86::OR16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, },
24209 { 5266 /* or */, X86::OR32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
24210 { 5266 /* or */, X86::OR32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, },
24211 { 5266 /* or */, X86::OR32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, },
24212 { 5266 /* or */, X86::OR64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
24213 { 5266 /* or */, X86::OR64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
24214 { 5266 /* or */, X86::OR64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
24215 { 5266 /* or */, X86::OR8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
24216 { 5266 /* or */, X86::OR8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, },
24217 { 5277 /* orpd */, X86::ORPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24218 { 5277 /* orpd */, X86::ORPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24219 { 5282 /* orps */, X86::ORPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24220 { 5282 /* orps */, X86::ORPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24221 { 5295 /* out */, X86::OUT8rr, Convert_NoOperands, AMFBS_None, { MCK_DX, MCK_AL }, },
24222 { 5295 /* out */, X86::OUT16rr, Convert_NoOperands, AMFBS_None, { MCK_DX, MCK_AX }, },
24223 { 5295 /* out */, X86::OUT32rr, Convert_NoOperands, AMFBS_None, { MCK_DX, MCK_EAX }, },
24224 { 5295 /* out */, X86::OUT8ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_AL }, },
24225 { 5295 /* out */, X86::OUT16ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_AX }, },
24226 { 5295 /* out */, X86::OUT32ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_EAX }, },
24227 { 5299 /* outb */, X86::OUT8rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, },
24228 { 5299 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
24229 { 5304 /* outl */, X86::OUT32rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, },
24230 { 5304 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
24231 { 5309 /* outs */, X86::OUTSW, Convert__SrcIdx162_1, AMFBS_None, { MCK_DX, MCK_SrcIdx16 }, },
24232 { 5309 /* outs */, X86::OUTSL, Convert__SrcIdx322_1, AMFBS_None, { MCK_DX, MCK_SrcIdx32 }, },
24233 { 5309 /* outs */, X86::OUTSB, Convert__SrcIdx82_1, AMFBS_None, { MCK_DX, MCK_SrcIdx8 }, },
24234 { 5314 /* outsb */, X86::OUTSB, Convert__SrcIdx82_1, AMFBS_None, { MCK_DX, MCK_SrcIdx8 }, },
24235 { 5320 /* outsd */, X86::OUTSL, Convert__SrcIdx322_1, AMFBS_None, { MCK_DX, MCK_SrcIdx32 }, },
24236 { 5332 /* outsw */, X86::OUTSW, Convert__SrcIdx162_1, AMFBS_None, { MCK_DX, MCK_SrcIdx16 }, },
24237 { 5338 /* outw */, X86::OUT16rr, Convert_NoOperands, AMFBS_None, { MCK_DX }, },
24238 { 5338 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8 }, },
24239 { 5343 /* pabsb */, X86::MMX_PABSBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24240 { 5343 /* pabsb */, X86::MMX_PABSBrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24241 { 5343 /* pabsb */, X86::PABSBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24242 { 5343 /* pabsb */, X86::PABSBrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24243 { 5349 /* pabsd */, X86::MMX_PABSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24244 { 5349 /* pabsd */, X86::MMX_PABSDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24245 { 5349 /* pabsd */, X86::PABSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24246 { 5349 /* pabsd */, X86::PABSDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24247 { 5355 /* pabsw */, X86::MMX_PABSWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24248 { 5355 /* pabsw */, X86::MMX_PABSWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24249 { 5355 /* pabsw */, X86::PABSWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24250 { 5355 /* pabsw */, X86::PABSWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24251 { 5361 /* packssdw */, X86::MMX_PACKSSDWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24252 { 5361 /* packssdw */, X86::MMX_PACKSSDWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24253 { 5361 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24254 { 5361 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24255 { 5370 /* packsswb */, X86::MMX_PACKSSWBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24256 { 5370 /* packsswb */, X86::MMX_PACKSSWBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24257 { 5370 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24258 { 5370 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24259 { 5379 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24260 { 5379 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24261 { 5388 /* packuswb */, X86::MMX_PACKUSWBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24262 { 5388 /* packuswb */, X86::MMX_PACKUSWBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24263 { 5388 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24264 { 5388 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24265 { 5397 /* paddb */, X86::MMX_PADDBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24266 { 5397 /* paddb */, X86::MMX_PADDBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24267 { 5397 /* paddb */, X86::PADDBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24268 { 5397 /* paddb */, X86::PADDBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24269 { 5403 /* paddd */, X86::MMX_PADDDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24270 { 5403 /* paddd */, X86::MMX_PADDDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24271 { 5403 /* paddd */, X86::PADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24272 { 5403 /* paddd */, X86::PADDDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24273 { 5409 /* paddq */, X86::MMX_PADDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24274 { 5409 /* paddq */, X86::MMX_PADDQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24275 { 5409 /* paddq */, X86::PADDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24276 { 5409 /* paddq */, X86::PADDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24277 { 5415 /* paddsb */, X86::MMX_PADDSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24278 { 5415 /* paddsb */, X86::MMX_PADDSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24279 { 5415 /* paddsb */, X86::PADDSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24280 { 5415 /* paddsb */, X86::PADDSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24281 { 5422 /* paddsw */, X86::MMX_PADDSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24282 { 5422 /* paddsw */, X86::MMX_PADDSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24283 { 5422 /* paddsw */, X86::PADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24284 { 5422 /* paddsw */, X86::PADDSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24285 { 5429 /* paddusb */, X86::MMX_PADDUSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24286 { 5429 /* paddusb */, X86::MMX_PADDUSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24287 { 5429 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24288 { 5429 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24289 { 5437 /* paddusw */, X86::MMX_PADDUSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24290 { 5437 /* paddusw */, X86::MMX_PADDUSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24291 { 5437 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24292 { 5437 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24293 { 5445 /* paddw */, X86::MMX_PADDWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24294 { 5445 /* paddw */, X86::MMX_PADDWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24295 { 5445 /* paddw */, X86::PADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24296 { 5445 /* paddw */, X86::PADDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24297 { 5451 /* palignr */, X86::MMX_PALIGNRrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
24298 { 5451 /* palignr */, X86::MMX_PALIGNRrmi, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR64, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24299 { 5451 /* palignr */, X86::PALIGNRrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24300 { 5451 /* palignr */, X86::PALIGNRrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24301 { 5459 /* pand */, X86::MMX_PANDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24302 { 5459 /* pand */, X86::MMX_PANDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24303 { 5459 /* pand */, X86::PANDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24304 { 5459 /* pand */, X86::PANDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24305 { 5464 /* pandn */, X86::MMX_PANDNirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24306 { 5464 /* pandn */, X86::MMX_PANDNirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24307 { 5464 /* pandn */, X86::PANDNrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24308 { 5464 /* pandn */, X86::PANDNrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24309 { 5470 /* pause */, X86::PAUSE, Convert_NoOperands, AMFBS_None, { }, },
24310 { 5476 /* pavgb */, X86::MMX_PAVGBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24311 { 5476 /* pavgb */, X86::MMX_PAVGBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24312 { 5476 /* pavgb */, X86::PAVGBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24313 { 5476 /* pavgb */, X86::PAVGBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24314 { 5482 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24315 { 5482 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24316 { 5490 /* pavgw */, X86::MMX_PAVGWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24317 { 5490 /* pavgw */, X86::MMX_PAVGWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24318 { 5490 /* pavgw */, X86::PAVGWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24319 { 5490 /* pavgw */, X86::PAVGWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24320 { 5496 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24321 { 5496 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24322 { 5496 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
24323 { 5496 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
24324 { 5505 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24325 { 5505 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24326 { 5513 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24327 { 5513 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_17, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24328 { 5526 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24329 { 5526 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24330 { 5539 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24331 { 5539 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_16, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24332 { 5552 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24333 { 5552 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24334 { 5565 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24335 { 5565 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24336 { 5575 /* pcmpeqb */, X86::MMX_PCMPEQBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24337 { 5575 /* pcmpeqb */, X86::MMX_PCMPEQBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24338 { 5575 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24339 { 5575 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24340 { 5583 /* pcmpeqd */, X86::MMX_PCMPEQDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24341 { 5583 /* pcmpeqd */, X86::MMX_PCMPEQDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24342 { 5583 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24343 { 5583 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24344 { 5591 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24345 { 5591 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24346 { 5599 /* pcmpeqw */, X86::MMX_PCMPEQWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24347 { 5599 /* pcmpeqw */, X86::MMX_PCMPEQWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24348 { 5599 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24349 { 5599 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24350 { 5607 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24351 { 5607 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24352 { 5617 /* pcmpestrm */, X86::PCMPESTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24353 { 5617 /* pcmpestrm */, X86::PCMPESTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24354 { 5627 /* pcmpgtb */, X86::MMX_PCMPGTBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24355 { 5627 /* pcmpgtb */, X86::MMX_PCMPGTBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24356 { 5627 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24357 { 5627 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24358 { 5635 /* pcmpgtd */, X86::MMX_PCMPGTDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24359 { 5635 /* pcmpgtd */, X86::MMX_PCMPGTDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24360 { 5635 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24361 { 5635 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24362 { 5643 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24363 { 5643 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24364 { 5651 /* pcmpgtw */, X86::MMX_PCMPGTWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24365 { 5651 /* pcmpgtw */, X86::MMX_PCMPGTWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24366 { 5651 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24367 { 5651 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24368 { 5659 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24369 { 5659 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24370 { 5669 /* pcmpistrm */, X86::PCMPISTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24371 { 5669 /* pcmpistrm */, X86::PCMPISTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24372 { 5679 /* pconfig */, X86::PCONFIG, Convert_NoOperands, AMFBS_None, { }, },
24373 { 5687 /* pdep */, X86::PDEP32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24374 { 5687 /* pdep */, X86::PDEP32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
24375 { 5687 /* pdep */, X86::PDEP64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
24376 { 5687 /* pdep */, X86::PDEP64rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
24377 { 5704 /* pext */, X86::PEXT32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24378 { 5704 /* pext */, X86::PEXT32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
24379 { 5704 /* pext */, X86::PEXT64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
24380 { 5704 /* pext */, X86::PEXT64rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
24381 { 5721 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
24382 { 5721 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem8, MCK_FR32, MCK_ImmUnsignedi8 }, },
24383 { 5728 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24384 { 5728 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24385 { 5735 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
24386 { 5735 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
24387 { 5742 /* pextrw */, X86::MMX_PEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
24388 { 5742 /* pextrw */, X86::PEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
24389 { 5742 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem16, MCK_FR32, MCK_ImmUnsignedi8 }, },
24390 { 5749 /* pf2id */, X86::PF2IDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24391 { 5749 /* pf2id */, X86::PF2IDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24392 { 5755 /* pf2iw */, X86::PF2IWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24393 { 5755 /* pf2iw */, X86::PF2IWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24394 { 5761 /* pfacc */, X86::PFACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24395 { 5761 /* pfacc */, X86::PFACCrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24396 { 5767 /* pfadd */, X86::PFADDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24397 { 5767 /* pfadd */, X86::PFADDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24398 { 5773 /* pfcmpeq */, X86::PFCMPEQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24399 { 5773 /* pfcmpeq */, X86::PFCMPEQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24400 { 5781 /* pfcmpge */, X86::PFCMPGErr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24401 { 5781 /* pfcmpge */, X86::PFCMPGErm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24402 { 5789 /* pfcmpgt */, X86::PFCMPGTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24403 { 5789 /* pfcmpgt */, X86::PFCMPGTrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24404 { 5797 /* pfmax */, X86::PFMAXrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24405 { 5797 /* pfmax */, X86::PFMAXrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24406 { 5803 /* pfmin */, X86::PFMINrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24407 { 5803 /* pfmin */, X86::PFMINrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24408 { 5809 /* pfmul */, X86::PFMULrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24409 { 5809 /* pfmul */, X86::PFMULrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24410 { 5815 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24411 { 5815 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24412 { 5822 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24413 { 5822 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24414 { 5830 /* pfrcp */, X86::PFRCPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24415 { 5830 /* pfrcp */, X86::PFRCPrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24416 { 5836 /* pfrcpit1 */, X86::PFRCPIT1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24417 { 5836 /* pfrcpit1 */, X86::PFRCPIT1rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24418 { 5845 /* pfrcpit2 */, X86::PFRCPIT2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24419 { 5845 /* pfrcpit2 */, X86::PFRCPIT2rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24420 { 5854 /* pfrsqit1 */, X86::PFRSQIT1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24421 { 5854 /* pfrsqit1 */, X86::PFRSQIT1rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24422 { 5863 /* pfrsqrt */, X86::PFRSQRTrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24423 { 5863 /* pfrsqrt */, X86::PFRSQRTrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24424 { 5871 /* pfsub */, X86::PFSUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24425 { 5871 /* pfsub */, X86::PFSUBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24426 { 5877 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24427 { 5877 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24428 { 5884 /* phaddd */, X86::MMX_PHADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24429 { 5884 /* phaddd */, X86::MMX_PHADDDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24430 { 5884 /* phaddd */, X86::PHADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24431 { 5884 /* phaddd */, X86::PHADDDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24432 { 5891 /* phaddsw */, X86::MMX_PHADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24433 { 5891 /* phaddsw */, X86::MMX_PHADDSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24434 { 5891 /* phaddsw */, X86::PHADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24435 { 5891 /* phaddsw */, X86::PHADDSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24436 { 5899 /* phaddw */, X86::MMX_PHADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24437 { 5899 /* phaddw */, X86::MMX_PHADDWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24438 { 5899 /* phaddw */, X86::PHADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24439 { 5899 /* phaddw */, X86::PHADDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24440 { 5906 /* phminposuw */, X86::PHMINPOSUWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24441 { 5906 /* phminposuw */, X86::PHMINPOSUWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24442 { 5917 /* phsubd */, X86::MMX_PHSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24443 { 5917 /* phsubd */, X86::MMX_PHSUBDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24444 { 5917 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24445 { 5917 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24446 { 5924 /* phsubsw */, X86::MMX_PHSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24447 { 5924 /* phsubsw */, X86::MMX_PHSUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24448 { 5924 /* phsubsw */, X86::PHSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24449 { 5924 /* phsubsw */, X86::PHSUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24450 { 5932 /* phsubw */, X86::MMX_PHSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24451 { 5932 /* phsubw */, X86::MMX_PHSUBWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24452 { 5932 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24453 { 5932 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24454 { 5939 /* pi2fd */, X86::PI2FDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24455 { 5939 /* pi2fd */, X86::PI2FDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24456 { 5945 /* pi2fw */, X86::PI2FWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24457 { 5945 /* pi2fw */, X86::PI2FWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24458 { 5951 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
24459 { 5951 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_0__Tie0_1_1__Mem85_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem8, MCK_ImmUnsignedi8 }, },
24460 { 5958 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24461 { 5958 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
24462 { 5965 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, },
24463 { 5965 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24464 { 5972 /* pinsrw */, X86::MMX_PINSRWrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR64, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
24465 { 5972 /* pinsrw */, X86::MMX_PINSRWrm, Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR64, MCK_Mem16, MCK_ImmUnsignedi8 }, },
24466 { 5972 /* pinsrw */, X86::PINSRWrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
24467 { 5972 /* pinsrw */, X86::PINSRWrm, Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem16, MCK_ImmUnsignedi8 }, },
24468 { 5979 /* pmaddubsw */, X86::MMX_PMADDUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24469 { 5979 /* pmaddubsw */, X86::MMX_PMADDUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24470 { 5979 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24471 { 5979 /* pmaddubsw */, X86::PMADDUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24472 { 5989 /* pmaddwd */, X86::MMX_PMADDWDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24473 { 5989 /* pmaddwd */, X86::MMX_PMADDWDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24474 { 5989 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24475 { 5989 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24476 { 5997 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24477 { 5997 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24478 { 6004 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24479 { 6004 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24480 { 6011 /* pmaxsw */, X86::MMX_PMAXSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24481 { 6011 /* pmaxsw */, X86::MMX_PMAXSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24482 { 6011 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24483 { 6011 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24484 { 6018 /* pmaxub */, X86::MMX_PMAXUBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24485 { 6018 /* pmaxub */, X86::MMX_PMAXUBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24486 { 6018 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24487 { 6018 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24488 { 6025 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24489 { 6025 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24490 { 6032 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24491 { 6032 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24492 { 6039 /* pminsb */, X86::PMINSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24493 { 6039 /* pminsb */, X86::PMINSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24494 { 6046 /* pminsd */, X86::PMINSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24495 { 6046 /* pminsd */, X86::PMINSDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24496 { 6053 /* pminsw */, X86::MMX_PMINSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24497 { 6053 /* pminsw */, X86::MMX_PMINSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24498 { 6053 /* pminsw */, X86::PMINSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24499 { 6053 /* pminsw */, X86::PMINSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24500 { 6060 /* pminub */, X86::MMX_PMINUBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24501 { 6060 /* pminub */, X86::MMX_PMINUBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24502 { 6060 /* pminub */, X86::PMINUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24503 { 6060 /* pminub */, X86::PMINUBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24504 { 6067 /* pminud */, X86::PMINUDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24505 { 6067 /* pminud */, X86::PMINUDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24506 { 6074 /* pminuw */, X86::PMINUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24507 { 6074 /* pminuw */, X86::PMINUWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24508 { 6081 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_VR64 }, },
24509 { 6081 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
24510 { 6090 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24511 { 6090 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
24512 { 6099 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24513 { 6099 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32, MCK_Mem16 }, },
24514 { 6108 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24515 { 6108 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24516 { 6117 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24517 { 6117 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24518 { 6126 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24519 { 6126 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24520 { 6135 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24521 { 6135 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
24522 { 6144 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24523 { 6144 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
24524 { 6153 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24525 { 6153 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32, MCK_Mem16 }, },
24526 { 6162 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24527 { 6162 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24528 { 6171 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24529 { 6171 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24530 { 6180 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24531 { 6180 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24532 { 6189 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24533 { 6189 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
24534 { 6198 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24535 { 6198 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24536 { 6205 /* pmulhrsw */, X86::MMX_PMULHRSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24537 { 6205 /* pmulhrsw */, X86::MMX_PMULHRSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24538 { 6205 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24539 { 6205 /* pmulhrsw */, X86::PMULHRSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24540 { 6214 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24541 { 6214 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24542 { 6222 /* pmulhuw */, X86::MMX_PMULHUWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24543 { 6222 /* pmulhuw */, X86::MMX_PMULHUWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24544 { 6222 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24545 { 6222 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24546 { 6230 /* pmulhw */, X86::MMX_PMULHWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24547 { 6230 /* pmulhw */, X86::MMX_PMULHWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24548 { 6230 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24549 { 6230 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24550 { 6237 /* pmulld */, X86::PMULLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24551 { 6237 /* pmulld */, X86::PMULLDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24552 { 6244 /* pmullw */, X86::MMX_PMULLWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24553 { 6244 /* pmullw */, X86::MMX_PMULLWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24554 { 6244 /* pmullw */, X86::PMULLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24555 { 6244 /* pmullw */, X86::PMULLWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24556 { 6251 /* pmuludq */, X86::MMX_PMULUDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24557 { 6251 /* pmuludq */, X86::MMX_PMULUDQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24558 { 6251 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24559 { 6251 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24560 { 6259 /* pop */, X86::POPDS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, },
24561 { 6259 /* pop */, X86::POPDS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, },
24562 { 6259 /* pop */, X86::POPES16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, },
24563 { 6259 /* pop */, X86::POPES32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, },
24564 { 6259 /* pop */, X86::POPFS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_FS }, },
24565 { 6259 /* pop */, X86::POPFS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_FS }, },
24566 { 6259 /* pop */, X86::POPFS16, Convert_NoOperands, AMFBS_None, { MCK_FS }, },
24567 { 6259 /* pop */, X86::POPGS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_GS }, },
24568 { 6259 /* pop */, X86::POPGS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_GS }, },
24569 { 6259 /* pop */, X86::POPGS16, Convert_NoOperands, AMFBS_None, { MCK_GS }, },
24570 { 6259 /* pop */, X86::POPSS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, },
24571 { 6259 /* pop */, X86::POPSS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, },
24572 { 6259 /* pop */, X86::POP16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
24573 { 6259 /* pop */, X86::POP32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
24574 { 6259 /* pop */, X86::POP64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
24575 { 6259 /* pop */, X86::POP16rmm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
24576 { 6259 /* pop */, X86::POP32rmm, Convert__Mem325_0, AMFBS_Not64BitMode, { MCK_Mem32 }, },
24577 { 6259 /* pop */, X86::POP64rmm, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
24578 { 6263 /* popal */, X86::POPA32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
24579 { 6269 /* popaw */, X86::POPA16, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
24580 { 6275 /* popcnt */, X86::POPCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24581 { 6275 /* popcnt */, X86::POPCNT16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
24582 { 6275 /* popcnt */, X86::POPCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24583 { 6275 /* popcnt */, X86::POPCNT32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
24584 { 6275 /* popcnt */, X86::POPCNT64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
24585 { 6275 /* popcnt */, X86::POPCNT64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
24586 { 6306 /* popf */, X86::POPF16, Convert_NoOperands, AMFBS_None, { }, },
24587 { 6311 /* popfd */, X86::POPF32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
24588 { 6323 /* popfq */, X86::POPF64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
24589 { 6350 /* por */, X86::MMX_PORirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24590 { 6350 /* por */, X86::MMX_PORirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24591 { 6350 /* por */, X86::PORrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24592 { 6350 /* por */, X86::PORrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24593 { 6354 /* prefetch */, X86::PREFETCH, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
24594 { 6363 /* prefetchnta */, X86::PREFETCHNTA, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
24595 { 6375 /* prefetcht0 */, X86::PREFETCHT0, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
24596 { 6386 /* prefetcht1 */, X86::PREFETCHT1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
24597 { 6397 /* prefetcht2 */, X86::PREFETCHT2, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
24598 { 6408 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
24599 { 6418 /* prefetchwt1 */, X86::PREFETCHWT1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
24600 { 6430 /* psadbw */, X86::MMX_PSADBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24601 { 6430 /* psadbw */, X86::MMX_PSADBWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24602 { 6430 /* psadbw */, X86::PSADBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24603 { 6430 /* psadbw */, X86::PSADBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24604 { 6437 /* pshufb */, X86::MMX_PSHUFBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24605 { 6437 /* pshufb */, X86::MMX_PSHUFBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24606 { 6437 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24607 { 6437 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24608 { 6444 /* pshufd */, X86::PSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24609 { 6444 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24610 { 6451 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24611 { 6451 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24612 { 6459 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24613 { 6459 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24614 { 6467 /* pshufw */, X86::MMX_PSHUFWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
24615 { 6467 /* pshufw */, X86::MMX_PSHUFWmi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR64, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24616 { 6474 /* psignb */, X86::MMX_PSIGNBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24617 { 6474 /* psignb */, X86::MMX_PSIGNBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24618 { 6474 /* psignb */, X86::PSIGNBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24619 { 6474 /* psignb */, X86::PSIGNBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24620 { 6481 /* psignd */, X86::MMX_PSIGNDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24621 { 6481 /* psignd */, X86::MMX_PSIGNDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24622 { 6481 /* psignd */, X86::PSIGNDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24623 { 6481 /* psignd */, X86::PSIGNDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24624 { 6488 /* psignw */, X86::MMX_PSIGNWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24625 { 6488 /* psignw */, X86::MMX_PSIGNWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24626 { 6488 /* psignw */, X86::PSIGNWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24627 { 6488 /* psignw */, X86::PSIGNWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24628 { 6495 /* pslld */, X86::MMX_PSLLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24629 { 6495 /* pslld */, X86::MMX_PSLLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, },
24630 { 6495 /* pslld */, X86::MMX_PSLLDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24631 { 6495 /* pslld */, X86::PSLLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24632 { 6495 /* pslld */, X86::PSLLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24633 { 6495 /* pslld */, X86::PSLLDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24634 { 6501 /* pslldq */, X86::PSLLDQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24635 { 6508 /* psllq */, X86::MMX_PSLLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24636 { 6508 /* psllq */, X86::MMX_PSLLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, },
24637 { 6508 /* psllq */, X86::MMX_PSLLQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24638 { 6508 /* psllq */, X86::PSLLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24639 { 6508 /* psllq */, X86::PSLLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24640 { 6508 /* psllq */, X86::PSLLQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24641 { 6514 /* psllw */, X86::MMX_PSLLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24642 { 6514 /* psllw */, X86::MMX_PSLLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, },
24643 { 6514 /* psllw */, X86::MMX_PSLLWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24644 { 6514 /* psllw */, X86::PSLLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24645 { 6514 /* psllw */, X86::PSLLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24646 { 6514 /* psllw */, X86::PSLLWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24647 { 6520 /* psmash */, X86::PSMASH, Convert_NoOperands, AMFBS_In64BitMode, { }, },
24648 { 6520 /* psmash */, X86::PSMASH, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
24649 { 6527 /* psrad */, X86::MMX_PSRADrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24650 { 6527 /* psrad */, X86::MMX_PSRADri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, },
24651 { 6527 /* psrad */, X86::MMX_PSRADrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24652 { 6527 /* psrad */, X86::PSRADrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24653 { 6527 /* psrad */, X86::PSRADri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24654 { 6527 /* psrad */, X86::PSRADrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24655 { 6533 /* psraw */, X86::MMX_PSRAWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24656 { 6533 /* psraw */, X86::MMX_PSRAWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, },
24657 { 6533 /* psraw */, X86::MMX_PSRAWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24658 { 6533 /* psraw */, X86::PSRAWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24659 { 6533 /* psraw */, X86::PSRAWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24660 { 6533 /* psraw */, X86::PSRAWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24661 { 6539 /* psrld */, X86::MMX_PSRLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24662 { 6539 /* psrld */, X86::MMX_PSRLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, },
24663 { 6539 /* psrld */, X86::MMX_PSRLDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24664 { 6539 /* psrld */, X86::PSRLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24665 { 6539 /* psrld */, X86::PSRLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24666 { 6539 /* psrld */, X86::PSRLDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24667 { 6545 /* psrldq */, X86::PSRLDQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24668 { 6552 /* psrlq */, X86::MMX_PSRLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24669 { 6552 /* psrlq */, X86::MMX_PSRLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, },
24670 { 6552 /* psrlq */, X86::MMX_PSRLQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24671 { 6552 /* psrlq */, X86::PSRLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24672 { 6552 /* psrlq */, X86::PSRLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24673 { 6552 /* psrlq */, X86::PSRLQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24674 { 6558 /* psrlw */, X86::MMX_PSRLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24675 { 6558 /* psrlw */, X86::MMX_PSRLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_VR64, MCK_ImmUnsignedi8 }, },
24676 { 6558 /* psrlw */, X86::MMX_PSRLWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24677 { 6558 /* psrlw */, X86::PSRLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24678 { 6558 /* psrlw */, X86::PSRLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24679 { 6558 /* psrlw */, X86::PSRLWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24680 { 6564 /* psubb */, X86::MMX_PSUBBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24681 { 6564 /* psubb */, X86::MMX_PSUBBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24682 { 6564 /* psubb */, X86::PSUBBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24683 { 6564 /* psubb */, X86::PSUBBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24684 { 6570 /* psubd */, X86::MMX_PSUBDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24685 { 6570 /* psubd */, X86::MMX_PSUBDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24686 { 6570 /* psubd */, X86::PSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24687 { 6570 /* psubd */, X86::PSUBDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24688 { 6576 /* psubq */, X86::MMX_PSUBQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24689 { 6576 /* psubq */, X86::MMX_PSUBQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24690 { 6576 /* psubq */, X86::PSUBQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24691 { 6576 /* psubq */, X86::PSUBQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24692 { 6582 /* psubsb */, X86::MMX_PSUBSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24693 { 6582 /* psubsb */, X86::MMX_PSUBSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24694 { 6582 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24695 { 6582 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24696 { 6589 /* psubsw */, X86::MMX_PSUBSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24697 { 6589 /* psubsw */, X86::MMX_PSUBSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24698 { 6589 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24699 { 6589 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24700 { 6596 /* psubusb */, X86::MMX_PSUBUSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24701 { 6596 /* psubusb */, X86::MMX_PSUBUSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24702 { 6596 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24703 { 6596 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24704 { 6604 /* psubusw */, X86::MMX_PSUBUSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24705 { 6604 /* psubusw */, X86::MMX_PSUBUSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24706 { 6604 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24707 { 6604 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24708 { 6612 /* psubw */, X86::MMX_PSUBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24709 { 6612 /* psubw */, X86::MMX_PSUBWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24710 { 6612 /* psubw */, X86::PSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24711 { 6612 /* psubw */, X86::PSUBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24712 { 6618 /* pswapd */, X86::PSWAPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24713 { 6618 /* pswapd */, X86::PSWAPDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24714 { 6625 /* ptest */, X86::PTESTrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24715 { 6625 /* ptest */, X86::PTESTrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24716 { 6631 /* ptwrite */, X86::PTWRITEr, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
24717 { 6631 /* ptwrite */, X86::PTWRITE64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
24718 { 6631 /* ptwrite */, X86::PTWRITEm, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
24719 { 6631 /* ptwrite */, X86::PTWRITE64m, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
24720 { 6657 /* punpckhbw */, X86::MMX_PUNPCKHBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24721 { 6657 /* punpckhbw */, X86::MMX_PUNPCKHBWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24722 { 6657 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24723 { 6657 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24724 { 6667 /* punpckhdq */, X86::MMX_PUNPCKHDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24725 { 6667 /* punpckhdq */, X86::MMX_PUNPCKHDQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24726 { 6667 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24727 { 6667 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24728 { 6677 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24729 { 6677 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24730 { 6688 /* punpckhwd */, X86::MMX_PUNPCKHWDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24731 { 6688 /* punpckhwd */, X86::MMX_PUNPCKHWDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24732 { 6688 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24733 { 6688 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24734 { 6698 /* punpcklbw */, X86::MMX_PUNPCKLBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24735 { 6698 /* punpcklbw */, X86::MMX_PUNPCKLBWirm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_VR64, MCK_Mem32 }, },
24736 { 6698 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24737 { 6698 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24738 { 6708 /* punpckldq */, X86::MMX_PUNPCKLDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24739 { 6708 /* punpckldq */, X86::MMX_PUNPCKLDQirm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_VR64, MCK_Mem32 }, },
24740 { 6708 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24741 { 6708 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24742 { 6718 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24743 { 6718 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24744 { 6729 /* punpcklwd */, X86::MMX_PUNPCKLWDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24745 { 6729 /* punpcklwd */, X86::MMX_PUNPCKLWDirm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_VR64, MCK_Mem32 }, },
24746 { 6729 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24747 { 6729 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24748 { 6739 /* push */, X86::PUSHCS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_CS }, },
24749 { 6739 /* push */, X86::PUSHCS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_CS }, },
24750 { 6739 /* push */, X86::PUSHDS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, },
24751 { 6739 /* push */, X86::PUSHDS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_DS }, },
24752 { 6739 /* push */, X86::PUSHES16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, },
24753 { 6739 /* push */, X86::PUSHES32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_ES }, },
24754 { 6739 /* push */, X86::PUSHFS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_FS }, },
24755 { 6739 /* push */, X86::PUSHFS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_FS }, },
24756 { 6739 /* push */, X86::PUSHFS16, Convert_NoOperands, AMFBS_None, { MCK_FS }, },
24757 { 6739 /* push */, X86::PUSHGS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_GS }, },
24758 { 6739 /* push */, X86::PUSHGS64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_GS }, },
24759 { 6739 /* push */, X86::PUSHGS16, Convert_NoOperands, AMFBS_None, { MCK_GS }, },
24760 { 6739 /* push */, X86::PUSHSS16, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, },
24761 { 6739 /* push */, X86::PUSHSS32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_SS }, },
24762 { 6739 /* push */, X86::PUSH16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
24763 { 6739 /* push */, X86::PUSH32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
24764 { 6739 /* push */, X86::PUSH64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
24765 { 6739 /* push */, X86::PUSH64i8, Convert__ImmSExti64i81_0, AMFBS_In64BitMode, { MCK_ImmSExti64i8 }, },
24766 { 6739 /* push */, X86::PUSH16i8, Convert__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8 }, },
24767 { 6739 /* push */, X86::PUSH32i8, Convert__ImmSExti32i81_0, AMFBS_Not64BitMode, { MCK_ImmSExti32i8 }, },
24768 { 6739 /* push */, X86::PUSH64i32, Convert__ImmSExti64i321_0, AMFBS_In64BitMode, { MCK_ImmSExti64i32 }, },
24769 { 6739 /* push */, X86::PUSHi32, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, },
24770 { 6739 /* push */, X86::PUSHi16, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
24771 { 6739 /* push */, X86::PUSH16rmm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
24772 { 6739 /* push */, X86::PUSH32rmm, Convert__Mem325_0, AMFBS_Not64BitMode, { MCK_Mem32 }, },
24773 { 6739 /* push */, X86::PUSH64rmm, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
24774 { 6744 /* pushal */, X86::PUSHA32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
24775 { 6751 /* pushaw */, X86::PUSHA16, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
24776 { 6758 /* pushf */, X86::PUSHF16, Convert_NoOperands, AMFBS_None, { }, },
24777 { 6764 /* pushfd */, X86::PUSHF32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
24778 { 6778 /* pushfq */, X86::PUSHF64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
24779 { 6810 /* pvalidate */, X86::PVALIDATE32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
24780 { 6810 /* pvalidate */, X86::PVALIDATE64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
24781 { 6810 /* pvalidate */, X86::PVALIDATE32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, },
24782 { 6810 /* pvalidate */, X86::PVALIDATE64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
24783 { 6820 /* pxor */, X86::MMX_PXORirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_VR64, MCK_VR64 }, },
24784 { 6820 /* pxor */, X86::MMX_PXORirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_VR64, MCK_Mem64 }, },
24785 { 6820 /* pxor */, X86::PXORrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24786 { 6820 /* pxor */, X86::PXORrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24787 { 6825 /* rcl */, X86::RCL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24788 { 6825 /* rcl */, X86::RCL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24789 { 6825 /* rcl */, X86::RCL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24790 { 6825 /* rcl */, X86::RCL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24791 { 6825 /* rcl */, X86::RCL16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
24792 { 6825 /* rcl */, X86::RCL32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
24793 { 6825 /* rcl */, X86::RCL64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
24794 { 6825 /* rcl */, X86::RCL8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
24795 { 6825 /* rcl */, X86::RCL16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24796 { 6825 /* rcl */, X86::RCL16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
24797 { 6825 /* rcl */, X86::RCL32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24798 { 6825 /* rcl */, X86::RCL32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
24799 { 6825 /* rcl */, X86::RCL64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, },
24800 { 6825 /* rcl */, X86::RCL64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, },
24801 { 6825 /* rcl */, X86::RCL8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24802 { 6825 /* rcl */, X86::RCL8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, },
24803 { 6825 /* rcl */, X86::RCL16mCL, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_CL }, },
24804 { 6825 /* rcl */, X86::RCL16mi, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
24805 { 6825 /* rcl */, X86::RCL32mCL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_CL }, },
24806 { 6825 /* rcl */, X86::RCL32mi, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
24807 { 6825 /* rcl */, X86::RCL64mCL, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_CL }, },
24808 { 6825 /* rcl */, X86::RCL64mi, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
24809 { 6825 /* rcl */, X86::RCL8mCL, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_CL }, },
24810 { 6825 /* rcl */, X86::RCL8mi, Convert__Mem85_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
24811 { 6849 /* rcpps */, X86::RCPPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24812 { 6849 /* rcpps */, X86::RCPPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24813 { 6855 /* rcpss */, X86::RCPSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24814 { 6855 /* rcpss */, X86::RCPSSm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
24815 { 6861 /* rcr */, X86::RCR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24816 { 6861 /* rcr */, X86::RCR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24817 { 6861 /* rcr */, X86::RCR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24818 { 6861 /* rcr */, X86::RCR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24819 { 6861 /* rcr */, X86::RCR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
24820 { 6861 /* rcr */, X86::RCR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
24821 { 6861 /* rcr */, X86::RCR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
24822 { 6861 /* rcr */, X86::RCR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
24823 { 6861 /* rcr */, X86::RCR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24824 { 6861 /* rcr */, X86::RCR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
24825 { 6861 /* rcr */, X86::RCR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24826 { 6861 /* rcr */, X86::RCR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
24827 { 6861 /* rcr */, X86::RCR64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, },
24828 { 6861 /* rcr */, X86::RCR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, },
24829 { 6861 /* rcr */, X86::RCR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24830 { 6861 /* rcr */, X86::RCR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, },
24831 { 6861 /* rcr */, X86::RCR16mCL, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_CL }, },
24832 { 6861 /* rcr */, X86::RCR16mi, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
24833 { 6861 /* rcr */, X86::RCR32mCL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_CL }, },
24834 { 6861 /* rcr */, X86::RCR32mi, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
24835 { 6861 /* rcr */, X86::RCR64mCL, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_CL }, },
24836 { 6861 /* rcr */, X86::RCR64mi, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
24837 { 6861 /* rcr */, X86::RCR8mCL, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_CL }, },
24838 { 6861 /* rcr */, X86::RCR8mi, Convert__Mem85_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
24839 { 6885 /* rdfsbase */, X86::RDFSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
24840 { 6885 /* rdfsbase */, X86::RDFSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
24841 { 6914 /* rdgsbase */, X86::RDGSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
24842 { 6914 /* rdgsbase */, X86::RDGSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
24843 { 6943 /* rdmsr */, X86::RDMSR, Convert_NoOperands, AMFBS_None, { }, },
24844 { 6949 /* rdpid */, X86::RDPID32, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
24845 { 6949 /* rdpid */, X86::RDPID64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
24846 { 6955 /* rdpkru */, X86::RDPKRUr, Convert_NoOperands, AMFBS_None, { }, },
24847 { 6962 /* rdpmc */, X86::RDPMC, Convert_NoOperands, AMFBS_None, { }, },
24848 { 6968 /* rdrand */, X86::RDRAND16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
24849 { 6968 /* rdrand */, X86::RDRAND32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
24850 { 6968 /* rdrand */, X86::RDRAND64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
24851 { 6999 /* rdseed */, X86::RDSEED16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
24852 { 6999 /* rdseed */, X86::RDSEED32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
24853 { 6999 /* rdseed */, X86::RDSEED64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
24854 { 7030 /* rdsspd */, X86::RDSSPD, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24855 { 7037 /* rdsspq */, X86::RDSSPQ, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24856 { 7044 /* rdtsc */, X86::RDTSC, Convert_NoOperands, AMFBS_None, { }, },
24857 { 7050 /* rdtscp */, X86::RDTSCP, Convert_NoOperands, AMFBS_None, { }, },
24858 { 7057 /* rep */, X86::REP_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
24859 { 7061 /* repne */, X86::REPNE_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
24860 { 7067 /* ret */, X86::RETL, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
24861 { 7067 /* ret */, X86::RETQ, Convert_NoOperands, AMFBS_In64BitMode, { }, },
24862 { 7067 /* ret */, X86::RETW, Convert_NoOperands, AMFBS_None, { }, },
24863 { 7067 /* ret */, X86::RETIL, Convert__Imm1_0, AMFBS_Not64BitMode, { MCK_Imm }, },
24864 { 7067 /* ret */, X86::RETIQ, Convert__Imm1_0, AMFBS_In64BitMode, { MCK_Imm }, },
24865 { 7067 /* ret */, X86::RETIW, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
24866 { 7071 /* retf */, X86::LRETL, Convert_NoOperands, AMFBS_None, { }, },
24867 { 7071 /* retf */, X86::LRETW, Convert_NoOperands, AMFBS_None, { }, },
24868 { 7071 /* retf */, X86::LRETIL, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
24869 { 7071 /* retf */, X86::LRETIW, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
24870 { 7076 /* retfq */, X86::LRETQ, Convert_NoOperands, AMFBS_In64BitMode, { }, },
24871 { 7076 /* retfq */, X86::LRETIQ, Convert__Imm1_0, AMFBS_In64BitMode, { MCK_Imm }, },
24872 { 7097 /* rex64 */, X86::REX64_PREFIX, Convert_NoOperands, AMFBS_In64BitMode, { }, },
24873 { 7103 /* rmpadjust */, X86::RMPADJUST, Convert_NoOperands, AMFBS_In64BitMode, { }, },
24874 { 7103 /* rmpadjust */, X86::RMPADJUST, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
24875 { 7113 /* rmpupdate */, X86::RMPUPDATE, Convert_NoOperands, AMFBS_In64BitMode, { }, },
24876 { 7113 /* rmpupdate */, X86::RMPUPDATE, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
24877 { 7123 /* rol */, X86::ROL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24878 { 7123 /* rol */, X86::ROL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24879 { 7123 /* rol */, X86::ROL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24880 { 7123 /* rol */, X86::ROL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24881 { 7123 /* rol */, X86::ROL16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
24882 { 7123 /* rol */, X86::ROL32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
24883 { 7123 /* rol */, X86::ROL64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
24884 { 7123 /* rol */, X86::ROL8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
24885 { 7123 /* rol */, X86::ROL16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24886 { 7123 /* rol */, X86::ROL16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
24887 { 7123 /* rol */, X86::ROL32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24888 { 7123 /* rol */, X86::ROL32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
24889 { 7123 /* rol */, X86::ROL64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, },
24890 { 7123 /* rol */, X86::ROL64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, },
24891 { 7123 /* rol */, X86::ROL8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24892 { 7123 /* rol */, X86::ROL8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, },
24893 { 7123 /* rol */, X86::ROL16mCL, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_CL }, },
24894 { 7123 /* rol */, X86::ROL16mi, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
24895 { 7123 /* rol */, X86::ROL32mCL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_CL }, },
24896 { 7123 /* rol */, X86::ROL32mi, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
24897 { 7123 /* rol */, X86::ROL64mCL, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_CL }, },
24898 { 7123 /* rol */, X86::ROL64mi, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
24899 { 7123 /* rol */, X86::ROL8mCL, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_CL }, },
24900 { 7123 /* rol */, X86::ROL8mi, Convert__Mem85_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
24901 { 7147 /* ror */, X86::ROR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24902 { 7147 /* ror */, X86::ROR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24903 { 7147 /* ror */, X86::ROR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24904 { 7147 /* ror */, X86::ROR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24905 { 7147 /* ror */, X86::ROR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
24906 { 7147 /* ror */, X86::ROR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
24907 { 7147 /* ror */, X86::ROR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
24908 { 7147 /* ror */, X86::ROR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
24909 { 7147 /* ror */, X86::ROR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24910 { 7147 /* ror */, X86::ROR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
24911 { 7147 /* ror */, X86::ROR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24912 { 7147 /* ror */, X86::ROR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
24913 { 7147 /* ror */, X86::ROR64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, },
24914 { 7147 /* ror */, X86::ROR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, },
24915 { 7147 /* ror */, X86::ROR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24916 { 7147 /* ror */, X86::ROR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, },
24917 { 7147 /* ror */, X86::ROR16mCL, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_CL }, },
24918 { 7147 /* ror */, X86::ROR16mi, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
24919 { 7147 /* ror */, X86::ROR32mCL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_CL }, },
24920 { 7147 /* ror */, X86::ROR32mi, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
24921 { 7147 /* ror */, X86::ROR64mCL, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_CL }, },
24922 { 7147 /* ror */, X86::ROR64mi, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
24923 { 7147 /* ror */, X86::ROR8mCL, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_CL }, },
24924 { 7147 /* ror */, X86::ROR8mi, Convert__Mem85_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
24925 { 7171 /* rorx */, X86::RORX32ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24926 { 7171 /* rorx */, X86::RORX32mi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
24927 { 7171 /* rorx */, X86::RORX64ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, },
24928 { 7171 /* rorx */, X86::RORX64mi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24929 { 7188 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24930 { 7188 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24931 { 7196 /* roundps */, X86::ROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24932 { 7196 /* roundps */, X86::ROUNDPSm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24933 { 7204 /* roundsd */, X86::ROUNDSDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24934 { 7204 /* roundsd */, X86::ROUNDSDm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24935 { 7212 /* roundss */, X86::ROUNDSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24936 { 7212 /* roundss */, X86::ROUNDSSm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
24937 { 7220 /* rsm */, X86::RSM, Convert_NoOperands, AMFBS_None, { }, },
24938 { 7224 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24939 { 7224 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24940 { 7232 /* rsqrtss */, X86::RSQRTSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24941 { 7232 /* rsqrtss */, X86::RSQRTSSm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
24942 { 7240 /* rstorssp */, X86::RSTORSSP, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
24943 { 7249 /* sahf */, X86::SAHF, Convert_NoOperands, AMFBS_None, { }, },
24944 { 7254 /* salc */, X86::SALC, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
24945 { 7259 /* sar */, X86::SAR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24946 { 7259 /* sar */, X86::SAR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24947 { 7259 /* sar */, X86::SAR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
24948 { 7259 /* sar */, X86::SAR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24949 { 7259 /* sar */, X86::SAR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
24950 { 7259 /* sar */, X86::SAR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
24951 { 7259 /* sar */, X86::SAR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
24952 { 7259 /* sar */, X86::SAR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
24953 { 7259 /* sar */, X86::SAR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24954 { 7259 /* sar */, X86::SAR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
24955 { 7259 /* sar */, X86::SAR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24956 { 7259 /* sar */, X86::SAR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
24957 { 7259 /* sar */, X86::SAR64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, },
24958 { 7259 /* sar */, X86::SAR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, },
24959 { 7259 /* sar */, X86::SAR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24960 { 7259 /* sar */, X86::SAR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, },
24961 { 7259 /* sar */, X86::SAR16mCL, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_CL }, },
24962 { 7259 /* sar */, X86::SAR16mi, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
24963 { 7259 /* sar */, X86::SAR32mCL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_CL }, },
24964 { 7259 /* sar */, X86::SAR32mi, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
24965 { 7259 /* sar */, X86::SAR64mCL, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_CL }, },
24966 { 7259 /* sar */, X86::SAR64mi, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
24967 { 7259 /* sar */, X86::SAR8mCL, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_CL }, },
24968 { 7259 /* sar */, X86::SAR8mi, Convert__Mem85_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
24969 { 7283 /* sarx */, X86::SARX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24970 { 7283 /* sarx */, X86::SARX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
24971 { 7283 /* sarx */, X86::SARX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
24972 { 7283 /* sarx */, X86::SARX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
24973 { 7300 /* saveprevssp */, X86::SAVEPREVSSP, Convert_NoOperands, AMFBS_None, { }, },
24974 { 7312 /* sbb */, X86::SBB8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, },
24975 { 7312 /* sbb */, X86::SBB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, },
24976 { 7312 /* sbb */, X86::SBB16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, },
24977 { 7312 /* sbb */, X86::SBB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, },
24978 { 7312 /* sbb */, X86::SBB32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, },
24979 { 7312 /* sbb */, X86::SBB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, },
24980 { 7312 /* sbb */, X86::SBB64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, },
24981 { 7312 /* sbb */, X86::SBB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24982 { 7312 /* sbb */, X86::SBB16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
24983 { 7312 /* sbb */, X86::SBB16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
24984 { 7312 /* sbb */, X86::SBB16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
24985 { 7312 /* sbb */, X86::SBB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24986 { 7312 /* sbb */, X86::SBB32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
24987 { 7312 /* sbb */, X86::SBB32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
24988 { 7312 /* sbb */, X86::SBB32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
24989 { 7312 /* sbb */, X86::SBB64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
24990 { 7312 /* sbb */, X86::SBB64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, },
24991 { 7312 /* sbb */, X86::SBB64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, },
24992 { 7312 /* sbb */, X86::SBB64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
24993 { 7312 /* sbb */, X86::SBB8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
24994 { 7312 /* sbb */, X86::SBB8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
24995 { 7312 /* sbb */, X86::SBB8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
24996 { 7312 /* sbb */, X86::SBB16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
24997 { 7312 /* sbb */, X86::SBB16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, },
24998 { 7312 /* sbb */, X86::SBB16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, },
24999 { 7312 /* sbb */, X86::SBB32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
25000 { 7312 /* sbb */, X86::SBB32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, },
25001 { 7312 /* sbb */, X86::SBB32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, },
25002 { 7312 /* sbb */, X86::SBB64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
25003 { 7312 /* sbb */, X86::SBB64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
25004 { 7312 /* sbb */, X86::SBB64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
25005 { 7312 /* sbb */, X86::SBB8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
25006 { 7312 /* sbb */, X86::SBB8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, },
25007 { 7336 /* scas */, X86::SCASW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16 }, },
25008 { 7336 /* scas */, X86::SCASL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32 }, },
25009 { 7336 /* scas */, X86::SCASQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64 }, },
25010 { 7336 /* scas */, X86::SCASB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8 }, },
25011 { 7336 /* scas */, X86::SCASB, Convert__DstIdx81_1, AMFBS_None, { MCK_AL, MCK_DstIdx8 }, },
25012 { 7336 /* scas */, X86::SCASW, Convert__DstIdx161_1, AMFBS_None, { MCK_AX, MCK_DstIdx16 }, },
25013 { 7336 /* scas */, X86::SCASL, Convert__DstIdx321_1, AMFBS_None, { MCK_EAX, MCK_DstIdx32 }, },
25014 { 7336 /* scas */, X86::SCASQ, Convert__DstIdx641_1, AMFBS_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
25015 { 7341 /* scasb */, X86::SCASB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8 }, },
25016 { 7341 /* scasb */, X86::SCASB, Convert__DstIdx81_1, AMFBS_None, { MCK_AL, MCK_DstIdx8 }, },
25017 { 7347 /* scasd */, X86::SCASL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32 }, },
25018 { 7347 /* scasd */, X86::SCASL, Convert__DstIdx321_1, AMFBS_None, { MCK_EAX, MCK_DstIdx32 }, },
25019 { 7359 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64 }, },
25020 { 7359 /* scasq */, X86::SCASQ, Convert__DstIdx641_1, AMFBS_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
25021 { 7365 /* scasw */, X86::SCASW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16 }, },
25022 { 7365 /* scasw */, X86::SCASW, Convert__DstIdx161_1, AMFBS_None, { MCK_AX, MCK_DstIdx16 }, },
25023 { 7371 /* seamcall */, X86::SEAMCALL, Convert_NoOperands, AMFBS_In64BitMode, { }, },
25024 { 7380 /* seamops */, X86::SEAMOPS, Convert_NoOperands, AMFBS_In64BitMode, { }, },
25025 { 7388 /* seamret */, X86::SEAMRET, Convert_NoOperands, AMFBS_In64BitMode, { }, },
25026 { 7396 /* senduipi */, X86::SENDUIPI, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
25027 { 7405 /* serialize */, X86::SERIALIZE, Convert_NoOperands, AMFBS_None, { }, },
25028 { 7415 /* seta */, X86::SETCCr, Convert__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR8 }, },
25029 { 7415 /* seta */, X86::SETCCm, Convert__Mem85_0__imm_95_7, AMFBS_None, { MCK_Mem8 }, },
25030 { 7420 /* setae */, X86::SETCCr, Convert__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR8 }, },
25031 { 7420 /* setae */, X86::SETCCm, Convert__Mem85_0__imm_95_3, AMFBS_None, { MCK_Mem8 }, },
25032 { 7426 /* setb */, X86::SETCCr, Convert__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR8 }, },
25033 { 7426 /* setb */, X86::SETCCm, Convert__Mem85_0__imm_95_2, AMFBS_None, { MCK_Mem8 }, },
25034 { 7431 /* setbe */, X86::SETCCr, Convert__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR8 }, },
25035 { 7431 /* setbe */, X86::SETCCm, Convert__Mem85_0__imm_95_6, AMFBS_None, { MCK_Mem8 }, },
25036 { 7437 /* sete */, X86::SETCCr, Convert__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR8 }, },
25037 { 7437 /* sete */, X86::SETCCm, Convert__Mem85_0__imm_95_4, AMFBS_None, { MCK_Mem8 }, },
25038 { 7442 /* setg */, X86::SETCCr, Convert__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR8 }, },
25039 { 7442 /* setg */, X86::SETCCm, Convert__Mem85_0__imm_95_15, AMFBS_None, { MCK_Mem8 }, },
25040 { 7447 /* setge */, X86::SETCCr, Convert__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR8 }, },
25041 { 7447 /* setge */, X86::SETCCm, Convert__Mem85_0__imm_95_13, AMFBS_None, { MCK_Mem8 }, },
25042 { 7453 /* setl */, X86::SETCCr, Convert__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR8 }, },
25043 { 7453 /* setl */, X86::SETCCm, Convert__Mem85_0__imm_95_12, AMFBS_None, { MCK_Mem8 }, },
25044 { 7458 /* setle */, X86::SETCCr, Convert__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR8 }, },
25045 { 7458 /* setle */, X86::SETCCm, Convert__Mem85_0__imm_95_14, AMFBS_None, { MCK_Mem8 }, },
25046 { 7464 /* setne */, X86::SETCCr, Convert__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR8 }, },
25047 { 7464 /* setne */, X86::SETCCm, Convert__Mem85_0__imm_95_5, AMFBS_None, { MCK_Mem8 }, },
25048 { 7470 /* setno */, X86::SETCCr, Convert__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR8 }, },
25049 { 7470 /* setno */, X86::SETCCm, Convert__Mem85_0__imm_95_1, AMFBS_None, { MCK_Mem8 }, },
25050 { 7476 /* setnp */, X86::SETCCr, Convert__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR8 }, },
25051 { 7476 /* setnp */, X86::SETCCm, Convert__Mem85_0__imm_95_11, AMFBS_None, { MCK_Mem8 }, },
25052 { 7482 /* setns */, X86::SETCCr, Convert__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR8 }, },
25053 { 7482 /* setns */, X86::SETCCm, Convert__Mem85_0__imm_95_9, AMFBS_None, { MCK_Mem8 }, },
25054 { 7488 /* seto */, X86::SETCCr, Convert__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR8 }, },
25055 { 7488 /* seto */, X86::SETCCm, Convert__Mem85_0__imm_95_0, AMFBS_None, { MCK_Mem8 }, },
25056 { 7493 /* setp */, X86::SETCCr, Convert__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR8 }, },
25057 { 7493 /* setp */, X86::SETCCm, Convert__Mem85_0__imm_95_10, AMFBS_None, { MCK_Mem8 }, },
25058 { 7498 /* sets */, X86::SETCCr, Convert__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR8 }, },
25059 { 7498 /* sets */, X86::SETCCm, Convert__Mem85_0__imm_95_8, AMFBS_None, { MCK_Mem8 }, },
25060 { 7503 /* setssbsy */, X86::SETSSBSY, Convert_NoOperands, AMFBS_None, { }, },
25061 { 7512 /* sfence */, X86::SFENCE, Convert_NoOperands, AMFBS_None, { }, },
25062 { 7519 /* sgdt */, X86::SGDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
25063 { 7524 /* sgdtd */, X86::SGDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
25064 { 7542 /* sgdtw */, X86::SGDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
25065 { 7548 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25066 { 7548 /* sha1msg1 */, X86::SHA1MSG1rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25067 { 7557 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25068 { 7557 /* sha1msg2 */, X86::SHA1MSG2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25069 { 7566 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25070 { 7566 /* sha1nexte */, X86::SHA1NEXTErm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25071 { 7576 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25072 { 7576 /* sha1rnds4 */, X86::SHA1RNDS4rmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25073 { 7586 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25074 { 7586 /* sha256msg1 */, X86::SHA256MSG1rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25075 { 7597 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25076 { 7597 /* sha256msg2 */, X86::SHA256MSG2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25077 { 7608 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25078 { 7608 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25079 { 7608 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
25080 { 7608 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
25081 { 7620 /* shl */, X86::SHL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
25082 { 7620 /* shl */, X86::SHL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
25083 { 7620 /* shl */, X86::SHL64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
25084 { 7620 /* shl */, X86::SHL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
25085 { 7620 /* shl */, X86::SHL16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
25086 { 7620 /* shl */, X86::SHL32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
25087 { 7620 /* shl */, X86::SHL64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
25088 { 7620 /* shl */, X86::SHL8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
25089 { 7620 /* shl */, X86::SHL16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
25090 { 7620 /* shl */, X86::SHL16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
25091 { 7620 /* shl */, X86::SHL32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
25092 { 7620 /* shl */, X86::SHL32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
25093 { 7620 /* shl */, X86::SHL64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, },
25094 { 7620 /* shl */, X86::SHL64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, },
25095 { 7620 /* shl */, X86::SHL8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
25096 { 7620 /* shl */, X86::SHL8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, },
25097 { 7620 /* shl */, X86::SHL16mCL, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_CL }, },
25098 { 7620 /* shl */, X86::SHL16mi, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
25099 { 7620 /* shl */, X86::SHL32mCL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_CL }, },
25100 { 7620 /* shl */, X86::SHL32mi, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
25101 { 7620 /* shl */, X86::SHL64mCL, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_CL }, },
25102 { 7620 /* shl */, X86::SHL64mi, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
25103 { 7620 /* shl */, X86::SHL8mCL, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_CL }, },
25104 { 7620 /* shl */, X86::SHL8mi, Convert__Mem85_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
25105 { 7629 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
25106 { 7629 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25107 { 7629 /* shld */, X86::SHLD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
25108 { 7629 /* shld */, X86::SHLD16mrCL, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
25109 { 7629 /* shld */, X86::SHLD32mrCL, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
25110 { 7629 /* shld */, X86::SHLD64mrCL, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
25111 { 7629 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_CL }, },
25112 { 7629 /* shld */, X86::SHLD16rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, },
25113 { 7629 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_CL }, },
25114 { 7629 /* shld */, X86::SHLD32rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
25115 { 7629 /* shld */, X86::SHLD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_CL }, },
25116 { 7629 /* shld */, X86::SHLD64rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, },
25117 { 7629 /* shld */, X86::SHLD16mrCL, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16, MCK_CL }, },
25118 { 7629 /* shld */, X86::SHLD16mri8, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem16, MCK_GR16, MCK_ImmUnsignedi8 }, },
25119 { 7629 /* shld */, X86::SHLD32mrCL, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_CL }, },
25120 { 7629 /* shld */, X86::SHLD32mri8, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_ImmUnsignedi8 }, },
25121 { 7629 /* shld */, X86::SHLD64mrCL, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_CL }, },
25122 { 7629 /* shld */, X86::SHLD64mri8, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_ImmUnsignedi8 }, },
25123 { 7667 /* shlx */, X86::SHLX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
25124 { 7667 /* shlx */, X86::SHLX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
25125 { 7667 /* shlx */, X86::SHLX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
25126 { 7667 /* shlx */, X86::SHLX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
25127 { 7684 /* shr */, X86::SHR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
25128 { 7684 /* shr */, X86::SHR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
25129 { 7684 /* shr */, X86::SHR64r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
25130 { 7684 /* shr */, X86::SHR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
25131 { 7684 /* shr */, X86::SHR16m1, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
25132 { 7684 /* shr */, X86::SHR32m1, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
25133 { 7684 /* shr */, X86::SHR64m1, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64 }, },
25134 { 7684 /* shr */, X86::SHR8m1, Convert__Mem85_0, AMFBS_None, { MCK_Mem8 }, },
25135 { 7684 /* shr */, X86::SHR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
25136 { 7684 /* shr */, X86::SHR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
25137 { 7684 /* shr */, X86::SHR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
25138 { 7684 /* shr */, X86::SHR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
25139 { 7684 /* shr */, X86::SHR64rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_CL }, },
25140 { 7684 /* shr */, X86::SHR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR64, MCK_ImmUnsignedi8 }, },
25141 { 7684 /* shr */, X86::SHR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
25142 { 7684 /* shr */, X86::SHR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, },
25143 { 7684 /* shr */, X86::SHR16mCL, Convert__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_CL }, },
25144 { 7684 /* shr */, X86::SHR16mi, Convert__Mem165_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
25145 { 7684 /* shr */, X86::SHR32mCL, Convert__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_CL }, },
25146 { 7684 /* shr */, X86::SHR32mi, Convert__Mem325_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
25147 { 7684 /* shr */, X86::SHR64mCL, Convert__Mem645_0, AMFBS_In64BitMode, { MCK_Mem64, MCK_CL }, },
25148 { 7684 /* shr */, X86::SHR64mi, Convert__Mem645_0__ImmUnsignedi81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
25149 { 7684 /* shr */, X86::SHR8mCL, Convert__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_CL }, },
25150 { 7684 /* shr */, X86::SHR8mi, Convert__Mem85_0__ImmUnsignedi81_1, AMFBS_None, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
25151 { 7693 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
25152 { 7693 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25153 { 7693 /* shrd */, X86::SHRD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
25154 { 7693 /* shrd */, X86::SHRD16mrCL, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
25155 { 7693 /* shrd */, X86::SHRD32mrCL, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
25156 { 7693 /* shrd */, X86::SHRD64mrCL, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
25157 { 7693 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_CL }, },
25158 { 7693 /* shrd */, X86::SHRD16rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, },
25159 { 7693 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_CL }, },
25160 { 7693 /* shrd */, X86::SHRD32rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
25161 { 7693 /* shrd */, X86::SHRD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_CL }, },
25162 { 7693 /* shrd */, X86::SHRD64rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, },
25163 { 7693 /* shrd */, X86::SHRD16mrCL, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16, MCK_CL }, },
25164 { 7693 /* shrd */, X86::SHRD16mri8, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem16, MCK_GR16, MCK_ImmUnsignedi8 }, },
25165 { 7693 /* shrd */, X86::SHRD32mrCL, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_CL }, },
25166 { 7693 /* shrd */, X86::SHRD32mri8, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_ImmUnsignedi8 }, },
25167 { 7693 /* shrd */, X86::SHRD64mrCL, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_CL }, },
25168 { 7693 /* shrd */, X86::SHRD64mri8, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_GR64, MCK_ImmUnsignedi8 }, },
25169 { 7731 /* shrx */, X86::SHRX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
25170 { 7731 /* shrx */, X86::SHRX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
25171 { 7731 /* shrx */, X86::SHRX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
25172 { 7731 /* shrx */, X86::SHRX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
25173 { 7748 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25174 { 7748 /* shufpd */, X86::SHUFPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25175 { 7755 /* shufps */, X86::SHUFPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25176 { 7755 /* shufps */, X86::SHUFPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25177 { 7762 /* sidt */, X86::SIDT64m, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
25178 { 7767 /* sidtd */, X86::SIDT32m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
25179 { 7785 /* sidtw */, X86::SIDT16m, Convert__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem }, },
25180 { 7791 /* skinit */, X86::SKINIT, Convert_NoOperands, AMFBS_None, { }, },
25181 { 7791 /* skinit */, X86::SKINIT, Convert_NoOperands, AMFBS_None, { MCK_EAX }, },
25182 { 7798 /* sldt */, X86::SLDT16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
25183 { 7798 /* sldt */, X86::SLDT32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
25184 { 7798 /* sldt */, X86::SLDT64r, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
25185 { 7798 /* sldt */, X86::SLDT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
25186 { 7798 /* sldt */, X86::SLDT16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
25187 { 7821 /* slwpcb */, X86::SLWPCB, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
25188 { 7821 /* slwpcb */, X86::SLWPCB64, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
25189 { 7828 /* smsw */, X86::SMSW16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
25190 { 7828 /* smsw */, X86::SMSW32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
25191 { 7828 /* smsw */, X86::SMSW64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
25192 { 7828 /* smsw */, X86::SMSW16m, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
25193 { 7851 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25194 { 7851 /* sqrtpd */, X86::SQRTPDm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25195 { 7858 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25196 { 7858 /* sqrtps */, X86::SQRTPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25197 { 7865 /* sqrtsd */, X86::SQRTSDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25198 { 7865 /* sqrtsd */, X86::SQRTSDm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
25199 { 7872 /* sqrtss */, X86::SQRTSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25200 { 7872 /* sqrtss */, X86::SQRTSSm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
25201 { 7879 /* ss */, X86::SS_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
25202 { 7882 /* stac */, X86::STAC, Convert_NoOperands, AMFBS_None, { }, },
25203 { 7887 /* stc */, X86::STC, Convert_NoOperands, AMFBS_None, { }, },
25204 { 7891 /* std */, X86::STD, Convert_NoOperands, AMFBS_None, { }, },
25205 { 7895 /* stgi */, X86::STGI, Convert_NoOperands, AMFBS_None, { }, },
25206 { 7900 /* sti */, X86::STI, Convert_NoOperands, AMFBS_None, { }, },
25207 { 7904 /* stmxcsr */, X86::STMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
25208 { 7912 /* stos */, X86::STOSW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16 }, },
25209 { 7912 /* stos */, X86::STOSL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32 }, },
25210 { 7912 /* stos */, X86::STOSQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64 }, },
25211 { 7912 /* stos */, X86::STOSB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8 }, },
25212 { 7912 /* stos */, X86::STOSW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16, MCK_AX }, },
25213 { 7912 /* stos */, X86::STOSL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32, MCK_EAX }, },
25214 { 7912 /* stos */, X86::STOSQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
25215 { 7912 /* stos */, X86::STOSB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8, MCK_AL }, },
25216 { 7917 /* stosb */, X86::STOSB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8 }, },
25217 { 7917 /* stosb */, X86::STOSB, Convert__DstIdx81_0, AMFBS_None, { MCK_DstIdx8, MCK_AL }, },
25218 { 7923 /* stosd */, X86::STOSL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32 }, },
25219 { 7923 /* stosd */, X86::STOSL, Convert__DstIdx321_0, AMFBS_None, { MCK_DstIdx32, MCK_EAX }, },
25220 { 7935 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64 }, },
25221 { 7935 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, AMFBS_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
25222 { 7941 /* stosw */, X86::STOSW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16 }, },
25223 { 7941 /* stosw */, X86::STOSW, Convert__DstIdx161_0, AMFBS_None, { MCK_DstIdx16, MCK_AX }, },
25224 { 7947 /* str */, X86::STR16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
25225 { 7947 /* str */, X86::STR32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
25226 { 7947 /* str */, X86::STR64r, Convert__Reg1_0, AMFBS_None, { MCK_GR64 }, },
25227 { 7947 /* str */, X86::STRm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
25228 { 7966 /* sttilecfg */, X86::STTILECFG, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
25229 { 7976 /* stui */, X86::STUI, Convert_NoOperands, AMFBS_In64BitMode, { }, },
25230 { 7981 /* sub */, X86::SUB8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, },
25231 { 7981 /* sub */, X86::SUB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, },
25232 { 7981 /* sub */, X86::SUB16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, },
25233 { 7981 /* sub */, X86::SUB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, },
25234 { 7981 /* sub */, X86::SUB32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, },
25235 { 7981 /* sub */, X86::SUB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, },
25236 { 7981 /* sub */, X86::SUB64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, },
25237 { 7981 /* sub */, X86::SUB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
25238 { 7981 /* sub */, X86::SUB16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
25239 { 7981 /* sub */, X86::SUB16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
25240 { 7981 /* sub */, X86::SUB16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
25241 { 7981 /* sub */, X86::SUB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25242 { 7981 /* sub */, X86::SUB32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
25243 { 7981 /* sub */, X86::SUB32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
25244 { 7981 /* sub */, X86::SUB32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
25245 { 7981 /* sub */, X86::SUB64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
25246 { 7981 /* sub */, X86::SUB64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, },
25247 { 7981 /* sub */, X86::SUB64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, },
25248 { 7981 /* sub */, X86::SUB64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
25249 { 7981 /* sub */, X86::SUB8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
25250 { 7981 /* sub */, X86::SUB8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
25251 { 7981 /* sub */, X86::SUB8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
25252 { 7981 /* sub */, X86::SUB16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
25253 { 7981 /* sub */, X86::SUB16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, },
25254 { 7981 /* sub */, X86::SUB16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, },
25255 { 7981 /* sub */, X86::SUB32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
25256 { 7981 /* sub */, X86::SUB32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, },
25257 { 7981 /* sub */, X86::SUB32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, },
25258 { 7981 /* sub */, X86::SUB64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
25259 { 7981 /* sub */, X86::SUB64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
25260 { 7981 /* sub */, X86::SUB64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
25261 { 7981 /* sub */, X86::SUB8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
25262 { 7981 /* sub */, X86::SUB8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, },
25263 { 7995 /* subpd */, X86::SUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25264 { 7995 /* subpd */, X86::SUBPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25265 { 8001 /* subps */, X86::SUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25266 { 8001 /* subps */, X86::SUBPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25267 { 8012 /* subsd */, X86::SUBSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25268 { 8012 /* subsd */, X86::SUBSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
25269 { 8018 /* subss */, X86::SUBSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25270 { 8018 /* subss */, X86::SUBSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
25271 { 8029 /* swapgs */, X86::SWAPGS, Convert_NoOperands, AMFBS_None, { }, },
25272 { 8036 /* syscall */, X86::SYSCALL, Convert_NoOperands, AMFBS_None, { }, },
25273 { 8044 /* sysenter */, X86::SYSENTER, Convert_NoOperands, AMFBS_None, { }, },
25274 { 8053 /* sysexit */, X86::SYSEXIT, Convert_NoOperands, AMFBS_None, { }, },
25275 { 8070 /* sysexitq */, X86::SYSEXIT64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
25276 { 8079 /* sysret */, X86::SYSRET, Convert_NoOperands, AMFBS_None, { }, },
25277 { 8094 /* sysretq */, X86::SYSRET64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
25278 { 8102 /* t1mskc */, X86::T1MSKC32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25279 { 8102 /* t1mskc */, X86::T1MSKC32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
25280 { 8102 /* t1mskc */, X86::T1MSKC64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
25281 { 8102 /* t1mskc */, X86::T1MSKC64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
25282 { 8125 /* tdcall */, X86::TDCALL, Convert_NoOperands, AMFBS_None, { }, },
25283 { 8132 /* tdpbf16ps */, X86::TDPBF16PS, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_In64BitMode, { MCK_TILE, MCK_TILE, MCK_TILE }, },
25284 { 8142 /* tdpbssd */, X86::TDPBSSD, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_In64BitMode, { MCK_TILE, MCK_TILE, MCK_TILE }, },
25285 { 8150 /* tdpbsud */, X86::TDPBSUD, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_In64BitMode, { MCK_TILE, MCK_TILE, MCK_TILE }, },
25286 { 8158 /* tdpbusd */, X86::TDPBUSD, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_In64BitMode, { MCK_TILE, MCK_TILE, MCK_TILE }, },
25287 { 8166 /* tdpbuud */, X86::TDPBUUD, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_In64BitMode, { MCK_TILE, MCK_TILE, MCK_TILE }, },
25288 { 8174 /* test */, X86::TEST8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, },
25289 { 8174 /* test */, X86::TEST16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, },
25290 { 8174 /* test */, X86::TEST32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, },
25291 { 8174 /* test */, X86::TEST64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, },
25292 { 8174 /* test */, X86::TEST16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
25293 { 8174 /* test */, X86::TEST16ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
25294 { 8174 /* test */, X86::TEST16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
25295 { 8174 /* test */, X86::TEST32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25296 { 8174 /* test */, X86::TEST32ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
25297 { 8174 /* test */, X86::TEST32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
25298 { 8174 /* test */, X86::TEST64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
25299 { 8174 /* test */, X86::TEST64ri32, Convert__Reg1_0__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, },
25300 { 8174 /* test */, X86::TEST64mr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
25301 { 8174 /* test */, X86::TEST8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
25302 { 8174 /* test */, X86::TEST8ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
25303 { 8174 /* test */, X86::TEST8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
25304 { 8174 /* test */, X86::TEST16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
25305 { 8174 /* test */, X86::TEST16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, },
25306 { 8174 /* test */, X86::TEST32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
25307 { 8174 /* test */, X86::TEST32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, },
25308 { 8174 /* test */, X86::TEST64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
25309 { 8174 /* test */, X86::TEST64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
25310 { 8174 /* test */, X86::TEST8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
25311 { 8174 /* test */, X86::TEST8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, },
25312 { 8197 /* testui */, X86::TESTUI, Convert_NoOperands, AMFBS_In64BitMode, { }, },
25313 { 8210 /* tileloadd */, X86::TILELOADD, Convert__Reg1_0__SibMem5_1, AMFBS_In64BitMode, { MCK_TILE, MCK_SibMem }, },
25314 { 8220 /* tileloaddt1 */, X86::TILELOADDT1, Convert__Reg1_0__SibMem5_1, AMFBS_In64BitMode, { MCK_TILE, MCK_SibMem }, },
25315 { 8232 /* tilerelease */, X86::TILERELEASE, Convert_NoOperands, AMFBS_In64BitMode, { }, },
25316 { 8244 /* tilestored */, X86::TILESTORED, Convert__SibMem5_0__Reg1_1, AMFBS_In64BitMode, { MCK_SibMem, MCK_TILE }, },
25317 { 8255 /* tilezero */, X86::TILEZERO, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_TILE }, },
25318 { 8264 /* tlbsync */, X86::TLBSYNC, Convert_NoOperands, AMFBS_None, { }, },
25319 { 8272 /* tpause */, X86::TPAUSE, Convert__GR32orGR641_0, AMFBS_None, { MCK_GR32orGR64 }, },
25320 { 8279 /* tzcnt */, X86::TZCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
25321 { 8279 /* tzcnt */, X86::TZCNT16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
25322 { 8279 /* tzcnt */, X86::TZCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25323 { 8279 /* tzcnt */, X86::TZCNT32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
25324 { 8279 /* tzcnt */, X86::TZCNT64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
25325 { 8279 /* tzcnt */, X86::TZCNT64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
25326 { 8306 /* tzmsk */, X86::TZMSK32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25327 { 8306 /* tzmsk */, X86::TZMSK32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
25328 { 8306 /* tzmsk */, X86::TZMSK64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
25329 { 8306 /* tzmsk */, X86::TZMSK64rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
25330 { 8326 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25331 { 8326 /* ucomisd */, X86::UCOMISDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
25332 { 8334 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25333 { 8334 /* ucomiss */, X86::UCOMISSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
25334 { 8342 /* ud1 */, X86::UD1Wr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
25335 { 8342 /* ud1 */, X86::UD1Wm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
25336 { 8342 /* ud1 */, X86::UD1Lr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25337 { 8342 /* ud1 */, X86::UD1Lm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
25338 { 8342 /* ud1 */, X86::UD1Qr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
25339 { 8342 /* ud1 */, X86::UD1Qm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
25340 { 8361 /* ud2 */, X86::TRAP, Convert_NoOperands, AMFBS_None, { }, },
25341 { 8365 /* uiret */, X86::UIRET, Convert_NoOperands, AMFBS_In64BitMode, { }, },
25342 { 8371 /* umonitor */, X86::UMONITOR16, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16 }, },
25343 { 8371 /* umonitor */, X86::UMONITOR32, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
25344 { 8371 /* umonitor */, X86::UMONITOR64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
25345 { 8380 /* umwait */, X86::UMWAIT, Convert__GR32orGR641_0, AMFBS_None, { MCK_GR32orGR64 }, },
25346 { 8387 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25347 { 8387 /* unpckhpd */, X86::UNPCKHPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25348 { 8396 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25349 { 8396 /* unpckhps */, X86::UNPCKHPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25350 { 8405 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25351 { 8405 /* unpcklpd */, X86::UNPCKLPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25352 { 8414 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25353 { 8414 /* unpcklps */, X86::UNPCKLPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25354 { 8423 /* v4fmaddps */, X86::V4FMADDPSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
25355 { 8423 /* v4fmaddps */, X86::V4FMADDPSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
25356 { 8423 /* v4fmaddps */, X86::V4FMADDPSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
25357 { 8433 /* v4fmaddss */, X86::V4FMADDSSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25358 { 8433 /* v4fmaddss */, X86::V4FMADDSSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25359 { 8433 /* v4fmaddss */, X86::V4FMADDSSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25360 { 8443 /* v4fnmaddps */, X86::V4FNMADDPSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
25361 { 8443 /* v4fnmaddps */, X86::V4FNMADDPSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
25362 { 8443 /* v4fnmaddps */, X86::V4FNMADDPSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
25363 { 8454 /* v4fnmaddss */, X86::V4FNMADDSSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25364 { 8454 /* v4fnmaddss */, X86::V4FNMADDSSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25365 { 8454 /* v4fnmaddss */, X86::V4FNMADDSSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25366 { 8465 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25367 { 8465 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25368 { 8465 /* vaddpd */, X86::VADDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25369 { 8465 /* vaddpd */, X86::VADDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25370 { 8465 /* vaddpd */, X86::VADDPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25371 { 8465 /* vaddpd */, X86::VADDPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25372 { 8465 /* vaddpd */, X86::VADDPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25373 { 8465 /* vaddpd */, X86::VADDPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25374 { 8465 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25375 { 8465 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25376 { 8465 /* vaddpd */, X86::VADDPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25377 { 8465 /* vaddpd */, X86::VADDPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25378 { 8465 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25379 { 8465 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25380 { 8465 /* vaddpd */, X86::VADDPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25381 { 8465 /* vaddpd */, X86::VADDPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25382 { 8465 /* vaddpd */, X86::VADDPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25383 { 8465 /* vaddpd */, X86::VADDPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
25384 { 8465 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25385 { 8465 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25386 { 8465 /* vaddpd */, X86::VADDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25387 { 8465 /* vaddpd */, X86::VADDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25388 { 8465 /* vaddpd */, X86::VADDPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25389 { 8465 /* vaddpd */, X86::VADDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
25390 { 8465 /* vaddpd */, X86::VADDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
25391 { 8465 /* vaddpd */, X86::VADDPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25392 { 8465 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25393 { 8465 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25394 { 8465 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25395 { 8465 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25396 { 8465 /* vaddpd */, X86::VADDPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25397 { 8465 /* vaddpd */, X86::VADDPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25398 { 8465 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25399 { 8465 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25400 { 8472 /* vaddps */, X86::VADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25401 { 8472 /* vaddps */, X86::VADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25402 { 8472 /* vaddps */, X86::VADDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25403 { 8472 /* vaddps */, X86::VADDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25404 { 8472 /* vaddps */, X86::VADDPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25405 { 8472 /* vaddps */, X86::VADDPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25406 { 8472 /* vaddps */, X86::VADDPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25407 { 8472 /* vaddps */, X86::VADDPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25408 { 8472 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25409 { 8472 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25410 { 8472 /* vaddps */, X86::VADDPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25411 { 8472 /* vaddps */, X86::VADDPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25412 { 8472 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25413 { 8472 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25414 { 8472 /* vaddps */, X86::VADDPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25415 { 8472 /* vaddps */, X86::VADDPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25416 { 8472 /* vaddps */, X86::VADDPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25417 { 8472 /* vaddps */, X86::VADDPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
25418 { 8472 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25419 { 8472 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25420 { 8472 /* vaddps */, X86::VADDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25421 { 8472 /* vaddps */, X86::VADDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25422 { 8472 /* vaddps */, X86::VADDPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25423 { 8472 /* vaddps */, X86::VADDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
25424 { 8472 /* vaddps */, X86::VADDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
25425 { 8472 /* vaddps */, X86::VADDPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25426 { 8472 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25427 { 8472 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25428 { 8472 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25429 { 8472 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25430 { 8472 /* vaddps */, X86::VADDPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25431 { 8472 /* vaddps */, X86::VADDPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25432 { 8472 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25433 { 8472 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25434 { 8479 /* vaddsd */, X86::VADDSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25435 { 8479 /* vaddsd */, X86::VADDSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
25436 { 8479 /* vaddsd */, X86::VADDSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25437 { 8479 /* vaddsd */, X86::VADDSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25438 { 8479 /* vaddsd */, X86::VADDSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25439 { 8479 /* vaddsd */, X86::VADDSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25440 { 8479 /* vaddsd */, X86::VADDSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
25441 { 8479 /* vaddsd */, X86::VADDSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25442 { 8479 /* vaddsd */, X86::VADDSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
25443 { 8479 /* vaddsd */, X86::VADDSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25444 { 8479 /* vaddsd */, X86::VADDSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25445 { 8486 /* vaddss */, X86::VADDSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25446 { 8486 /* vaddss */, X86::VADDSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25447 { 8486 /* vaddss */, X86::VADDSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25448 { 8486 /* vaddss */, X86::VADDSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25449 { 8486 /* vaddss */, X86::VADDSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25450 { 8486 /* vaddss */, X86::VADDSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25451 { 8486 /* vaddss */, X86::VADDSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
25452 { 8486 /* vaddss */, X86::VADDSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25453 { 8486 /* vaddss */, X86::VADDSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
25454 { 8486 /* vaddss */, X86::VADDSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25455 { 8486 /* vaddss */, X86::VADDSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25456 { 8493 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25457 { 8493 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25458 { 8493 /* vaddsubpd */, X86::VADDSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25459 { 8493 /* vaddsubpd */, X86::VADDSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25460 { 8503 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25461 { 8503 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25462 { 8503 /* vaddsubps */, X86::VADDSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25463 { 8503 /* vaddsubps */, X86::VADDSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25464 { 8513 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25465 { 8513 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25466 { 8513 /* vaesdec */, X86::VAESDECYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25467 { 8513 /* vaesdec */, X86::VAESDECYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25468 { 8513 /* vaesdec */, X86::VAESDECZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25469 { 8513 /* vaesdec */, X86::VAESDECZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25470 { 8513 /* vaesdec */, X86::VAESDECZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25471 { 8513 /* vaesdec */, X86::VAESDECZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25472 { 8513 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25473 { 8513 /* vaesdec */, X86::VAESDECZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25474 { 8521 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25475 { 8521 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25476 { 8521 /* vaesdeclast */, X86::VAESDECLASTYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25477 { 8521 /* vaesdeclast */, X86::VAESDECLASTYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25478 { 8521 /* vaesdeclast */, X86::VAESDECLASTZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25479 { 8521 /* vaesdeclast */, X86::VAESDECLASTZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25480 { 8521 /* vaesdeclast */, X86::VAESDECLASTZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25481 { 8521 /* vaesdeclast */, X86::VAESDECLASTZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25482 { 8521 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25483 { 8521 /* vaesdeclast */, X86::VAESDECLASTZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25484 { 8533 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25485 { 8533 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25486 { 8533 /* vaesenc */, X86::VAESENCYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25487 { 8533 /* vaesenc */, X86::VAESENCYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25488 { 8533 /* vaesenc */, X86::VAESENCZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25489 { 8533 /* vaesenc */, X86::VAESENCZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25490 { 8533 /* vaesenc */, X86::VAESENCZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25491 { 8533 /* vaesenc */, X86::VAESENCZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25492 { 8533 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25493 { 8533 /* vaesenc */, X86::VAESENCZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25494 { 8541 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25495 { 8541 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25496 { 8541 /* vaesenclast */, X86::VAESENCLASTYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25497 { 8541 /* vaesenclast */, X86::VAESENCLASTYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25498 { 8541 /* vaesenclast */, X86::VAESENCLASTZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25499 { 8541 /* vaesenclast */, X86::VAESENCLASTZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25500 { 8541 /* vaesenclast */, X86::VAESENCLASTZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25501 { 8541 /* vaesenclast */, X86::VAESENCLASTZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25502 { 8541 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25503 { 8541 /* vaesenclast */, X86::VAESENCLASTZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25504 { 8553 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25505 { 8553 /* vaesimc */, X86::VAESIMCrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25506 { 8561 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25507 { 8561 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25508 { 8578 /* valignd */, X86::VALIGNDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25509 { 8578 /* valignd */, X86::VALIGNDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25510 { 8578 /* valignd */, X86::VALIGNDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25511 { 8578 /* valignd */, X86::VALIGNDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25512 { 8578 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25513 { 8578 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25514 { 8578 /* valignd */, X86::VALIGNDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25515 { 8578 /* valignd */, X86::VALIGNDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25516 { 8578 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25517 { 8578 /* valignd */, X86::VALIGNDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25518 { 8578 /* valignd */, X86::VALIGNDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25519 { 8578 /* valignd */, X86::VALIGNDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25520 { 8578 /* valignd */, X86::VALIGNDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25521 { 8578 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25522 { 8578 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25523 { 8578 /* valignd */, X86::VALIGNDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25524 { 8578 /* valignd */, X86::VALIGNDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25525 { 8578 /* valignd */, X86::VALIGNDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25526 { 8578 /* valignd */, X86::VALIGNDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25527 { 8578 /* valignd */, X86::VALIGNDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25528 { 8578 /* valignd */, X86::VALIGNDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25529 { 8578 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25530 { 8578 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25531 { 8578 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25532 { 8578 /* valignd */, X86::VALIGNDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25533 { 8578 /* valignd */, X86::VALIGNDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25534 { 8578 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25535 { 8586 /* valignq */, X86::VALIGNQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25536 { 8586 /* valignq */, X86::VALIGNQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25537 { 8586 /* valignq */, X86::VALIGNQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25538 { 8586 /* valignq */, X86::VALIGNQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25539 { 8586 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25540 { 8586 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25541 { 8586 /* valignq */, X86::VALIGNQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
25542 { 8586 /* valignq */, X86::VALIGNQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25543 { 8586 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25544 { 8586 /* valignq */, X86::VALIGNQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25545 { 8586 /* valignq */, X86::VALIGNQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25546 { 8586 /* valignq */, X86::VALIGNQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25547 { 8586 /* valignq */, X86::VALIGNQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25548 { 8586 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25549 { 8586 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25550 { 8586 /* valignq */, X86::VALIGNQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25551 { 8586 /* valignq */, X86::VALIGNQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25552 { 8586 /* valignq */, X86::VALIGNQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
25553 { 8586 /* valignq */, X86::VALIGNQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25554 { 8586 /* valignq */, X86::VALIGNQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25555 { 8586 /* valignq */, X86::VALIGNQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25556 { 8586 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25557 { 8586 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25558 { 8586 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25559 { 8586 /* valignq */, X86::VALIGNQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
25560 { 8586 /* valignq */, X86::VALIGNQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25561 { 8586 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25562 { 8594 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25563 { 8594 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25564 { 8594 /* vandnpd */, X86::VANDNPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25565 { 8594 /* vandnpd */, X86::VANDNPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25566 { 8594 /* vandnpd */, X86::VANDNPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25567 { 8594 /* vandnpd */, X86::VANDNPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25568 { 8594 /* vandnpd */, X86::VANDNPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25569 { 8594 /* vandnpd */, X86::VANDNPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25570 { 8594 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25571 { 8594 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25572 { 8594 /* vandnpd */, X86::VANDNPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25573 { 8594 /* vandnpd */, X86::VANDNPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25574 { 8594 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25575 { 8594 /* vandnpd */, X86::VANDNPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25576 { 8594 /* vandnpd */, X86::VANDNPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25577 { 8594 /* vandnpd */, X86::VANDNPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25578 { 8594 /* vandnpd */, X86::VANDNPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
25579 { 8594 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25580 { 8594 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25581 { 8594 /* vandnpd */, X86::VANDNPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25582 { 8594 /* vandnpd */, X86::VANDNPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25583 { 8594 /* vandnpd */, X86::VANDNPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25584 { 8594 /* vandnpd */, X86::VANDNPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
25585 { 8594 /* vandnpd */, X86::VANDNPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
25586 { 8594 /* vandnpd */, X86::VANDNPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25587 { 8594 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25588 { 8594 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25589 { 8594 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25590 { 8594 /* vandnpd */, X86::VANDNPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25591 { 8594 /* vandnpd */, X86::VANDNPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25592 { 8594 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25593 { 8602 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25594 { 8602 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25595 { 8602 /* vandnps */, X86::VANDNPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25596 { 8602 /* vandnps */, X86::VANDNPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25597 { 8602 /* vandnps */, X86::VANDNPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25598 { 8602 /* vandnps */, X86::VANDNPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25599 { 8602 /* vandnps */, X86::VANDNPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25600 { 8602 /* vandnps */, X86::VANDNPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25601 { 8602 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25602 { 8602 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25603 { 8602 /* vandnps */, X86::VANDNPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25604 { 8602 /* vandnps */, X86::VANDNPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25605 { 8602 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25606 { 8602 /* vandnps */, X86::VANDNPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25607 { 8602 /* vandnps */, X86::VANDNPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25608 { 8602 /* vandnps */, X86::VANDNPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25609 { 8602 /* vandnps */, X86::VANDNPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
25610 { 8602 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25611 { 8602 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25612 { 8602 /* vandnps */, X86::VANDNPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25613 { 8602 /* vandnps */, X86::VANDNPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25614 { 8602 /* vandnps */, X86::VANDNPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25615 { 8602 /* vandnps */, X86::VANDNPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
25616 { 8602 /* vandnps */, X86::VANDNPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
25617 { 8602 /* vandnps */, X86::VANDNPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25618 { 8602 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25619 { 8602 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25620 { 8602 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25621 { 8602 /* vandnps */, X86::VANDNPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25622 { 8602 /* vandnps */, X86::VANDNPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25623 { 8602 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25624 { 8610 /* vandpd */, X86::VANDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25625 { 8610 /* vandpd */, X86::VANDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25626 { 8610 /* vandpd */, X86::VANDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25627 { 8610 /* vandpd */, X86::VANDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25628 { 8610 /* vandpd */, X86::VANDPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25629 { 8610 /* vandpd */, X86::VANDPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25630 { 8610 /* vandpd */, X86::VANDPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25631 { 8610 /* vandpd */, X86::VANDPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25632 { 8610 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25633 { 8610 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25634 { 8610 /* vandpd */, X86::VANDPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25635 { 8610 /* vandpd */, X86::VANDPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25636 { 8610 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25637 { 8610 /* vandpd */, X86::VANDPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25638 { 8610 /* vandpd */, X86::VANDPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25639 { 8610 /* vandpd */, X86::VANDPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25640 { 8610 /* vandpd */, X86::VANDPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
25641 { 8610 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25642 { 8610 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25643 { 8610 /* vandpd */, X86::VANDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25644 { 8610 /* vandpd */, X86::VANDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25645 { 8610 /* vandpd */, X86::VANDPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25646 { 8610 /* vandpd */, X86::VANDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
25647 { 8610 /* vandpd */, X86::VANDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
25648 { 8610 /* vandpd */, X86::VANDPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25649 { 8610 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25650 { 8610 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25651 { 8610 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25652 { 8610 /* vandpd */, X86::VANDPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25653 { 8610 /* vandpd */, X86::VANDPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25654 { 8610 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25655 { 8617 /* vandps */, X86::VANDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25656 { 8617 /* vandps */, X86::VANDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25657 { 8617 /* vandps */, X86::VANDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25658 { 8617 /* vandps */, X86::VANDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25659 { 8617 /* vandps */, X86::VANDPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25660 { 8617 /* vandps */, X86::VANDPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25661 { 8617 /* vandps */, X86::VANDPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25662 { 8617 /* vandps */, X86::VANDPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25663 { 8617 /* vandps */, X86::VANDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25664 { 8617 /* vandps */, X86::VANDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25665 { 8617 /* vandps */, X86::VANDPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25666 { 8617 /* vandps */, X86::VANDPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25667 { 8617 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25668 { 8617 /* vandps */, X86::VANDPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25669 { 8617 /* vandps */, X86::VANDPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25670 { 8617 /* vandps */, X86::VANDPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25671 { 8617 /* vandps */, X86::VANDPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
25672 { 8617 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25673 { 8617 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25674 { 8617 /* vandps */, X86::VANDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25675 { 8617 /* vandps */, X86::VANDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25676 { 8617 /* vandps */, X86::VANDPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25677 { 8617 /* vandps */, X86::VANDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
25678 { 8617 /* vandps */, X86::VANDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
25679 { 8617 /* vandps */, X86::VANDPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25680 { 8617 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25681 { 8617 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25682 { 8617 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25683 { 8617 /* vandps */, X86::VANDPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25684 { 8617 /* vandps */, X86::VANDPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25685 { 8617 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25686 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25687 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25688 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25689 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25690 { 8624 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25691 { 8624 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25692 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25693 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25694 { 8624 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25695 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25696 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25697 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25698 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
25699 { 8624 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25700 { 8624 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25701 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25702 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25703 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25704 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
25705 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
25706 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25707 { 8624 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25708 { 8624 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25709 { 8624 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25710 { 8624 /* vblendmpd */, X86::VBLENDMPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25711 { 8624 /* vblendmpd */, X86::VBLENDMPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25712 { 8624 /* vblendmpd */, X86::VBLENDMPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25713 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25714 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25715 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25716 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25717 { 8634 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25718 { 8634 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25719 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25720 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25721 { 8634 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25722 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25723 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25724 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25725 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
25726 { 8634 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25727 { 8634 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25728 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25729 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25730 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25731 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
25732 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
25733 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25734 { 8634 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25735 { 8634 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25736 { 8634 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25737 { 8634 /* vblendmps */, X86::VBLENDMPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25738 { 8634 /* vblendmps */, X86::VBLENDMPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25739 { 8634 /* vblendmps */, X86::VBLENDMPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25740 { 8644 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25741 { 8644 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25742 { 8644 /* vblendpd */, X86::VBLENDPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
25743 { 8644 /* vblendpd */, X86::VBLENDPDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25744 { 8653 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25745 { 8653 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25746 { 8653 /* vblendps */, X86::VBLENDPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
25747 { 8653 /* vblendps */, X86::VBLENDPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25748 { 8662 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
25749 { 8662 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
25750 { 8662 /* vblendvpd */, X86::VBLENDVPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
25751 { 8662 /* vblendvpd */, X86::VBLENDVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
25752 { 8672 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
25753 { 8672 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
25754 { 8672 /* vblendvps */, X86::VBLENDVPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
25755 { 8672 /* vblendvps */, X86::VBLENDVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
25756 { 8682 /* vbroadcastf128 */, X86::VBROADCASTF128, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, },
25757 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
25758 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, },
25759 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
25760 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
25761 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25762 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25763 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25764 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25765 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25766 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25767 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25768 { 8697 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25769 { 8713 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
25770 { 8713 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
25771 { 8713 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25772 { 8713 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25773 { 8713 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25774 { 8713 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25775 { 8729 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
25776 { 8729 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25777 { 8729 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25778 { 8745 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
25779 { 8745 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
25780 { 8745 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25781 { 8745 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25782 { 8745 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25783 { 8745 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25784 { 8761 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
25785 { 8761 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25786 { 8761 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25787 { 8777 /* vbroadcasti128 */, X86::VBROADCASTI128, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, },
25788 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25789 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
25790 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
25791 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, },
25792 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
25793 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
25794 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25795 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25796 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25797 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25798 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25799 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25800 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25801 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25802 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25803 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25804 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25805 { 8792 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25806 { 8808 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
25807 { 8808 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
25808 { 8808 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25809 { 8808 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25810 { 8808 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25811 { 8808 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25812 { 8824 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
25813 { 8824 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25814 { 8824 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25815 { 8840 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
25816 { 8840 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
25817 { 8840 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25818 { 8840 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25819 { 8840 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25820 { 8840 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25821 { 8856 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
25822 { 8856 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25823 { 8856 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25824 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
25825 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDYrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256, MCK_Mem64 }, },
25826 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
25827 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZ256rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, },
25828 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
25829 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
25830 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25831 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25832 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25833 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25834 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25835 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25836 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25837 { 8872 /* vbroadcastsd */, X86::VBROADCASTSDZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25838 { 8885 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25839 { 8885 /* vbroadcastss */, X86::VBROADCASTSSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
25840 { 8885 /* vbroadcastss */, X86::VBROADCASTSSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
25841 { 8885 /* vbroadcastss */, X86::VBROADCASTSSYrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256, MCK_Mem32 }, },
25842 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25843 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ128rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
25844 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
25845 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ256rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32 }, },
25846 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
25847 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32 }, },
25848 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25849 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
25850 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25851 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
25852 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25853 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
25854 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25855 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
25856 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25857 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
25858 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25859 { 8885 /* vbroadcastss */, X86::VBROADCASTSSZrmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
25860 { 8898 /* vcmppd */, X86::VCMPPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25861 { 8898 /* vcmppd */, X86::VCMPPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25862 { 8898 /* vcmppd */, X86::VCMPPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25863 { 8898 /* vcmppd */, X86::VCMPPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25864 { 8898 /* vcmppd */, X86::VCMPPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25865 { 8898 /* vcmppd */, X86::VCMPPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25866 { 8898 /* vcmppd */, X86::VCMPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25867 { 8898 /* vcmppd */, X86::VCMPPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25868 { 8898 /* vcmppd */, X86::VCMPPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
25869 { 8898 /* vcmppd */, X86::VCMPPDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25870 { 8898 /* vcmppd */, X86::VCMPPDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
25871 { 8898 /* vcmppd */, X86::VCMPPDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25872 { 8898 /* vcmppd */, X86::VCMPPDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25873 { 8898 /* vcmppd */, X86::VCMPPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25874 { 8898 /* vcmppd */, X86::VCMPPDZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25875 { 8898 /* vcmppd */, X86::VCMPPDZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25876 { 8898 /* vcmppd */, X86::VCMPPDZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25877 { 8898 /* vcmppd */, X86::VCMPPDZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25878 { 8898 /* vcmppd */, X86::VCMPPDZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25879 { 8898 /* vcmppd */, X86::VCMPPDZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25880 { 8898 /* vcmppd */, X86::VCMPPDZ128rmbik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
25881 { 8898 /* vcmppd */, X86::VCMPPDZ256rmbik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25882 { 8898 /* vcmppd */, X86::VCMPPDZrribk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25883 { 8898 /* vcmppd */, X86::VCMPPDZrmbik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25884 { 8905 /* vcmpps */, X86::VCMPPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25885 { 8905 /* vcmpps */, X86::VCMPPSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25886 { 8905 /* vcmpps */, X86::VCMPPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25887 { 8905 /* vcmpps */, X86::VCMPPSZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25888 { 8905 /* vcmpps */, X86::VCMPPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25889 { 8905 /* vcmpps */, X86::VCMPPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25890 { 8905 /* vcmpps */, X86::VCMPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25891 { 8905 /* vcmpps */, X86::VCMPPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25892 { 8905 /* vcmpps */, X86::VCMPPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
25893 { 8905 /* vcmpps */, X86::VCMPPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25894 { 8905 /* vcmpps */, X86::VCMPPSZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25895 { 8905 /* vcmpps */, X86::VCMPPSZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25896 { 8905 /* vcmpps */, X86::VCMPPSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25897 { 8905 /* vcmpps */, X86::VCMPPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25898 { 8905 /* vcmpps */, X86::VCMPPSZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25899 { 8905 /* vcmpps */, X86::VCMPPSZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25900 { 8905 /* vcmpps */, X86::VCMPPSZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25901 { 8905 /* vcmpps */, X86::VCMPPSZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25902 { 8905 /* vcmpps */, X86::VCMPPSZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25903 { 8905 /* vcmpps */, X86::VCMPPSZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25904 { 8905 /* vcmpps */, X86::VCMPPSZ128rmbik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
25905 { 8905 /* vcmpps */, X86::VCMPPSZ256rmbik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25906 { 8905 /* vcmpps */, X86::VCMPPSZrribk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25907 { 8905 /* vcmpps */, X86::VCMPPSZrmbik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25908 { 8912 /* vcmpsd */, X86::VCMPSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25909 { 8912 /* vcmpsd */, X86::VCMPSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
25910 { 8912 /* vcmpsd */, X86::VCMPSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25911 { 8912 /* vcmpsd */, X86::VCMPSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
25912 { 8912 /* vcmpsd */, X86::VCMPSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25913 { 8912 /* vcmpsd */, X86::VCMPSDZrr_Intk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25914 { 8912 /* vcmpsd */, X86::VCMPSDZrm_Intk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
25915 { 8912 /* vcmpsd */, X86::VCMPSDZrrb_Intk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25916 { 8919 /* vcmpss */, X86::VCMPSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25917 { 8919 /* vcmpss */, X86::VCMPSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
25918 { 8919 /* vcmpss */, X86::VCMPSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25919 { 8919 /* vcmpss */, X86::VCMPSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
25920 { 8919 /* vcmpss */, X86::VCMPSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25921 { 8919 /* vcmpss */, X86::VCMPSSZrr_Intk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25922 { 8919 /* vcmpss */, X86::VCMPSSZrm_Intk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
25923 { 8919 /* vcmpss */, X86::VCMPSSZrrb_Intk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25924 { 8926 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25925 { 8926 /* vcomisd */, X86::VCOMISDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
25926 { 8926 /* vcomisd */, X86::VCOMISDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25927 { 8926 /* vcomisd */, X86::VCOMISDZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
25928 { 8926 /* vcomisd */, X86::VCOMISDZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
25929 { 8934 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25930 { 8934 /* vcomiss */, X86::VCOMISSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
25931 { 8934 /* vcomiss */, X86::VCOMISSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25932 { 8934 /* vcomiss */, X86::VCOMISSZrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
25933 { 8934 /* vcomiss */, X86::VCOMISSZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
25934 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25935 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
25936 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25937 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
25938 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
25939 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
25940 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25941 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25942 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25943 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25944 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25945 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25946 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25947 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25948 { 8942 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25949 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25950 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
25951 { 8954 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25952 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
25953 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
25954 { 8954 /* vcompressps */, X86::VCOMPRESSPSZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
25955 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25956 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25957 { 8954 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25958 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25959 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25960 { 8954 /* vcompressps */, X86::VCOMPRESSPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25961 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25962 { 8954 /* vcompressps */, X86::VCOMPRESSPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25963 { 8954 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25964 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25965 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
25966 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
25967 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, },
25968 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
25969 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
25970 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
25971 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
25972 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
25973 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
25974 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25975 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25976 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25977 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25978 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25979 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25980 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25981 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25982 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25983 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25984 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25985 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25986 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25987 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25988 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25989 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25990 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25991 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25992 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25993 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25994 { 8966 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25995 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25996 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25997 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
25998 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
25999 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26000 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26001 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26002 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
26003 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26004 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26005 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26006 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26007 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26008 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26009 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26010 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26011 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26012 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26013 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26014 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26015 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26016 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26017 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26018 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26019 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26020 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26021 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26022 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26023 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26024 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26025 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26026 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26027 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26028 { 8976 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26029 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26030 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26031 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26032 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26033 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26034 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26035 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26036 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26037 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26038 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26039 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26040 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26041 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26042 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26043 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26044 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26045 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26046 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26047 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26048 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26049 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26050 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26051 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26052 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26053 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26054 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26055 { 8986 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26056 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26057 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
26058 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26059 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, },
26060 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26061 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, },
26062 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26063 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to8_125_ }, },
26064 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to16_125_ }, },
26065 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26066 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26067 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26068 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26069 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26070 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26071 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26072 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26073 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26074 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26075 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26076 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26077 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26078 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26079 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26080 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26081 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26082 { 9001 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26083 { 9015 /* vcvtneps2bf16x */, X86::VCVTNEPS2BF16Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26084 { 9015 /* vcvtneps2bf16x */, X86::VCVTNEPS2BF16Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26085 { 9030 /* vcvtneps2bf16y */, X86::VCVTNEPS2BF16Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
26086 { 9030 /* vcvtneps2bf16y */, X86::VCVTNEPS2BF16Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, },
26087 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26088 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
26089 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
26090 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32, MCK_Mem256 }, },
26091 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26092 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
26093 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26094 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, },
26095 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26096 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, },
26097 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26098 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
26099 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
26100 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
26101 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26102 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26103 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26104 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26105 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26106 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26107 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26108 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26109 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26110 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26111 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26112 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26113 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26114 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26115 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26116 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26117 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26118 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26119 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26120 { 9045 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26121 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26122 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
26123 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
26124 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32, MCK_Mem256 }, },
26125 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26126 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
26127 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26128 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, },
26129 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26130 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, },
26131 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26132 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
26133 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
26134 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
26135 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26136 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26137 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26138 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26139 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26140 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26141 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26142 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26143 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26144 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26145 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26146 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26147 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26148 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26149 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26150 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26151 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26152 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26153 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26154 { 9077 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26155 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26156 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26157 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26158 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
26159 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26160 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26161 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26162 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26163 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26164 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26165 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26166 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26167 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26168 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26169 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26170 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26171 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26172 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26173 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26174 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26175 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26176 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26177 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26178 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26179 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26180 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26181 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26182 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26183 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26184 { 9109 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26185 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26186 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
26187 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26188 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, },
26189 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26190 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, },
26191 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26192 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
26193 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
26194 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
26195 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26196 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26197 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26198 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26199 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26200 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26201 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26202 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26203 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26204 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26205 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26206 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26207 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26208 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26209 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26210 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26211 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26212 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26213 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26214 { 9119 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26215 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26216 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26217 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26218 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
26219 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26220 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26221 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26222 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26223 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26224 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26225 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26226 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26227 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26228 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26229 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26230 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26231 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26232 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26233 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26234 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26235 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26236 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26237 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26238 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26239 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26240 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26241 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26242 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26243 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26244 { 9154 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26245 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26246 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
26247 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
26248 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, },
26249 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26250 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
26251 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
26252 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
26253 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26254 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
26255 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
26256 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26257 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
26258 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26259 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26260 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26261 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26262 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26263 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
26264 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26265 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26266 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26267 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26268 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
26269 { 9165 /* vcvtph2ps */, X86::VCVTPH2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
26270 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26271 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
26272 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
26273 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
26274 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26275 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26276 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26277 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
26278 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26279 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26280 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26281 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26282 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26283 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26284 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26285 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26286 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26287 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26288 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26289 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26290 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26291 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26292 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26293 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26294 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26295 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26296 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26297 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26298 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26299 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26300 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26301 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26302 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26303 { 9175 /* vcvtps2dq */, X86::VCVTPS2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26304 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26305 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
26306 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
26307 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, },
26308 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26309 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
26310 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
26311 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
26312 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26313 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
26314 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
26315 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
26316 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
26317 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
26318 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26319 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
26320 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26321 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26322 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26323 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26324 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26325 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
26326 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
26327 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26328 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26329 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26330 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26331 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26332 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
26333 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26334 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
26335 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26336 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
26337 { 9185 /* vcvtps2pd */, X86::VCVTPS2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26338 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26339 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHYrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
26340 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26341 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26342 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26343 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHYmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, },
26344 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26345 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
26346 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
26347 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ128mr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26348 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZrrb, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26349 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26350 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26351 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26352 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26353 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26354 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26355 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26356 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26357 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26358 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26359 { 9195 /* vcvtps2ph */, X86::VCVTPS2PHZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26360 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26361 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
26362 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
26363 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
26364 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26365 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
26366 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
26367 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
26368 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK_AVX512RC }, },
26369 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
26370 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26371 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
26372 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26373 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26374 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26375 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26376 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26377 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
26378 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
26379 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26380 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26381 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26382 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26383 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26384 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, },
26385 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26386 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
26387 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26388 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_AVX512RC }, },
26389 { 9205 /* vcvtps2qq */, X86::VCVTPS2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26390 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26391 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26392 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26393 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
26394 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26395 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26396 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26397 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26398 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26399 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26400 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26401 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26402 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26403 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26404 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26405 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26406 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26407 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26408 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26409 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26410 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26411 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26412 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26413 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26414 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26415 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26416 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26417 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26418 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26419 { 9215 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26420 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26421 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
26422 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
26423 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
26424 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26425 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
26426 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
26427 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
26428 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK_AVX512RC }, },
26429 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
26430 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26431 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
26432 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26433 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26434 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26435 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26436 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26437 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
26438 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
26439 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26440 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26441 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26442 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26443 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26444 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, },
26445 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26446 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
26447 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26448 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_AVX512RC }, },
26449 { 9226 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26450 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26451 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26452 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26453 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
26454 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26455 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26456 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26457 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26458 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26459 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26460 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26461 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26462 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26463 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26464 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26465 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26466 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26467 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26468 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26469 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26470 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26471 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26472 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26473 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26474 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26475 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26476 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26477 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26478 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26479 { 9237 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26480 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26481 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
26482 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26483 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, },
26484 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26485 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, },
26486 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26487 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
26488 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
26489 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
26490 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26491 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26492 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26493 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26494 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26495 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26496 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26497 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26498 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26499 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26500 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26501 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26502 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26503 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26504 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26505 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26506 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26507 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26508 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26509 { 9247 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26510 { 9279 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26511 { 9279 /* vcvtsd2si */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26512 { 9279 /* vcvtsd2si */, X86::VCVTSD2SIZrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
26513 { 9279 /* vcvtsd2si */, X86::VCVTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
26514 { 9279 /* vcvtsd2si */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
26515 { 9279 /* vcvtsd2si */, X86::VCVTSD2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26516 { 9279 /* vcvtsd2si */, X86::VCVTSD2SI64Zrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
26517 { 9279 /* vcvtsd2si */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
26518 { 9279 /* vcvtsd2si */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
26519 { 9279 /* vcvtsd2si */, X86::VCVTSD2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
26520 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26521 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26522 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26523 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26524 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26525 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26526 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26527 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26528 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26529 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26530 { 9311 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26531 { 9321 /* vcvtsd2usi */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26532 { 9321 /* vcvtsd2usi */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
26533 { 9321 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26534 { 9321 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
26535 { 9321 /* vcvtsd2usi */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
26536 { 9321 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
26537 { 9356 /* vcvtsi2sd */, X86::VCVTSI2SDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
26538 { 9356 /* vcvtsi2sd */, X86::VCVTSI642SDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR64 }, },
26539 { 9356 /* vcvtsi2sd */, X86::VCVTSI2SDrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26540 { 9356 /* vcvtsi2sd */, X86::VCVTSI642SDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26541 { 9356 /* vcvtsi2sd */, X86::VCVTSI2SDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
26542 { 9356 /* vcvtsi2sd */, X86::VCVTSI642SDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
26543 { 9356 /* vcvtsi2sd */, X86::VCVTSI2SDZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26544 { 9356 /* vcvtsi2sd */, X86::VCVTSI642SDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26545 { 9356 /* vcvtsi2sd */, X86::VCVTSI642SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
26546 { 9388 /* vcvtsi2ss */, X86::VCVTSI2SSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
26547 { 9388 /* vcvtsi2ss */, X86::VCVTSI642SSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR64 }, },
26548 { 9388 /* vcvtsi2ss */, X86::VCVTSI2SSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26549 { 9388 /* vcvtsi2ss */, X86::VCVTSI642SSrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26550 { 9388 /* vcvtsi2ss */, X86::VCVTSI2SSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
26551 { 9388 /* vcvtsi2ss */, X86::VCVTSI642SSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
26552 { 9388 /* vcvtsi2ss */, X86::VCVTSI2SSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26553 { 9388 /* vcvtsi2ss */, X86::VCVTSI642SSZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26554 { 9388 /* vcvtsi2ss */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
26555 { 9388 /* vcvtsi2ss */, X86::VCVTSI642SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
26556 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26557 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26558 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26559 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26560 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
26561 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26562 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26563 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26564 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26565 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
26566 { 9420 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
26567 { 9430 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26568 { 9430 /* vcvtss2si */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26569 { 9430 /* vcvtss2si */, X86::VCVTSS2SIZrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
26570 { 9430 /* vcvtss2si */, X86::VCVTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
26571 { 9430 /* vcvtss2si */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
26572 { 9430 /* vcvtss2si */, X86::VCVTSS2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26573 { 9430 /* vcvtss2si */, X86::VCVTSS2SI64Zrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, },
26574 { 9430 /* vcvtss2si */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, },
26575 { 9430 /* vcvtss2si */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
26576 { 9430 /* vcvtss2si */, X86::VCVTSS2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
26577 { 9462 /* vcvtss2usi */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26578 { 9462 /* vcvtss2usi */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
26579 { 9462 /* vcvtss2usi */, X86::VCVTSS2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26580 { 9462 /* vcvtss2usi */, X86::VCVTSS2USI64Zrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, },
26581 { 9462 /* vcvtss2usi */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
26582 { 9462 /* vcvtss2usi */, X86::VCVTSS2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
26583 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26584 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
26585 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
26586 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32, MCK_Mem256 }, },
26587 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26588 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
26589 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26590 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, },
26591 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26592 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, },
26593 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26594 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
26595 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, },
26596 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
26597 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26598 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26599 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26600 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26601 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26602 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26603 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26604 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26605 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26606 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26607 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26608 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26609 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26610 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26611 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26612 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26613 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26614 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26615 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26616 { 9497 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26617 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26618 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26619 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26620 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
26621 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26622 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26623 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26624 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26625 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26626 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26627 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26628 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26629 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26630 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26631 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26632 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26633 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26634 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26635 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26636 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26637 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26638 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26639 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26640 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26641 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26642 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26643 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26644 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26645 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26646 { 9532 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26647 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26648 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
26649 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26650 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, },
26651 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26652 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, },
26653 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26654 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
26655 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, },
26656 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
26657 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26658 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26659 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26660 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26661 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26662 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26663 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26664 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26665 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26666 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26667 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26668 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26669 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26670 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26671 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26672 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26673 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26674 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26675 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26676 { 9543 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26677 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26678 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26679 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26680 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
26681 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26682 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26683 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26684 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26685 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26686 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26687 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26688 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26689 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26690 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26691 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26692 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26693 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26694 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26695 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26696 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26697 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26698 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26699 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26700 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26701 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26702 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26703 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26704 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26705 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26706 { 9581 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26707 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26708 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
26709 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
26710 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
26711 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26712 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26713 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26714 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
26715 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26716 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26717 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26718 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26719 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26720 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26721 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26722 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26723 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26724 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26725 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26726 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26727 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26728 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26729 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26730 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26731 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26732 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26733 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26734 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26735 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26736 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26737 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26738 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26739 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26740 { 9593 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26741 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26742 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
26743 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
26744 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
26745 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26746 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
26747 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
26748 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
26749 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
26750 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
26751 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26752 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
26753 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26754 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26755 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26756 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26757 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26758 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
26759 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
26760 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26761 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26762 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26763 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26764 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26765 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
26766 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26767 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
26768 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26769 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
26770 { 9604 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26771 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26772 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26773 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26774 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
26775 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26776 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26777 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26778 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26779 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26780 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26781 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26782 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26783 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26784 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26785 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26786 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26787 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26788 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26789 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26790 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26791 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26792 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26793 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26794 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26795 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26796 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26797 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26798 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26799 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26800 { 9615 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26801 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26802 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
26803 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
26804 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
26805 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26806 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
26807 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
26808 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
26809 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
26810 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
26811 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26812 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
26813 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26814 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26815 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26816 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26817 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26818 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
26819 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
26820 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26821 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26822 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26823 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26824 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26825 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
26826 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26827 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
26828 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26829 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
26830 { 9627 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26831 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26832 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26833 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SIZrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
26834 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
26835 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
26836 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26837 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
26838 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
26839 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
26840 { 9639 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
26841 { 9674 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26842 { 9674 /* vcvttsd2usi */, X86::VCVTTSD2USIZrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
26843 { 9674 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26844 { 9674 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
26845 { 9674 /* vcvttsd2usi */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
26846 { 9674 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
26847 { 9712 /* vcvttss2si */, X86::VCVTTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26848 { 9712 /* vcvttss2si */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26849 { 9712 /* vcvttss2si */, X86::VCVTTSS2SIZrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
26850 { 9712 /* vcvttss2si */, X86::VCVTTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
26851 { 9712 /* vcvttss2si */, X86::VCVTTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
26852 { 9712 /* vcvttss2si */, X86::VCVTTSS2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26853 { 9712 /* vcvttss2si */, X86::VCVTTSS2SI64Zrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, },
26854 { 9712 /* vcvttss2si */, X86::VCVTTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, },
26855 { 9712 /* vcvttss2si */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
26856 { 9712 /* vcvttss2si */, X86::VCVTTSS2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
26857 { 9747 /* vcvttss2usi */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26858 { 9747 /* vcvttss2usi */, X86::VCVTTSS2USIZrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
26859 { 9747 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
26860 { 9747 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR64, MCK_Mem32 }, },
26861 { 9747 /* vcvttss2usi */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
26862 { 9747 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
26863 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26864 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
26865 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
26866 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
26867 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26868 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
26869 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
26870 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
26871 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
26872 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26873 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
26874 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26875 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26876 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26877 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26878 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26879 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
26880 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
26881 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26882 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26883 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26884 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26885 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26886 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26887 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
26888 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26889 { 9785 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26890 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26891 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26892 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26893 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
26894 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26895 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26896 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26897 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26898 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26899 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26900 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26901 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26902 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26903 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26904 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26905 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26906 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26907 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26908 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26909 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26910 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26911 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26912 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26913 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26914 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26915 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26916 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
26917 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26918 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26919 { 9796 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26920 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26921 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26922 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
26923 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
26924 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26925 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26926 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26927 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26928 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26929 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26930 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26931 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26932 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26933 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26934 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26935 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26936 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26937 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26938 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26939 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26940 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26941 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26942 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26943 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26944 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26945 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26946 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26947 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26948 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26949 { 9807 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26950 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
26951 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
26952 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
26953 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32X, MCK_Mem256 }, },
26954 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26955 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR256X, MCK_Mem512 }, },
26956 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26957 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
26958 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
26959 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
26960 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26961 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26962 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26963 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26964 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26965 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26966 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26967 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26968 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26969 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26970 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26971 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26972 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26973 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26974 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26975 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26976 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
26977 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
26978 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26979 { 9818 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26980 { 9853 /* vcvtusi2sd */, X86::VCVTUSI2SDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
26981 { 9853 /* vcvtusi2sd */, X86::VCVTUSI642SDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
26982 { 9853 /* vcvtusi2sd */, X86::VCVTUSI2SDZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26983 { 9853 /* vcvtusi2sd */, X86::VCVTUSI642SDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26984 { 9853 /* vcvtusi2sd */, X86::VCVTUSI642SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
26985 { 9888 /* vcvtusi2ss */, X86::VCVTUSI2SSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
26986 { 9888 /* vcvtusi2ss */, X86::VCVTUSI642SSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
26987 { 9888 /* vcvtusi2ss */, X86::VCVTUSI2SSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26988 { 9888 /* vcvtusi2ss */, X86::VCVTUSI642SSZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26989 { 9888 /* vcvtusi2ss */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
26990 { 9888 /* vcvtusi2ss */, X86::VCVTUSI642SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
26991 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26992 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26993 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26994 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
26995 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26996 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26997 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26998 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26999 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27000 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27001 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27002 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27003 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27004 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27005 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27006 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27007 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27008 { 9923 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27009 { 9933 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27010 { 9933 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27011 { 9933 /* vdivpd */, X86::VDIVPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27012 { 9933 /* vdivpd */, X86::VDIVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27013 { 9933 /* vdivpd */, X86::VDIVPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27014 { 9933 /* vdivpd */, X86::VDIVPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27015 { 9933 /* vdivpd */, X86::VDIVPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27016 { 9933 /* vdivpd */, X86::VDIVPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27017 { 9933 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27018 { 9933 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27019 { 9933 /* vdivpd */, X86::VDIVPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27020 { 9933 /* vdivpd */, X86::VDIVPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27021 { 9933 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27022 { 9933 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27023 { 9933 /* vdivpd */, X86::VDIVPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27024 { 9933 /* vdivpd */, X86::VDIVPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27025 { 9933 /* vdivpd */, X86::VDIVPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27026 { 9933 /* vdivpd */, X86::VDIVPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27027 { 9933 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27028 { 9933 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27029 { 9933 /* vdivpd */, X86::VDIVPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27030 { 9933 /* vdivpd */, X86::VDIVPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27031 { 9933 /* vdivpd */, X86::VDIVPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27032 { 9933 /* vdivpd */, X86::VDIVPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27033 { 9933 /* vdivpd */, X86::VDIVPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27034 { 9933 /* vdivpd */, X86::VDIVPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27035 { 9933 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27036 { 9933 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27037 { 9933 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27038 { 9933 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27039 { 9933 /* vdivpd */, X86::VDIVPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27040 { 9933 /* vdivpd */, X86::VDIVPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27041 { 9933 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27042 { 9933 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27043 { 9940 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27044 { 9940 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27045 { 9940 /* vdivps */, X86::VDIVPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27046 { 9940 /* vdivps */, X86::VDIVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27047 { 9940 /* vdivps */, X86::VDIVPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27048 { 9940 /* vdivps */, X86::VDIVPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27049 { 9940 /* vdivps */, X86::VDIVPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27050 { 9940 /* vdivps */, X86::VDIVPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27051 { 9940 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27052 { 9940 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27053 { 9940 /* vdivps */, X86::VDIVPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27054 { 9940 /* vdivps */, X86::VDIVPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27055 { 9940 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27056 { 9940 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27057 { 9940 /* vdivps */, X86::VDIVPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27058 { 9940 /* vdivps */, X86::VDIVPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27059 { 9940 /* vdivps */, X86::VDIVPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27060 { 9940 /* vdivps */, X86::VDIVPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27061 { 9940 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27062 { 9940 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27063 { 9940 /* vdivps */, X86::VDIVPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27064 { 9940 /* vdivps */, X86::VDIVPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27065 { 9940 /* vdivps */, X86::VDIVPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27066 { 9940 /* vdivps */, X86::VDIVPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27067 { 9940 /* vdivps */, X86::VDIVPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27068 { 9940 /* vdivps */, X86::VDIVPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27069 { 9940 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27070 { 9940 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27071 { 9940 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27072 { 9940 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27073 { 9940 /* vdivps */, X86::VDIVPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27074 { 9940 /* vdivps */, X86::VDIVPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27075 { 9940 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27076 { 9940 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27077 { 9947 /* vdivsd */, X86::VDIVSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27078 { 9947 /* vdivsd */, X86::VDIVSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27079 { 9947 /* vdivsd */, X86::VDIVSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27080 { 9947 /* vdivsd */, X86::VDIVSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27081 { 9947 /* vdivsd */, X86::VDIVSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27082 { 9947 /* vdivsd */, X86::VDIVSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27083 { 9947 /* vdivsd */, X86::VDIVSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27084 { 9947 /* vdivsd */, X86::VDIVSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27085 { 9947 /* vdivsd */, X86::VDIVSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27086 { 9947 /* vdivsd */, X86::VDIVSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27087 { 9947 /* vdivsd */, X86::VDIVSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27088 { 9954 /* vdivss */, X86::VDIVSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27089 { 9954 /* vdivss */, X86::VDIVSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27090 { 9954 /* vdivss */, X86::VDIVSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27091 { 9954 /* vdivss */, X86::VDIVSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27092 { 9954 /* vdivss */, X86::VDIVSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27093 { 9954 /* vdivss */, X86::VDIVSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27094 { 9954 /* vdivss */, X86::VDIVSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27095 { 9954 /* vdivss */, X86::VDIVSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27096 { 9954 /* vdivss */, X86::VDIVSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27097 { 9954 /* vdivss */, X86::VDIVSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27098 { 9954 /* vdivss */, X86::VDIVSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27099 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27100 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27101 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27102 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27103 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27104 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27105 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27106 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27107 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27108 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27109 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27110 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27111 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27112 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27113 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27114 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27115 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27116 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27117 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27118 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27119 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27120 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27121 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27122 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27123 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27124 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27125 { 9961 /* vdpbf16ps */, X86::VDPBF16PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27126 { 9971 /* vdppd */, X86::VDPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
27127 { 9971 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27128 { 9977 /* vdpps */, X86::VDPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
27129 { 9977 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27130 { 9977 /* vdpps */, X86::VDPPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
27131 { 9977 /* vdpps */, X86::VDPPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27132 { 9983 /* verr */, X86::VERRr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
27133 { 9983 /* verr */, X86::VERRm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
27134 { 9988 /* verw */, X86::VERWr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
27135 { 9988 /* verw */, X86::VERWm, Convert__Mem165_0, AMFBS_None, { MCK_Mem16 }, },
27136 { 9993 /* vexp2pd */, X86::VEXP2PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
27137 { 9993 /* vexp2pd */, X86::VEXP2PDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
27138 { 9993 /* vexp2pd */, X86::VEXP2PDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
27139 { 9993 /* vexp2pd */, X86::VEXP2PDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27140 { 9993 /* vexp2pd */, X86::VEXP2PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
27141 { 9993 /* vexp2pd */, X86::VEXP2PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
27142 { 9993 /* vexp2pd */, X86::VEXP2PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
27143 { 9993 /* vexp2pd */, X86::VEXP2PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
27144 { 9993 /* vexp2pd */, X86::VEXP2PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
27145 { 9993 /* vexp2pd */, X86::VEXP2PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
27146 { 9993 /* vexp2pd */, X86::VEXP2PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
27147 { 9993 /* vexp2pd */, X86::VEXP2PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
27148 { 10001 /* vexp2ps */, X86::VEXP2PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
27149 { 10001 /* vexp2ps */, X86::VEXP2PSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
27150 { 10001 /* vexp2ps */, X86::VEXP2PSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
27151 { 10001 /* vexp2ps */, X86::VEXP2PSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27152 { 10001 /* vexp2ps */, X86::VEXP2PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
27153 { 10001 /* vexp2ps */, X86::VEXP2PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
27154 { 10001 /* vexp2ps */, X86::VEXP2PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
27155 { 10001 /* vexp2ps */, X86::VEXP2PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
27156 { 10001 /* vexp2ps */, X86::VEXP2PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
27157 { 10001 /* vexp2ps */, X86::VEXP2PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
27158 { 10001 /* vexp2ps */, X86::VEXP2PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
27159 { 10001 /* vexp2ps */, X86::VEXP2PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
27160 { 10009 /* vexpandpd */, X86::VEXPANDPDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
27161 { 10009 /* vexpandpd */, X86::VEXPANDPDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
27162 { 10009 /* vexpandpd */, X86::VEXPANDPDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
27163 { 10009 /* vexpandpd */, X86::VEXPANDPDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
27164 { 10009 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
27165 { 10009 /* vexpandpd */, X86::VEXPANDPDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
27166 { 10009 /* vexpandpd */, X86::VEXPANDPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
27167 { 10009 /* vexpandpd */, X86::VEXPANDPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
27168 { 10009 /* vexpandpd */, X86::VEXPANDPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
27169 { 10009 /* vexpandpd */, X86::VEXPANDPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
27170 { 10009 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
27171 { 10009 /* vexpandpd */, X86::VEXPANDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
27172 { 10009 /* vexpandpd */, X86::VEXPANDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
27173 { 10009 /* vexpandpd */, X86::VEXPANDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
27174 { 10009 /* vexpandpd */, X86::VEXPANDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
27175 { 10009 /* vexpandpd */, X86::VEXPANDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
27176 { 10009 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
27177 { 10009 /* vexpandpd */, X86::VEXPANDPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
27178 { 10019 /* vexpandps */, X86::VEXPANDPSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
27179 { 10019 /* vexpandps */, X86::VEXPANDPSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
27180 { 10019 /* vexpandps */, X86::VEXPANDPSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
27181 { 10019 /* vexpandps */, X86::VEXPANDPSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
27182 { 10019 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
27183 { 10019 /* vexpandps */, X86::VEXPANDPSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
27184 { 10019 /* vexpandps */, X86::VEXPANDPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
27185 { 10019 /* vexpandps */, X86::VEXPANDPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
27186 { 10019 /* vexpandps */, X86::VEXPANDPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
27187 { 10019 /* vexpandps */, X86::VEXPANDPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
27188 { 10019 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
27189 { 10019 /* vexpandps */, X86::VEXPANDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
27190 { 10019 /* vexpandps */, X86::VEXPANDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
27191 { 10019 /* vexpandps */, X86::VEXPANDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
27192 { 10019 /* vexpandps */, X86::VEXPANDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
27193 { 10019 /* vexpandps */, X86::VEXPANDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
27194 { 10019 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
27195 { 10019 /* vexpandps */, X86::VEXPANDPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
27196 { 10029 /* vextractf128 */, X86::VEXTRACTF128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
27197 { 10029 /* vextractf128 */, X86::VEXTRACTF128mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, },
27198 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27199 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
27200 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27201 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
27202 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27203 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27204 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27205 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27206 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27207 { 10042 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27208 { 10056 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
27209 { 10056 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
27210 { 10056 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27211 { 10056 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27212 { 10056 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27213 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27214 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
27215 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27216 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
27217 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27218 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27219 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27220 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27221 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27222 { 10070 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27223 { 10084 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
27224 { 10084 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
27225 { 10084 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27226 { 10084 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27227 { 10084 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27228 { 10098 /* vextracti128 */, X86::VEXTRACTI128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
27229 { 10098 /* vextracti128 */, X86::VEXTRACTI128mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, },
27230 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27231 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
27232 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27233 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
27234 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27235 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27236 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27237 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27238 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27239 { 10111 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27240 { 10125 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
27241 { 10125 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
27242 { 10125 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27243 { 10125 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27244 { 10125 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27245 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27246 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
27247 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27248 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
27249 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27250 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27251 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27252 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27253 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27254 { 10139 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27255 { 10153 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
27256 { 10153 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
27257 { 10153 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27258 { 10153 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27259 { 10153 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27260 { 10167 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
27261 { 10167 /* vextractps */, X86::VEXTRACTPSZrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27262 { 10167 /* vextractps */, X86::VEXTRACTPSmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
27263 { 10167 /* vextractps */, X86::VEXTRACTPSZmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27264 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27265 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27266 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27267 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27268 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27269 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27270 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27271 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27272 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27273 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27274 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27275 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27276 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27277 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27278 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27279 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27280 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27281 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27282 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27283 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27284 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27285 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27286 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27287 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27288 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27289 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27290 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27291 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27292 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27293 { 10178 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27294 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27295 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27296 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27297 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27298 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27299 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27300 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27301 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27302 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27303 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27304 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27305 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27306 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27307 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27308 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27309 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27310 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27311 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27312 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27313 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27314 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27315 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27316 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27317 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27318 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27319 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27320 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27321 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27322 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27323 { 10190 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27324 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27325 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
27326 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27327 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27328 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
27329 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27330 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
27331 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27332 { 10202 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27333 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27334 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27335 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27336 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27337 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27338 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27339 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27340 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27341 { 10214 /* vfixupimmss */, X86::VFIXUPIMMSSZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27342 { 10226 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27343 { 10226 /* vfmadd132pd */, X86::VFMADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27344 { 10226 /* vfmadd132pd */, X86::VFMADD132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27345 { 10226 /* vfmadd132pd */, X86::VFMADD132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27346 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27347 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27348 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27349 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27350 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27351 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27352 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27353 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27354 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27355 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27356 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27357 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27358 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27359 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27360 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27361 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27362 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27363 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27364 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27365 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27366 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27367 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27368 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27369 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27370 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27371 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27372 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27373 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27374 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27375 { 10226 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27376 { 10238 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27377 { 10238 /* vfmadd132ps */, X86::VFMADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27378 { 10238 /* vfmadd132ps */, X86::VFMADD132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27379 { 10238 /* vfmadd132ps */, X86::VFMADD132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27380 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27381 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27382 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27383 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27384 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27385 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27386 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27387 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27388 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27389 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27390 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27391 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27392 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27393 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27394 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27395 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27396 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27397 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27398 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27399 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27400 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27401 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27402 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27403 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27404 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27405 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27406 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27407 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27408 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27409 { 10238 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27410 { 10250 /* vfmadd132sd */, X86::VFMADD132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27411 { 10250 /* vfmadd132sd */, X86::VFMADD132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27412 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27413 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27414 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27415 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27416 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27417 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27418 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27419 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27420 { 10250 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27421 { 10262 /* vfmadd132ss */, X86::VFMADD132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27422 { 10262 /* vfmadd132ss */, X86::VFMADD132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27423 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27424 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27425 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27426 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27427 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27428 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27429 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27430 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27431 { 10262 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27432 { 10274 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27433 { 10274 /* vfmadd213pd */, X86::VFMADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27434 { 10274 /* vfmadd213pd */, X86::VFMADD213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27435 { 10274 /* vfmadd213pd */, X86::VFMADD213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27436 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27437 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27438 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27439 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27440 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27441 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27442 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27443 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27444 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27445 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27446 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27447 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27448 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27449 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27450 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27451 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27452 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27453 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27454 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27455 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27456 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27457 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27458 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27459 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27460 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27461 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27462 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27463 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27464 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27465 { 10274 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27466 { 10286 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27467 { 10286 /* vfmadd213ps */, X86::VFMADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27468 { 10286 /* vfmadd213ps */, X86::VFMADD213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27469 { 10286 /* vfmadd213ps */, X86::VFMADD213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27470 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27471 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27472 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27473 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27474 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27475 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27476 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27477 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27478 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27479 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27480 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27481 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27482 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27483 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27484 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27485 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27486 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27487 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27488 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27489 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27490 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27491 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27492 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27493 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27494 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27495 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27496 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27497 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27498 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27499 { 10286 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27500 { 10298 /* vfmadd213sd */, X86::VFMADD213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27501 { 10298 /* vfmadd213sd */, X86::VFMADD213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27502 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27503 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27504 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27505 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27506 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27507 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27508 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27509 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27510 { 10298 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27511 { 10310 /* vfmadd213ss */, X86::VFMADD213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27512 { 10310 /* vfmadd213ss */, X86::VFMADD213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27513 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27514 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27515 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27516 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27517 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27518 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27519 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27520 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27521 { 10310 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27522 { 10322 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27523 { 10322 /* vfmadd231pd */, X86::VFMADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27524 { 10322 /* vfmadd231pd */, X86::VFMADD231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27525 { 10322 /* vfmadd231pd */, X86::VFMADD231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27526 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27527 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27528 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27529 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27530 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27531 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27532 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27533 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27534 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27535 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27536 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27537 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27538 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27539 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27540 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27541 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27542 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27543 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27544 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27545 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27546 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27547 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27548 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27549 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27550 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27551 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27552 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27553 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27554 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27555 { 10322 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27556 { 10334 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27557 { 10334 /* vfmadd231ps */, X86::VFMADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27558 { 10334 /* vfmadd231ps */, X86::VFMADD231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27559 { 10334 /* vfmadd231ps */, X86::VFMADD231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27560 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27561 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27562 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27563 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27564 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27565 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27566 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27567 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27568 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27569 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27570 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27571 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27572 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27573 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27574 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27575 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27576 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27577 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27578 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27579 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27580 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27581 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27582 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27583 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27584 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27585 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27586 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27587 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27588 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27589 { 10334 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27590 { 10346 /* vfmadd231sd */, X86::VFMADD231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27591 { 10346 /* vfmadd231sd */, X86::VFMADD231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27592 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27593 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27594 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27595 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27596 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27597 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27598 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27599 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27600 { 10346 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27601 { 10358 /* vfmadd231ss */, X86::VFMADD231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27602 { 10358 /* vfmadd231ss */, X86::VFMADD231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27603 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27604 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27605 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27606 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27607 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27608 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27609 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27610 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27611 { 10358 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27612 { 10370 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27613 { 10370 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27614 { 10370 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27615 { 10370 /* vfmaddpd */, X86::VFMADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27616 { 10370 /* vfmaddpd */, X86::VFMADDPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27617 { 10370 /* vfmaddpd */, X86::VFMADDPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27618 { 10379 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27619 { 10379 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27620 { 10379 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27621 { 10379 /* vfmaddps */, X86::VFMADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27622 { 10379 /* vfmaddps */, X86::VFMADDPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27623 { 10379 /* vfmaddps */, X86::VFMADDPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27624 { 10388 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27625 { 10388 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27626 { 10388 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
27627 { 10397 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27628 { 10397 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27629 { 10397 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
27630 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27631 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27632 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27633 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27634 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27635 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27636 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27637 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27638 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27639 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27640 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27641 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27642 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27643 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27644 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27645 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27646 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27647 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27648 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27649 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27650 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27651 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27652 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27653 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27654 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27655 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27656 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27657 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27658 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27659 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27660 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27661 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27662 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27663 { 10406 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27664 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27665 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27666 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27667 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27668 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27669 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27670 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27671 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27672 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27673 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27674 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27675 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27676 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27677 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27678 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27679 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27680 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27681 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27682 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27683 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27684 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27685 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27686 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27687 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27688 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27689 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27690 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27691 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27692 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27693 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27694 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27695 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27696 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27697 { 10421 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27698 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27699 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27700 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27701 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27702 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27703 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27704 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27705 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27706 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27707 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27708 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27709 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27710 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27711 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27712 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27713 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27714 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27715 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27716 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27717 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27718 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27719 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27720 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27721 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27722 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27723 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27724 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27725 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27726 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27727 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27728 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27729 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27730 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27731 { 10436 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27732 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27733 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27734 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27735 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27736 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27737 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27738 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27739 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27740 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27741 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27742 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27743 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27744 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27745 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27746 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27747 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27748 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27749 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27750 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27751 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27752 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27753 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27754 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27755 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27756 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27757 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27758 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27759 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27760 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27761 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27762 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27763 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27764 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27765 { 10451 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27766 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27767 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27768 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27769 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27770 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27771 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27772 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27773 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27774 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27775 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27776 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27777 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27778 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27779 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27780 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27781 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27782 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27783 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27784 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27785 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27786 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27787 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27788 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27789 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27790 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27791 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27792 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27793 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27794 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27795 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27796 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27797 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27798 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27799 { 10466 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27800 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27801 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27802 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27803 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27804 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27805 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27806 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27807 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27808 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27809 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27810 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27811 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27812 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27813 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27814 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27815 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27816 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27817 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27818 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27819 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27820 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27821 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27822 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27823 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27824 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27825 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27826 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27827 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27828 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27829 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27830 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27831 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27832 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27833 { 10481 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27834 { 10496 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27835 { 10496 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27836 { 10496 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27837 { 10496 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27838 { 10496 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27839 { 10496 /* vfmaddsubpd */, X86::VFMADDSUBPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27840 { 10508 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27841 { 10508 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27842 { 10508 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27843 { 10508 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27844 { 10508 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27845 { 10508 /* vfmaddsubps */, X86::VFMADDSUBPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27846 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27847 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27848 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27849 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27850 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27851 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27852 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27853 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27854 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27855 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27856 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27857 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27858 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27859 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27860 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27861 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27862 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27863 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27864 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27865 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27866 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27867 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27868 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27869 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27870 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27871 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27872 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27873 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27874 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27875 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27876 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27877 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27878 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27879 { 10520 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27880 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27881 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27882 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27883 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27884 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27885 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27886 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27887 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27888 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27889 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27890 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27891 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27892 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27893 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27894 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27895 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27896 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27897 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27898 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27899 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27900 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27901 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27902 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27903 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27904 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27905 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27906 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27907 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27908 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27909 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27910 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27911 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27912 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27913 { 10532 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27914 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27915 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27916 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27917 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27918 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27919 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27920 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27921 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27922 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27923 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27924 { 10544 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27925 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27926 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27927 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27928 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27929 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27930 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27931 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27932 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27933 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27934 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27935 { 10556 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27936 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27937 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27938 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27939 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27940 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27941 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27942 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27943 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27944 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27945 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27946 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27947 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27948 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27949 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27950 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27951 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27952 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27953 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27954 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27955 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27956 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27957 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27958 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27959 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27960 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27961 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27962 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27963 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27964 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27965 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27966 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27967 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27968 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27969 { 10568 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27970 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27971 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27972 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27973 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27974 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27975 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27976 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27977 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27978 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27979 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27980 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27981 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27982 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27983 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27984 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27985 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27986 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27987 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27988 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27989 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27990 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27991 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27992 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27993 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27994 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27995 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27996 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27997 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27998 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27999 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28000 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28001 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28002 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28003 { 10580 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28004 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28005 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28006 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28007 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28008 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28009 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28010 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28011 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28012 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28013 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28014 { 10592 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28015 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28016 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28017 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28018 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28019 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28020 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28021 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28022 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28023 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28024 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28025 { 10604 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28026 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28027 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28028 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28029 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28030 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28031 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28032 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28033 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28034 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28035 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28036 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28037 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28038 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28039 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28040 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28041 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28042 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28043 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28044 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28045 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28046 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28047 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28048 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28049 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28050 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28051 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28052 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28053 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28054 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28055 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28056 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28057 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28058 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28059 { 10616 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28060 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28061 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28062 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28063 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28064 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28065 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28066 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28067 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28068 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28069 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28070 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28071 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28072 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28073 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28074 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28075 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28076 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28077 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28078 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28079 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28080 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28081 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28082 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28083 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28084 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28085 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28086 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28087 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28088 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28089 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28090 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28091 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28092 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28093 { 10628 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28094 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28095 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28096 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28097 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28098 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28099 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28100 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28101 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28102 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28103 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28104 { 10640 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28105 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28106 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28107 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28108 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28109 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28110 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28111 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28112 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28113 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28114 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28115 { 10652 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28116 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28117 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28118 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28119 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28120 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28121 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28122 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28123 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28124 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28125 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28126 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28127 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28128 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28129 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28130 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28131 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28132 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28133 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28134 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28135 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28136 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28137 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28138 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28139 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28140 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28141 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28142 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28143 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28144 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28145 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28146 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28147 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28148 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28149 { 10664 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28150 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28151 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28152 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28153 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28154 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28155 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28156 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28157 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28158 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28159 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28160 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28161 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28162 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28163 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28164 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28165 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28166 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28167 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28168 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28169 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28170 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28171 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28172 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28173 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28174 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28175 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28176 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28177 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28178 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28179 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28180 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28181 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28182 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28183 { 10679 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28184 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28185 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28186 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28187 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28188 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28189 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28190 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28191 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28192 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28193 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28194 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28195 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28196 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28197 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28198 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28199 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28200 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28201 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28202 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28203 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28204 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28205 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28206 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28207 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28208 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28209 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28210 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28211 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28212 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28213 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28214 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28215 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28216 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28217 { 10694 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28218 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28219 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28220 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28221 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28222 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28223 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28224 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28225 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28226 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28227 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28228 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28229 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28230 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28231 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28232 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28233 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28234 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28235 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28236 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28237 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28238 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28239 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28240 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28241 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28242 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28243 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28244 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28245 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28246 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28247 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28248 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28249 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28250 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28251 { 10709 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28252 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28253 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28254 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28255 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28256 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28257 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28258 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28259 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28260 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28261 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28262 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28263 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28264 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28265 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28266 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28267 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28268 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28269 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28270 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28271 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28272 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28273 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28274 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28275 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28276 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28277 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28278 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28279 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28280 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28281 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28282 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28283 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28284 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28285 { 10724 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28286 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28287 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28288 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28289 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28290 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28291 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28292 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28293 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28294 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28295 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28296 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28297 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28298 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28299 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28300 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28301 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28302 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28303 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28304 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28305 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28306 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28307 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28308 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28309 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28310 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28311 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28312 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28313 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28314 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28315 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28316 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28317 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28318 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28319 { 10739 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28320 { 10754 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28321 { 10754 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28322 { 10754 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28323 { 10754 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28324 { 10754 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28325 { 10754 /* vfmsubaddpd */, X86::VFMSUBADDPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
28326 { 10766 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28327 { 10766 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28328 { 10766 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28329 { 10766 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28330 { 10766 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28331 { 10766 /* vfmsubaddps */, X86::VFMSUBADDPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
28332 { 10778 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28333 { 10778 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28334 { 10778 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28335 { 10778 /* vfmsubpd */, X86::VFMSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28336 { 10778 /* vfmsubpd */, X86::VFMSUBPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28337 { 10778 /* vfmsubpd */, X86::VFMSUBPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
28338 { 10787 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28339 { 10787 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28340 { 10787 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28341 { 10787 /* vfmsubps */, X86::VFMSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28342 { 10787 /* vfmsubps */, X86::VFMSUBPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28343 { 10787 /* vfmsubps */, X86::VFMSUBPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
28344 { 10796 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28345 { 10796 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28346 { 10796 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
28347 { 10805 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28348 { 10805 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28349 { 10805 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
28350 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28351 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28352 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28353 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28354 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28355 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28356 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28357 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28358 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28359 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28360 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28361 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28362 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28363 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28364 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28365 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28366 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28367 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28368 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28369 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28370 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28371 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28372 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28373 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28374 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28375 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28376 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28377 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28378 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28379 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28380 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28381 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28382 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28383 { 10814 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28384 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28385 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28386 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28387 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28388 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28389 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28390 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28391 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28392 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28393 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28394 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28395 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28396 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28397 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28398 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28399 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28400 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28401 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28402 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28403 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28404 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28405 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28406 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28407 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28408 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28409 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28410 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28411 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28412 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28413 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28414 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28415 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28416 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28417 { 10827 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28418 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28419 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28420 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28421 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28422 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28423 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28424 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28425 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28426 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28427 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28428 { 10840 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28429 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28430 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28431 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28432 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28433 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28434 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28435 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28436 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28437 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28438 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28439 { 10853 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28440 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28441 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28442 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28443 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28444 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28445 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28446 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28447 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28448 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28449 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28450 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28451 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28452 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28453 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28454 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28455 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28456 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28457 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28458 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28459 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28460 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28461 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28462 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28463 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28464 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28465 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28466 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28467 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28468 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28469 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28470 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28471 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28472 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28473 { 10866 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28474 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28475 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28476 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28477 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28478 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28479 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28480 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28481 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28482 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28483 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28484 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28485 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28486 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28487 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28488 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28489 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28490 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28491 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28492 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28493 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28494 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28495 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28496 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28497 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28498 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28499 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28500 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28501 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28502 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28503 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28504 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28505 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28506 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28507 { 10879 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28508 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28509 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28510 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28511 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28512 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28513 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28514 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28515 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28516 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28517 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28518 { 10892 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28519 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28520 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28521 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28522 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28523 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28524 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28525 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28526 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28527 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28528 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28529 { 10905 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28530 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28531 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28532 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28533 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28534 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28535 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28536 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28537 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28538 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28539 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28540 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28541 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28542 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28543 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28544 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28545 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28546 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28547 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28548 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28549 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28550 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28551 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28552 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28553 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28554 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28555 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28556 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28557 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28558 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28559 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28560 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28561 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28562 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28563 { 10918 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28564 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28565 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28566 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28567 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28568 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28569 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28570 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28571 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28572 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28573 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28574 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28575 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28576 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28577 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28578 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28579 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28580 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28581 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28582 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28583 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28584 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28585 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28586 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28587 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28588 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28589 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28590 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28591 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28592 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28593 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28594 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28595 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28596 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28597 { 10931 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28598 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28599 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28600 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28601 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28602 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28603 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28604 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28605 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28606 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28607 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28608 { 10944 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28609 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28610 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28611 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28612 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28613 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28614 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28615 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28616 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28617 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28618 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28619 { 10957 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28620 { 10970 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28621 { 10970 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28622 { 10970 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28623 { 10970 /* vfnmaddpd */, X86::VFNMADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28624 { 10970 /* vfnmaddpd */, X86::VFNMADDPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28625 { 10970 /* vfnmaddpd */, X86::VFNMADDPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
28626 { 10980 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28627 { 10980 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28628 { 10980 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28629 { 10980 /* vfnmaddps */, X86::VFNMADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28630 { 10980 /* vfnmaddps */, X86::VFNMADDPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28631 { 10980 /* vfnmaddps */, X86::VFNMADDPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
28632 { 10990 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28633 { 10990 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28634 { 10990 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
28635 { 11000 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28636 { 11000 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28637 { 11000 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
28638 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28639 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28640 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28641 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28642 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28643 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28644 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28645 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28646 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28647 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28648 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28649 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28650 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28651 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28652 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28653 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28654 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28655 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28656 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28657 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28658 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28659 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28660 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28661 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28662 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28663 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28664 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28665 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28666 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28667 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28668 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28669 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28670 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28671 { 11010 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28672 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28673 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28674 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28675 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28676 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28677 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28678 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28679 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28680 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28681 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28682 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28683 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28684 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28685 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28686 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28687 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28688 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28689 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28690 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28691 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28692 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28693 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28694 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28695 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28696 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28697 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28698 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28699 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28700 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28701 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28702 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28703 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28704 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28705 { 11023 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28706 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28707 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28708 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28709 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28710 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28711 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28712 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28713 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28714 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28715 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28716 { 11036 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28717 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28718 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28719 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28720 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28721 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28722 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28723 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28724 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28725 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28726 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28727 { 11049 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28728 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28729 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28730 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28731 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28732 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28733 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28734 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28735 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28736 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28737 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28738 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28739 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28740 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28741 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28742 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28743 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28744 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28745 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28746 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28747 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28748 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28749 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28750 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28751 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28752 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28753 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28754 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28755 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28756 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28757 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28758 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28759 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28760 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28761 { 11062 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28762 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28763 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28764 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28765 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28766 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28767 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28768 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28769 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28770 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28771 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28772 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28773 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28774 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28775 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28776 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28777 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28778 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28779 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28780 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28781 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28782 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28783 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28784 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28785 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28786 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28787 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28788 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28789 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28790 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28791 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28792 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28793 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28794 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28795 { 11075 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28796 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28797 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28798 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28799 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28800 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28801 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28802 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28803 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28804 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28805 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28806 { 11088 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28807 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28808 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28809 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28810 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28811 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28812 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28813 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28814 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28815 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28816 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28817 { 11101 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28818 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28819 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28820 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28821 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28822 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28823 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28824 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28825 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28826 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28827 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28828 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28829 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28830 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28831 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28832 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28833 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28834 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28835 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28836 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28837 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28838 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28839 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28840 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28841 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28842 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28843 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28844 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28845 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28846 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28847 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28848 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28849 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28850 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28851 { 11114 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28852 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28853 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28854 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28855 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28856 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28857 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28858 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28859 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28860 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28861 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28862 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28863 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28864 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28865 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28866 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28867 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28868 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28869 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28870 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28871 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28872 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28873 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28874 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28875 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28876 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28877 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28878 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28879 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28880 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28881 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28882 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28883 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28884 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28885 { 11127 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28886 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28887 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28888 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28889 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28890 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28891 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28892 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28893 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28894 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28895 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28896 { 11140 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28897 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28898 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28899 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28900 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28901 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28902 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28903 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28904 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28905 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28906 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28907 { 11153 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
28908 { 11166 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28909 { 11166 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28910 { 11166 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28911 { 11166 /* vfnmsubpd */, X86::VFNMSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28912 { 11166 /* vfnmsubpd */, X86::VFNMSUBPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28913 { 11166 /* vfnmsubpd */, X86::VFNMSUBPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
28914 { 11176 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28915 { 11176 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28916 { 11176 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28917 { 11176 /* vfnmsubps */, X86::VFNMSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
28918 { 11176 /* vfnmsubps */, X86::VFNMSUBPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28919 { 11176 /* vfnmsubps */, X86::VFNMSUBPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
28920 { 11186 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28921 { 11186 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28922 { 11186 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
28923 { 11196 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28924 { 11196 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28925 { 11196 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
28926 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28927 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28928 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_ImmUnsignedi8 }, },
28929 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28930 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28931 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28932 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ128rmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
28933 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ256rmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28934 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZrmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28935 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28936 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28937 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28938 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ128rmk, Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28939 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ256rmk, Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28940 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZrmk, Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28941 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ128rmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
28942 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZ256rmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28943 { 11206 /* vfpclasspd */, X86::VFPCLASSPDZrmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28944 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28945 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28946 { 11253 /* vfpclassps */, X86::VFPCLASSPSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_ImmUnsignedi8 }, },
28947 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28948 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28949 { 11253 /* vfpclassps */, X86::VFPCLASSPSZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28950 { 11253 /* vfpclassps */, X86::VFPCLASSPSZrmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
28951 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ128rmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28952 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ256rmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28953 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28954 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28955 { 11253 /* vfpclassps */, X86::VFPCLASSPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28956 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ128rmk, Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28957 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ256rmk, Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28958 { 11253 /* vfpclassps */, X86::VFPCLASSPSZrmk, Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28959 { 11253 /* vfpclassps */, X86::VFPCLASSPSZrmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
28960 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ128rmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28961 { 11253 /* vfpclassps */, X86::VFPCLASSPSZ256rmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28962 { 11300 /* vfpclasssd */, X86::VFPCLASSSDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28963 { 11300 /* vfpclasssd */, X86::VFPCLASSSDZrm, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem64, MCK_ImmUnsignedi8 }, },
28964 { 11300 /* vfpclasssd */, X86::VFPCLASSSDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28965 { 11300 /* vfpclasssd */, X86::VFPCLASSSDZrmk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK_ImmUnsignedi8 }, },
28966 { 11311 /* vfpclassss */, X86::VFPCLASSSSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28967 { 11311 /* vfpclassss */, X86::VFPCLASSSSZrm, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_Mem32, MCK_ImmUnsignedi8 }, },
28968 { 11311 /* vfpclassss */, X86::VFPCLASSSSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28969 { 11311 /* vfpclassss */, X86::VFPCLASSSSZrmk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK_ImmUnsignedi8 }, },
28970 { 11322 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28971 { 11322 /* vfrczpd */, X86::VFRCZPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
28972 { 11322 /* vfrczpd */, X86::VFRCZPDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
28973 { 11322 /* vfrczpd */, X86::VFRCZPDYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
28974 { 11330 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28975 { 11330 /* vfrczps */, X86::VFRCZPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
28976 { 11330 /* vfrczps */, X86::VFRCZPSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
28977 { 11330 /* vfrczps */, X86::VFRCZPSYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
28978 { 11338 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28979 { 11338 /* vfrczsd */, X86::VFRCZSDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
28980 { 11346 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28981 { 11346 /* vfrczss */, X86::VFRCZSSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
28982 { 11354 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
28983 { 11354 /* vgatherdpd */, X86::VGATHERDPDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
28984 { 11354 /* vgatherdpd */, X86::VGATHERDPDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
28985 { 11354 /* vgatherdpd */, X86::VGATHERDPDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC128X }, },
28986 { 11354 /* vgatherdpd */, X86::VGATHERDPDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
28987 { 11365 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
28988 { 11365 /* vgatherdps */, X86::VGATHERDPSYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
28989 { 11365 /* vgatherdps */, X86::VGATHERDPSZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
28990 { 11365 /* vgatherdps */, X86::VGATHERDPSZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
28991 { 11365 /* vgatherdps */, X86::VGATHERDPSZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
28992 { 11376 /* vgatherpf0dpd */, X86::VGATHERPF0DPDm, Convert__Reg1_1__Mem512_RC256X5_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
28993 { 11390 /* vgatherpf0dps */, X86::VGATHERPF0DPSm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
28994 { 11404 /* vgatherpf0qpd */, X86::VGATHERPF0QPDm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
28995 { 11418 /* vgatherpf0qps */, X86::VGATHERPF0QPSm, Convert__Reg1_1__Mem256_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
28996 { 11432 /* vgatherpf1dpd */, X86::VGATHERPF1DPDm, Convert__Reg1_1__Mem512_RC256X5_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
28997 { 11446 /* vgatherpf1dps */, X86::VGATHERPF1DPSm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
28998 { 11460 /* vgatherpf1qpd */, X86::VGATHERPF1QPDm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
28999 { 11474 /* vgatherpf1qps */, X86::VGATHERPF1QPSm, Convert__Reg1_1__Mem256_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
29000 { 11488 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
29001 { 11488 /* vgatherqpd */, X86::VGATHERQPDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
29002 { 11488 /* vgatherqpd */, X86::VGATHERQPDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
29003 { 11488 /* vgatherqpd */, X86::VGATHERQPDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
29004 { 11488 /* vgatherqpd */, X86::VGATHERQPDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
29005 { 11499 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
29006 { 11499 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
29007 { 11499 /* vgatherqps */, X86::VGATHERQPSZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC256X }, },
29008 { 11499 /* vgatherqps */, X86::VGATHERQPSZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64_RC128X }, },
29009 { 11499 /* vgatherqps */, X86::VGATHERQPSZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
29010 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29011 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
29012 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29013 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
29014 { 11510 /* vgetexppd */, X86::VGETEXPPDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29015 { 11510 /* vgetexppd */, X86::VGETEXPPDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29016 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29017 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29018 { 11510 /* vgetexppd */, X86::VGETEXPPDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29019 { 11510 /* vgetexppd */, X86::VGETEXPPDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29020 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29021 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29022 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29023 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29024 { 11510 /* vgetexppd */, X86::VGETEXPPDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29025 { 11510 /* vgetexppd */, X86::VGETEXPPDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29026 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29027 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29028 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
29029 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29030 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29031 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
29032 { 11510 /* vgetexppd */, X86::VGETEXPPDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29033 { 11510 /* vgetexppd */, X86::VGETEXPPDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29034 { 11510 /* vgetexppd */, X86::VGETEXPPDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
29035 { 11510 /* vgetexppd */, X86::VGETEXPPDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
29036 { 11510 /* vgetexppd */, X86::VGETEXPPDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
29037 { 11510 /* vgetexppd */, X86::VGETEXPPDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
29038 { 11510 /* vgetexppd */, X86::VGETEXPPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
29039 { 11510 /* vgetexppd */, X86::VGETEXPPDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
29040 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29041 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
29042 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29043 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
29044 { 11520 /* vgetexpps */, X86::VGETEXPPSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29045 { 11520 /* vgetexpps */, X86::VGETEXPPSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29046 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29047 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29048 { 11520 /* vgetexpps */, X86::VGETEXPPSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29049 { 11520 /* vgetexpps */, X86::VGETEXPPSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29050 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29051 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29052 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29053 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29054 { 11520 /* vgetexpps */, X86::VGETEXPPSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29055 { 11520 /* vgetexpps */, X86::VGETEXPPSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29056 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29057 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29058 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
29059 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29060 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29061 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
29062 { 11520 /* vgetexpps */, X86::VGETEXPPSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29063 { 11520 /* vgetexpps */, X86::VGETEXPPSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29064 { 11520 /* vgetexpps */, X86::VGETEXPPSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
29065 { 11520 /* vgetexpps */, X86::VGETEXPPSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
29066 { 11520 /* vgetexpps */, X86::VGETEXPPSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
29067 { 11520 /* vgetexpps */, X86::VGETEXPPSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
29068 { 11520 /* vgetexpps */, X86::VGETEXPPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
29069 { 11520 /* vgetexpps */, X86::VGETEXPPSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
29070 { 11530 /* vgetexpsd */, X86::VGETEXPSDZr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29071 { 11530 /* vgetexpsd */, X86::VGETEXPSDZm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
29072 { 11530 /* vgetexpsd */, X86::VGETEXPSDZrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29073 { 11530 /* vgetexpsd */, X86::VGETEXPSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29074 { 11530 /* vgetexpsd */, X86::VGETEXPSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
29075 { 11530 /* vgetexpsd */, X86::VGETEXPSDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29076 { 11530 /* vgetexpsd */, X86::VGETEXPSDZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
29077 { 11530 /* vgetexpsd */, X86::VGETEXPSDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29078 { 11530 /* vgetexpsd */, X86::VGETEXPSDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29079 { 11540 /* vgetexpss */, X86::VGETEXPSSZr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29080 { 11540 /* vgetexpss */, X86::VGETEXPSSZm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
29081 { 11540 /* vgetexpss */, X86::VGETEXPSSZrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29082 { 11540 /* vgetexpss */, X86::VGETEXPSSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29083 { 11540 /* vgetexpss */, X86::VGETEXPSSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
29084 { 11540 /* vgetexpss */, X86::VGETEXPSSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29085 { 11540 /* vgetexpss */, X86::VGETEXPSSZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
29086 { 11540 /* vgetexpss */, X86::VGETEXPSSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29087 { 11540 /* vgetexpss */, X86::VGETEXPSSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29088 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29089 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29090 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29091 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29092 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29093 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29094 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
29095 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
29096 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
29097 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
29098 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29099 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29100 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29101 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29102 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
29103 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29104 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29105 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29106 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
29107 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29108 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29109 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
29110 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
29111 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29112 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
29113 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
29114 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
29115 { 11550 /* vgetmantpd */, X86::VGETMANTPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
29116 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
29117 { 11550 /* vgetmantpd */, X86::VGETMANTPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
29118 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29119 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29120 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29121 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29122 { 11561 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29123 { 11561 /* vgetmantps */, X86::VGETMANTPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29124 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
29125 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
29126 { 11561 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
29127 { 11561 /* vgetmantps */, X86::VGETMANTPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
29128 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29129 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29130 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29131 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29132 { 11561 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
29133 { 11561 /* vgetmantps */, X86::VGETMANTPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29134 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29135 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29136 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
29137 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29138 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29139 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
29140 { 11561 /* vgetmantps */, X86::VGETMANTPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
29141 { 11561 /* vgetmantps */, X86::VGETMANTPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29142 { 11561 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
29143 { 11561 /* vgetmantps */, X86::VGETMANTPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
29144 { 11561 /* vgetmantps */, X86::VGETMANTPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
29145 { 11561 /* vgetmantps */, X86::VGETMANTPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
29146 { 11561 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
29147 { 11561 /* vgetmantps */, X86::VGETMANTPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
29148 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29149 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrmi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
29150 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
29151 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29152 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
29153 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29154 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
29155 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
29156 { 11572 /* vgetmantsd */, X86::VGETMANTSDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
29157 { 11583 /* vgetmantss */, X86::VGETMANTSSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29158 { 11583 /* vgetmantss */, X86::VGETMANTSSZrmi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
29159 { 11583 /* vgetmantss */, X86::VGETMANTSSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
29160 { 11583 /* vgetmantss */, X86::VGETMANTSSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29161 { 11583 /* vgetmantss */, X86::VGETMANTSSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
29162 { 11583 /* vgetmantss */, X86::VGETMANTSSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29163 { 11583 /* vgetmantss */, X86::VGETMANTSSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
29164 { 11583 /* vgetmantss */, X86::VGETMANTSSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
29165 { 11583 /* vgetmantss */, X86::VGETMANTSSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
29166 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29167 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29168 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
29169 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29170 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29171 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29172 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29173 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29174 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29175 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29176 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
29177 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
29178 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
29179 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29180 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29181 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29182 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29183 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29184 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29185 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29186 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29187 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
29188 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29189 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29190 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
29191 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29192 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29193 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
29194 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
29195 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
29196 { 11594 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
29197 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29198 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29199 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
29200 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29201 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29202 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29203 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29204 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29205 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29206 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29207 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
29208 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
29209 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
29210 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29211 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29212 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29213 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29214 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29215 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29216 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29217 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29218 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
29219 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29220 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29221 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
29222 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29223 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29224 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
29225 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
29226 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
29227 { 11612 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
29228 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29229 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29230 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29231 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29232 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29233 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29234 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29235 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29236 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29237 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29238 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29239 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29240 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29241 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29242 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29243 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29244 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29245 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29246 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29247 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29248 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29249 { 11627 /* vgf2p8mulb */, X86::VGF2P8MULBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29250 { 11638 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29251 { 11638 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29252 { 11638 /* vhaddpd */, X86::VHADDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29253 { 11638 /* vhaddpd */, X86::VHADDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29254 { 11646 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29255 { 11646 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29256 { 11646 /* vhaddps */, X86::VHADDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29257 { 11646 /* vhaddps */, X86::VHADDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29258 { 11654 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29259 { 11654 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29260 { 11654 /* vhsubpd */, X86::VHSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29261 { 11654 /* vhsubpd */, X86::VHSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29262 { 11662 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29263 { 11662 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29264 { 11662 /* vhsubps */, X86::VHSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29265 { 11662 /* vhsubps */, X86::VHSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29266 { 11670 /* vinsertf128 */, X86::VINSERTF128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, },
29267 { 11670 /* vinsertf128 */, X86::VINSERTF128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29268 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29269 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29270 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29271 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29272 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29273 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29274 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29275 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29276 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29277 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29278 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29279 { 11682 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29280 { 11695 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29281 { 11695 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29282 { 11695 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29283 { 11695 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29284 { 11695 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29285 { 11695 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29286 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29287 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29288 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29289 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29290 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29291 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29292 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29293 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29294 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29295 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29296 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29297 { 11708 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29298 { 11721 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29299 { 11721 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29300 { 11721 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29301 { 11721 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29302 { 11721 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29303 { 11721 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29304 { 11734 /* vinserti128 */, X86::VINSERTI128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, },
29305 { 11734 /* vinserti128 */, X86::VINSERTI128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29306 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29307 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29308 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29309 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29310 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29311 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29312 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29313 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29314 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29315 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29316 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29317 { 11746 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29318 { 11759 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29319 { 11759 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29320 { 11759 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29321 { 11759 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29322 { 11759 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29323 { 11759 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29324 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29325 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29326 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29327 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29328 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29329 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29330 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29331 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29332 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29333 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29334 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29335 { 11772 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29336 { 11785 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29337 { 11785 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29338 { 11785 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29339 { 11785 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29340 { 11785 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29341 { 11785 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29342 { 11798 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29343 { 11798 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
29344 { 11798 /* vinsertps */, X86::VINSERTPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29345 { 11798 /* vinsertps */, X86::VINSERTPSZrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
29346 { 11808 /* vlddqu */, X86::VLDDQUrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29347 { 11808 /* vlddqu */, X86::VLDDQUYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
29348 { 11815 /* vldmxcsr */, X86::VLDMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
29349 { 11824 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
29350 { 11824 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, },
29351 { 11836 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29352 { 11836 /* vmaskmovpd */, X86::VMASKMOVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29353 { 11836 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
29354 { 11836 /* vmaskmovpd */, X86::VMASKMOVPDYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
29355 { 11847 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29356 { 11847 /* vmaskmovps */, X86::VMASKMOVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29357 { 11847 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
29358 { 11847 /* vmaskmovps */, X86::VMASKMOVPSYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
29359 { 11858 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29360 { 11858 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29361 { 11858 /* vmaxpd */, X86::VMAXPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29362 { 11858 /* vmaxpd */, X86::VMAXPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29363 { 11858 /* vmaxpd */, X86::VMAXPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29364 { 11858 /* vmaxpd */, X86::VMAXPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29365 { 11858 /* vmaxpd */, X86::VMAXPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29366 { 11858 /* vmaxpd */, X86::VMAXPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29367 { 11858 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29368 { 11858 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29369 { 11858 /* vmaxpd */, X86::VMAXPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29370 { 11858 /* vmaxpd */, X86::VMAXPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29371 { 11858 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29372 { 11858 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29373 { 11858 /* vmaxpd */, X86::VMAXPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29374 { 11858 /* vmaxpd */, X86::VMAXPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29375 { 11858 /* vmaxpd */, X86::VMAXPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29376 { 11858 /* vmaxpd */, X86::VMAXPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29377 { 11858 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29378 { 11858 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29379 { 11858 /* vmaxpd */, X86::VMAXPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29380 { 11858 /* vmaxpd */, X86::VMAXPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29381 { 11858 /* vmaxpd */, X86::VMAXPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29382 { 11858 /* vmaxpd */, X86::VMAXPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29383 { 11858 /* vmaxpd */, X86::VMAXPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29384 { 11858 /* vmaxpd */, X86::VMAXPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29385 { 11858 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29386 { 11858 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29387 { 11858 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29388 { 11858 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29389 { 11858 /* vmaxpd */, X86::VMAXPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29390 { 11858 /* vmaxpd */, X86::VMAXPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29391 { 11858 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29392 { 11858 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29393 { 11865 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29394 { 11865 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29395 { 11865 /* vmaxps */, X86::VMAXPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29396 { 11865 /* vmaxps */, X86::VMAXPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29397 { 11865 /* vmaxps */, X86::VMAXPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29398 { 11865 /* vmaxps */, X86::VMAXPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29399 { 11865 /* vmaxps */, X86::VMAXPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29400 { 11865 /* vmaxps */, X86::VMAXPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29401 { 11865 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29402 { 11865 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29403 { 11865 /* vmaxps */, X86::VMAXPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29404 { 11865 /* vmaxps */, X86::VMAXPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29405 { 11865 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29406 { 11865 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29407 { 11865 /* vmaxps */, X86::VMAXPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29408 { 11865 /* vmaxps */, X86::VMAXPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29409 { 11865 /* vmaxps */, X86::VMAXPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29410 { 11865 /* vmaxps */, X86::VMAXPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29411 { 11865 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29412 { 11865 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29413 { 11865 /* vmaxps */, X86::VMAXPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29414 { 11865 /* vmaxps */, X86::VMAXPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29415 { 11865 /* vmaxps */, X86::VMAXPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29416 { 11865 /* vmaxps */, X86::VMAXPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29417 { 11865 /* vmaxps */, X86::VMAXPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29418 { 11865 /* vmaxps */, X86::VMAXPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29419 { 11865 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29420 { 11865 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29421 { 11865 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29422 { 11865 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29423 { 11865 /* vmaxps */, X86::VMAXPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29424 { 11865 /* vmaxps */, X86::VMAXPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29425 { 11865 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29426 { 11865 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29427 { 11872 /* vmaxsd */, X86::VMAXSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29428 { 11872 /* vmaxsd */, X86::VMAXSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29429 { 11872 /* vmaxsd */, X86::VMAXSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29430 { 11872 /* vmaxsd */, X86::VMAXSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
29431 { 11872 /* vmaxsd */, X86::VMAXSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29432 { 11872 /* vmaxsd */, X86::VMAXSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29433 { 11872 /* vmaxsd */, X86::VMAXSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
29434 { 11872 /* vmaxsd */, X86::VMAXSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29435 { 11872 /* vmaxsd */, X86::VMAXSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
29436 { 11872 /* vmaxsd */, X86::VMAXSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29437 { 11872 /* vmaxsd */, X86::VMAXSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29438 { 11879 /* vmaxss */, X86::VMAXSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29439 { 11879 /* vmaxss */, X86::VMAXSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
29440 { 11879 /* vmaxss */, X86::VMAXSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29441 { 11879 /* vmaxss */, X86::VMAXSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
29442 { 11879 /* vmaxss */, X86::VMAXSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29443 { 11879 /* vmaxss */, X86::VMAXSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29444 { 11879 /* vmaxss */, X86::VMAXSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
29445 { 11879 /* vmaxss */, X86::VMAXSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29446 { 11879 /* vmaxss */, X86::VMAXSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
29447 { 11879 /* vmaxss */, X86::VMAXSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29448 { 11879 /* vmaxss */, X86::VMAXSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29449 { 11886 /* vmcall */, X86::VMCALL, Convert_NoOperands, AMFBS_None, { }, },
29450 { 11893 /* vmclear */, X86::VMCLEARm, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
29451 { 11901 /* vmfunc */, X86::VMFUNC, Convert_NoOperands, AMFBS_None, { }, },
29452 { 11908 /* vminpd */, X86::VMINPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29453 { 11908 /* vminpd */, X86::VMINPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29454 { 11908 /* vminpd */, X86::VMINPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29455 { 11908 /* vminpd */, X86::VMINPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29456 { 11908 /* vminpd */, X86::VMINPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29457 { 11908 /* vminpd */, X86::VMINPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29458 { 11908 /* vminpd */, X86::VMINPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29459 { 11908 /* vminpd */, X86::VMINPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29460 { 11908 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29461 { 11908 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29462 { 11908 /* vminpd */, X86::VMINPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29463 { 11908 /* vminpd */, X86::VMINPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29464 { 11908 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29465 { 11908 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29466 { 11908 /* vminpd */, X86::VMINPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29467 { 11908 /* vminpd */, X86::VMINPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29468 { 11908 /* vminpd */, X86::VMINPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29469 { 11908 /* vminpd */, X86::VMINPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29470 { 11908 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29471 { 11908 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29472 { 11908 /* vminpd */, X86::VMINPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29473 { 11908 /* vminpd */, X86::VMINPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29474 { 11908 /* vminpd */, X86::VMINPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29475 { 11908 /* vminpd */, X86::VMINPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29476 { 11908 /* vminpd */, X86::VMINPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29477 { 11908 /* vminpd */, X86::VMINPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29478 { 11908 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29479 { 11908 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29480 { 11908 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29481 { 11908 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29482 { 11908 /* vminpd */, X86::VMINPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29483 { 11908 /* vminpd */, X86::VMINPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29484 { 11908 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29485 { 11908 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29486 { 11915 /* vminps */, X86::VMINPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29487 { 11915 /* vminps */, X86::VMINPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29488 { 11915 /* vminps */, X86::VMINPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29489 { 11915 /* vminps */, X86::VMINPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29490 { 11915 /* vminps */, X86::VMINPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29491 { 11915 /* vminps */, X86::VMINPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29492 { 11915 /* vminps */, X86::VMINPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29493 { 11915 /* vminps */, X86::VMINPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29494 { 11915 /* vminps */, X86::VMINPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29495 { 11915 /* vminps */, X86::VMINPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29496 { 11915 /* vminps */, X86::VMINPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29497 { 11915 /* vminps */, X86::VMINPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29498 { 11915 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29499 { 11915 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29500 { 11915 /* vminps */, X86::VMINPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29501 { 11915 /* vminps */, X86::VMINPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29502 { 11915 /* vminps */, X86::VMINPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29503 { 11915 /* vminps */, X86::VMINPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29504 { 11915 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29505 { 11915 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29506 { 11915 /* vminps */, X86::VMINPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29507 { 11915 /* vminps */, X86::VMINPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29508 { 11915 /* vminps */, X86::VMINPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29509 { 11915 /* vminps */, X86::VMINPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29510 { 11915 /* vminps */, X86::VMINPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29511 { 11915 /* vminps */, X86::VMINPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29512 { 11915 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29513 { 11915 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29514 { 11915 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29515 { 11915 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29516 { 11915 /* vminps */, X86::VMINPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29517 { 11915 /* vminps */, X86::VMINPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29518 { 11915 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29519 { 11915 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29520 { 11922 /* vminsd */, X86::VMINSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29521 { 11922 /* vminsd */, X86::VMINSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29522 { 11922 /* vminsd */, X86::VMINSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29523 { 11922 /* vminsd */, X86::VMINSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
29524 { 11922 /* vminsd */, X86::VMINSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29525 { 11922 /* vminsd */, X86::VMINSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29526 { 11922 /* vminsd */, X86::VMINSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
29527 { 11922 /* vminsd */, X86::VMINSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29528 { 11922 /* vminsd */, X86::VMINSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
29529 { 11922 /* vminsd */, X86::VMINSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29530 { 11922 /* vminsd */, X86::VMINSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29531 { 11929 /* vminss */, X86::VMINSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29532 { 11929 /* vminss */, X86::VMINSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
29533 { 11929 /* vminss */, X86::VMINSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29534 { 11929 /* vminss */, X86::VMINSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
29535 { 11929 /* vminss */, X86::VMINSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29536 { 11929 /* vminss */, X86::VMINSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29537 { 11929 /* vminss */, X86::VMINSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
29538 { 11929 /* vminss */, X86::VMINSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29539 { 11929 /* vminss */, X86::VMINSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
29540 { 11929 /* vminss */, X86::VMINSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29541 { 11929 /* vminss */, X86::VMINSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
29542 { 11936 /* vmlaunch */, X86::VMLAUNCH, Convert_NoOperands, AMFBS_None, { }, },
29543 { 11945 /* vmload */, X86::VMLOAD32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
29544 { 11945 /* vmload */, X86::VMLOAD64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
29545 { 11945 /* vmload */, X86::VMLOAD32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, },
29546 { 11945 /* vmload */, X86::VMLOAD64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
29547 { 11952 /* vmmcall */, X86::VMMCALL, Convert_NoOperands, AMFBS_None, { }, },
29548 { 11960 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29549 { 11960 /* vmovapd */, X86::VMOVAPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29550 { 11960 /* vmovapd */, X86::VMOVAPDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29551 { 11960 /* vmovapd */, X86::VMOVAPDYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
29552 { 11960 /* vmovapd */, X86::VMOVAPDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29553 { 11960 /* vmovapd */, X86::VMOVAPDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
29554 { 11960 /* vmovapd */, X86::VMOVAPDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29555 { 11960 /* vmovapd */, X86::VMOVAPDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
29556 { 11960 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29557 { 11960 /* vmovapd */, X86::VMOVAPDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29558 { 11960 /* vmovapd */, X86::VMOVAPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29559 { 11960 /* vmovapd */, X86::VMOVAPDZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
29560 { 11960 /* vmovapd */, X86::VMOVAPDYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
29561 { 11960 /* vmovapd */, X86::VMOVAPDZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
29562 { 11960 /* vmovapd */, X86::VMOVAPDZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29563 { 11960 /* vmovapd */, X86::VMOVAPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29564 { 11960 /* vmovapd */, X86::VMOVAPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29565 { 11960 /* vmovapd */, X86::VMOVAPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29566 { 11960 /* vmovapd */, X86::VMOVAPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29567 { 11960 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29568 { 11960 /* vmovapd */, X86::VMOVAPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29569 { 11960 /* vmovapd */, X86::VMOVAPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29570 { 11960 /* vmovapd */, X86::VMOVAPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29571 { 11960 /* vmovapd */, X86::VMOVAPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29572 { 11960 /* vmovapd */, X86::VMOVAPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29573 { 11960 /* vmovapd */, X86::VMOVAPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29574 { 11960 /* vmovapd */, X86::VMOVAPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29575 { 11960 /* vmovapd */, X86::VMOVAPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29576 { 11960 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29577 { 11960 /* vmovapd */, X86::VMOVAPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29578 { 11968 /* vmovapd.s */, X86::VMOVAPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29579 { 11968 /* vmovapd.s */, X86::VMOVAPDYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29580 { 11968 /* vmovapd.s */, X86::VMOVAPDZ128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29581 { 11968 /* vmovapd.s */, X86::VMOVAPDZ256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29582 { 11968 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29583 { 11968 /* vmovapd.s */, X86::VMOVAPDZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29584 { 11968 /* vmovapd.s */, X86::VMOVAPDZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29585 { 11968 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29586 { 11968 /* vmovapd.s */, X86::VMOVAPDZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29587 { 11968 /* vmovapd.s */, X86::VMOVAPDZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29588 { 11968 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29589 { 11978 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29590 { 11978 /* vmovaps */, X86::VMOVAPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29591 { 11978 /* vmovaps */, X86::VMOVAPSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29592 { 11978 /* vmovaps */, X86::VMOVAPSYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
29593 { 11978 /* vmovaps */, X86::VMOVAPSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29594 { 11978 /* vmovaps */, X86::VMOVAPSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
29595 { 11978 /* vmovaps */, X86::VMOVAPSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29596 { 11978 /* vmovaps */, X86::VMOVAPSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
29597 { 11978 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29598 { 11978 /* vmovaps */, X86::VMOVAPSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29599 { 11978 /* vmovaps */, X86::VMOVAPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29600 { 11978 /* vmovaps */, X86::VMOVAPSZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
29601 { 11978 /* vmovaps */, X86::VMOVAPSYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
29602 { 11978 /* vmovaps */, X86::VMOVAPSZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
29603 { 11978 /* vmovaps */, X86::VMOVAPSZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29604 { 11978 /* vmovaps */, X86::VMOVAPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29605 { 11978 /* vmovaps */, X86::VMOVAPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29606 { 11978 /* vmovaps */, X86::VMOVAPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29607 { 11978 /* vmovaps */, X86::VMOVAPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29608 { 11978 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29609 { 11978 /* vmovaps */, X86::VMOVAPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29610 { 11978 /* vmovaps */, X86::VMOVAPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29611 { 11978 /* vmovaps */, X86::VMOVAPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29612 { 11978 /* vmovaps */, X86::VMOVAPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29613 { 11978 /* vmovaps */, X86::VMOVAPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29614 { 11978 /* vmovaps */, X86::VMOVAPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29615 { 11978 /* vmovaps */, X86::VMOVAPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29616 { 11978 /* vmovaps */, X86::VMOVAPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29617 { 11978 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29618 { 11978 /* vmovaps */, X86::VMOVAPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29619 { 11986 /* vmovaps.s */, X86::VMOVAPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29620 { 11986 /* vmovaps.s */, X86::VMOVAPSYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29621 { 11986 /* vmovaps.s */, X86::VMOVAPSZ128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29622 { 11986 /* vmovaps.s */, X86::VMOVAPSZ256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29623 { 11986 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29624 { 11986 /* vmovaps.s */, X86::VMOVAPSZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29625 { 11986 /* vmovaps.s */, X86::VMOVAPSZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29626 { 11986 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29627 { 11986 /* vmovaps.s */, X86::VMOVAPSZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29628 { 11986 /* vmovaps.s */, X86::VMOVAPSZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29629 { 11986 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29630 { 11996 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
29631 { 11996 /* vmovd */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
29632 { 11996 /* vmovd */, X86::VMOVDI2PDIrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
29633 { 11996 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
29634 { 11996 /* vmovd */, X86::VMOVPDI2DIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
29635 { 11996 /* vmovd */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
29636 { 11996 /* vmovd */, X86::VMOVPQIto64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
29637 { 11996 /* vmovd */, X86::VMOVDI2PDIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
29638 { 11996 /* vmovd */, X86::VMOV64toPQIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
29639 { 11996 /* vmovd */, X86::VMOVDI2PDIZrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
29640 { 11996 /* vmovd */, X86::VMOVPDI2DImr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
29641 { 11996 /* vmovd */, X86::VMOVPDI2DIZmr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
29642 { 12002 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29643 { 12002 /* vmovddup */, X86::VMOVDDUPrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
29644 { 12002 /* vmovddup */, X86::VMOVDDUPYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29645 { 12002 /* vmovddup */, X86::VMOVDDUPYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
29646 { 12002 /* vmovddup */, X86::VMOVDDUPZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29647 { 12002 /* vmovddup */, X86::VMOVDDUPZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
29648 { 12002 /* vmovddup */, X86::VMOVDDUPZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29649 { 12002 /* vmovddup */, X86::VMOVDDUPZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
29650 { 12002 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29651 { 12002 /* vmovddup */, X86::VMOVDDUPZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29652 { 12002 /* vmovddup */, X86::VMOVDDUPZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29653 { 12002 /* vmovddup */, X86::VMOVDDUPZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
29654 { 12002 /* vmovddup */, X86::VMOVDDUPZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29655 { 12002 /* vmovddup */, X86::VMOVDDUPZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29656 { 12002 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29657 { 12002 /* vmovddup */, X86::VMOVDDUPZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29658 { 12002 /* vmovddup */, X86::VMOVDDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29659 { 12002 /* vmovddup */, X86::VMOVDDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
29660 { 12002 /* vmovddup */, X86::VMOVDDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29661 { 12002 /* vmovddup */, X86::VMOVDDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29662 { 12002 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29663 { 12002 /* vmovddup */, X86::VMOVDDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29664 { 12011 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29665 { 12011 /* vmovdqa */, X86::VMOVDQArm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29666 { 12011 /* vmovdqa */, X86::VMOVDQAYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29667 { 12011 /* vmovdqa */, X86::VMOVDQAYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
29668 { 12011 /* vmovdqa */, X86::VMOVDQAmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29669 { 12011 /* vmovdqa */, X86::VMOVDQAYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
29670 { 12019 /* vmovdqa.s */, X86::VMOVDQArr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29671 { 12019 /* vmovdqa.s */, X86::VMOVDQAYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29672 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29673 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
29674 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29675 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
29676 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29677 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29678 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
29679 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
29680 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29681 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29682 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29683 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29684 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29685 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29686 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29687 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29688 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29689 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29690 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29691 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29692 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29693 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29694 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29695 { 12029 /* vmovdqa32 */, X86::VMOVDQA32Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29696 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29697 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29698 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29699 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29700 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29701 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29702 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29703 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29704 { 12039 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29705 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29706 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
29707 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29708 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
29709 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29710 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29711 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
29712 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
29713 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29714 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29715 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29716 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29717 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29718 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29719 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29720 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29721 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29722 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29723 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29724 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29725 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29726 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29727 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29728 { 12051 /* vmovdqa64 */, X86::VMOVDQA64Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29729 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29730 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29731 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29732 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29733 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29734 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29735 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29736 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29737 { 12061 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29738 { 12073 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29739 { 12073 /* vmovdqu */, X86::VMOVDQUrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29740 { 12073 /* vmovdqu */, X86::VMOVDQUYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29741 { 12073 /* vmovdqu */, X86::VMOVDQUYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
29742 { 12073 /* vmovdqu */, X86::VMOVDQUmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29743 { 12073 /* vmovdqu */, X86::VMOVDQUYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
29744 { 12081 /* vmovdqu.s */, X86::VMOVDQUrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29745 { 12081 /* vmovdqu.s */, X86::VMOVDQUYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29746 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29747 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
29748 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29749 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
29750 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29751 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29752 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
29753 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
29754 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29755 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29756 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29757 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29758 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29759 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29760 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29761 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29762 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29763 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29764 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29765 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29766 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29767 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29768 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29769 { 12091 /* vmovdqu16 */, X86::VMOVDQU16Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29770 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29771 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29772 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29773 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29774 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29775 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29776 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29777 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29778 { 12101 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29779 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29780 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
29781 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29782 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
29783 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29784 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29785 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
29786 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
29787 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29788 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29789 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29790 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29791 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29792 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29793 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29794 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29795 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29796 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29797 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29798 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29799 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29800 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29801 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29802 { 12113 /* vmovdqu32 */, X86::VMOVDQU32Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29803 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29804 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29805 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29806 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29807 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29808 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29809 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29810 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29811 { 12123 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29812 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29813 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
29814 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29815 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
29816 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29817 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29818 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
29819 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
29820 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29821 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29822 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29823 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29824 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29825 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29826 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29827 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29828 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29829 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29830 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29831 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29832 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29833 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29834 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29835 { 12135 /* vmovdqu64 */, X86::VMOVDQU64Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29836 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29837 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29838 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29839 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29840 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29841 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29842 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29843 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29844 { 12145 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29845 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29846 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
29847 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29848 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
29849 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29850 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29851 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
29852 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
29853 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29854 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29855 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29856 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29857 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29858 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29859 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29860 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29861 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29862 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29863 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29864 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29865 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29866 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29867 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29868 { 12157 /* vmovdqu8 */, X86::VMOVDQU8Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29869 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Z128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29870 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Z256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29871 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29872 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29873 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29874 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29875 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29876 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29877 { 12166 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29878 { 12177 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29879 { 12177 /* vmovhlps */, X86::VMOVHLPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29880 { 12186 /* vmovhpd */, X86::VMOVHPDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
29881 { 12186 /* vmovhpd */, X86::VMOVHPDZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
29882 { 12186 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29883 { 12186 /* vmovhpd */, X86::VMOVHPDZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
29884 { 12194 /* vmovhps */, X86::VMOVHPSmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
29885 { 12194 /* vmovhps */, X86::VMOVHPSZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
29886 { 12194 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29887 { 12194 /* vmovhps */, X86::VMOVHPSZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
29888 { 12202 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29889 { 12202 /* vmovlhps */, X86::VMOVLHPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29890 { 12211 /* vmovlpd */, X86::VMOVLPDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
29891 { 12211 /* vmovlpd */, X86::VMOVLPDZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
29892 { 12211 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29893 { 12211 /* vmovlpd */, X86::VMOVLPDZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
29894 { 12219 /* vmovlps */, X86::VMOVLPSmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
29895 { 12219 /* vmovlps */, X86::VMOVLPSZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
29896 { 12219 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29897 { 12219 /* vmovlps */, X86::VMOVLPSZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
29898 { 12227 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
29899 { 12227 /* vmovmskpd */, X86::VMOVMSKPDYrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_VR256 }, },
29900 { 12237 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
29901 { 12237 /* vmovmskps */, X86::VMOVMSKPSYrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_VR256 }, },
29902 { 12247 /* vmovntdq */, X86::VMOVNTDQmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29903 { 12247 /* vmovntdq */, X86::VMOVNTDQZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
29904 { 12247 /* vmovntdq */, X86::VMOVNTDQYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
29905 { 12247 /* vmovntdq */, X86::VMOVNTDQZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
29906 { 12247 /* vmovntdq */, X86::VMOVNTDQZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29907 { 12256 /* vmovntdqa */, X86::VMOVNTDQArm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29908 { 12256 /* vmovntdqa */, X86::VMOVNTDQAYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
29909 { 12256 /* vmovntdqa */, X86::VMOVNTDQAZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
29910 { 12256 /* vmovntdqa */, X86::VMOVNTDQAZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
29911 { 12256 /* vmovntdqa */, X86::VMOVNTDQAZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29912 { 12266 /* vmovntpd */, X86::VMOVNTPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29913 { 12266 /* vmovntpd */, X86::VMOVNTPDZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
29914 { 12266 /* vmovntpd */, X86::VMOVNTPDYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
29915 { 12266 /* vmovntpd */, X86::VMOVNTPDZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
29916 { 12266 /* vmovntpd */, X86::VMOVNTPDZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29917 { 12275 /* vmovntps */, X86::VMOVNTPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29918 { 12275 /* vmovntps */, X86::VMOVNTPSZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
29919 { 12275 /* vmovntps */, X86::VMOVNTPSYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
29920 { 12275 /* vmovntps */, X86::VMOVNTPSZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
29921 { 12275 /* vmovntps */, X86::VMOVNTPSZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29922 { 12284 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29923 { 12284 /* vmovq */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
29924 { 12284 /* vmovq */, X86::VMOVQI2PQIrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
29925 { 12284 /* vmovq */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
29926 { 12284 /* vmovq */, X86::VMOVPQIto64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32X }, },
29927 { 12284 /* vmovq */, X86::VMOV64toPQIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
29928 { 12284 /* vmovq */, X86::VMOVZPQILo2PQIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29929 { 12284 /* vmovq */, X86::VMOVQI2PQIZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
29930 { 12284 /* vmovq */, X86::VMOVPQI2QImr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
29931 { 12284 /* vmovq */, X86::VMOVPQI2QIZmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
29932 { 12290 /* vmovq.s */, X86::VMOVPQI2QIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29933 { 12290 /* vmovq.s */, X86::VMOVPQI2QIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29934 { 12298 /* vmovsd */, X86::VMOVSDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
29935 { 12298 /* vmovsd */, X86::VMOVSDZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
29936 { 12298 /* vmovsd */, X86::VMOVSDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
29937 { 12298 /* vmovsd */, X86::VMOVSDZmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
29938 { 12298 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29939 { 12298 /* vmovsd */, X86::VMOVSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29940 { 12298 /* vmovsd */, X86::VMOVSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
29941 { 12298 /* vmovsd */, X86::VMOVSDZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29942 { 12298 /* vmovsd */, X86::VMOVSDZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
29943 { 12298 /* vmovsd */, X86::VMOVSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29944 { 12298 /* vmovsd */, X86::VMOVSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29945 { 12305 /* vmovsd.s */, X86::VMOVSDrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29946 { 12305 /* vmovsd.s */, X86::VMOVSDZrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29947 { 12305 /* vmovsd.s */, X86::VMOVSDZrrk_REV, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29948 { 12305 /* vmovsd.s */, X86::VMOVSDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29949 { 12314 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29950 { 12314 /* vmovshdup */, X86::VMOVSHDUPrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29951 { 12314 /* vmovshdup */, X86::VMOVSHDUPYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29952 { 12314 /* vmovshdup */, X86::VMOVSHDUPYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
29953 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29954 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
29955 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29956 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
29957 { 12314 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29958 { 12314 /* vmovshdup */, X86::VMOVSHDUPZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29959 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29960 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29961 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29962 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29963 { 12314 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29964 { 12314 /* vmovshdup */, X86::VMOVSHDUPZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29965 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29966 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29967 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29968 { 12314 /* vmovshdup */, X86::VMOVSHDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29969 { 12314 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29970 { 12314 /* vmovshdup */, X86::VMOVSHDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29971 { 12324 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29972 { 12324 /* vmovsldup */, X86::VMOVSLDUPrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29973 { 12324 /* vmovsldup */, X86::VMOVSLDUPYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
29974 { 12324 /* vmovsldup */, X86::VMOVSLDUPYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
29975 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
29976 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
29977 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
29978 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
29979 { 12324 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29980 { 12324 /* vmovsldup */, X86::VMOVSLDUPZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29981 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29982 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29983 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29984 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29985 { 12324 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29986 { 12324 /* vmovsldup */, X86::VMOVSLDUPZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29987 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29988 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29989 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29990 { 12324 /* vmovsldup */, X86::VMOVSLDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29991 { 12324 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29992 { 12324 /* vmovsldup */, X86::VMOVSLDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29993 { 12334 /* vmovss */, X86::VMOVSSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
29994 { 12334 /* vmovss */, X86::VMOVSSZrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
29995 { 12334 /* vmovss */, X86::VMOVSSmr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
29996 { 12334 /* vmovss */, X86::VMOVSSZmr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
29997 { 12334 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29998 { 12334 /* vmovss */, X86::VMOVSSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29999 { 12334 /* vmovss */, X86::VMOVSSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
30000 { 12334 /* vmovss */, X86::VMOVSSZmrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30001 { 12334 /* vmovss */, X86::VMOVSSZrmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
30002 { 12334 /* vmovss */, X86::VMOVSSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30003 { 12334 /* vmovss */, X86::VMOVSSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30004 { 12341 /* vmovss.s */, X86::VMOVSSrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30005 { 12341 /* vmovss.s */, X86::VMOVSSZrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30006 { 12341 /* vmovss.s */, X86::VMOVSSZrrk_REV, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30007 { 12341 /* vmovss.s */, X86::VMOVSSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30008 { 12350 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30009 { 12350 /* vmovupd */, X86::VMOVUPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
30010 { 12350 /* vmovupd */, X86::VMOVUPDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
30011 { 12350 /* vmovupd */, X86::VMOVUPDYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
30012 { 12350 /* vmovupd */, X86::VMOVUPDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30013 { 12350 /* vmovupd */, X86::VMOVUPDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
30014 { 12350 /* vmovupd */, X86::VMOVUPDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
30015 { 12350 /* vmovupd */, X86::VMOVUPDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
30016 { 12350 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30017 { 12350 /* vmovupd */, X86::VMOVUPDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
30018 { 12350 /* vmovupd */, X86::VMOVUPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
30019 { 12350 /* vmovupd */, X86::VMOVUPDZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
30020 { 12350 /* vmovupd */, X86::VMOVUPDYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
30021 { 12350 /* vmovupd */, X86::VMOVUPDZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
30022 { 12350 /* vmovupd */, X86::VMOVUPDZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
30023 { 12350 /* vmovupd */, X86::VMOVUPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30024 { 12350 /* vmovupd */, X86::VMOVUPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
30025 { 12350 /* vmovupd */, X86::VMOVUPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30026 { 12350 /* vmovupd */, X86::VMOVUPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
30027 { 12350 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30028 { 12350 /* vmovupd */, X86::VMOVUPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30029 { 12350 /* vmovupd */, X86::VMOVUPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30030 { 12350 /* vmovupd */, X86::VMOVUPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30031 { 12350 /* vmovupd */, X86::VMOVUPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30032 { 12350 /* vmovupd */, X86::VMOVUPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30033 { 12350 /* vmovupd */, X86::VMOVUPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
30034 { 12350 /* vmovupd */, X86::VMOVUPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30035 { 12350 /* vmovupd */, X86::VMOVUPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
30036 { 12350 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30037 { 12350 /* vmovupd */, X86::VMOVUPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30038 { 12358 /* vmovupd.s */, X86::VMOVUPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30039 { 12358 /* vmovupd.s */, X86::VMOVUPDYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
30040 { 12358 /* vmovupd.s */, X86::VMOVUPDZ128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30041 { 12358 /* vmovupd.s */, X86::VMOVUPDZ256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
30042 { 12358 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30043 { 12358 /* vmovupd.s */, X86::VMOVUPDZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30044 { 12358 /* vmovupd.s */, X86::VMOVUPDZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30045 { 12358 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30046 { 12358 /* vmovupd.s */, X86::VMOVUPDZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30047 { 12358 /* vmovupd.s */, X86::VMOVUPDZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30048 { 12358 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30049 { 12368 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30050 { 12368 /* vmovups */, X86::VMOVUPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
30051 { 12368 /* vmovups */, X86::VMOVUPSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
30052 { 12368 /* vmovups */, X86::VMOVUPSYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
30053 { 12368 /* vmovups */, X86::VMOVUPSZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30054 { 12368 /* vmovups */, X86::VMOVUPSZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
30055 { 12368 /* vmovups */, X86::VMOVUPSZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
30056 { 12368 /* vmovups */, X86::VMOVUPSZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
30057 { 12368 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30058 { 12368 /* vmovups */, X86::VMOVUPSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
30059 { 12368 /* vmovups */, X86::VMOVUPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
30060 { 12368 /* vmovups */, X86::VMOVUPSZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
30061 { 12368 /* vmovups */, X86::VMOVUPSYmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256 }, },
30062 { 12368 /* vmovups */, X86::VMOVUPSZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
30063 { 12368 /* vmovups */, X86::VMOVUPSZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
30064 { 12368 /* vmovups */, X86::VMOVUPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30065 { 12368 /* vmovups */, X86::VMOVUPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
30066 { 12368 /* vmovups */, X86::VMOVUPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30067 { 12368 /* vmovups */, X86::VMOVUPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
30068 { 12368 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30069 { 12368 /* vmovups */, X86::VMOVUPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30070 { 12368 /* vmovups */, X86::VMOVUPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30071 { 12368 /* vmovups */, X86::VMOVUPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30072 { 12368 /* vmovups */, X86::VMOVUPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30073 { 12368 /* vmovups */, X86::VMOVUPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30074 { 12368 /* vmovups */, X86::VMOVUPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
30075 { 12368 /* vmovups */, X86::VMOVUPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30076 { 12368 /* vmovups */, X86::VMOVUPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
30077 { 12368 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30078 { 12368 /* vmovups */, X86::VMOVUPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30079 { 12376 /* vmovups.s */, X86::VMOVUPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30080 { 12376 /* vmovups.s */, X86::VMOVUPSYrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
30081 { 12376 /* vmovups.s */, X86::VMOVUPSZ128rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30082 { 12376 /* vmovups.s */, X86::VMOVUPSZ256rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
30083 { 12376 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30084 { 12376 /* vmovups.s */, X86::VMOVUPSZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30085 { 12376 /* vmovups.s */, X86::VMOVUPSZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30086 { 12376 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30087 { 12376 /* vmovups.s */, X86::VMOVUPSZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30088 { 12376 /* vmovups.s */, X86::VMOVUPSZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30089 { 12376 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30090 { 12386 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30091 { 12386 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30092 { 12386 /* vmpsadbw */, X86::VMPSADBWYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30093 { 12386 /* vmpsadbw */, X86::VMPSADBWYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30094 { 12395 /* vmptrld */, X86::VMPTRLDm, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
30095 { 12403 /* vmptrst */, X86::VMPTRSTm, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
30096 { 12411 /* vmread */, X86::VMREAD32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
30097 { 12411 /* vmread */, X86::VMREAD64rr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_GR64 }, },
30098 { 12411 /* vmread */, X86::VMREAD32mr, Convert__Mem325_0__Reg1_1, AMFBS_Not64BitMode, { MCK_Mem32, MCK_GR32 }, },
30099 { 12411 /* vmread */, X86::VMREAD64mr, Convert__Mem645_0__Reg1_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_GR64 }, },
30100 { 12434 /* vmresume */, X86::VMRESUME, Convert_NoOperands, AMFBS_None, { }, },
30101 { 12443 /* vmrun */, X86::VMRUN32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
30102 { 12443 /* vmrun */, X86::VMRUN64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
30103 { 12443 /* vmrun */, X86::VMRUN32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, },
30104 { 12443 /* vmrun */, X86::VMRUN64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
30105 { 12449 /* vmsave */, X86::VMSAVE32, Convert_NoOperands, AMFBS_Not64BitMode, { }, },
30106 { 12449 /* vmsave */, X86::VMSAVE64, Convert_NoOperands, AMFBS_In64BitMode, { }, },
30107 { 12449 /* vmsave */, X86::VMSAVE32, Convert_NoOperands, AMFBS_Not64BitMode, { MCK_EAX }, },
30108 { 12449 /* vmsave */, X86::VMSAVE64, Convert_NoOperands, AMFBS_In64BitMode, { MCK_RAX }, },
30109 { 12456 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30110 { 12456 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30111 { 12456 /* vmulpd */, X86::VMULPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30112 { 12456 /* vmulpd */, X86::VMULPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30113 { 12456 /* vmulpd */, X86::VMULPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30114 { 12456 /* vmulpd */, X86::VMULPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30115 { 12456 /* vmulpd */, X86::VMULPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30116 { 12456 /* vmulpd */, X86::VMULPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30117 { 12456 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30118 { 12456 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30119 { 12456 /* vmulpd */, X86::VMULPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30120 { 12456 /* vmulpd */, X86::VMULPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30121 { 12456 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
30122 { 12456 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30123 { 12456 /* vmulpd */, X86::VMULPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30124 { 12456 /* vmulpd */, X86::VMULPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30125 { 12456 /* vmulpd */, X86::VMULPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30126 { 12456 /* vmulpd */, X86::VMULPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30127 { 12456 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30128 { 12456 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30129 { 12456 /* vmulpd */, X86::VMULPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30130 { 12456 /* vmulpd */, X86::VMULPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30131 { 12456 /* vmulpd */, X86::VMULPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30132 { 12456 /* vmulpd */, X86::VMULPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30133 { 12456 /* vmulpd */, X86::VMULPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30134 { 12456 /* vmulpd */, X86::VMULPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30135 { 12456 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30136 { 12456 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30137 { 12456 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
30138 { 12456 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30139 { 12456 /* vmulpd */, X86::VMULPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30140 { 12456 /* vmulpd */, X86::VMULPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30141 { 12456 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
30142 { 12456 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30143 { 12463 /* vmulps */, X86::VMULPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30144 { 12463 /* vmulps */, X86::VMULPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30145 { 12463 /* vmulps */, X86::VMULPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30146 { 12463 /* vmulps */, X86::VMULPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30147 { 12463 /* vmulps */, X86::VMULPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30148 { 12463 /* vmulps */, X86::VMULPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30149 { 12463 /* vmulps */, X86::VMULPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30150 { 12463 /* vmulps */, X86::VMULPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30151 { 12463 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30152 { 12463 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30153 { 12463 /* vmulps */, X86::VMULPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30154 { 12463 /* vmulps */, X86::VMULPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30155 { 12463 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
30156 { 12463 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30157 { 12463 /* vmulps */, X86::VMULPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30158 { 12463 /* vmulps */, X86::VMULPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30159 { 12463 /* vmulps */, X86::VMULPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30160 { 12463 /* vmulps */, X86::VMULPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30161 { 12463 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30162 { 12463 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30163 { 12463 /* vmulps */, X86::VMULPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30164 { 12463 /* vmulps */, X86::VMULPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30165 { 12463 /* vmulps */, X86::VMULPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30166 { 12463 /* vmulps */, X86::VMULPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30167 { 12463 /* vmulps */, X86::VMULPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30168 { 12463 /* vmulps */, X86::VMULPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30169 { 12463 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30170 { 12463 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30171 { 12463 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
30172 { 12463 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30173 { 12463 /* vmulps */, X86::VMULPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30174 { 12463 /* vmulps */, X86::VMULPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30175 { 12463 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
30176 { 12463 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30177 { 12470 /* vmulsd */, X86::VMULSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30178 { 12470 /* vmulsd */, X86::VMULSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
30179 { 12470 /* vmulsd */, X86::VMULSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30180 { 12470 /* vmulsd */, X86::VMULSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
30181 { 12470 /* vmulsd */, X86::VMULSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
30182 { 12470 /* vmulsd */, X86::VMULSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30183 { 12470 /* vmulsd */, X86::VMULSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
30184 { 12470 /* vmulsd */, X86::VMULSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30185 { 12470 /* vmulsd */, X86::VMULSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
30186 { 12470 /* vmulsd */, X86::VMULSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
30187 { 12470 /* vmulsd */, X86::VMULSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
30188 { 12477 /* vmulss */, X86::VMULSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30189 { 12477 /* vmulss */, X86::VMULSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
30190 { 12477 /* vmulss */, X86::VMULSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30191 { 12477 /* vmulss */, X86::VMULSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
30192 { 12477 /* vmulss */, X86::VMULSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
30193 { 12477 /* vmulss */, X86::VMULSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30194 { 12477 /* vmulss */, X86::VMULSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
30195 { 12477 /* vmulss */, X86::VMULSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30196 { 12477 /* vmulss */, X86::VMULSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
30197 { 12477 /* vmulss */, X86::VMULSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
30198 { 12477 /* vmulss */, X86::VMULSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
30199 { 12484 /* vmwrite */, X86::VMWRITE32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
30200 { 12484 /* vmwrite */, X86::VMWRITE32rm, Convert__Reg1_0__Mem325_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
30201 { 12484 /* vmwrite */, X86::VMWRITE64rr, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_GR64 }, },
30202 { 12484 /* vmwrite */, X86::VMWRITE64rm, Convert__Reg1_0__Mem645_1, AMFBS_In64BitMode, { MCK_GR64, MCK_Mem64 }, },
30203 { 12510 /* vmxoff */, X86::VMXOFF, Convert_NoOperands, AMFBS_None, { }, },
30204 { 12517 /* vmxon */, X86::VMXON, Convert__Mem645_0, AMFBS_None, { MCK_Mem64 }, },
30205 { 12523 /* vorpd */, X86::VORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30206 { 12523 /* vorpd */, X86::VORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30207 { 12523 /* vorpd */, X86::VORPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30208 { 12523 /* vorpd */, X86::VORPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30209 { 12523 /* vorpd */, X86::VORPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30210 { 12523 /* vorpd */, X86::VORPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30211 { 12523 /* vorpd */, X86::VORPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30212 { 12523 /* vorpd */, X86::VORPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30213 { 12523 /* vorpd */, X86::VORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30214 { 12523 /* vorpd */, X86::VORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30215 { 12523 /* vorpd */, X86::VORPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30216 { 12523 /* vorpd */, X86::VORPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30217 { 12523 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30218 { 12523 /* vorpd */, X86::VORPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30219 { 12523 /* vorpd */, X86::VORPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30220 { 12523 /* vorpd */, X86::VORPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30221 { 12523 /* vorpd */, X86::VORPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30222 { 12523 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30223 { 12523 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30224 { 12523 /* vorpd */, X86::VORPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30225 { 12523 /* vorpd */, X86::VORPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30226 { 12523 /* vorpd */, X86::VORPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30227 { 12523 /* vorpd */, X86::VORPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30228 { 12523 /* vorpd */, X86::VORPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30229 { 12523 /* vorpd */, X86::VORPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30230 { 12523 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30231 { 12523 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30232 { 12523 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30233 { 12523 /* vorpd */, X86::VORPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30234 { 12523 /* vorpd */, X86::VORPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30235 { 12523 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30236 { 12529 /* vorps */, X86::VORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30237 { 12529 /* vorps */, X86::VORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30238 { 12529 /* vorps */, X86::VORPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30239 { 12529 /* vorps */, X86::VORPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30240 { 12529 /* vorps */, X86::VORPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30241 { 12529 /* vorps */, X86::VORPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30242 { 12529 /* vorps */, X86::VORPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30243 { 12529 /* vorps */, X86::VORPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30244 { 12529 /* vorps */, X86::VORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30245 { 12529 /* vorps */, X86::VORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30246 { 12529 /* vorps */, X86::VORPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30247 { 12529 /* vorps */, X86::VORPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30248 { 12529 /* vorps */, X86::VORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30249 { 12529 /* vorps */, X86::VORPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30250 { 12529 /* vorps */, X86::VORPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30251 { 12529 /* vorps */, X86::VORPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30252 { 12529 /* vorps */, X86::VORPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30253 { 12529 /* vorps */, X86::VORPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30254 { 12529 /* vorps */, X86::VORPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30255 { 12529 /* vorps */, X86::VORPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30256 { 12529 /* vorps */, X86::VORPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30257 { 12529 /* vorps */, X86::VORPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30258 { 12529 /* vorps */, X86::VORPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30259 { 12529 /* vorps */, X86::VORPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30260 { 12529 /* vorps */, X86::VORPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30261 { 12529 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30262 { 12529 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30263 { 12529 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30264 { 12529 /* vorps */, X86::VORPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30265 { 12529 /* vorps */, X86::VORPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30266 { 12529 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30267 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZrr, Convert__VK16Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK16Pair, MCK_VR512, MCK_VR512 }, },
30268 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZrm, Convert__VK16Pair1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK16Pair, MCK_VR512, MCK_Mem512 }, },
30269 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZ128rr, Convert__VK4Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK4Pair, MCK_FR32X, MCK_FR32X }, },
30270 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZ128rm, Convert__VK4Pair1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK4Pair, MCK_FR32X, MCK_Mem128 }, },
30271 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZ256rr, Convert__VK8Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK8Pair, MCK_VR256X, MCK_VR256X }, },
30272 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZ256rm, Convert__VK8Pair1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK8Pair, MCK_VR256X, MCK_Mem256 }, },
30273 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZrmb, Convert__VK16Pair1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK16Pair, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30274 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZ128rmb, Convert__VK4Pair1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK4Pair, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30275 { 12535 /* vp2intersectd */, X86::VP2INTERSECTDZ256rmb, Convert__VK8Pair1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK8Pair, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30276 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZ128rr, Convert__VK2Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK2Pair, MCK_FR32X, MCK_FR32X }, },
30277 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZ128rm, Convert__VK2Pair1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK2Pair, MCK_FR32X, MCK_Mem128 }, },
30278 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZ256rr, Convert__VK4Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK4Pair, MCK_VR256X, MCK_VR256X }, },
30279 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZ256rm, Convert__VK4Pair1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK4Pair, MCK_VR256X, MCK_Mem256 }, },
30280 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZrr, Convert__VK8Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK8Pair, MCK_VR512, MCK_VR512 }, },
30281 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZrm, Convert__VK8Pair1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK8Pair, MCK_VR512, MCK_Mem512 }, },
30282 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZ128rmb, Convert__VK2Pair1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK2Pair, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30283 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZ256rmb, Convert__VK4Pair1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK4Pair, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30284 { 12549 /* vp2intersectq */, X86::VP2INTERSECTQZrmb, Convert__VK8Pair1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK8Pair, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30285 { 12563 /* vp4dpwssd */, X86::VP4DPWSSDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
30286 { 12563 /* vp4dpwssd */, X86::VP4DPWSSDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
30287 { 12563 /* vp4dpwssd */, X86::VP4DPWSSDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
30288 { 12573 /* vp4dpwssds */, X86::VP4DPWSSDSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
30289 { 12573 /* vp4dpwssds */, X86::VP4DPWSSDSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
30290 { 12573 /* vp4dpwssds */, X86::VP4DPWSSDSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
30291 { 12584 /* vpabsb */, X86::VPABSBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30292 { 12584 /* vpabsb */, X86::VPABSBrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
30293 { 12584 /* vpabsb */, X86::VPABSBYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
30294 { 12584 /* vpabsb */, X86::VPABSBYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
30295 { 12584 /* vpabsb */, X86::VPABSBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30296 { 12584 /* vpabsb */, X86::VPABSBZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
30297 { 12584 /* vpabsb */, X86::VPABSBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
30298 { 12584 /* vpabsb */, X86::VPABSBZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
30299 { 12584 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30300 { 12584 /* vpabsb */, X86::VPABSBZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
30301 { 12584 /* vpabsb */, X86::VPABSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30302 { 12584 /* vpabsb */, X86::VPABSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
30303 { 12584 /* vpabsb */, X86::VPABSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30304 { 12584 /* vpabsb */, X86::VPABSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
30305 { 12584 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30306 { 12584 /* vpabsb */, X86::VPABSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30307 { 12584 /* vpabsb */, X86::VPABSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30308 { 12584 /* vpabsb */, X86::VPABSBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
30309 { 12584 /* vpabsb */, X86::VPABSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30310 { 12584 /* vpabsb */, X86::VPABSBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
30311 { 12584 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30312 { 12584 /* vpabsb */, X86::VPABSBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30313 { 12591 /* vpabsd */, X86::VPABSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30314 { 12591 /* vpabsd */, X86::VPABSDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
30315 { 12591 /* vpabsd */, X86::VPABSDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
30316 { 12591 /* vpabsd */, X86::VPABSDYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
30317 { 12591 /* vpabsd */, X86::VPABSDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30318 { 12591 /* vpabsd */, X86::VPABSDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
30319 { 12591 /* vpabsd */, X86::VPABSDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
30320 { 12591 /* vpabsd */, X86::VPABSDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
30321 { 12591 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30322 { 12591 /* vpabsd */, X86::VPABSDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
30323 { 12591 /* vpabsd */, X86::VPABSDZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30324 { 12591 /* vpabsd */, X86::VPABSDZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30325 { 12591 /* vpabsd */, X86::VPABSDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30326 { 12591 /* vpabsd */, X86::VPABSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30327 { 12591 /* vpabsd */, X86::VPABSDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
30328 { 12591 /* vpabsd */, X86::VPABSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30329 { 12591 /* vpabsd */, X86::VPABSDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
30330 { 12591 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30331 { 12591 /* vpabsd */, X86::VPABSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30332 { 12591 /* vpabsd */, X86::VPABSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30333 { 12591 /* vpabsd */, X86::VPABSDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
30334 { 12591 /* vpabsd */, X86::VPABSDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
30335 { 12591 /* vpabsd */, X86::VPABSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30336 { 12591 /* vpabsd */, X86::VPABSDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
30337 { 12591 /* vpabsd */, X86::VPABSDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
30338 { 12591 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30339 { 12591 /* vpabsd */, X86::VPABSDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30340 { 12591 /* vpabsd */, X86::VPABSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
30341 { 12591 /* vpabsd */, X86::VPABSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
30342 { 12591 /* vpabsd */, X86::VPABSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
30343 { 12591 /* vpabsd */, X86::VPABSDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
30344 { 12598 /* vpabsq */, X86::VPABSQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30345 { 12598 /* vpabsq */, X86::VPABSQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
30346 { 12598 /* vpabsq */, X86::VPABSQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
30347 { 12598 /* vpabsq */, X86::VPABSQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
30348 { 12598 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30349 { 12598 /* vpabsq */, X86::VPABSQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
30350 { 12598 /* vpabsq */, X86::VPABSQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30351 { 12598 /* vpabsq */, X86::VPABSQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30352 { 12598 /* vpabsq */, X86::VPABSQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30353 { 12598 /* vpabsq */, X86::VPABSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30354 { 12598 /* vpabsq */, X86::VPABSQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
30355 { 12598 /* vpabsq */, X86::VPABSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30356 { 12598 /* vpabsq */, X86::VPABSQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
30357 { 12598 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30358 { 12598 /* vpabsq */, X86::VPABSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30359 { 12598 /* vpabsq */, X86::VPABSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30360 { 12598 /* vpabsq */, X86::VPABSQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
30361 { 12598 /* vpabsq */, X86::VPABSQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
30362 { 12598 /* vpabsq */, X86::VPABSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30363 { 12598 /* vpabsq */, X86::VPABSQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
30364 { 12598 /* vpabsq */, X86::VPABSQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
30365 { 12598 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30366 { 12598 /* vpabsq */, X86::VPABSQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30367 { 12598 /* vpabsq */, X86::VPABSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
30368 { 12598 /* vpabsq */, X86::VPABSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
30369 { 12598 /* vpabsq */, X86::VPABSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
30370 { 12598 /* vpabsq */, X86::VPABSQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
30371 { 12605 /* vpabsw */, X86::VPABSWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30372 { 12605 /* vpabsw */, X86::VPABSWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
30373 { 12605 /* vpabsw */, X86::VPABSWYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
30374 { 12605 /* vpabsw */, X86::VPABSWYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
30375 { 12605 /* vpabsw */, X86::VPABSWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30376 { 12605 /* vpabsw */, X86::VPABSWZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
30377 { 12605 /* vpabsw */, X86::VPABSWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
30378 { 12605 /* vpabsw */, X86::VPABSWZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
30379 { 12605 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30380 { 12605 /* vpabsw */, X86::VPABSWZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
30381 { 12605 /* vpabsw */, X86::VPABSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30382 { 12605 /* vpabsw */, X86::VPABSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
30383 { 12605 /* vpabsw */, X86::VPABSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30384 { 12605 /* vpabsw */, X86::VPABSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
30385 { 12605 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30386 { 12605 /* vpabsw */, X86::VPABSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30387 { 12605 /* vpabsw */, X86::VPABSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30388 { 12605 /* vpabsw */, X86::VPABSWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
30389 { 12605 /* vpabsw */, X86::VPABSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30390 { 12605 /* vpabsw */, X86::VPABSWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
30391 { 12605 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30392 { 12605 /* vpabsw */, X86::VPABSWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30393 { 12612 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30394 { 12612 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30395 { 12612 /* vpackssdw */, X86::VPACKSSDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30396 { 12612 /* vpackssdw */, X86::VPACKSSDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30397 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30398 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30399 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30400 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30401 { 12612 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30402 { 12612 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30403 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30404 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30405 { 12612 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30406 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30407 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30408 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30409 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30410 { 12612 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30411 { 12612 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30412 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30413 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30414 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30415 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30416 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30417 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30418 { 12612 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30419 { 12612 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30420 { 12612 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30421 { 12612 /* vpackssdw */, X86::VPACKSSDWZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30422 { 12612 /* vpackssdw */, X86::VPACKSSDWZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30423 { 12612 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30424 { 12622 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30425 { 12622 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30426 { 12622 /* vpacksswb */, X86::VPACKSSWBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30427 { 12622 /* vpacksswb */, X86::VPACKSSWBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30428 { 12622 /* vpacksswb */, X86::VPACKSSWBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30429 { 12622 /* vpacksswb */, X86::VPACKSSWBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30430 { 12622 /* vpacksswb */, X86::VPACKSSWBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30431 { 12622 /* vpacksswb */, X86::VPACKSSWBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30432 { 12622 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30433 { 12622 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30434 { 12622 /* vpacksswb */, X86::VPACKSSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30435 { 12622 /* vpacksswb */, X86::VPACKSSWBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30436 { 12622 /* vpacksswb */, X86::VPACKSSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30437 { 12622 /* vpacksswb */, X86::VPACKSSWBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30438 { 12622 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30439 { 12622 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30440 { 12622 /* vpacksswb */, X86::VPACKSSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30441 { 12622 /* vpacksswb */, X86::VPACKSSWBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30442 { 12622 /* vpacksswb */, X86::VPACKSSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30443 { 12622 /* vpacksswb */, X86::VPACKSSWBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30444 { 12622 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30445 { 12622 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30446 { 12632 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30447 { 12632 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30448 { 12632 /* vpackusdw */, X86::VPACKUSDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30449 { 12632 /* vpackusdw */, X86::VPACKUSDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30450 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30451 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30452 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30453 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30454 { 12632 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30455 { 12632 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30456 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30457 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30458 { 12632 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30459 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30460 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30461 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30462 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30463 { 12632 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30464 { 12632 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30465 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30466 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30467 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30468 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30469 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30470 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30471 { 12632 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30472 { 12632 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30473 { 12632 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30474 { 12632 /* vpackusdw */, X86::VPACKUSDWZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30475 { 12632 /* vpackusdw */, X86::VPACKUSDWZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30476 { 12632 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30477 { 12642 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30478 { 12642 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30479 { 12642 /* vpackuswb */, X86::VPACKUSWBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30480 { 12642 /* vpackuswb */, X86::VPACKUSWBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30481 { 12642 /* vpackuswb */, X86::VPACKUSWBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30482 { 12642 /* vpackuswb */, X86::VPACKUSWBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30483 { 12642 /* vpackuswb */, X86::VPACKUSWBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30484 { 12642 /* vpackuswb */, X86::VPACKUSWBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30485 { 12642 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30486 { 12642 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30487 { 12642 /* vpackuswb */, X86::VPACKUSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30488 { 12642 /* vpackuswb */, X86::VPACKUSWBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30489 { 12642 /* vpackuswb */, X86::VPACKUSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30490 { 12642 /* vpackuswb */, X86::VPACKUSWBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30491 { 12642 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30492 { 12642 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30493 { 12642 /* vpackuswb */, X86::VPACKUSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30494 { 12642 /* vpackuswb */, X86::VPACKUSWBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30495 { 12642 /* vpackuswb */, X86::VPACKUSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30496 { 12642 /* vpackuswb */, X86::VPACKUSWBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30497 { 12642 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30498 { 12642 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30499 { 12652 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30500 { 12652 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30501 { 12652 /* vpaddb */, X86::VPADDBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30502 { 12652 /* vpaddb */, X86::VPADDBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30503 { 12652 /* vpaddb */, X86::VPADDBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30504 { 12652 /* vpaddb */, X86::VPADDBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30505 { 12652 /* vpaddb */, X86::VPADDBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30506 { 12652 /* vpaddb */, X86::VPADDBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30507 { 12652 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30508 { 12652 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30509 { 12652 /* vpaddb */, X86::VPADDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30510 { 12652 /* vpaddb */, X86::VPADDBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30511 { 12652 /* vpaddb */, X86::VPADDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30512 { 12652 /* vpaddb */, X86::VPADDBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30513 { 12652 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30514 { 12652 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30515 { 12652 /* vpaddb */, X86::VPADDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30516 { 12652 /* vpaddb */, X86::VPADDBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30517 { 12652 /* vpaddb */, X86::VPADDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30518 { 12652 /* vpaddb */, X86::VPADDBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30519 { 12652 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30520 { 12652 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30521 { 12659 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30522 { 12659 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30523 { 12659 /* vpaddd */, X86::VPADDDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30524 { 12659 /* vpaddd */, X86::VPADDDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30525 { 12659 /* vpaddd */, X86::VPADDDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30526 { 12659 /* vpaddd */, X86::VPADDDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30527 { 12659 /* vpaddd */, X86::VPADDDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30528 { 12659 /* vpaddd */, X86::VPADDDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30529 { 12659 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30530 { 12659 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30531 { 12659 /* vpaddd */, X86::VPADDDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30532 { 12659 /* vpaddd */, X86::VPADDDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30533 { 12659 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30534 { 12659 /* vpaddd */, X86::VPADDDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30535 { 12659 /* vpaddd */, X86::VPADDDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30536 { 12659 /* vpaddd */, X86::VPADDDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30537 { 12659 /* vpaddd */, X86::VPADDDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30538 { 12659 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30539 { 12659 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30540 { 12659 /* vpaddd */, X86::VPADDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30541 { 12659 /* vpaddd */, X86::VPADDDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30542 { 12659 /* vpaddd */, X86::VPADDDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30543 { 12659 /* vpaddd */, X86::VPADDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30544 { 12659 /* vpaddd */, X86::VPADDDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30545 { 12659 /* vpaddd */, X86::VPADDDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30546 { 12659 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30547 { 12659 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30548 { 12659 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30549 { 12659 /* vpaddd */, X86::VPADDDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30550 { 12659 /* vpaddd */, X86::VPADDDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30551 { 12659 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30552 { 12666 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30553 { 12666 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30554 { 12666 /* vpaddq */, X86::VPADDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30555 { 12666 /* vpaddq */, X86::VPADDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30556 { 12666 /* vpaddq */, X86::VPADDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30557 { 12666 /* vpaddq */, X86::VPADDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30558 { 12666 /* vpaddq */, X86::VPADDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30559 { 12666 /* vpaddq */, X86::VPADDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30560 { 12666 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30561 { 12666 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30562 { 12666 /* vpaddq */, X86::VPADDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30563 { 12666 /* vpaddq */, X86::VPADDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30564 { 12666 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30565 { 12666 /* vpaddq */, X86::VPADDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30566 { 12666 /* vpaddq */, X86::VPADDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30567 { 12666 /* vpaddq */, X86::VPADDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30568 { 12666 /* vpaddq */, X86::VPADDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30569 { 12666 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30570 { 12666 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30571 { 12666 /* vpaddq */, X86::VPADDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30572 { 12666 /* vpaddq */, X86::VPADDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30573 { 12666 /* vpaddq */, X86::VPADDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30574 { 12666 /* vpaddq */, X86::VPADDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30575 { 12666 /* vpaddq */, X86::VPADDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30576 { 12666 /* vpaddq */, X86::VPADDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30577 { 12666 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30578 { 12666 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30579 { 12666 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30580 { 12666 /* vpaddq */, X86::VPADDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30581 { 12666 /* vpaddq */, X86::VPADDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30582 { 12666 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30583 { 12673 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30584 { 12673 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30585 { 12673 /* vpaddsb */, X86::VPADDSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30586 { 12673 /* vpaddsb */, X86::VPADDSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30587 { 12673 /* vpaddsb */, X86::VPADDSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30588 { 12673 /* vpaddsb */, X86::VPADDSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30589 { 12673 /* vpaddsb */, X86::VPADDSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30590 { 12673 /* vpaddsb */, X86::VPADDSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30591 { 12673 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30592 { 12673 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30593 { 12673 /* vpaddsb */, X86::VPADDSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30594 { 12673 /* vpaddsb */, X86::VPADDSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30595 { 12673 /* vpaddsb */, X86::VPADDSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30596 { 12673 /* vpaddsb */, X86::VPADDSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30597 { 12673 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30598 { 12673 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30599 { 12673 /* vpaddsb */, X86::VPADDSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30600 { 12673 /* vpaddsb */, X86::VPADDSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30601 { 12673 /* vpaddsb */, X86::VPADDSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30602 { 12673 /* vpaddsb */, X86::VPADDSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30603 { 12673 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30604 { 12673 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30605 { 12681 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30606 { 12681 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30607 { 12681 /* vpaddsw */, X86::VPADDSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30608 { 12681 /* vpaddsw */, X86::VPADDSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30609 { 12681 /* vpaddsw */, X86::VPADDSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30610 { 12681 /* vpaddsw */, X86::VPADDSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30611 { 12681 /* vpaddsw */, X86::VPADDSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30612 { 12681 /* vpaddsw */, X86::VPADDSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30613 { 12681 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30614 { 12681 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30615 { 12681 /* vpaddsw */, X86::VPADDSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30616 { 12681 /* vpaddsw */, X86::VPADDSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30617 { 12681 /* vpaddsw */, X86::VPADDSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30618 { 12681 /* vpaddsw */, X86::VPADDSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30619 { 12681 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30620 { 12681 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30621 { 12681 /* vpaddsw */, X86::VPADDSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30622 { 12681 /* vpaddsw */, X86::VPADDSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30623 { 12681 /* vpaddsw */, X86::VPADDSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30624 { 12681 /* vpaddsw */, X86::VPADDSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30625 { 12681 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30626 { 12681 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30627 { 12689 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30628 { 12689 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30629 { 12689 /* vpaddusb */, X86::VPADDUSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30630 { 12689 /* vpaddusb */, X86::VPADDUSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30631 { 12689 /* vpaddusb */, X86::VPADDUSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30632 { 12689 /* vpaddusb */, X86::VPADDUSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30633 { 12689 /* vpaddusb */, X86::VPADDUSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30634 { 12689 /* vpaddusb */, X86::VPADDUSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30635 { 12689 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30636 { 12689 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30637 { 12689 /* vpaddusb */, X86::VPADDUSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30638 { 12689 /* vpaddusb */, X86::VPADDUSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30639 { 12689 /* vpaddusb */, X86::VPADDUSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30640 { 12689 /* vpaddusb */, X86::VPADDUSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30641 { 12689 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30642 { 12689 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30643 { 12689 /* vpaddusb */, X86::VPADDUSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30644 { 12689 /* vpaddusb */, X86::VPADDUSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30645 { 12689 /* vpaddusb */, X86::VPADDUSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30646 { 12689 /* vpaddusb */, X86::VPADDUSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30647 { 12689 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30648 { 12689 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30649 { 12698 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30650 { 12698 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30651 { 12698 /* vpaddusw */, X86::VPADDUSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30652 { 12698 /* vpaddusw */, X86::VPADDUSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30653 { 12698 /* vpaddusw */, X86::VPADDUSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30654 { 12698 /* vpaddusw */, X86::VPADDUSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30655 { 12698 /* vpaddusw */, X86::VPADDUSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30656 { 12698 /* vpaddusw */, X86::VPADDUSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30657 { 12698 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30658 { 12698 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30659 { 12698 /* vpaddusw */, X86::VPADDUSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30660 { 12698 /* vpaddusw */, X86::VPADDUSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30661 { 12698 /* vpaddusw */, X86::VPADDUSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30662 { 12698 /* vpaddusw */, X86::VPADDUSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30663 { 12698 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30664 { 12698 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30665 { 12698 /* vpaddusw */, X86::VPADDUSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30666 { 12698 /* vpaddusw */, X86::VPADDUSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30667 { 12698 /* vpaddusw */, X86::VPADDUSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30668 { 12698 /* vpaddusw */, X86::VPADDUSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30669 { 12698 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30670 { 12698 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30671 { 12707 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30672 { 12707 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30673 { 12707 /* vpaddw */, X86::VPADDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30674 { 12707 /* vpaddw */, X86::VPADDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30675 { 12707 /* vpaddw */, X86::VPADDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30676 { 12707 /* vpaddw */, X86::VPADDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30677 { 12707 /* vpaddw */, X86::VPADDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30678 { 12707 /* vpaddw */, X86::VPADDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30679 { 12707 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30680 { 12707 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30681 { 12707 /* vpaddw */, X86::VPADDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30682 { 12707 /* vpaddw */, X86::VPADDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30683 { 12707 /* vpaddw */, X86::VPADDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30684 { 12707 /* vpaddw */, X86::VPADDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30685 { 12707 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30686 { 12707 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30687 { 12707 /* vpaddw */, X86::VPADDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30688 { 12707 /* vpaddw */, X86::VPADDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30689 { 12707 /* vpaddw */, X86::VPADDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30690 { 12707 /* vpaddw */, X86::VPADDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30691 { 12707 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30692 { 12707 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30693 { 12714 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30694 { 12714 /* vpalignr */, X86::VPALIGNRrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30695 { 12714 /* vpalignr */, X86::VPALIGNRYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30696 { 12714 /* vpalignr */, X86::VPALIGNRYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30697 { 12714 /* vpalignr */, X86::VPALIGNRZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30698 { 12714 /* vpalignr */, X86::VPALIGNRZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30699 { 12714 /* vpalignr */, X86::VPALIGNRZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30700 { 12714 /* vpalignr */, X86::VPALIGNRZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30701 { 12714 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30702 { 12714 /* vpalignr */, X86::VPALIGNRZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30703 { 12714 /* vpalignr */, X86::VPALIGNRZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30704 { 12714 /* vpalignr */, X86::VPALIGNRZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30705 { 12714 /* vpalignr */, X86::VPALIGNRZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30706 { 12714 /* vpalignr */, X86::VPALIGNRZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30707 { 12714 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30708 { 12714 /* vpalignr */, X86::VPALIGNRZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30709 { 12714 /* vpalignr */, X86::VPALIGNRZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30710 { 12714 /* vpalignr */, X86::VPALIGNRZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30711 { 12714 /* vpalignr */, X86::VPALIGNRZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30712 { 12714 /* vpalignr */, X86::VPALIGNRZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30713 { 12714 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30714 { 12714 /* vpalignr */, X86::VPALIGNRZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30715 { 12723 /* vpand */, X86::VPANDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30716 { 12723 /* vpand */, X86::VPANDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30717 { 12723 /* vpand */, X86::VPANDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30718 { 12723 /* vpand */, X86::VPANDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30719 { 12729 /* vpandd */, X86::VPANDDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30720 { 12729 /* vpandd */, X86::VPANDDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30721 { 12729 /* vpandd */, X86::VPANDDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30722 { 12729 /* vpandd */, X86::VPANDDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30723 { 12729 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30724 { 12729 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30725 { 12729 /* vpandd */, X86::VPANDDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30726 { 12729 /* vpandd */, X86::VPANDDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30727 { 12729 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30728 { 12729 /* vpandd */, X86::VPANDDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30729 { 12729 /* vpandd */, X86::VPANDDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30730 { 12729 /* vpandd */, X86::VPANDDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30731 { 12729 /* vpandd */, X86::VPANDDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30732 { 12729 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30733 { 12729 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30734 { 12729 /* vpandd */, X86::VPANDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30735 { 12729 /* vpandd */, X86::VPANDDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30736 { 12729 /* vpandd */, X86::VPANDDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30737 { 12729 /* vpandd */, X86::VPANDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30738 { 12729 /* vpandd */, X86::VPANDDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30739 { 12729 /* vpandd */, X86::VPANDDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30740 { 12729 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30741 { 12729 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30742 { 12729 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30743 { 12729 /* vpandd */, X86::VPANDDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30744 { 12729 /* vpandd */, X86::VPANDDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30745 { 12729 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30746 { 12736 /* vpandn */, X86::VPANDNrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30747 { 12736 /* vpandn */, X86::VPANDNrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30748 { 12736 /* vpandn */, X86::VPANDNYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30749 { 12736 /* vpandn */, X86::VPANDNYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30750 { 12743 /* vpandnd */, X86::VPANDNDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30751 { 12743 /* vpandnd */, X86::VPANDNDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30752 { 12743 /* vpandnd */, X86::VPANDNDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30753 { 12743 /* vpandnd */, X86::VPANDNDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30754 { 12743 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30755 { 12743 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30756 { 12743 /* vpandnd */, X86::VPANDNDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30757 { 12743 /* vpandnd */, X86::VPANDNDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30758 { 12743 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30759 { 12743 /* vpandnd */, X86::VPANDNDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30760 { 12743 /* vpandnd */, X86::VPANDNDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30761 { 12743 /* vpandnd */, X86::VPANDNDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30762 { 12743 /* vpandnd */, X86::VPANDNDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30763 { 12743 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30764 { 12743 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30765 { 12743 /* vpandnd */, X86::VPANDNDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30766 { 12743 /* vpandnd */, X86::VPANDNDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30767 { 12743 /* vpandnd */, X86::VPANDNDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30768 { 12743 /* vpandnd */, X86::VPANDNDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30769 { 12743 /* vpandnd */, X86::VPANDNDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30770 { 12743 /* vpandnd */, X86::VPANDNDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30771 { 12743 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30772 { 12743 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30773 { 12743 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30774 { 12743 /* vpandnd */, X86::VPANDNDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30775 { 12743 /* vpandnd */, X86::VPANDNDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30776 { 12743 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30777 { 12751 /* vpandnq */, X86::VPANDNQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30778 { 12751 /* vpandnq */, X86::VPANDNQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30779 { 12751 /* vpandnq */, X86::VPANDNQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30780 { 12751 /* vpandnq */, X86::VPANDNQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30781 { 12751 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30782 { 12751 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30783 { 12751 /* vpandnq */, X86::VPANDNQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30784 { 12751 /* vpandnq */, X86::VPANDNQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30785 { 12751 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30786 { 12751 /* vpandnq */, X86::VPANDNQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30787 { 12751 /* vpandnq */, X86::VPANDNQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30788 { 12751 /* vpandnq */, X86::VPANDNQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30789 { 12751 /* vpandnq */, X86::VPANDNQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30790 { 12751 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30791 { 12751 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30792 { 12751 /* vpandnq */, X86::VPANDNQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30793 { 12751 /* vpandnq */, X86::VPANDNQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30794 { 12751 /* vpandnq */, X86::VPANDNQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30795 { 12751 /* vpandnq */, X86::VPANDNQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30796 { 12751 /* vpandnq */, X86::VPANDNQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30797 { 12751 /* vpandnq */, X86::VPANDNQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30798 { 12751 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30799 { 12751 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30800 { 12751 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30801 { 12751 /* vpandnq */, X86::VPANDNQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30802 { 12751 /* vpandnq */, X86::VPANDNQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30803 { 12751 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30804 { 12759 /* vpandq */, X86::VPANDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30805 { 12759 /* vpandq */, X86::VPANDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30806 { 12759 /* vpandq */, X86::VPANDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30807 { 12759 /* vpandq */, X86::VPANDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30808 { 12759 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30809 { 12759 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30810 { 12759 /* vpandq */, X86::VPANDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30811 { 12759 /* vpandq */, X86::VPANDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30812 { 12759 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30813 { 12759 /* vpandq */, X86::VPANDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30814 { 12759 /* vpandq */, X86::VPANDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30815 { 12759 /* vpandq */, X86::VPANDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30816 { 12759 /* vpandq */, X86::VPANDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30817 { 12759 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30818 { 12759 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30819 { 12759 /* vpandq */, X86::VPANDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30820 { 12759 /* vpandq */, X86::VPANDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30821 { 12759 /* vpandq */, X86::VPANDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30822 { 12759 /* vpandq */, X86::VPANDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30823 { 12759 /* vpandq */, X86::VPANDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30824 { 12759 /* vpandq */, X86::VPANDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30825 { 12759 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30826 { 12759 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30827 { 12759 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30828 { 12759 /* vpandq */, X86::VPANDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30829 { 12759 /* vpandq */, X86::VPANDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30830 { 12759 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30831 { 12766 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30832 { 12766 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30833 { 12766 /* vpavgb */, X86::VPAVGBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30834 { 12766 /* vpavgb */, X86::VPAVGBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30835 { 12766 /* vpavgb */, X86::VPAVGBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30836 { 12766 /* vpavgb */, X86::VPAVGBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30837 { 12766 /* vpavgb */, X86::VPAVGBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30838 { 12766 /* vpavgb */, X86::VPAVGBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30839 { 12766 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30840 { 12766 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30841 { 12766 /* vpavgb */, X86::VPAVGBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30842 { 12766 /* vpavgb */, X86::VPAVGBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30843 { 12766 /* vpavgb */, X86::VPAVGBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30844 { 12766 /* vpavgb */, X86::VPAVGBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30845 { 12766 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30846 { 12766 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30847 { 12766 /* vpavgb */, X86::VPAVGBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30848 { 12766 /* vpavgb */, X86::VPAVGBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30849 { 12766 /* vpavgb */, X86::VPAVGBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30850 { 12766 /* vpavgb */, X86::VPAVGBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30851 { 12766 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30852 { 12766 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30853 { 12773 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30854 { 12773 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30855 { 12773 /* vpavgw */, X86::VPAVGWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30856 { 12773 /* vpavgw */, X86::VPAVGWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30857 { 12773 /* vpavgw */, X86::VPAVGWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30858 { 12773 /* vpavgw */, X86::VPAVGWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30859 { 12773 /* vpavgw */, X86::VPAVGWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30860 { 12773 /* vpavgw */, X86::VPAVGWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30861 { 12773 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30862 { 12773 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30863 { 12773 /* vpavgw */, X86::VPAVGWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30864 { 12773 /* vpavgw */, X86::VPAVGWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30865 { 12773 /* vpavgw */, X86::VPAVGWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30866 { 12773 /* vpavgw */, X86::VPAVGWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30867 { 12773 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30868 { 12773 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30869 { 12773 /* vpavgw */, X86::VPAVGWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30870 { 12773 /* vpavgw */, X86::VPAVGWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30871 { 12773 /* vpavgw */, X86::VPAVGWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30872 { 12773 /* vpavgw */, X86::VPAVGWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30873 { 12773 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30874 { 12773 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30875 { 12780 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30876 { 12780 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30877 { 12780 /* vpblendd */, X86::VPBLENDDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30878 { 12780 /* vpblendd */, X86::VPBLENDDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30879 { 12789 /* vpblendmb */, X86::VPBLENDMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30880 { 12789 /* vpblendmb */, X86::VPBLENDMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30881 { 12789 /* vpblendmb */, X86::VPBLENDMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30882 { 12789 /* vpblendmb */, X86::VPBLENDMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30883 { 12789 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30884 { 12789 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30885 { 12789 /* vpblendmb */, X86::VPBLENDMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30886 { 12789 /* vpblendmb */, X86::VPBLENDMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30887 { 12789 /* vpblendmb */, X86::VPBLENDMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30888 { 12789 /* vpblendmb */, X86::VPBLENDMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30889 { 12789 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30890 { 12789 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30891 { 12789 /* vpblendmb */, X86::VPBLENDMBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30892 { 12789 /* vpblendmb */, X86::VPBLENDMBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30893 { 12789 /* vpblendmb */, X86::VPBLENDMBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30894 { 12789 /* vpblendmb */, X86::VPBLENDMBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30895 { 12789 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30896 { 12789 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30897 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30898 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30899 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30900 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30901 { 12799 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30902 { 12799 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30903 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30904 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30905 { 12799 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30906 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30907 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30908 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30909 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30910 { 12799 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30911 { 12799 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30912 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30913 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30914 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30915 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30916 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30917 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30918 { 12799 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30919 { 12799 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30920 { 12799 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30921 { 12799 /* vpblendmd */, X86::VPBLENDMDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30922 { 12799 /* vpblendmd */, X86::VPBLENDMDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30923 { 12799 /* vpblendmd */, X86::VPBLENDMDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30924 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30925 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30926 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30927 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30928 { 12809 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30929 { 12809 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30930 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30931 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30932 { 12809 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30933 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30934 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30935 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30936 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30937 { 12809 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30938 { 12809 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30939 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30940 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30941 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30942 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30943 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30944 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30945 { 12809 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30946 { 12809 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30947 { 12809 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30948 { 12809 /* vpblendmq */, X86::VPBLENDMQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30949 { 12809 /* vpblendmq */, X86::VPBLENDMQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30950 { 12809 /* vpblendmq */, X86::VPBLENDMQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30951 { 12819 /* vpblendmw */, X86::VPBLENDMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30952 { 12819 /* vpblendmw */, X86::VPBLENDMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30953 { 12819 /* vpblendmw */, X86::VPBLENDMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30954 { 12819 /* vpblendmw */, X86::VPBLENDMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30955 { 12819 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30956 { 12819 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30957 { 12819 /* vpblendmw */, X86::VPBLENDMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30958 { 12819 /* vpblendmw */, X86::VPBLENDMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30959 { 12819 /* vpblendmw */, X86::VPBLENDMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30960 { 12819 /* vpblendmw */, X86::VPBLENDMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30961 { 12819 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30962 { 12819 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30963 { 12819 /* vpblendmw */, X86::VPBLENDMWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30964 { 12819 /* vpblendmw */, X86::VPBLENDMWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30965 { 12819 /* vpblendmw */, X86::VPBLENDMWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30966 { 12819 /* vpblendmw */, X86::VPBLENDMWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30967 { 12819 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30968 { 12819 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30969 { 12829 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30970 { 12829 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
30971 { 12829 /* vpblendvb */, X86::VPBLENDVBYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
30972 { 12829 /* vpblendvb */, X86::VPBLENDVBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
30973 { 12839 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30974 { 12839 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30975 { 12839 /* vpblendw */, X86::VPBLENDWYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30976 { 12839 /* vpblendw */, X86::VPBLENDWYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30977 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30978 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_FR32, MCK_Mem8 }, },
30979 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
30980 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBYrm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_VR256, MCK_Mem8 }, },
30981 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
30982 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
30983 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ128rm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_FR32X, MCK_Mem8 }, },
30984 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_GR32 }, },
30985 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
30986 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ256rm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_VR256X, MCK_Mem8 }, },
30987 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR32 }, },
30988 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
30989 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZrm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_VR512, MCK_Mem8 }, },
30990 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30991 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30992 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, },
30993 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30994 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30995 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, },
30996 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30997 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30998 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, },
30999 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
31000 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31001 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem85_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
31002 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
31003 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31004 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem85_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
31005 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBrZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
31006 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31007 { 12848 /* vpbroadcastb */, X86::VPBROADCASTBZrmkz, Convert__Reg1_0__Reg1_2__Mem85_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
31008 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
31009 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
31010 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
31011 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDYrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256, MCK_Mem32 }, },
31012 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
31013 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31014 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ128rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
31015 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_GR32 }, },
31016 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
31017 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ256rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32 }, },
31018 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR32 }, },
31019 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
31020 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32 }, },
31021 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
31022 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31023 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
31024 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
31025 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31026 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
31027 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
31028 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31029 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
31030 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
31031 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31032 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
31033 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
31034 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31035 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
31036 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDrZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
31037 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31038 { 12861 /* vpbroadcastd */, X86::VPBROADCASTDZrmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
31039 { 12874 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
31040 { 12874 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
31041 { 12874 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
31042 { 12890 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
31043 { 12890 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
31044 { 12890 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
31045 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
31046 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
31047 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
31048 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQYrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256, MCK_Mem64 }, },
31049 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR64 }, },
31050 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31051 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
31052 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_GR64 }, },
31053 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
31054 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ256rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, },
31055 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR64 }, },
31056 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
31057 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
31058 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
31059 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31060 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
31061 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
31062 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31063 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
31064 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
31065 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31066 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
31067 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
31068 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31069 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
31070 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
31071 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31072 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
31073 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQrZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
31074 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31075 { 12906 /* vpbroadcastq */, X86::VPBROADCASTQZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
31076 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
31077 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32, MCK_Mem16 }, },
31078 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
31079 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWYrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_VR256, MCK_Mem16 }, },
31080 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
31081 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31082 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ128rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32X, MCK_Mem16 }, },
31083 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_GR32 }, },
31084 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
31085 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ256rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_VR256X, MCK_Mem16 }, },
31086 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR32 }, },
31087 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
31088 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_VR512, MCK_Mem16 }, },
31089 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
31090 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31091 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
31092 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
31093 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31094 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
31095 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
31096 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31097 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
31098 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
31099 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31100 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem165_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
31101 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
31102 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31103 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem165_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
31104 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWrZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
31105 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31106 { 12919 /* vpbroadcastw */, X86::VPBROADCASTWZrmkz, Convert__Reg1_0__Reg1_2__Mem165_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
31107 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31108 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31109 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31110 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31111 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31112 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31113 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31114 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31115 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31116 { 12932 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31117 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31118 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31119 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31120 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31121 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31122 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31123 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31124 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31125 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31126 { 12946 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31127 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31128 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31129 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31130 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31131 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31132 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31133 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31134 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31135 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31136 { 12960 /* vpclmullqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31137 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31138 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31139 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31140 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31141 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31142 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31143 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31144 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31145 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31146 { 12974 /* vpclmullqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31147 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31148 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31149 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
31150 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31151 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31152 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31153 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31154 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31155 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31156 { 12988 /* vpclmulqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31157 { 12999 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31158 { 12999 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31159 { 12999 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31160 { 12999 /* vpcmov */, X86::VPCMOVYrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
31161 { 12999 /* vpcmov */, X86::VPCMOVYrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31162 { 12999 /* vpcmov */, X86::VPCMOVYrmr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
31163 { 13006 /* vpcmpb */, X86::VPCMPBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31164 { 13006 /* vpcmpb */, X86::VPCMPBZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31165 { 13006 /* vpcmpb */, X86::VPCMPBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31166 { 13006 /* vpcmpb */, X86::VPCMPBZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31167 { 13006 /* vpcmpb */, X86::VPCMPBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31168 { 13006 /* vpcmpb */, X86::VPCMPBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31169 { 13006 /* vpcmpb */, X86::VPCMPBZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31170 { 13006 /* vpcmpb */, X86::VPCMPBZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31171 { 13006 /* vpcmpb */, X86::VPCMPBZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31172 { 13006 /* vpcmpb */, X86::VPCMPBZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31173 { 13006 /* vpcmpb */, X86::VPCMPBZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31174 { 13006 /* vpcmpb */, X86::VPCMPBZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31175 { 13013 /* vpcmpd */, X86::VPCMPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31176 { 13013 /* vpcmpd */, X86::VPCMPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31177 { 13013 /* vpcmpd */, X86::VPCMPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31178 { 13013 /* vpcmpd */, X86::VPCMPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31179 { 13013 /* vpcmpd */, X86::VPCMPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31180 { 13013 /* vpcmpd */, X86::VPCMPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31181 { 13013 /* vpcmpd */, X86::VPCMPDZ128rmib, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31182 { 13013 /* vpcmpd */, X86::VPCMPDZ256rmib, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31183 { 13013 /* vpcmpd */, X86::VPCMPDZrmib, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
31184 { 13013 /* vpcmpd */, X86::VPCMPDZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31185 { 13013 /* vpcmpd */, X86::VPCMPDZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31186 { 13013 /* vpcmpd */, X86::VPCMPDZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31187 { 13013 /* vpcmpd */, X86::VPCMPDZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31188 { 13013 /* vpcmpd */, X86::VPCMPDZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31189 { 13013 /* vpcmpd */, X86::VPCMPDZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31190 { 13013 /* vpcmpd */, X86::VPCMPDZ128rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31191 { 13013 /* vpcmpd */, X86::VPCMPDZ256rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31192 { 13013 /* vpcmpd */, X86::VPCMPDZrmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
31193 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
31194 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
31195 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
31196 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
31197 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31198 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
31199 { 13020 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31200 { 13020 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31201 { 13020 /* vpcmpeqb */, X86::VPCMPEQBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31202 { 13020 /* vpcmpeqb */, X86::VPCMPEQBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31203 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31204 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31205 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31206 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31207 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31208 { 13020 /* vpcmpeqb */, X86::VPCMPEQBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31209 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
31210 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
31211 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
31212 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
31213 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31214 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
31215 { 13029 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31216 { 13029 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31217 { 13029 /* vpcmpeqd */, X86::VPCMPEQDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31218 { 13029 /* vpcmpeqd */, X86::VPCMPEQDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31219 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31220 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31221 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31222 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31223 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31224 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31225 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31226 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31227 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31228 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31229 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31230 { 13029 /* vpcmpeqd */, X86::VPCMPEQDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31231 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
31232 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
31233 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
31234 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
31235 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31236 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
31237 { 13038 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31238 { 13038 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31239 { 13038 /* vpcmpeqq */, X86::VPCMPEQQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31240 { 13038 /* vpcmpeqq */, X86::VPCMPEQQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31241 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31242 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31243 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31244 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31245 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31246 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31247 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31248 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31249 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31250 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31251 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31252 { 13038 /* vpcmpeqq */, X86::VPCMPEQQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31253 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
31254 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
31255 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
31256 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
31257 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31258 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
31259 { 13047 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31260 { 13047 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31261 { 13047 /* vpcmpeqw */, X86::VPCMPEQWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31262 { 13047 /* vpcmpeqw */, X86::VPCMPEQWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31263 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31264 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31265 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31266 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31267 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31268 { 13047 /* vpcmpeqw */, X86::VPCMPEQWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31269 { 13056 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31270 { 13056 /* vpcmpestri */, X86::VPCMPESTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31271 { 13067 /* vpcmpestrm */, X86::VPCMPESTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31272 { 13067 /* vpcmpestrm */, X86::VPCMPESTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31273 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
31274 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
31275 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
31276 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
31277 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31278 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
31279 { 13078 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31280 { 13078 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31281 { 13078 /* vpcmpgtb */, X86::VPCMPGTBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31282 { 13078 /* vpcmpgtb */, X86::VPCMPGTBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31283 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31284 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31285 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31286 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31287 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31288 { 13078 /* vpcmpgtb */, X86::VPCMPGTBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31289 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
31290 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
31291 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
31292 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
31293 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31294 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
31295 { 13087 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31296 { 13087 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31297 { 13087 /* vpcmpgtd */, X86::VPCMPGTDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31298 { 13087 /* vpcmpgtd */, X86::VPCMPGTDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31299 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31300 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31301 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31302 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31303 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31304 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31305 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31306 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31307 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31308 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31309 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31310 { 13087 /* vpcmpgtd */, X86::VPCMPGTDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31311 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
31312 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
31313 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
31314 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
31315 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31316 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
31317 { 13096 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31318 { 13096 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31319 { 13096 /* vpcmpgtq */, X86::VPCMPGTQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31320 { 13096 /* vpcmpgtq */, X86::VPCMPGTQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31321 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31322 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31323 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31324 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31325 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31326 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31327 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31328 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31329 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31330 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31331 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31332 { 13096 /* vpcmpgtq */, X86::VPCMPGTQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31333 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
31334 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
31335 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
31336 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
31337 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31338 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
31339 { 13105 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31340 { 13105 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31341 { 13105 /* vpcmpgtw */, X86::VPCMPGTWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31342 { 13105 /* vpcmpgtw */, X86::VPCMPGTWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31343 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31344 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31345 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31346 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31347 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31348 { 13105 /* vpcmpgtw */, X86::VPCMPGTWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31349 { 13114 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31350 { 13114 /* vpcmpistri */, X86::VPCMPISTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31351 { 13125 /* vpcmpistrm */, X86::VPCMPISTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31352 { 13125 /* vpcmpistrm */, X86::VPCMPISTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31353 { 13136 /* vpcmpq */, X86::VPCMPQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31354 { 13136 /* vpcmpq */, X86::VPCMPQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31355 { 13136 /* vpcmpq */, X86::VPCMPQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31356 { 13136 /* vpcmpq */, X86::VPCMPQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31357 { 13136 /* vpcmpq */, X86::VPCMPQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31358 { 13136 /* vpcmpq */, X86::VPCMPQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31359 { 13136 /* vpcmpq */, X86::VPCMPQZ128rmib, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
31360 { 13136 /* vpcmpq */, X86::VPCMPQZ256rmib, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31361 { 13136 /* vpcmpq */, X86::VPCMPQZrmib, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31362 { 13136 /* vpcmpq */, X86::VPCMPQZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31363 { 13136 /* vpcmpq */, X86::VPCMPQZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31364 { 13136 /* vpcmpq */, X86::VPCMPQZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31365 { 13136 /* vpcmpq */, X86::VPCMPQZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31366 { 13136 /* vpcmpq */, X86::VPCMPQZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31367 { 13136 /* vpcmpq */, X86::VPCMPQZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31368 { 13136 /* vpcmpq */, X86::VPCMPQZ128rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
31369 { 13136 /* vpcmpq */, X86::VPCMPQZ256rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31370 { 13136 /* vpcmpq */, X86::VPCMPQZrmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31371 { 13143 /* vpcmpub */, X86::VPCMPUBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31372 { 13143 /* vpcmpub */, X86::VPCMPUBZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31373 { 13143 /* vpcmpub */, X86::VPCMPUBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31374 { 13143 /* vpcmpub */, X86::VPCMPUBZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31375 { 13143 /* vpcmpub */, X86::VPCMPUBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31376 { 13143 /* vpcmpub */, X86::VPCMPUBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31377 { 13143 /* vpcmpub */, X86::VPCMPUBZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31378 { 13143 /* vpcmpub */, X86::VPCMPUBZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31379 { 13143 /* vpcmpub */, X86::VPCMPUBZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31380 { 13143 /* vpcmpub */, X86::VPCMPUBZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31381 { 13143 /* vpcmpub */, X86::VPCMPUBZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31382 { 13143 /* vpcmpub */, X86::VPCMPUBZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31383 { 13151 /* vpcmpud */, X86::VPCMPUDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31384 { 13151 /* vpcmpud */, X86::VPCMPUDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31385 { 13151 /* vpcmpud */, X86::VPCMPUDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31386 { 13151 /* vpcmpud */, X86::VPCMPUDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31387 { 13151 /* vpcmpud */, X86::VPCMPUDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31388 { 13151 /* vpcmpud */, X86::VPCMPUDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31389 { 13151 /* vpcmpud */, X86::VPCMPUDZ128rmib, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31390 { 13151 /* vpcmpud */, X86::VPCMPUDZ256rmib, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31391 { 13151 /* vpcmpud */, X86::VPCMPUDZrmib, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
31392 { 13151 /* vpcmpud */, X86::VPCMPUDZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31393 { 13151 /* vpcmpud */, X86::VPCMPUDZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31394 { 13151 /* vpcmpud */, X86::VPCMPUDZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31395 { 13151 /* vpcmpud */, X86::VPCMPUDZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31396 { 13151 /* vpcmpud */, X86::VPCMPUDZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31397 { 13151 /* vpcmpud */, X86::VPCMPUDZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31398 { 13151 /* vpcmpud */, X86::VPCMPUDZ128rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31399 { 13151 /* vpcmpud */, X86::VPCMPUDZ256rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31400 { 13151 /* vpcmpud */, X86::VPCMPUDZrmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
31401 { 13159 /* vpcmpuq */, X86::VPCMPUQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31402 { 13159 /* vpcmpuq */, X86::VPCMPUQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31403 { 13159 /* vpcmpuq */, X86::VPCMPUQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31404 { 13159 /* vpcmpuq */, X86::VPCMPUQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31405 { 13159 /* vpcmpuq */, X86::VPCMPUQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31406 { 13159 /* vpcmpuq */, X86::VPCMPUQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31407 { 13159 /* vpcmpuq */, X86::VPCMPUQZ128rmib, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
31408 { 13159 /* vpcmpuq */, X86::VPCMPUQZ256rmib, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31409 { 13159 /* vpcmpuq */, X86::VPCMPUQZrmib, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31410 { 13159 /* vpcmpuq */, X86::VPCMPUQZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31411 { 13159 /* vpcmpuq */, X86::VPCMPUQZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31412 { 13159 /* vpcmpuq */, X86::VPCMPUQZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31413 { 13159 /* vpcmpuq */, X86::VPCMPUQZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31414 { 13159 /* vpcmpuq */, X86::VPCMPUQZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31415 { 13159 /* vpcmpuq */, X86::VPCMPUQZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31416 { 13159 /* vpcmpuq */, X86::VPCMPUQZ128rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
31417 { 13159 /* vpcmpuq */, X86::VPCMPUQZ256rmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31418 { 13159 /* vpcmpuq */, X86::VPCMPUQZrmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31419 { 13167 /* vpcmpuw */, X86::VPCMPUWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31420 { 13167 /* vpcmpuw */, X86::VPCMPUWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31421 { 13167 /* vpcmpuw */, X86::VPCMPUWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31422 { 13167 /* vpcmpuw */, X86::VPCMPUWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31423 { 13167 /* vpcmpuw */, X86::VPCMPUWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31424 { 13167 /* vpcmpuw */, X86::VPCMPUWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31425 { 13167 /* vpcmpuw */, X86::VPCMPUWZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31426 { 13167 /* vpcmpuw */, X86::VPCMPUWZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31427 { 13167 /* vpcmpuw */, X86::VPCMPUWZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31428 { 13167 /* vpcmpuw */, X86::VPCMPUWZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31429 { 13167 /* vpcmpuw */, X86::VPCMPUWZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31430 { 13167 /* vpcmpuw */, X86::VPCMPUWZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31431 { 13175 /* vpcmpw */, X86::VPCMPWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31432 { 13175 /* vpcmpw */, X86::VPCMPWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31433 { 13175 /* vpcmpw */, X86::VPCMPWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31434 { 13175 /* vpcmpw */, X86::VPCMPWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31435 { 13175 /* vpcmpw */, X86::VPCMPWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31436 { 13175 /* vpcmpw */, X86::VPCMPWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31437 { 13175 /* vpcmpw */, X86::VPCMPWZ128rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31438 { 13175 /* vpcmpw */, X86::VPCMPWZ128rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31439 { 13175 /* vpcmpw */, X86::VPCMPWZ256rrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31440 { 13175 /* vpcmpw */, X86::VPCMPWZ256rmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31441 { 13175 /* vpcmpw */, X86::VPCMPWZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31442 { 13175 /* vpcmpw */, X86::VPCMPWZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31443 { 13182 /* vpcomb */, X86::VPCOMBri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31444 { 13182 /* vpcomb */, X86::VPCOMBmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31445 { 13189 /* vpcomd */, X86::VPCOMDri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31446 { 13189 /* vpcomd */, X86::VPCOMDmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31447 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31448 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
31449 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31450 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
31451 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
31452 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
31453 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31454 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31455 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31456 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31457 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31458 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31459 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31460 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31461 { 13196 /* vpcompressb */, X86::VPCOMPRESSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31462 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31463 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
31464 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31465 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
31466 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
31467 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
31468 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31469 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31470 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31471 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31472 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31473 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31474 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31475 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31476 { 13208 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31477 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31478 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
31479 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31480 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
31481 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
31482 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
31483 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31484 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31485 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31486 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31487 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31488 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31489 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31490 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31491 { 13220 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31492 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31493 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
31494 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31495 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ128mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32X }, },
31496 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ256mr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR256X }, },
31497 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
31498 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31499 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31500 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31501 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31502 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31503 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31504 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31505 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31506 { 13232 /* vpcompressw */, X86::VPCOMPRESSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31507 { 13244 /* vpcomq */, X86::VPCOMQri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31508 { 13244 /* vpcomq */, X86::VPCOMQmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31509 { 13251 /* vpcomub */, X86::VPCOMUBri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31510 { 13251 /* vpcomub */, X86::VPCOMUBmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31511 { 13259 /* vpcomud */, X86::VPCOMUDri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31512 { 13259 /* vpcomud */, X86::VPCOMUDmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31513 { 13267 /* vpcomuq */, X86::VPCOMUQri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31514 { 13267 /* vpcomuq */, X86::VPCOMUQmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31515 { 13275 /* vpcomuw */, X86::VPCOMUWri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31516 { 13275 /* vpcomuw */, X86::VPCOMUWmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31517 { 13283 /* vpcomw */, X86::VPCOMWri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31518 { 13283 /* vpcomw */, X86::VPCOMWmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31519 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31520 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
31521 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
31522 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
31523 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31524 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
31525 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31526 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31527 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31528 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31529 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31530 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31531 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31532 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31533 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31534 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31535 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31536 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
31537 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31538 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31539 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
31540 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31541 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31542 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
31543 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
31544 { 13290 /* vpconflictd */, X86::VPCONFLICTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
31545 { 13290 /* vpconflictd */, X86::VPCONFLICTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
31546 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
31547 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
31548 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
31549 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
31550 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31551 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
31552 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31553 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31554 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31555 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31556 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31557 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31558 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31559 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31560 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31561 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31562 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31563 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
31564 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31565 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31566 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
31567 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31568 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31569 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
31570 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
31571 { 13302 /* vpconflictq */, X86::VPCONFLICTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
31572 { 13302 /* vpconflictq */, X86::VPCONFLICTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
31573 { 13314 /* vpdpbusd */, X86::VPDPBUSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31574 { 13314 /* vpdpbusd */, X86::VPDPBUSDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31575 { 13314 /* vpdpbusd */, X86::VPDPBUSDYrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31576 { 13314 /* vpdpbusd */, X86::VPDPBUSDYrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31577 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31578 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31579 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31580 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31581 { 13314 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31582 { 13314 /* vpdpbusd */, X86::VPDPBUSDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31583 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31584 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31585 { 13314 /* vpdpbusd */, X86::VPDPBUSDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31586 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31587 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31588 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31589 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31590 { 13314 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31591 { 13314 /* vpdpbusd */, X86::VPDPBUSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31592 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31593 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31594 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31595 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31596 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31597 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31598 { 13314 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31599 { 13314 /* vpdpbusd */, X86::VPDPBUSDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31600 { 13314 /* vpdpbusd */, X86::VPDPBUSDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31601 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31602 { 13314 /* vpdpbusd */, X86::VPDPBUSDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31603 { 13314 /* vpdpbusd */, X86::VPDPBUSDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31604 { 13323 /* vpdpbusds */, X86::VPDPBUSDSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31605 { 13323 /* vpdpbusds */, X86::VPDPBUSDSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31606 { 13323 /* vpdpbusds */, X86::VPDPBUSDSYrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31607 { 13323 /* vpdpbusds */, X86::VPDPBUSDSYrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31608 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31609 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31610 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31611 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31612 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31613 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31614 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31615 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31616 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31617 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31618 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31619 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31620 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31621 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31622 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31623 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31624 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31625 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31626 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31627 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31628 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31629 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31630 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31631 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31632 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31633 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31634 { 13323 /* vpdpbusds */, X86::VPDPBUSDSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31635 { 13333 /* vpdpwssd */, X86::VPDPWSSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31636 { 13333 /* vpdpwssd */, X86::VPDPWSSDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31637 { 13333 /* vpdpwssd */, X86::VPDPWSSDYrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31638 { 13333 /* vpdpwssd */, X86::VPDPWSSDYrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31639 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31640 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31641 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31642 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31643 { 13333 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31644 { 13333 /* vpdpwssd */, X86::VPDPWSSDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31645 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31646 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31647 { 13333 /* vpdpwssd */, X86::VPDPWSSDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31648 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31649 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31650 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31651 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31652 { 13333 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31653 { 13333 /* vpdpwssd */, X86::VPDPWSSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31654 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31655 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31656 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31657 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31658 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31659 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31660 { 13333 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31661 { 13333 /* vpdpwssd */, X86::VPDPWSSDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31662 { 13333 /* vpdpwssd */, X86::VPDPWSSDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31663 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31664 { 13333 /* vpdpwssd */, X86::VPDPWSSDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31665 { 13333 /* vpdpwssd */, X86::VPDPWSSDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31666 { 13342 /* vpdpwssds */, X86::VPDPWSSDSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31667 { 13342 /* vpdpwssds */, X86::VPDPWSSDSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31668 { 13342 /* vpdpwssds */, X86::VPDPWSSDSYrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31669 { 13342 /* vpdpwssds */, X86::VPDPWSSDSYrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31670 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31671 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31672 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31673 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31674 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31675 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31676 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31677 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31678 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31679 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31680 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31681 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31682 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31683 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31684 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31685 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31686 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31687 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31688 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31689 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31690 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31691 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31692 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31693 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31694 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31695 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31696 { 13342 /* vpdpwssds */, X86::VPDPWSSDSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31697 { 13352 /* vperm2f128 */, X86::VPERM2F128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
31698 { 13352 /* vperm2f128 */, X86::VPERM2F128rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31699 { 13363 /* vperm2i128 */, X86::VPERM2I128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
31700 { 13363 /* vperm2i128 */, X86::VPERM2I128rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31701 { 13374 /* vpermb */, X86::VPERMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31702 { 13374 /* vpermb */, X86::VPERMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31703 { 13374 /* vpermb */, X86::VPERMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31704 { 13374 /* vpermb */, X86::VPERMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31705 { 13374 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31706 { 13374 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31707 { 13374 /* vpermb */, X86::VPERMBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31708 { 13374 /* vpermb */, X86::VPERMBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31709 { 13374 /* vpermb */, X86::VPERMBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31710 { 13374 /* vpermb */, X86::VPERMBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31711 { 13374 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31712 { 13374 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31713 { 13374 /* vpermb */, X86::VPERMBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31714 { 13374 /* vpermb */, X86::VPERMBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31715 { 13374 /* vpermb */, X86::VPERMBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31716 { 13374 /* vpermb */, X86::VPERMBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31717 { 13374 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31718 { 13374 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31719 { 13381 /* vpermd */, X86::VPERMDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31720 { 13381 /* vpermd */, X86::VPERMDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31721 { 13381 /* vpermd */, X86::VPERMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31722 { 13381 /* vpermd */, X86::VPERMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31723 { 13381 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31724 { 13381 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31725 { 13381 /* vpermd */, X86::VPERMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31726 { 13381 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31727 { 13381 /* vpermd */, X86::VPERMDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31728 { 13381 /* vpermd */, X86::VPERMDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31729 { 13381 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31730 { 13381 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31731 { 13381 /* vpermd */, X86::VPERMDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31732 { 13381 /* vpermd */, X86::VPERMDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31733 { 13381 /* vpermd */, X86::VPERMDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31734 { 13381 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31735 { 13381 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31736 { 13381 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31737 { 13381 /* vpermd */, X86::VPERMDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31738 { 13381 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31739 { 13388 /* vpermi2b */, X86::VPERMI2B128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31740 { 13388 /* vpermi2b */, X86::VPERMI2B128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31741 { 13388 /* vpermi2b */, X86::VPERMI2B256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31742 { 13388 /* vpermi2b */, X86::VPERMI2B256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31743 { 13388 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31744 { 13388 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31745 { 13388 /* vpermi2b */, X86::VPERMI2B128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31746 { 13388 /* vpermi2b */, X86::VPERMI2B128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31747 { 13388 /* vpermi2b */, X86::VPERMI2B256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31748 { 13388 /* vpermi2b */, X86::VPERMI2B256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31749 { 13388 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31750 { 13388 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31751 { 13388 /* vpermi2b */, X86::VPERMI2B128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31752 { 13388 /* vpermi2b */, X86::VPERMI2B128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31753 { 13388 /* vpermi2b */, X86::VPERMI2B256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31754 { 13388 /* vpermi2b */, X86::VPERMI2B256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31755 { 13388 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31756 { 13388 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31757 { 13397 /* vpermi2d */, X86::VPERMI2D128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31758 { 13397 /* vpermi2d */, X86::VPERMI2D128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31759 { 13397 /* vpermi2d */, X86::VPERMI2D256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31760 { 13397 /* vpermi2d */, X86::VPERMI2D256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31761 { 13397 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31762 { 13397 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31763 { 13397 /* vpermi2d */, X86::VPERMI2D128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31764 { 13397 /* vpermi2d */, X86::VPERMI2D256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31765 { 13397 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31766 { 13397 /* vpermi2d */, X86::VPERMI2D128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31767 { 13397 /* vpermi2d */, X86::VPERMI2D128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31768 { 13397 /* vpermi2d */, X86::VPERMI2D256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31769 { 13397 /* vpermi2d */, X86::VPERMI2D256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31770 { 13397 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31771 { 13397 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31772 { 13397 /* vpermi2d */, X86::VPERMI2D128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31773 { 13397 /* vpermi2d */, X86::VPERMI2D128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31774 { 13397 /* vpermi2d */, X86::VPERMI2D128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31775 { 13397 /* vpermi2d */, X86::VPERMI2D256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31776 { 13397 /* vpermi2d */, X86::VPERMI2D256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31777 { 13397 /* vpermi2d */, X86::VPERMI2D256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31778 { 13397 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31779 { 13397 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31780 { 13397 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31781 { 13397 /* vpermi2d */, X86::VPERMI2D128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31782 { 13397 /* vpermi2d */, X86::VPERMI2D256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31783 { 13397 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31784 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31785 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31786 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31787 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31788 { 13406 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31789 { 13406 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31790 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31791 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31792 { 13406 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31793 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31794 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31795 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31796 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31797 { 13406 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31798 { 13406 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31799 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31800 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31801 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31802 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31803 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31804 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31805 { 13406 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31806 { 13406 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31807 { 13406 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31808 { 13406 /* vpermi2pd */, X86::VPERMI2PD128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31809 { 13406 /* vpermi2pd */, X86::VPERMI2PD256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31810 { 13406 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31811 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31812 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31813 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31814 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31815 { 13416 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31816 { 13416 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31817 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31818 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31819 { 13416 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31820 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31821 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31822 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31823 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31824 { 13416 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31825 { 13416 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31826 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31827 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31828 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31829 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31830 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31831 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31832 { 13416 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31833 { 13416 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31834 { 13416 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31835 { 13416 /* vpermi2ps */, X86::VPERMI2PS128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31836 { 13416 /* vpermi2ps */, X86::VPERMI2PS256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31837 { 13416 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31838 { 13426 /* vpermi2q */, X86::VPERMI2Q128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31839 { 13426 /* vpermi2q */, X86::VPERMI2Q128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31840 { 13426 /* vpermi2q */, X86::VPERMI2Q256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31841 { 13426 /* vpermi2q */, X86::VPERMI2Q256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31842 { 13426 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31843 { 13426 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31844 { 13426 /* vpermi2q */, X86::VPERMI2Q128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31845 { 13426 /* vpermi2q */, X86::VPERMI2Q256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31846 { 13426 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31847 { 13426 /* vpermi2q */, X86::VPERMI2Q128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31848 { 13426 /* vpermi2q */, X86::VPERMI2Q128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31849 { 13426 /* vpermi2q */, X86::VPERMI2Q256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31850 { 13426 /* vpermi2q */, X86::VPERMI2Q256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31851 { 13426 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31852 { 13426 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31853 { 13426 /* vpermi2q */, X86::VPERMI2Q128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31854 { 13426 /* vpermi2q */, X86::VPERMI2Q128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31855 { 13426 /* vpermi2q */, X86::VPERMI2Q128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31856 { 13426 /* vpermi2q */, X86::VPERMI2Q256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31857 { 13426 /* vpermi2q */, X86::VPERMI2Q256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31858 { 13426 /* vpermi2q */, X86::VPERMI2Q256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31859 { 13426 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31860 { 13426 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31861 { 13426 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31862 { 13426 /* vpermi2q */, X86::VPERMI2Q128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31863 { 13426 /* vpermi2q */, X86::VPERMI2Q256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31864 { 13426 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31865 { 13435 /* vpermi2w */, X86::VPERMI2W128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31866 { 13435 /* vpermi2w */, X86::VPERMI2W128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31867 { 13435 /* vpermi2w */, X86::VPERMI2W256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31868 { 13435 /* vpermi2w */, X86::VPERMI2W256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31869 { 13435 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31870 { 13435 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31871 { 13435 /* vpermi2w */, X86::VPERMI2W128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31872 { 13435 /* vpermi2w */, X86::VPERMI2W128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31873 { 13435 /* vpermi2w */, X86::VPERMI2W256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31874 { 13435 /* vpermi2w */, X86::VPERMI2W256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31875 { 13435 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31876 { 13435 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31877 { 13435 /* vpermi2w */, X86::VPERMI2W128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31878 { 13435 /* vpermi2w */, X86::VPERMI2W128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31879 { 13435 /* vpermi2w */, X86::VPERMI2W256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31880 { 13435 /* vpermi2w */, X86::VPERMI2W256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31881 { 13435 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31882 { 13435 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31883 { 13444 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi4 }, },
31884 { 13444 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi4 }, },
31885 { 13444 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi4 }, },
31886 { 13444 /* vpermil2pd */, X86::VPERMIL2PDYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi4 }, },
31887 { 13444 /* vpermil2pd */, X86::VPERMIL2PDYrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi41_4, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi4 }, },
31888 { 13444 /* vpermil2pd */, X86::VPERMIL2PDYmr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_ImmUnsignedi4 }, },
31889 { 13455 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi4 }, },
31890 { 13455 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi4 }, },
31891 { 13455 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi4 }, },
31892 { 13455 /* vpermil2ps */, X86::VPERMIL2PSYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi4 }, },
31893 { 13455 /* vpermil2ps */, X86::VPERMIL2PSYrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi41_4, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi4 }, },
31894 { 13455 /* vpermil2ps */, X86::VPERMIL2PSYmr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_ImmUnsignedi4 }, },
31895 { 13466 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31896 { 13466 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31897 { 13466 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31898 { 13466 /* vpermilpd */, X86::VPERMILPDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31899 { 13466 /* vpermilpd */, X86::VPERMILPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31900 { 13466 /* vpermilpd */, X86::VPERMILPDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
31901 { 13466 /* vpermilpd */, X86::VPERMILPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31902 { 13466 /* vpermilpd */, X86::VPERMILPDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31903 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31904 { 13466 /* vpermilpd */, X86::VPERMILPDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31905 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31906 { 13466 /* vpermilpd */, X86::VPERMILPDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31907 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31908 { 13466 /* vpermilpd */, X86::VPERMILPDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31909 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31910 { 13466 /* vpermilpd */, X86::VPERMILPDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31911 { 13466 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31912 { 13466 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31913 { 13466 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31914 { 13466 /* vpermilpd */, X86::VPERMILPDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31915 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31916 { 13466 /* vpermilpd */, X86::VPERMILPDZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
31917 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31918 { 13466 /* vpermilpd */, X86::VPERMILPDZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31919 { 13466 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31920 { 13466 /* vpermilpd */, X86::VPERMILPDZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31921 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31922 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31923 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31924 { 13466 /* vpermilpd */, X86::VPERMILPDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31925 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31926 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31927 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31928 { 13466 /* vpermilpd */, X86::VPERMILPDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31929 { 13466 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31930 { 13466 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31931 { 13466 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31932 { 13466 /* vpermilpd */, X86::VPERMILPDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31933 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31934 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31935 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31936 { 13466 /* vpermilpd */, X86::VPERMILPDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31937 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31938 { 13466 /* vpermilpd */, X86::VPERMILPDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
31939 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31940 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31941 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31942 { 13466 /* vpermilpd */, X86::VPERMILPDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31943 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31944 { 13466 /* vpermilpd */, X86::VPERMILPDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31945 { 13466 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31946 { 13466 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31947 { 13466 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31948 { 13466 /* vpermilpd */, X86::VPERMILPDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31949 { 13466 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31950 { 13466 /* vpermilpd */, X86::VPERMILPDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31951 { 13466 /* vpermilpd */, X86::VPERMILPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31952 { 13466 /* vpermilpd */, X86::VPERMILPDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
31953 { 13466 /* vpermilpd */, X86::VPERMILPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31954 { 13466 /* vpermilpd */, X86::VPERMILPDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31955 { 13466 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31956 { 13466 /* vpermilpd */, X86::VPERMILPDZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31957 { 13476 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31958 { 13476 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31959 { 13476 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31960 { 13476 /* vpermilps */, X86::VPERMILPSmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31961 { 13476 /* vpermilps */, X86::VPERMILPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31962 { 13476 /* vpermilps */, X86::VPERMILPSYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
31963 { 13476 /* vpermilps */, X86::VPERMILPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31964 { 13476 /* vpermilps */, X86::VPERMILPSYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31965 { 13476 /* vpermilps */, X86::VPERMILPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31966 { 13476 /* vpermilps */, X86::VPERMILPSZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31967 { 13476 /* vpermilps */, X86::VPERMILPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31968 { 13476 /* vpermilps */, X86::VPERMILPSZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31969 { 13476 /* vpermilps */, X86::VPERMILPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31970 { 13476 /* vpermilps */, X86::VPERMILPSZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31971 { 13476 /* vpermilps */, X86::VPERMILPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31972 { 13476 /* vpermilps */, X86::VPERMILPSZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31973 { 13476 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31974 { 13476 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31975 { 13476 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31976 { 13476 /* vpermilps */, X86::VPERMILPSZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31977 { 13476 /* vpermilps */, X86::VPERMILPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31978 { 13476 /* vpermilps */, X86::VPERMILPSZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31979 { 13476 /* vpermilps */, X86::VPERMILPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31980 { 13476 /* vpermilps */, X86::VPERMILPSZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31981 { 13476 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31982 { 13476 /* vpermilps */, X86::VPERMILPSZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
31983 { 13476 /* vpermilps */, X86::VPERMILPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31984 { 13476 /* vpermilps */, X86::VPERMILPSZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31985 { 13476 /* vpermilps */, X86::VPERMILPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31986 { 13476 /* vpermilps */, X86::VPERMILPSZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31987 { 13476 /* vpermilps */, X86::VPERMILPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31988 { 13476 /* vpermilps */, X86::VPERMILPSZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31989 { 13476 /* vpermilps */, X86::VPERMILPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31990 { 13476 /* vpermilps */, X86::VPERMILPSZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31991 { 13476 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31992 { 13476 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31993 { 13476 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31994 { 13476 /* vpermilps */, X86::VPERMILPSZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31995 { 13476 /* vpermilps */, X86::VPERMILPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31996 { 13476 /* vpermilps */, X86::VPERMILPSZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31997 { 13476 /* vpermilps */, X86::VPERMILPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31998 { 13476 /* vpermilps */, X86::VPERMILPSZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31999 { 13476 /* vpermilps */, X86::VPERMILPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32000 { 13476 /* vpermilps */, X86::VPERMILPSZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32001 { 13476 /* vpermilps */, X86::VPERMILPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32002 { 13476 /* vpermilps */, X86::VPERMILPSZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32003 { 13476 /* vpermilps */, X86::VPERMILPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32004 { 13476 /* vpermilps */, X86::VPERMILPSZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32005 { 13476 /* vpermilps */, X86::VPERMILPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32006 { 13476 /* vpermilps */, X86::VPERMILPSZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32007 { 13476 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32008 { 13476 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32009 { 13476 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32010 { 13476 /* vpermilps */, X86::VPERMILPSZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32011 { 13476 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32012 { 13476 /* vpermilps */, X86::VPERMILPSZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
32013 { 13476 /* vpermilps */, X86::VPERMILPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32014 { 13476 /* vpermilps */, X86::VPERMILPSZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32015 { 13476 /* vpermilps */, X86::VPERMILPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32016 { 13476 /* vpermilps */, X86::VPERMILPSZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32017 { 13476 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32018 { 13476 /* vpermilps */, X86::VPERMILPSZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
32019 { 13486 /* vpermpd */, X86::VPERMPDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
32020 { 13486 /* vpermpd */, X86::VPERMPDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32021 { 13486 /* vpermpd */, X86::VPERMPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32022 { 13486 /* vpermpd */, X86::VPERMPDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32023 { 13486 /* vpermpd */, X86::VPERMPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32024 { 13486 /* vpermpd */, X86::VPERMPDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32025 { 13486 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32026 { 13486 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
32027 { 13486 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32028 { 13486 /* vpermpd */, X86::VPERMPDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32029 { 13486 /* vpermpd */, X86::VPERMPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32030 { 13486 /* vpermpd */, X86::VPERMPDZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32031 { 13486 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32032 { 13486 /* vpermpd */, X86::VPERMPDZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32033 { 13486 /* vpermpd */, X86::VPERMPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32034 { 13486 /* vpermpd */, X86::VPERMPDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32035 { 13486 /* vpermpd */, X86::VPERMPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32036 { 13486 /* vpermpd */, X86::VPERMPDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32037 { 13486 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32038 { 13486 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32039 { 13486 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32040 { 13486 /* vpermpd */, X86::VPERMPDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32041 { 13486 /* vpermpd */, X86::VPERMPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32042 { 13486 /* vpermpd */, X86::VPERMPDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32043 { 13486 /* vpermpd */, X86::VPERMPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32044 { 13486 /* vpermpd */, X86::VPERMPDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32045 { 13486 /* vpermpd */, X86::VPERMPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32046 { 13486 /* vpermpd */, X86::VPERMPDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32047 { 13486 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32048 { 13486 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32049 { 13486 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32050 { 13486 /* vpermpd */, X86::VPERMPDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32051 { 13486 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32052 { 13486 /* vpermpd */, X86::VPERMPDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32053 { 13486 /* vpermpd */, X86::VPERMPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32054 { 13486 /* vpermpd */, X86::VPERMPDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32055 { 13486 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32056 { 13486 /* vpermpd */, X86::VPERMPDZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32057 { 13494 /* vpermps */, X86::VPERMPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32058 { 13494 /* vpermps */, X86::VPERMPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32059 { 13494 /* vpermps */, X86::VPERMPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32060 { 13494 /* vpermps */, X86::VPERMPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32061 { 13494 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32062 { 13494 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32063 { 13494 /* vpermps */, X86::VPERMPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32064 { 13494 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32065 { 13494 /* vpermps */, X86::VPERMPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32066 { 13494 /* vpermps */, X86::VPERMPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32067 { 13494 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32068 { 13494 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32069 { 13494 /* vpermps */, X86::VPERMPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32070 { 13494 /* vpermps */, X86::VPERMPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32071 { 13494 /* vpermps */, X86::VPERMPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32072 { 13494 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32073 { 13494 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32074 { 13494 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32075 { 13494 /* vpermps */, X86::VPERMPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32076 { 13494 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32077 { 13502 /* vpermq */, X86::VPERMQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
32078 { 13502 /* vpermq */, X86::VPERMQYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32079 { 13502 /* vpermq */, X86::VPERMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32080 { 13502 /* vpermq */, X86::VPERMQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32081 { 13502 /* vpermq */, X86::VPERMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32082 { 13502 /* vpermq */, X86::VPERMQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32083 { 13502 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32084 { 13502 /* vpermq */, X86::VPERMQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
32085 { 13502 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32086 { 13502 /* vpermq */, X86::VPERMQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32087 { 13502 /* vpermq */, X86::VPERMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32088 { 13502 /* vpermq */, X86::VPERMQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32089 { 13502 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32090 { 13502 /* vpermq */, X86::VPERMQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32091 { 13502 /* vpermq */, X86::VPERMQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32092 { 13502 /* vpermq */, X86::VPERMQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32093 { 13502 /* vpermq */, X86::VPERMQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32094 { 13502 /* vpermq */, X86::VPERMQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32095 { 13502 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32096 { 13502 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32097 { 13502 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32098 { 13502 /* vpermq */, X86::VPERMQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32099 { 13502 /* vpermq */, X86::VPERMQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32100 { 13502 /* vpermq */, X86::VPERMQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
32101 { 13502 /* vpermq */, X86::VPERMQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32102 { 13502 /* vpermq */, X86::VPERMQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
32103 { 13502 /* vpermq */, X86::VPERMQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32104 { 13502 /* vpermq */, X86::VPERMQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32105 { 13502 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32106 { 13502 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
32107 { 13502 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32108 { 13502 /* vpermq */, X86::VPERMQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
32109 { 13502 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32110 { 13502 /* vpermq */, X86::VPERMQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32111 { 13502 /* vpermq */, X86::VPERMQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32112 { 13502 /* vpermq */, X86::VPERMQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
32113 { 13502 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32114 { 13502 /* vpermq */, X86::VPERMQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
32115 { 13509 /* vpermt2b */, X86::VPERMT2B128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32116 { 13509 /* vpermt2b */, X86::VPERMT2B128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32117 { 13509 /* vpermt2b */, X86::VPERMT2B256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32118 { 13509 /* vpermt2b */, X86::VPERMT2B256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32119 { 13509 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32120 { 13509 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32121 { 13509 /* vpermt2b */, X86::VPERMT2B128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32122 { 13509 /* vpermt2b */, X86::VPERMT2B128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32123 { 13509 /* vpermt2b */, X86::VPERMT2B256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32124 { 13509 /* vpermt2b */, X86::VPERMT2B256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32125 { 13509 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32126 { 13509 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32127 { 13509 /* vpermt2b */, X86::VPERMT2B128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32128 { 13509 /* vpermt2b */, X86::VPERMT2B128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32129 { 13509 /* vpermt2b */, X86::VPERMT2B256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32130 { 13509 /* vpermt2b */, X86::VPERMT2B256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32131 { 13509 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32132 { 13509 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32133 { 13518 /* vpermt2d */, X86::VPERMT2D128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32134 { 13518 /* vpermt2d */, X86::VPERMT2D128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32135 { 13518 /* vpermt2d */, X86::VPERMT2D256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32136 { 13518 /* vpermt2d */, X86::VPERMT2D256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32137 { 13518 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32138 { 13518 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32139 { 13518 /* vpermt2d */, X86::VPERMT2D128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32140 { 13518 /* vpermt2d */, X86::VPERMT2D256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32141 { 13518 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32142 { 13518 /* vpermt2d */, X86::VPERMT2D128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32143 { 13518 /* vpermt2d */, X86::VPERMT2D128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32144 { 13518 /* vpermt2d */, X86::VPERMT2D256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32145 { 13518 /* vpermt2d */, X86::VPERMT2D256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32146 { 13518 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32147 { 13518 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32148 { 13518 /* vpermt2d */, X86::VPERMT2D128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32149 { 13518 /* vpermt2d */, X86::VPERMT2D128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32150 { 13518 /* vpermt2d */, X86::VPERMT2D128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32151 { 13518 /* vpermt2d */, X86::VPERMT2D256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32152 { 13518 /* vpermt2d */, X86::VPERMT2D256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32153 { 13518 /* vpermt2d */, X86::VPERMT2D256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32154 { 13518 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32155 { 13518 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32156 { 13518 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32157 { 13518 /* vpermt2d */, X86::VPERMT2D128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32158 { 13518 /* vpermt2d */, X86::VPERMT2D256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32159 { 13518 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32160 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32161 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32162 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32163 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32164 { 13527 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32165 { 13527 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32166 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32167 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32168 { 13527 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32169 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32170 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32171 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32172 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32173 { 13527 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32174 { 13527 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32175 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32176 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32177 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32178 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32179 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32180 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32181 { 13527 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32182 { 13527 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32183 { 13527 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32184 { 13527 /* vpermt2pd */, X86::VPERMT2PD128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32185 { 13527 /* vpermt2pd */, X86::VPERMT2PD256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32186 { 13527 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32187 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32188 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32189 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32190 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32191 { 13537 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32192 { 13537 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32193 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32194 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32195 { 13537 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32196 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32197 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32198 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32199 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32200 { 13537 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32201 { 13537 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32202 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32203 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32204 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32205 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32206 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32207 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32208 { 13537 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32209 { 13537 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32210 { 13537 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32211 { 13537 /* vpermt2ps */, X86::VPERMT2PS128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32212 { 13537 /* vpermt2ps */, X86::VPERMT2PS256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32213 { 13537 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32214 { 13547 /* vpermt2q */, X86::VPERMT2Q128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32215 { 13547 /* vpermt2q */, X86::VPERMT2Q128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32216 { 13547 /* vpermt2q */, X86::VPERMT2Q256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32217 { 13547 /* vpermt2q */, X86::VPERMT2Q256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32218 { 13547 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32219 { 13547 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32220 { 13547 /* vpermt2q */, X86::VPERMT2Q128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32221 { 13547 /* vpermt2q */, X86::VPERMT2Q256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32222 { 13547 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32223 { 13547 /* vpermt2q */, X86::VPERMT2Q128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32224 { 13547 /* vpermt2q */, X86::VPERMT2Q128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32225 { 13547 /* vpermt2q */, X86::VPERMT2Q256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32226 { 13547 /* vpermt2q */, X86::VPERMT2Q256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32227 { 13547 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32228 { 13547 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32229 { 13547 /* vpermt2q */, X86::VPERMT2Q128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32230 { 13547 /* vpermt2q */, X86::VPERMT2Q128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32231 { 13547 /* vpermt2q */, X86::VPERMT2Q128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32232 { 13547 /* vpermt2q */, X86::VPERMT2Q256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32233 { 13547 /* vpermt2q */, X86::VPERMT2Q256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32234 { 13547 /* vpermt2q */, X86::VPERMT2Q256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32235 { 13547 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32236 { 13547 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32237 { 13547 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32238 { 13547 /* vpermt2q */, X86::VPERMT2Q128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32239 { 13547 /* vpermt2q */, X86::VPERMT2Q256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32240 { 13547 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32241 { 13556 /* vpermt2w */, X86::VPERMT2W128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32242 { 13556 /* vpermt2w */, X86::VPERMT2W128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32243 { 13556 /* vpermt2w */, X86::VPERMT2W256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32244 { 13556 /* vpermt2w */, X86::VPERMT2W256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32245 { 13556 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32246 { 13556 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32247 { 13556 /* vpermt2w */, X86::VPERMT2W128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32248 { 13556 /* vpermt2w */, X86::VPERMT2W128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32249 { 13556 /* vpermt2w */, X86::VPERMT2W256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32250 { 13556 /* vpermt2w */, X86::VPERMT2W256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32251 { 13556 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32252 { 13556 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32253 { 13556 /* vpermt2w */, X86::VPERMT2W128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32254 { 13556 /* vpermt2w */, X86::VPERMT2W128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32255 { 13556 /* vpermt2w */, X86::VPERMT2W256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32256 { 13556 /* vpermt2w */, X86::VPERMT2W256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32257 { 13556 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32258 { 13556 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32259 { 13565 /* vpermw */, X86::VPERMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32260 { 13565 /* vpermw */, X86::VPERMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32261 { 13565 /* vpermw */, X86::VPERMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32262 { 13565 /* vpermw */, X86::VPERMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32263 { 13565 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32264 { 13565 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32265 { 13565 /* vpermw */, X86::VPERMWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32266 { 13565 /* vpermw */, X86::VPERMWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32267 { 13565 /* vpermw */, X86::VPERMWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32268 { 13565 /* vpermw */, X86::VPERMWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32269 { 13565 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32270 { 13565 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32271 { 13565 /* vpermw */, X86::VPERMWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32272 { 13565 /* vpermw */, X86::VPERMWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32273 { 13565 /* vpermw */, X86::VPERMWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32274 { 13565 /* vpermw */, X86::VPERMWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32275 { 13565 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32276 { 13565 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32277 { 13572 /* vpexpandb */, X86::VPEXPANDBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32278 { 13572 /* vpexpandb */, X86::VPEXPANDBZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
32279 { 13572 /* vpexpandb */, X86::VPEXPANDBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
32280 { 13572 /* vpexpandb */, X86::VPEXPANDBZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
32281 { 13572 /* vpexpandb */, X86::VPEXPANDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32282 { 13572 /* vpexpandb */, X86::VPEXPANDBZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
32283 { 13572 /* vpexpandb */, X86::VPEXPANDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32284 { 13572 /* vpexpandb */, X86::VPEXPANDBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32285 { 13572 /* vpexpandb */, X86::VPEXPANDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32286 { 13572 /* vpexpandb */, X86::VPEXPANDBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32287 { 13572 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32288 { 13572 /* vpexpandb */, X86::VPEXPANDBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32289 { 13572 /* vpexpandb */, X86::VPEXPANDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32290 { 13572 /* vpexpandb */, X86::VPEXPANDBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32291 { 13572 /* vpexpandb */, X86::VPEXPANDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32292 { 13572 /* vpexpandb */, X86::VPEXPANDBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32293 { 13572 /* vpexpandb */, X86::VPEXPANDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32294 { 13572 /* vpexpandb */, X86::VPEXPANDBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32295 { 13582 /* vpexpandd */, X86::VPEXPANDDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32296 { 13582 /* vpexpandd */, X86::VPEXPANDDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
32297 { 13582 /* vpexpandd */, X86::VPEXPANDDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
32298 { 13582 /* vpexpandd */, X86::VPEXPANDDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
32299 { 13582 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32300 { 13582 /* vpexpandd */, X86::VPEXPANDDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
32301 { 13582 /* vpexpandd */, X86::VPEXPANDDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32302 { 13582 /* vpexpandd */, X86::VPEXPANDDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32303 { 13582 /* vpexpandd */, X86::VPEXPANDDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32304 { 13582 /* vpexpandd */, X86::VPEXPANDDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32305 { 13582 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32306 { 13582 /* vpexpandd */, X86::VPEXPANDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32307 { 13582 /* vpexpandd */, X86::VPEXPANDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32308 { 13582 /* vpexpandd */, X86::VPEXPANDDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32309 { 13582 /* vpexpandd */, X86::VPEXPANDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32310 { 13582 /* vpexpandd */, X86::VPEXPANDDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32311 { 13582 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32312 { 13582 /* vpexpandd */, X86::VPEXPANDDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32313 { 13592 /* vpexpandq */, X86::VPEXPANDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32314 { 13592 /* vpexpandq */, X86::VPEXPANDQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
32315 { 13592 /* vpexpandq */, X86::VPEXPANDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
32316 { 13592 /* vpexpandq */, X86::VPEXPANDQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
32317 { 13592 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32318 { 13592 /* vpexpandq */, X86::VPEXPANDQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
32319 { 13592 /* vpexpandq */, X86::VPEXPANDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32320 { 13592 /* vpexpandq */, X86::VPEXPANDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32321 { 13592 /* vpexpandq */, X86::VPEXPANDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32322 { 13592 /* vpexpandq */, X86::VPEXPANDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32323 { 13592 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32324 { 13592 /* vpexpandq */, X86::VPEXPANDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32325 { 13592 /* vpexpandq */, X86::VPEXPANDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32326 { 13592 /* vpexpandq */, X86::VPEXPANDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32327 { 13592 /* vpexpandq */, X86::VPEXPANDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32328 { 13592 /* vpexpandq */, X86::VPEXPANDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32329 { 13592 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32330 { 13592 /* vpexpandq */, X86::VPEXPANDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32331 { 13602 /* vpexpandw */, X86::VPEXPANDWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32332 { 13602 /* vpexpandw */, X86::VPEXPANDWZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
32333 { 13602 /* vpexpandw */, X86::VPEXPANDWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
32334 { 13602 /* vpexpandw */, X86::VPEXPANDWZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
32335 { 13602 /* vpexpandw */, X86::VPEXPANDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32336 { 13602 /* vpexpandw */, X86::VPEXPANDWZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
32337 { 13602 /* vpexpandw */, X86::VPEXPANDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32338 { 13602 /* vpexpandw */, X86::VPEXPANDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32339 { 13602 /* vpexpandw */, X86::VPEXPANDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32340 { 13602 /* vpexpandw */, X86::VPEXPANDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32341 { 13602 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32342 { 13602 /* vpexpandw */, X86::VPEXPANDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32343 { 13602 /* vpexpandw */, X86::VPEXPANDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32344 { 13602 /* vpexpandw */, X86::VPEXPANDWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32345 { 13602 /* vpexpandw */, X86::VPEXPANDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32346 { 13602 /* vpexpandw */, X86::VPEXPANDWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32347 { 13602 /* vpexpandw */, X86::VPEXPANDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32348 { 13602 /* vpexpandw */, X86::VPEXPANDWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32349 { 13612 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
32350 { 13612 /* vpextrb */, X86::VPEXTRBZrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32351 { 13612 /* vpextrb */, X86::VPEXTRBmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem8, MCK_FR32, MCK_ImmUnsignedi8 }, },
32352 { 13612 /* vpextrb */, X86::VPEXTRBZmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem8, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32353 { 13620 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
32354 { 13620 /* vpextrd */, X86::VPEXTRDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32355 { 13620 /* vpextrd */, X86::VPEXTRDmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
32356 { 13620 /* vpextrd */, X86::VPEXTRDZmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32357 { 13628 /* vpextrq */, X86::VPEXTRQrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
32358 { 13628 /* vpextrq */, X86::VPEXTRQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32359 { 13628 /* vpextrq */, X86::VPEXTRQmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
32360 { 13628 /* vpextrq */, X86::VPEXTRQZmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32361 { 13636 /* vpextrw */, X86::VPEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
32362 { 13636 /* vpextrw */, X86::VPEXTRWZrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32363 { 13636 /* vpextrw */, X86::VPEXTRWmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem16, MCK_FR32, MCK_ImmUnsignedi8 }, },
32364 { 13636 /* vpextrw */, X86::VPEXTRWZmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem16, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32365 { 13644 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
32366 { 13644 /* vpgatherdd */, X86::VPGATHERDDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
32367 { 13644 /* vpgatherdd */, X86::VPGATHERDDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
32368 { 13644 /* vpgatherdd */, X86::VPGATHERDDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
32369 { 13644 /* vpgatherdd */, X86::VPGATHERDDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
32370 { 13655 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
32371 { 13655 /* vpgatherdq */, X86::VPGATHERDQYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
32372 { 13655 /* vpgatherdq */, X86::VPGATHERDQZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
32373 { 13655 /* vpgatherdq */, X86::VPGATHERDQZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC128X }, },
32374 { 13655 /* vpgatherdq */, X86::VPGATHERDQZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
32375 { 13666 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
32376 { 13666 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
32377 { 13666 /* vpgatherqd */, X86::VPGATHERQDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC256X }, },
32378 { 13666 /* vpgatherqd */, X86::VPGATHERQDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64_RC128X }, },
32379 { 13666 /* vpgatherqd */, X86::VPGATHERQDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
32380 { 13677 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
32381 { 13677 /* vpgatherqq */, X86::VPGATHERQQYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
32382 { 13677 /* vpgatherqq */, X86::VPGATHERQQZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
32383 { 13677 /* vpgatherqq */, X86::VPGATHERQQZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
32384 { 13677 /* vpgatherqq */, X86::VPGATHERQQZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
32385 { 13688 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32386 { 13688 /* vphaddbd */, X86::VPHADDBDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32387 { 13697 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32388 { 13697 /* vphaddbq */, X86::VPHADDBQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32389 { 13706 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32390 { 13706 /* vphaddbw */, X86::VPHADDBWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32391 { 13715 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32392 { 13715 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32393 { 13715 /* vphaddd */, X86::VPHADDDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32394 { 13715 /* vphaddd */, X86::VPHADDDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32395 { 13723 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32396 { 13723 /* vphadddq */, X86::VPHADDDQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32397 { 13732 /* vphaddsw */, X86::VPHADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32398 { 13732 /* vphaddsw */, X86::VPHADDSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32399 { 13732 /* vphaddsw */, X86::VPHADDSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32400 { 13732 /* vphaddsw */, X86::VPHADDSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32401 { 13741 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32402 { 13741 /* vphaddubd */, X86::VPHADDUBDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32403 { 13751 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32404 { 13751 /* vphaddubq */, X86::VPHADDUBQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32405 { 13761 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32406 { 13761 /* vphaddubw */, X86::VPHADDUBWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32407 { 13771 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32408 { 13771 /* vphaddudq */, X86::VPHADDUDQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32409 { 13781 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32410 { 13781 /* vphadduwd */, X86::VPHADDUWDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32411 { 13791 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32412 { 13791 /* vphadduwq */, X86::VPHADDUWQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32413 { 13801 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32414 { 13801 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32415 { 13801 /* vphaddw */, X86::VPHADDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32416 { 13801 /* vphaddw */, X86::VPHADDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32417 { 13809 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32418 { 13809 /* vphaddwd */, X86::VPHADDWDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32419 { 13818 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32420 { 13818 /* vphaddwq */, X86::VPHADDWQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32421 { 13827 /* vphminposuw */, X86::VPHMINPOSUWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32422 { 13827 /* vphminposuw */, X86::VPHMINPOSUWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32423 { 13839 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32424 { 13839 /* vphsubbw */, X86::VPHSUBBWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32425 { 13848 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32426 { 13848 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32427 { 13848 /* vphsubd */, X86::VPHSUBDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32428 { 13848 /* vphsubd */, X86::VPHSUBDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32429 { 13856 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32430 { 13856 /* vphsubdq */, X86::VPHSUBDQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32431 { 13865 /* vphsubsw */, X86::VPHSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32432 { 13865 /* vphsubsw */, X86::VPHSUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32433 { 13865 /* vphsubsw */, X86::VPHSUBSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32434 { 13865 /* vphsubsw */, X86::VPHSUBSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32435 { 13874 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32436 { 13874 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32437 { 13874 /* vphsubw */, X86::VPHSUBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32438 { 13874 /* vphsubw */, X86::VPHSUBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32439 { 13882 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32440 { 13882 /* vphsubwd */, X86::VPHSUBWDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32441 { 13891 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
32442 { 13891 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem8, MCK_ImmUnsignedi8 }, },
32443 { 13891 /* vpinsrb */, X86::VPINSRBZrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
32444 { 13891 /* vpinsrb */, X86::VPINSRBZrm, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK_ImmUnsignedi8 }, },
32445 { 13899 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
32446 { 13899 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
32447 { 13899 /* vpinsrd */, X86::VPINSRDZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32, MCK_ImmUnsignedi8 }, },
32448 { 13899 /* vpinsrd */, X86::VPINSRDZrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
32449 { 13907 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, },
32450 { 13907 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
32451 { 13907 /* vpinsrq */, X86::VPINSRQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR64, MCK_ImmUnsignedi8 }, },
32452 { 13907 /* vpinsrq */, X86::VPINSRQZrm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
32453 { 13915 /* vpinsrw */, X86::VPINSRWrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
32454 { 13915 /* vpinsrw */, X86::VPINSRWrm, Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem16, MCK_ImmUnsignedi8 }, },
32455 { 13915 /* vpinsrw */, X86::VPINSRWZrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
32456 { 13915 /* vpinsrw */, X86::VPINSRWZrm, Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem16, MCK_ImmUnsignedi8 }, },
32457 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32458 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
32459 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
32460 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
32461 { 13923 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32462 { 13923 /* vplzcntd */, X86::VPLZCNTDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
32463 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32464 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32465 { 13923 /* vplzcntd */, X86::VPLZCNTDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32466 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32467 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32468 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32469 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32470 { 13923 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32471 { 13923 /* vplzcntd */, X86::VPLZCNTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32472 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32473 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32474 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
32475 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32476 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32477 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
32478 { 13923 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32479 { 13923 /* vplzcntd */, X86::VPLZCNTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32480 { 13923 /* vplzcntd */, X86::VPLZCNTDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
32481 { 13923 /* vplzcntd */, X86::VPLZCNTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
32482 { 13923 /* vplzcntd */, X86::VPLZCNTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
32483 { 13923 /* vplzcntd */, X86::VPLZCNTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
32484 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
32485 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
32486 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
32487 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
32488 { 13932 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32489 { 13932 /* vplzcntq */, X86::VPLZCNTQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
32490 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32491 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32492 { 13932 /* vplzcntq */, X86::VPLZCNTQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32493 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32494 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32495 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32496 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32497 { 13932 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32498 { 13932 /* vplzcntq */, X86::VPLZCNTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32499 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32500 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32501 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
32502 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32503 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32504 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
32505 { 13932 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32506 { 13932 /* vplzcntq */, X86::VPLZCNTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32507 { 13932 /* vplzcntq */, X86::VPLZCNTQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
32508 { 13932 /* vplzcntq */, X86::VPLZCNTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
32509 { 13932 /* vplzcntq */, X86::VPLZCNTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
32510 { 13932 /* vplzcntq */, X86::VPLZCNTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
32511 { 13941 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32512 { 13941 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32513 { 13950 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32514 { 13950 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32515 { 13960 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32516 { 13960 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32517 { 13970 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32518 { 13970 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32519 { 13980 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32520 { 13980 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32521 { 13991 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32522 { 13991 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32523 { 14002 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32524 { 14002 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32525 { 14012 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32526 { 14012 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32527 { 14022 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32528 { 14022 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32529 { 14031 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32530 { 14031 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32531 { 14040 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32532 { 14040 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32533 { 14051 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32534 { 14051 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32535 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32536 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32537 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32538 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32539 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32540 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32541 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32542 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32543 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32544 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32545 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32546 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32547 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32548 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32549 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32550 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32551 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32552 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32553 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32554 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32555 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32556 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32557 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32558 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32559 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32560 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32561 { 14061 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32562 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32563 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32564 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32565 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32566 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32567 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32568 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32569 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32570 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32571 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32572 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32573 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32574 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32575 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32576 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32577 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32578 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32579 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32580 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32581 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32582 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32583 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32584 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32585 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32586 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32587 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32588 { 14073 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32589 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32590 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32591 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32592 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32593 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32594 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32595 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32596 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32597 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32598 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32599 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32600 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32601 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32602 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32603 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32604 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32605 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32606 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32607 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32608 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32609 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32610 { 14085 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32611 { 14096 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32612 { 14096 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32613 { 14096 /* vpmaddwd */, X86::VPMADDWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32614 { 14096 /* vpmaddwd */, X86::VPMADDWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32615 { 14096 /* vpmaddwd */, X86::VPMADDWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32616 { 14096 /* vpmaddwd */, X86::VPMADDWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32617 { 14096 /* vpmaddwd */, X86::VPMADDWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32618 { 14096 /* vpmaddwd */, X86::VPMADDWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32619 { 14096 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32620 { 14096 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32621 { 14096 /* vpmaddwd */, X86::VPMADDWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32622 { 14096 /* vpmaddwd */, X86::VPMADDWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32623 { 14096 /* vpmaddwd */, X86::VPMADDWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32624 { 14096 /* vpmaddwd */, X86::VPMADDWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32625 { 14096 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32626 { 14096 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32627 { 14096 /* vpmaddwd */, X86::VPMADDWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32628 { 14096 /* vpmaddwd */, X86::VPMADDWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32629 { 14096 /* vpmaddwd */, X86::VPMADDWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32630 { 14096 /* vpmaddwd */, X86::VPMADDWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32631 { 14096 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32632 { 14096 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32633 { 14105 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32634 { 14105 /* vpmaskmovd */, X86::VPMASKMOVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32635 { 14105 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
32636 { 14105 /* vpmaskmovd */, X86::VPMASKMOVDYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
32637 { 14116 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32638 { 14116 /* vpmaskmovq */, X86::VPMASKMOVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32639 { 14116 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
32640 { 14116 /* vpmaskmovq */, X86::VPMASKMOVQYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
32641 { 14127 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32642 { 14127 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32643 { 14127 /* vpmaxsb */, X86::VPMAXSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32644 { 14127 /* vpmaxsb */, X86::VPMAXSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32645 { 14127 /* vpmaxsb */, X86::VPMAXSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32646 { 14127 /* vpmaxsb */, X86::VPMAXSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32647 { 14127 /* vpmaxsb */, X86::VPMAXSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32648 { 14127 /* vpmaxsb */, X86::VPMAXSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32649 { 14127 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32650 { 14127 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32651 { 14127 /* vpmaxsb */, X86::VPMAXSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32652 { 14127 /* vpmaxsb */, X86::VPMAXSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32653 { 14127 /* vpmaxsb */, X86::VPMAXSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32654 { 14127 /* vpmaxsb */, X86::VPMAXSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32655 { 14127 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32656 { 14127 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32657 { 14127 /* vpmaxsb */, X86::VPMAXSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32658 { 14127 /* vpmaxsb */, X86::VPMAXSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32659 { 14127 /* vpmaxsb */, X86::VPMAXSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32660 { 14127 /* vpmaxsb */, X86::VPMAXSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32661 { 14127 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32662 { 14127 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32663 { 14135 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32664 { 14135 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32665 { 14135 /* vpmaxsd */, X86::VPMAXSDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32666 { 14135 /* vpmaxsd */, X86::VPMAXSDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32667 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32668 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32669 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32670 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32671 { 14135 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32672 { 14135 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32673 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32674 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32675 { 14135 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32676 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32677 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32678 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32679 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32680 { 14135 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32681 { 14135 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32682 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32683 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32684 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32685 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32686 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32687 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32688 { 14135 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32689 { 14135 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32690 { 14135 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32691 { 14135 /* vpmaxsd */, X86::VPMAXSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32692 { 14135 /* vpmaxsd */, X86::VPMAXSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32693 { 14135 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32694 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32695 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32696 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32697 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32698 { 14143 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32699 { 14143 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32700 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32701 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32702 { 14143 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32703 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32704 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32705 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32706 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32707 { 14143 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32708 { 14143 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32709 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32710 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32711 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32712 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32713 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32714 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32715 { 14143 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32716 { 14143 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32717 { 14143 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32718 { 14143 /* vpmaxsq */, X86::VPMAXSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32719 { 14143 /* vpmaxsq */, X86::VPMAXSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32720 { 14143 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32721 { 14151 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32722 { 14151 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32723 { 14151 /* vpmaxsw */, X86::VPMAXSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32724 { 14151 /* vpmaxsw */, X86::VPMAXSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32725 { 14151 /* vpmaxsw */, X86::VPMAXSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32726 { 14151 /* vpmaxsw */, X86::VPMAXSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32727 { 14151 /* vpmaxsw */, X86::VPMAXSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32728 { 14151 /* vpmaxsw */, X86::VPMAXSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32729 { 14151 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32730 { 14151 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32731 { 14151 /* vpmaxsw */, X86::VPMAXSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32732 { 14151 /* vpmaxsw */, X86::VPMAXSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32733 { 14151 /* vpmaxsw */, X86::VPMAXSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32734 { 14151 /* vpmaxsw */, X86::VPMAXSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32735 { 14151 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32736 { 14151 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32737 { 14151 /* vpmaxsw */, X86::VPMAXSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32738 { 14151 /* vpmaxsw */, X86::VPMAXSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32739 { 14151 /* vpmaxsw */, X86::VPMAXSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32740 { 14151 /* vpmaxsw */, X86::VPMAXSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32741 { 14151 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32742 { 14151 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32743 { 14159 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32744 { 14159 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32745 { 14159 /* vpmaxub */, X86::VPMAXUBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32746 { 14159 /* vpmaxub */, X86::VPMAXUBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32747 { 14159 /* vpmaxub */, X86::VPMAXUBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32748 { 14159 /* vpmaxub */, X86::VPMAXUBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32749 { 14159 /* vpmaxub */, X86::VPMAXUBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32750 { 14159 /* vpmaxub */, X86::VPMAXUBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32751 { 14159 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32752 { 14159 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32753 { 14159 /* vpmaxub */, X86::VPMAXUBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32754 { 14159 /* vpmaxub */, X86::VPMAXUBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32755 { 14159 /* vpmaxub */, X86::VPMAXUBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32756 { 14159 /* vpmaxub */, X86::VPMAXUBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32757 { 14159 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32758 { 14159 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32759 { 14159 /* vpmaxub */, X86::VPMAXUBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32760 { 14159 /* vpmaxub */, X86::VPMAXUBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32761 { 14159 /* vpmaxub */, X86::VPMAXUBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32762 { 14159 /* vpmaxub */, X86::VPMAXUBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32763 { 14159 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32764 { 14159 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32765 { 14167 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32766 { 14167 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32767 { 14167 /* vpmaxud */, X86::VPMAXUDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32768 { 14167 /* vpmaxud */, X86::VPMAXUDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32769 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32770 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32771 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32772 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32773 { 14167 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32774 { 14167 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32775 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32776 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32777 { 14167 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32778 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32779 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32780 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32781 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32782 { 14167 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32783 { 14167 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32784 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32785 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32786 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32787 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32788 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32789 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32790 { 14167 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32791 { 14167 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32792 { 14167 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32793 { 14167 /* vpmaxud */, X86::VPMAXUDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32794 { 14167 /* vpmaxud */, X86::VPMAXUDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32795 { 14167 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32796 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32797 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32798 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32799 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32800 { 14175 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32801 { 14175 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32802 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32803 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32804 { 14175 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32805 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32806 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32807 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32808 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32809 { 14175 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32810 { 14175 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32811 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32812 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32813 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32814 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32815 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32816 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32817 { 14175 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32818 { 14175 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32819 { 14175 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32820 { 14175 /* vpmaxuq */, X86::VPMAXUQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32821 { 14175 /* vpmaxuq */, X86::VPMAXUQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32822 { 14175 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32823 { 14183 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32824 { 14183 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32825 { 14183 /* vpmaxuw */, X86::VPMAXUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32826 { 14183 /* vpmaxuw */, X86::VPMAXUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32827 { 14183 /* vpmaxuw */, X86::VPMAXUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32828 { 14183 /* vpmaxuw */, X86::VPMAXUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32829 { 14183 /* vpmaxuw */, X86::VPMAXUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32830 { 14183 /* vpmaxuw */, X86::VPMAXUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32831 { 14183 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32832 { 14183 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32833 { 14183 /* vpmaxuw */, X86::VPMAXUWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32834 { 14183 /* vpmaxuw */, X86::VPMAXUWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32835 { 14183 /* vpmaxuw */, X86::VPMAXUWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32836 { 14183 /* vpmaxuw */, X86::VPMAXUWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32837 { 14183 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32838 { 14183 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32839 { 14183 /* vpmaxuw */, X86::VPMAXUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32840 { 14183 /* vpmaxuw */, X86::VPMAXUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32841 { 14183 /* vpmaxuw */, X86::VPMAXUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32842 { 14183 /* vpmaxuw */, X86::VPMAXUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32843 { 14183 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32844 { 14183 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32845 { 14191 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32846 { 14191 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32847 { 14191 /* vpminsb */, X86::VPMINSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32848 { 14191 /* vpminsb */, X86::VPMINSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32849 { 14191 /* vpminsb */, X86::VPMINSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32850 { 14191 /* vpminsb */, X86::VPMINSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32851 { 14191 /* vpminsb */, X86::VPMINSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32852 { 14191 /* vpminsb */, X86::VPMINSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32853 { 14191 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32854 { 14191 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32855 { 14191 /* vpminsb */, X86::VPMINSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32856 { 14191 /* vpminsb */, X86::VPMINSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32857 { 14191 /* vpminsb */, X86::VPMINSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32858 { 14191 /* vpminsb */, X86::VPMINSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32859 { 14191 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32860 { 14191 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32861 { 14191 /* vpminsb */, X86::VPMINSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32862 { 14191 /* vpminsb */, X86::VPMINSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32863 { 14191 /* vpminsb */, X86::VPMINSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32864 { 14191 /* vpminsb */, X86::VPMINSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32865 { 14191 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32866 { 14191 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32867 { 14199 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32868 { 14199 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32869 { 14199 /* vpminsd */, X86::VPMINSDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32870 { 14199 /* vpminsd */, X86::VPMINSDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32871 { 14199 /* vpminsd */, X86::VPMINSDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32872 { 14199 /* vpminsd */, X86::VPMINSDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32873 { 14199 /* vpminsd */, X86::VPMINSDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32874 { 14199 /* vpminsd */, X86::VPMINSDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32875 { 14199 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32876 { 14199 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32877 { 14199 /* vpminsd */, X86::VPMINSDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32878 { 14199 /* vpminsd */, X86::VPMINSDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32879 { 14199 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32880 { 14199 /* vpminsd */, X86::VPMINSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32881 { 14199 /* vpminsd */, X86::VPMINSDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32882 { 14199 /* vpminsd */, X86::VPMINSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32883 { 14199 /* vpminsd */, X86::VPMINSDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32884 { 14199 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32885 { 14199 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32886 { 14199 /* vpminsd */, X86::VPMINSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32887 { 14199 /* vpminsd */, X86::VPMINSDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32888 { 14199 /* vpminsd */, X86::VPMINSDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32889 { 14199 /* vpminsd */, X86::VPMINSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32890 { 14199 /* vpminsd */, X86::VPMINSDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32891 { 14199 /* vpminsd */, X86::VPMINSDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32892 { 14199 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32893 { 14199 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32894 { 14199 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32895 { 14199 /* vpminsd */, X86::VPMINSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32896 { 14199 /* vpminsd */, X86::VPMINSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32897 { 14199 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32898 { 14207 /* vpminsq */, X86::VPMINSQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32899 { 14207 /* vpminsq */, X86::VPMINSQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32900 { 14207 /* vpminsq */, X86::VPMINSQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32901 { 14207 /* vpminsq */, X86::VPMINSQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32902 { 14207 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32903 { 14207 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32904 { 14207 /* vpminsq */, X86::VPMINSQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32905 { 14207 /* vpminsq */, X86::VPMINSQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32906 { 14207 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32907 { 14207 /* vpminsq */, X86::VPMINSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32908 { 14207 /* vpminsq */, X86::VPMINSQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32909 { 14207 /* vpminsq */, X86::VPMINSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32910 { 14207 /* vpminsq */, X86::VPMINSQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32911 { 14207 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32912 { 14207 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32913 { 14207 /* vpminsq */, X86::VPMINSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32914 { 14207 /* vpminsq */, X86::VPMINSQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32915 { 14207 /* vpminsq */, X86::VPMINSQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32916 { 14207 /* vpminsq */, X86::VPMINSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32917 { 14207 /* vpminsq */, X86::VPMINSQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32918 { 14207 /* vpminsq */, X86::VPMINSQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32919 { 14207 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32920 { 14207 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32921 { 14207 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32922 { 14207 /* vpminsq */, X86::VPMINSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32923 { 14207 /* vpminsq */, X86::VPMINSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32924 { 14207 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32925 { 14215 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32926 { 14215 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32927 { 14215 /* vpminsw */, X86::VPMINSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32928 { 14215 /* vpminsw */, X86::VPMINSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32929 { 14215 /* vpminsw */, X86::VPMINSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32930 { 14215 /* vpminsw */, X86::VPMINSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32931 { 14215 /* vpminsw */, X86::VPMINSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32932 { 14215 /* vpminsw */, X86::VPMINSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32933 { 14215 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32934 { 14215 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32935 { 14215 /* vpminsw */, X86::VPMINSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32936 { 14215 /* vpminsw */, X86::VPMINSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32937 { 14215 /* vpminsw */, X86::VPMINSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32938 { 14215 /* vpminsw */, X86::VPMINSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32939 { 14215 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32940 { 14215 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32941 { 14215 /* vpminsw */, X86::VPMINSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32942 { 14215 /* vpminsw */, X86::VPMINSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32943 { 14215 /* vpminsw */, X86::VPMINSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32944 { 14215 /* vpminsw */, X86::VPMINSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32945 { 14215 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32946 { 14215 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32947 { 14223 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32948 { 14223 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32949 { 14223 /* vpminub */, X86::VPMINUBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32950 { 14223 /* vpminub */, X86::VPMINUBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32951 { 14223 /* vpminub */, X86::VPMINUBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32952 { 14223 /* vpminub */, X86::VPMINUBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32953 { 14223 /* vpminub */, X86::VPMINUBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32954 { 14223 /* vpminub */, X86::VPMINUBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32955 { 14223 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32956 { 14223 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32957 { 14223 /* vpminub */, X86::VPMINUBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32958 { 14223 /* vpminub */, X86::VPMINUBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32959 { 14223 /* vpminub */, X86::VPMINUBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32960 { 14223 /* vpminub */, X86::VPMINUBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32961 { 14223 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32962 { 14223 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32963 { 14223 /* vpminub */, X86::VPMINUBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32964 { 14223 /* vpminub */, X86::VPMINUBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32965 { 14223 /* vpminub */, X86::VPMINUBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32966 { 14223 /* vpminub */, X86::VPMINUBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32967 { 14223 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32968 { 14223 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32969 { 14231 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32970 { 14231 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32971 { 14231 /* vpminud */, X86::VPMINUDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32972 { 14231 /* vpminud */, X86::VPMINUDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32973 { 14231 /* vpminud */, X86::VPMINUDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32974 { 14231 /* vpminud */, X86::VPMINUDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32975 { 14231 /* vpminud */, X86::VPMINUDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32976 { 14231 /* vpminud */, X86::VPMINUDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32977 { 14231 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32978 { 14231 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32979 { 14231 /* vpminud */, X86::VPMINUDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32980 { 14231 /* vpminud */, X86::VPMINUDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32981 { 14231 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32982 { 14231 /* vpminud */, X86::VPMINUDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32983 { 14231 /* vpminud */, X86::VPMINUDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32984 { 14231 /* vpminud */, X86::VPMINUDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32985 { 14231 /* vpminud */, X86::VPMINUDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32986 { 14231 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32987 { 14231 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32988 { 14231 /* vpminud */, X86::VPMINUDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32989 { 14231 /* vpminud */, X86::VPMINUDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32990 { 14231 /* vpminud */, X86::VPMINUDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32991 { 14231 /* vpminud */, X86::VPMINUDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32992 { 14231 /* vpminud */, X86::VPMINUDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32993 { 14231 /* vpminud */, X86::VPMINUDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32994 { 14231 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32995 { 14231 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32996 { 14231 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32997 { 14231 /* vpminud */, X86::VPMINUDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32998 { 14231 /* vpminud */, X86::VPMINUDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32999 { 14231 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33000 { 14239 /* vpminuq */, X86::VPMINUQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33001 { 14239 /* vpminuq */, X86::VPMINUQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33002 { 14239 /* vpminuq */, X86::VPMINUQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33003 { 14239 /* vpminuq */, X86::VPMINUQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33004 { 14239 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33005 { 14239 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33006 { 14239 /* vpminuq */, X86::VPMINUQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33007 { 14239 /* vpminuq */, X86::VPMINUQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33008 { 14239 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33009 { 14239 /* vpminuq */, X86::VPMINUQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33010 { 14239 /* vpminuq */, X86::VPMINUQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33011 { 14239 /* vpminuq */, X86::VPMINUQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33012 { 14239 /* vpminuq */, X86::VPMINUQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33013 { 14239 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33014 { 14239 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33015 { 14239 /* vpminuq */, X86::VPMINUQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33016 { 14239 /* vpminuq */, X86::VPMINUQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33017 { 14239 /* vpminuq */, X86::VPMINUQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33018 { 14239 /* vpminuq */, X86::VPMINUQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33019 { 14239 /* vpminuq */, X86::VPMINUQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33020 { 14239 /* vpminuq */, X86::VPMINUQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33021 { 14239 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33022 { 14239 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33023 { 14239 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33024 { 14239 /* vpminuq */, X86::VPMINUQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33025 { 14239 /* vpminuq */, X86::VPMINUQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33026 { 14239 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33027 { 14247 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33028 { 14247 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33029 { 14247 /* vpminuw */, X86::VPMINUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33030 { 14247 /* vpminuw */, X86::VPMINUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33031 { 14247 /* vpminuw */, X86::VPMINUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33032 { 14247 /* vpminuw */, X86::VPMINUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33033 { 14247 /* vpminuw */, X86::VPMINUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33034 { 14247 /* vpminuw */, X86::VPMINUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33035 { 14247 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33036 { 14247 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33037 { 14247 /* vpminuw */, X86::VPMINUWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33038 { 14247 /* vpminuw */, X86::VPMINUWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33039 { 14247 /* vpminuw */, X86::VPMINUWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33040 { 14247 /* vpminuw */, X86::VPMINUWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33041 { 14247 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33042 { 14247 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33043 { 14247 /* vpminuw */, X86::VPMINUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33044 { 14247 /* vpminuw */, X86::VPMINUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33045 { 14247 /* vpminuw */, X86::VPMINUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33046 { 14247 /* vpminuw */, X86::VPMINUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33047 { 14247 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33048 { 14247 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33049 { 14255 /* vpmovb2m */, X86::VPMOVB2MZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_FR32X }, },
33050 { 14255 /* vpmovb2m */, X86::VPMOVB2MZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR256X }, },
33051 { 14255 /* vpmovb2m */, X86::VPMOVB2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
33052 { 14264 /* vpmovd2m */, X86::VPMOVD2MZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_FR32X }, },
33053 { 14264 /* vpmovd2m */, X86::VPMOVD2MZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR256X }, },
33054 { 14264 /* vpmovd2m */, X86::VPMOVD2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
33055 { 14273 /* vpmovdb */, X86::VPMOVDBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33056 { 14273 /* vpmovdb */, X86::VPMOVDBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33057 { 14273 /* vpmovdb */, X86::VPMOVDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
33058 { 14273 /* vpmovdb */, X86::VPMOVDBZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
33059 { 14273 /* vpmovdb */, X86::VPMOVDBZ128mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
33060 { 14273 /* vpmovdb */, X86::VPMOVDBZ256mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR256X }, },
33061 { 14273 /* vpmovdb */, X86::VPMOVDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33062 { 14273 /* vpmovdb */, X86::VPMOVDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33063 { 14273 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33064 { 14273 /* vpmovdb */, X86::VPMOVDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33065 { 14273 /* vpmovdb */, X86::VPMOVDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33066 { 14273 /* vpmovdb */, X86::VPMOVDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33067 { 14273 /* vpmovdb */, X86::VPMOVDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33068 { 14273 /* vpmovdb */, X86::VPMOVDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33069 { 14273 /* vpmovdb */, X86::VPMOVDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33070 { 14281 /* vpmovdw */, X86::VPMOVDWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33071 { 14281 /* vpmovdw */, X86::VPMOVDWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33072 { 14281 /* vpmovdw */, X86::VPMOVDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33073 { 14281 /* vpmovdw */, X86::VPMOVDWZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
33074 { 14281 /* vpmovdw */, X86::VPMOVDWZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
33075 { 14281 /* vpmovdw */, X86::VPMOVDWZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
33076 { 14281 /* vpmovdw */, X86::VPMOVDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33077 { 14281 /* vpmovdw */, X86::VPMOVDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33078 { 14281 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33079 { 14281 /* vpmovdw */, X86::VPMOVDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33080 { 14281 /* vpmovdw */, X86::VPMOVDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33081 { 14281 /* vpmovdw */, X86::VPMOVDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33082 { 14281 /* vpmovdw */, X86::VPMOVDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33083 { 14281 /* vpmovdw */, X86::VPMOVDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33084 { 14281 /* vpmovdw */, X86::VPMOVDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33085 { 14289 /* vpmovm2b */, X86::VPMOVM2BZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
33086 { 14289 /* vpmovm2b */, X86::VPMOVM2BZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
33087 { 14289 /* vpmovm2b */, X86::VPMOVM2BZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
33088 { 14298 /* vpmovm2d */, X86::VPMOVM2DZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
33089 { 14298 /* vpmovm2d */, X86::VPMOVM2DZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
33090 { 14298 /* vpmovm2d */, X86::VPMOVM2DZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
33091 { 14307 /* vpmovm2q */, X86::VPMOVM2QZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
33092 { 14307 /* vpmovm2q */, X86::VPMOVM2QZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
33093 { 14307 /* vpmovm2q */, X86::VPMOVM2QZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
33094 { 14316 /* vpmovm2w */, X86::VPMOVM2WZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VK1 }, },
33095 { 14316 /* vpmovm2w */, X86::VPMOVM2WZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VK1 }, },
33096 { 14316 /* vpmovm2w */, X86::VPMOVM2WZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
33097 { 14325 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
33098 { 14325 /* vpmovmskb */, X86::VPMOVMSKBYrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_VR256 }, },
33099 { 14335 /* vpmovq2m */, X86::VPMOVQ2MZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_FR32X }, },
33100 { 14335 /* vpmovq2m */, X86::VPMOVQ2MZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR256X }, },
33101 { 14335 /* vpmovq2m */, X86::VPMOVQ2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
33102 { 14344 /* vpmovqb */, X86::VPMOVQBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33103 { 14344 /* vpmovqb */, X86::VPMOVQBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33104 { 14344 /* vpmovqb */, X86::VPMOVQBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
33105 { 14344 /* vpmovqb */, X86::VPMOVQBZ128mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_FR32X }, },
33106 { 14344 /* vpmovqb */, X86::VPMOVQBZ256mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_VR256X }, },
33107 { 14344 /* vpmovqb */, X86::VPMOVQBZmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
33108 { 14344 /* vpmovqb */, X86::VPMOVQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33109 { 14344 /* vpmovqb */, X86::VPMOVQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33110 { 14344 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33111 { 14344 /* vpmovqb */, X86::VPMOVQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33112 { 14344 /* vpmovqb */, X86::VPMOVQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33113 { 14344 /* vpmovqb */, X86::VPMOVQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33114 { 14344 /* vpmovqb */, X86::VPMOVQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33115 { 14344 /* vpmovqb */, X86::VPMOVQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33116 { 14344 /* vpmovqb */, X86::VPMOVQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33117 { 14352 /* vpmovqd */, X86::VPMOVQDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33118 { 14352 /* vpmovqd */, X86::VPMOVQDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33119 { 14352 /* vpmovqd */, X86::VPMOVQDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33120 { 14352 /* vpmovqd */, X86::VPMOVQDZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
33121 { 14352 /* vpmovqd */, X86::VPMOVQDZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
33122 { 14352 /* vpmovqd */, X86::VPMOVQDZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
33123 { 14352 /* vpmovqd */, X86::VPMOVQDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33124 { 14352 /* vpmovqd */, X86::VPMOVQDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33125 { 14352 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33126 { 14352 /* vpmovqd */, X86::VPMOVQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33127 { 14352 /* vpmovqd */, X86::VPMOVQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33128 { 14352 /* vpmovqd */, X86::VPMOVQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33129 { 14352 /* vpmovqd */, X86::VPMOVQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33130 { 14352 /* vpmovqd */, X86::VPMOVQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33131 { 14352 /* vpmovqd */, X86::VPMOVQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33132 { 14360 /* vpmovqw */, X86::VPMOVQWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33133 { 14360 /* vpmovqw */, X86::VPMOVQWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33134 { 14360 /* vpmovqw */, X86::VPMOVQWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
33135 { 14360 /* vpmovqw */, X86::VPMOVQWZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
33136 { 14360 /* vpmovqw */, X86::VPMOVQWZ128mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
33137 { 14360 /* vpmovqw */, X86::VPMOVQWZ256mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR256X }, },
33138 { 14360 /* vpmovqw */, X86::VPMOVQWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33139 { 14360 /* vpmovqw */, X86::VPMOVQWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33140 { 14360 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33141 { 14360 /* vpmovqw */, X86::VPMOVQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33142 { 14360 /* vpmovqw */, X86::VPMOVQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33143 { 14360 /* vpmovqw */, X86::VPMOVQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33144 { 14360 /* vpmovqw */, X86::VPMOVQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33145 { 14360 /* vpmovqw */, X86::VPMOVQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33146 { 14360 /* vpmovqw */, X86::VPMOVQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33147 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33148 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33149 { 14368 /* vpmovsdb */, X86::VPMOVSDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
33150 { 14368 /* vpmovsdb */, X86::VPMOVSDBZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
33151 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ128mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
33152 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ256mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR256X }, },
33153 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33154 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33155 { 14368 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33156 { 14368 /* vpmovsdb */, X86::VPMOVSDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33157 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33158 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33159 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33160 { 14368 /* vpmovsdb */, X86::VPMOVSDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33161 { 14368 /* vpmovsdb */, X86::VPMOVSDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33162 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33163 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33164 { 14377 /* vpmovsdw */, X86::VPMOVSDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33165 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
33166 { 14377 /* vpmovsdw */, X86::VPMOVSDWZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
33167 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
33168 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33169 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33170 { 14377 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33171 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33172 { 14377 /* vpmovsdw */, X86::VPMOVSDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33173 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33174 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33175 { 14377 /* vpmovsdw */, X86::VPMOVSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33176 { 14377 /* vpmovsdw */, X86::VPMOVSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33177 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33178 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33179 { 14386 /* vpmovsqb */, X86::VPMOVSQBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
33180 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ128mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_FR32X }, },
33181 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ256mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_VR256X }, },
33182 { 14386 /* vpmovsqb */, X86::VPMOVSQBZmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
33183 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33184 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33185 { 14386 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33186 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33187 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33188 { 14386 /* vpmovsqb */, X86::VPMOVSQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33189 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33190 { 14386 /* vpmovsqb */, X86::VPMOVSQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33191 { 14386 /* vpmovsqb */, X86::VPMOVSQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33192 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33193 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33194 { 14395 /* vpmovsqd */, X86::VPMOVSQDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33195 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
33196 { 14395 /* vpmovsqd */, X86::VPMOVSQDZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
33197 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
33198 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33199 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33200 { 14395 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33201 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33202 { 14395 /* vpmovsqd */, X86::VPMOVSQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33203 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33204 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33205 { 14395 /* vpmovsqd */, X86::VPMOVSQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33206 { 14395 /* vpmovsqd */, X86::VPMOVSQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33207 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33208 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33209 { 14404 /* vpmovsqw */, X86::VPMOVSQWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
33210 { 14404 /* vpmovsqw */, X86::VPMOVSQWZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
33211 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ128mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
33212 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ256mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR256X }, },
33213 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33214 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33215 { 14404 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33216 { 14404 /* vpmovsqw */, X86::VPMOVSQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33217 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33218 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33219 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33220 { 14404 /* vpmovsqw */, X86::VPMOVSQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33221 { 14404 /* vpmovsqw */, X86::VPMOVSQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33222 { 14413 /* vpmovswb */, X86::VPMOVSWBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33223 { 14413 /* vpmovswb */, X86::VPMOVSWBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33224 { 14413 /* vpmovswb */, X86::VPMOVSWBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33225 { 14413 /* vpmovswb */, X86::VPMOVSWBZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
33226 { 14413 /* vpmovswb */, X86::VPMOVSWBZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
33227 { 14413 /* vpmovswb */, X86::VPMOVSWBZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
33228 { 14413 /* vpmovswb */, X86::VPMOVSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33229 { 14413 /* vpmovswb */, X86::VPMOVSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33230 { 14413 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33231 { 14413 /* vpmovswb */, X86::VPMOVSWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33232 { 14413 /* vpmovswb */, X86::VPMOVSWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33233 { 14413 /* vpmovswb */, X86::VPMOVSWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33234 { 14413 /* vpmovswb */, X86::VPMOVSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33235 { 14413 /* vpmovswb */, X86::VPMOVSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33236 { 14413 /* vpmovswb */, X86::VPMOVSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33237 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33238 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
33239 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33240 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDYrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256, MCK_Mem64 }, },
33241 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33242 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ128rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
33243 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33244 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ256rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, },
33245 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
33246 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
33247 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33248 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
33249 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33250 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
33251 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33252 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33253 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33254 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
33255 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33256 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
33257 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33258 { 14422 /* vpmovsxbd */, X86::VPMOVSXBDZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33259 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33260 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32, MCK_Mem16 }, },
33261 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33262 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQYrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256, MCK_Mem32 }, },
33263 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33264 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ128rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32X, MCK_Mem16 }, },
33265 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33266 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ256rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32 }, },
33267 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
33268 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
33269 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33270 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
33271 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33272 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
33273 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33274 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
33275 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33276 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem165_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
33277 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33278 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
33279 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33280 { 14432 /* vpmovsxbq */, X86::VPMOVSXBQZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
33281 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33282 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
33283 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33284 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, },
33285 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33286 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
33287 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33288 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
33289 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33290 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
33291 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33292 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
33293 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33294 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33295 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33296 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33297 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33298 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
33299 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33300 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33301 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33302 { 14442 /* vpmovsxbw */, X86::VPMOVSXBWZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33303 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33304 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
33305 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33306 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, },
33307 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33308 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
33309 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33310 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
33311 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33312 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
33313 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33314 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
33315 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33316 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33317 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33318 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33319 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33320 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
33321 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33322 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33323 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33324 { 14452 /* vpmovsxdq */, X86::VPMOVSXDQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33325 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33326 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
33327 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33328 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, },
33329 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33330 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
33331 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33332 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
33333 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33334 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
33335 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33336 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
33337 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33338 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33339 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33340 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33341 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33342 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
33343 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33344 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33345 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33346 { 14462 /* vpmovsxwd */, X86::VPMOVSXWDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33347 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33348 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
33349 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33350 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQYrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256, MCK_Mem64 }, },
33351 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33352 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ128rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
33353 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33354 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ256rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, },
33355 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
33356 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
33357 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33358 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
33359 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33360 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
33361 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33362 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33363 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33364 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
33365 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33366 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
33367 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33368 { 14472 /* vpmovsxwq */, X86::VPMOVSXWQZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33369 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33370 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33371 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
33372 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
33373 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ128mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
33374 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ256mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR256X }, },
33375 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33376 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33377 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33378 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33379 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33380 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33381 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33382 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33383 { 14482 /* vpmovusdb */, X86::VPMOVUSDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33384 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33385 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33386 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33387 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
33388 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
33389 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
33390 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33391 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33392 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33393 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33394 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33395 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33396 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33397 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33398 { 14492 /* vpmovusdw */, X86::VPMOVUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33399 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33400 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33401 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
33402 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ128mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_FR32X }, },
33403 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ256mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_VR256X }, },
33404 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
33405 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33406 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33407 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33408 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33409 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33410 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33411 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33412 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33413 { 14502 /* vpmovusqb */, X86::VPMOVUSQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33414 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33415 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33416 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33417 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
33418 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
33419 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
33420 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33421 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33422 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33423 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33424 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33425 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33426 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33427 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33428 { 14512 /* vpmovusqd */, X86::VPMOVUSQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33429 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33430 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33431 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
33432 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
33433 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ128mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32X }, },
33434 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ256mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR256X }, },
33435 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33436 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33437 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33438 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33439 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33440 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33441 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33442 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33443 { 14522 /* vpmovusqw */, X86::VPMOVUSQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33444 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33445 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33446 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33447 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
33448 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
33449 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
33450 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33451 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33452 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33453 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33454 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33455 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33456 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33457 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33458 { 14532 /* vpmovuswb */, X86::VPMOVUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33459 { 14542 /* vpmovw2m */, X86::VPMOVW2MZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_FR32X }, },
33460 { 14542 /* vpmovw2m */, X86::VPMOVW2MZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR256X }, },
33461 { 14542 /* vpmovw2m */, X86::VPMOVW2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
33462 { 14551 /* vpmovwb */, X86::VPMOVWBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33463 { 14551 /* vpmovwb */, X86::VPMOVWBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR256X }, },
33464 { 14551 /* vpmovwb */, X86::VPMOVWBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33465 { 14551 /* vpmovwb */, X86::VPMOVWBZ256mr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR256X }, },
33466 { 14551 /* vpmovwb */, X86::VPMOVWBZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
33467 { 14551 /* vpmovwb */, X86::VPMOVWBZ128mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32X }, },
33468 { 14551 /* vpmovwb */, X86::VPMOVWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33469 { 14551 /* vpmovwb */, X86::VPMOVWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33470 { 14551 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33471 { 14551 /* vpmovwb */, X86::VPMOVWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33472 { 14551 /* vpmovwb */, X86::VPMOVWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33473 { 14551 /* vpmovwb */, X86::VPMOVWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33474 { 14551 /* vpmovwb */, X86::VPMOVWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33475 { 14551 /* vpmovwb */, X86::VPMOVWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33476 { 14551 /* vpmovwb */, X86::VPMOVWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33477 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33478 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
33479 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33480 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDYrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256, MCK_Mem64 }, },
33481 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33482 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ128rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
33483 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33484 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ256rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, },
33485 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
33486 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
33487 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33488 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
33489 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33490 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
33491 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33492 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33493 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33494 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
33495 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33496 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
33497 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33498 { 14559 /* vpmovzxbd */, X86::VPMOVZXBDZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33499 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33500 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32, MCK_Mem16 }, },
33501 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33502 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQYrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256, MCK_Mem32 }, },
33503 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33504 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ128rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32X, MCK_Mem16 }, },
33505 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33506 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ256rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32 }, },
33507 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
33508 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
33509 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33510 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
33511 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33512 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
33513 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33514 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
33515 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33516 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem165_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
33517 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33518 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
33519 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33520 { 14569 /* vpmovzxbq */, X86::VPMOVZXBQZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
33521 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33522 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
33523 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33524 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, },
33525 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33526 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
33527 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33528 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
33529 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33530 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
33531 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33532 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
33533 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33534 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33535 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33536 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33537 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33538 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
33539 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33540 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33541 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33542 { 14579 /* vpmovzxbw */, X86::VPMOVZXBWZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33543 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33544 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
33545 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33546 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, },
33547 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33548 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
33549 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33550 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
33551 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33552 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
33553 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33554 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
33555 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33556 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33557 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33558 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33559 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33560 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
33561 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33562 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33563 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33564 { 14589 /* vpmovzxdq */, X86::VPMOVZXDQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33565 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33566 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
33567 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33568 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDYrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256, MCK_Mem128 }, },
33569 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33570 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ128rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
33571 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33572 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ256rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR256X, MCK_Mem128 }, },
33573 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33574 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
33575 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33576 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
33577 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33578 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33579 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33580 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33581 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33582 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
33583 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33584 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33585 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33586 { 14599 /* vpmovzxwd */, X86::VPMOVZXWDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33587 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33588 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
33589 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33590 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQYrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256, MCK_Mem64 }, },
33591 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33592 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ128rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
33593 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_FR32X }, },
33594 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ256rm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64 }, },
33595 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
33596 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
33597 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33598 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
33599 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33600 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
33601 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33602 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33603 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33604 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
33605 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33606 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
33607 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33608 { 14609 /* vpmovzxwq */, X86::VPMOVZXWQZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33609 { 14619 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33610 { 14619 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33611 { 14619 /* vpmuldq */, X86::VPMULDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33612 { 14619 /* vpmuldq */, X86::VPMULDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33613 { 14619 /* vpmuldq */, X86::VPMULDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33614 { 14619 /* vpmuldq */, X86::VPMULDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33615 { 14619 /* vpmuldq */, X86::VPMULDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33616 { 14619 /* vpmuldq */, X86::VPMULDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33617 { 14619 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33618 { 14619 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33619 { 14619 /* vpmuldq */, X86::VPMULDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33620 { 14619 /* vpmuldq */, X86::VPMULDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33621 { 14619 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33622 { 14619 /* vpmuldq */, X86::VPMULDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33623 { 14619 /* vpmuldq */, X86::VPMULDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33624 { 14619 /* vpmuldq */, X86::VPMULDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33625 { 14619 /* vpmuldq */, X86::VPMULDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33626 { 14619 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33627 { 14619 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33628 { 14619 /* vpmuldq */, X86::VPMULDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33629 { 14619 /* vpmuldq */, X86::VPMULDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33630 { 14619 /* vpmuldq */, X86::VPMULDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33631 { 14619 /* vpmuldq */, X86::VPMULDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33632 { 14619 /* vpmuldq */, X86::VPMULDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33633 { 14619 /* vpmuldq */, X86::VPMULDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33634 { 14619 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33635 { 14619 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33636 { 14619 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33637 { 14619 /* vpmuldq */, X86::VPMULDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33638 { 14619 /* vpmuldq */, X86::VPMULDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33639 { 14619 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33640 { 14627 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33641 { 14627 /* vpmulhrsw */, X86::VPMULHRSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33642 { 14627 /* vpmulhrsw */, X86::VPMULHRSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33643 { 14627 /* vpmulhrsw */, X86::VPMULHRSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33644 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33645 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33646 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33647 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33648 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33649 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33650 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33651 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33652 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33653 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33654 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33655 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33656 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33657 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33658 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33659 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33660 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33661 { 14627 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33662 { 14637 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33663 { 14637 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33664 { 14637 /* vpmulhuw */, X86::VPMULHUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33665 { 14637 /* vpmulhuw */, X86::VPMULHUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33666 { 14637 /* vpmulhuw */, X86::VPMULHUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33667 { 14637 /* vpmulhuw */, X86::VPMULHUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33668 { 14637 /* vpmulhuw */, X86::VPMULHUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33669 { 14637 /* vpmulhuw */, X86::VPMULHUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33670 { 14637 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33671 { 14637 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33672 { 14637 /* vpmulhuw */, X86::VPMULHUWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33673 { 14637 /* vpmulhuw */, X86::VPMULHUWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33674 { 14637 /* vpmulhuw */, X86::VPMULHUWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33675 { 14637 /* vpmulhuw */, X86::VPMULHUWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33676 { 14637 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33677 { 14637 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33678 { 14637 /* vpmulhuw */, X86::VPMULHUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33679 { 14637 /* vpmulhuw */, X86::VPMULHUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33680 { 14637 /* vpmulhuw */, X86::VPMULHUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33681 { 14637 /* vpmulhuw */, X86::VPMULHUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33682 { 14637 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33683 { 14637 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33684 { 14646 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33685 { 14646 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33686 { 14646 /* vpmulhw */, X86::VPMULHWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33687 { 14646 /* vpmulhw */, X86::VPMULHWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33688 { 14646 /* vpmulhw */, X86::VPMULHWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33689 { 14646 /* vpmulhw */, X86::VPMULHWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33690 { 14646 /* vpmulhw */, X86::VPMULHWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33691 { 14646 /* vpmulhw */, X86::VPMULHWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33692 { 14646 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33693 { 14646 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33694 { 14646 /* vpmulhw */, X86::VPMULHWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33695 { 14646 /* vpmulhw */, X86::VPMULHWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33696 { 14646 /* vpmulhw */, X86::VPMULHWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33697 { 14646 /* vpmulhw */, X86::VPMULHWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33698 { 14646 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33699 { 14646 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33700 { 14646 /* vpmulhw */, X86::VPMULHWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33701 { 14646 /* vpmulhw */, X86::VPMULHWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33702 { 14646 /* vpmulhw */, X86::VPMULHWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33703 { 14646 /* vpmulhw */, X86::VPMULHWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33704 { 14646 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33705 { 14646 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33706 { 14654 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33707 { 14654 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33708 { 14654 /* vpmulld */, X86::VPMULLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33709 { 14654 /* vpmulld */, X86::VPMULLDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33710 { 14654 /* vpmulld */, X86::VPMULLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33711 { 14654 /* vpmulld */, X86::VPMULLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33712 { 14654 /* vpmulld */, X86::VPMULLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33713 { 14654 /* vpmulld */, X86::VPMULLDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33714 { 14654 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33715 { 14654 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33716 { 14654 /* vpmulld */, X86::VPMULLDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33717 { 14654 /* vpmulld */, X86::VPMULLDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33718 { 14654 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33719 { 14654 /* vpmulld */, X86::VPMULLDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33720 { 14654 /* vpmulld */, X86::VPMULLDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33721 { 14654 /* vpmulld */, X86::VPMULLDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33722 { 14654 /* vpmulld */, X86::VPMULLDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33723 { 14654 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33724 { 14654 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33725 { 14654 /* vpmulld */, X86::VPMULLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33726 { 14654 /* vpmulld */, X86::VPMULLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33727 { 14654 /* vpmulld */, X86::VPMULLDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33728 { 14654 /* vpmulld */, X86::VPMULLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33729 { 14654 /* vpmulld */, X86::VPMULLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33730 { 14654 /* vpmulld */, X86::VPMULLDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33731 { 14654 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33732 { 14654 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33733 { 14654 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33734 { 14654 /* vpmulld */, X86::VPMULLDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33735 { 14654 /* vpmulld */, X86::VPMULLDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33736 { 14654 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33737 { 14662 /* vpmullq */, X86::VPMULLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33738 { 14662 /* vpmullq */, X86::VPMULLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33739 { 14662 /* vpmullq */, X86::VPMULLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33740 { 14662 /* vpmullq */, X86::VPMULLQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33741 { 14662 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33742 { 14662 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33743 { 14662 /* vpmullq */, X86::VPMULLQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33744 { 14662 /* vpmullq */, X86::VPMULLQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33745 { 14662 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33746 { 14662 /* vpmullq */, X86::VPMULLQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33747 { 14662 /* vpmullq */, X86::VPMULLQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33748 { 14662 /* vpmullq */, X86::VPMULLQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33749 { 14662 /* vpmullq */, X86::VPMULLQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33750 { 14662 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33751 { 14662 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33752 { 14662 /* vpmullq */, X86::VPMULLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33753 { 14662 /* vpmullq */, X86::VPMULLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33754 { 14662 /* vpmullq */, X86::VPMULLQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33755 { 14662 /* vpmullq */, X86::VPMULLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33756 { 14662 /* vpmullq */, X86::VPMULLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33757 { 14662 /* vpmullq */, X86::VPMULLQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33758 { 14662 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33759 { 14662 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33760 { 14662 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33761 { 14662 /* vpmullq */, X86::VPMULLQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33762 { 14662 /* vpmullq */, X86::VPMULLQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33763 { 14662 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33764 { 14670 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33765 { 14670 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33766 { 14670 /* vpmullw */, X86::VPMULLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33767 { 14670 /* vpmullw */, X86::VPMULLWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33768 { 14670 /* vpmullw */, X86::VPMULLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33769 { 14670 /* vpmullw */, X86::VPMULLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33770 { 14670 /* vpmullw */, X86::VPMULLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33771 { 14670 /* vpmullw */, X86::VPMULLWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33772 { 14670 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33773 { 14670 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33774 { 14670 /* vpmullw */, X86::VPMULLWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33775 { 14670 /* vpmullw */, X86::VPMULLWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33776 { 14670 /* vpmullw */, X86::VPMULLWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33777 { 14670 /* vpmullw */, X86::VPMULLWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33778 { 14670 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33779 { 14670 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33780 { 14670 /* vpmullw */, X86::VPMULLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33781 { 14670 /* vpmullw */, X86::VPMULLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33782 { 14670 /* vpmullw */, X86::VPMULLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33783 { 14670 /* vpmullw */, X86::VPMULLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33784 { 14670 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33785 { 14670 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33786 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33787 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33788 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33789 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33790 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33791 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33792 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33793 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33794 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33795 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33796 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33797 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33798 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33799 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33800 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33801 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33802 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33803 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33804 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33805 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33806 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33807 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33808 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33809 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33810 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33811 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33812 { 14678 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33813 { 14693 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33814 { 14693 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33815 { 14693 /* vpmuludq */, X86::VPMULUDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33816 { 14693 /* vpmuludq */, X86::VPMULUDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33817 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33818 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33819 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33820 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33821 { 14693 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33822 { 14693 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33823 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33824 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33825 { 14693 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33826 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33827 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33828 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33829 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33830 { 14693 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33831 { 14693 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33832 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33833 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33834 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33835 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33836 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33837 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33838 { 14693 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33839 { 14693 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33840 { 14693 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33841 { 14693 /* vpmuludq */, X86::VPMULUDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33842 { 14693 /* vpmuludq */, X86::VPMULUDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33843 { 14693 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33844 { 14702 /* vpopcntb */, X86::VPOPCNTBZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33845 { 14702 /* vpopcntb */, X86::VPOPCNTBZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
33846 { 14702 /* vpopcntb */, X86::VPOPCNTBZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
33847 { 14702 /* vpopcntb */, X86::VPOPCNTBZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
33848 { 14702 /* vpopcntb */, X86::VPOPCNTBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
33849 { 14702 /* vpopcntb */, X86::VPOPCNTBZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
33850 { 14702 /* vpopcntb */, X86::VPOPCNTBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33851 { 14702 /* vpopcntb */, X86::VPOPCNTBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33852 { 14702 /* vpopcntb */, X86::VPOPCNTBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33853 { 14702 /* vpopcntb */, X86::VPOPCNTBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33854 { 14702 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33855 { 14702 /* vpopcntb */, X86::VPOPCNTBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
33856 { 14702 /* vpopcntb */, X86::VPOPCNTBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33857 { 14702 /* vpopcntb */, X86::VPOPCNTBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33858 { 14702 /* vpopcntb */, X86::VPOPCNTBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33859 { 14702 /* vpopcntb */, X86::VPOPCNTBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33860 { 14702 /* vpopcntb */, X86::VPOPCNTBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33861 { 14702 /* vpopcntb */, X86::VPOPCNTBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
33862 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33863 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
33864 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
33865 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
33866 { 14711 /* vpopcntd */, X86::VPOPCNTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
33867 { 14711 /* vpopcntd */, X86::VPOPCNTDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
33868 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33869 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33870 { 14711 /* vpopcntd */, X86::VPOPCNTDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33871 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33872 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33873 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33874 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33875 { 14711 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33876 { 14711 /* vpopcntd */, X86::VPOPCNTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
33877 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33878 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33879 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
33880 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33881 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33882 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
33883 { 14711 /* vpopcntd */, X86::VPOPCNTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33884 { 14711 /* vpopcntd */, X86::VPOPCNTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
33885 { 14711 /* vpopcntd */, X86::VPOPCNTDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
33886 { 14711 /* vpopcntd */, X86::VPOPCNTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
33887 { 14711 /* vpopcntd */, X86::VPOPCNTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
33888 { 14711 /* vpopcntd */, X86::VPOPCNTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
33889 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33890 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
33891 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
33892 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
33893 { 14720 /* vpopcntq */, X86::VPOPCNTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
33894 { 14720 /* vpopcntq */, X86::VPOPCNTQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
33895 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33896 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33897 { 14720 /* vpopcntq */, X86::VPOPCNTQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33898 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33899 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33900 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33901 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33902 { 14720 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33903 { 14720 /* vpopcntq */, X86::VPOPCNTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
33904 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33905 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33906 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
33907 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33908 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33909 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
33910 { 14720 /* vpopcntq */, X86::VPOPCNTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33911 { 14720 /* vpopcntq */, X86::VPOPCNTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
33912 { 14720 /* vpopcntq */, X86::VPOPCNTQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
33913 { 14720 /* vpopcntq */, X86::VPOPCNTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
33914 { 14720 /* vpopcntq */, X86::VPOPCNTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
33915 { 14720 /* vpopcntq */, X86::VPOPCNTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
33916 { 14729 /* vpopcntw */, X86::VPOPCNTWZ128rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
33917 { 14729 /* vpopcntw */, X86::VPOPCNTWZ128rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
33918 { 14729 /* vpopcntw */, X86::VPOPCNTWZ256rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
33919 { 14729 /* vpopcntw */, X86::VPOPCNTWZ256rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
33920 { 14729 /* vpopcntw */, X86::VPOPCNTWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
33921 { 14729 /* vpopcntw */, X86::VPOPCNTWZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
33922 { 14729 /* vpopcntw */, X86::VPOPCNTWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33923 { 14729 /* vpopcntw */, X86::VPOPCNTWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33924 { 14729 /* vpopcntw */, X86::VPOPCNTWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33925 { 14729 /* vpopcntw */, X86::VPOPCNTWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33926 { 14729 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33927 { 14729 /* vpopcntw */, X86::VPOPCNTWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
33928 { 14729 /* vpopcntw */, X86::VPOPCNTWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33929 { 14729 /* vpopcntw */, X86::VPOPCNTWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33930 { 14729 /* vpopcntw */, X86::VPOPCNTWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33931 { 14729 /* vpopcntw */, X86::VPOPCNTWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33932 { 14729 /* vpopcntw */, X86::VPOPCNTWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33933 { 14729 /* vpopcntw */, X86::VPOPCNTWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
33934 { 14738 /* vpor */, X86::VPORrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33935 { 14738 /* vpor */, X86::VPORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33936 { 14738 /* vpor */, X86::VPORYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33937 { 14738 /* vpor */, X86::VPORYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33938 { 14743 /* vpord */, X86::VPORDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33939 { 14743 /* vpord */, X86::VPORDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33940 { 14743 /* vpord */, X86::VPORDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33941 { 14743 /* vpord */, X86::VPORDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33942 { 14743 /* vpord */, X86::VPORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33943 { 14743 /* vpord */, X86::VPORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33944 { 14743 /* vpord */, X86::VPORDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33945 { 14743 /* vpord */, X86::VPORDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33946 { 14743 /* vpord */, X86::VPORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33947 { 14743 /* vpord */, X86::VPORDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33948 { 14743 /* vpord */, X86::VPORDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33949 { 14743 /* vpord */, X86::VPORDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33950 { 14743 /* vpord */, X86::VPORDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33951 { 14743 /* vpord */, X86::VPORDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33952 { 14743 /* vpord */, X86::VPORDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33953 { 14743 /* vpord */, X86::VPORDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33954 { 14743 /* vpord */, X86::VPORDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33955 { 14743 /* vpord */, X86::VPORDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33956 { 14743 /* vpord */, X86::VPORDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33957 { 14743 /* vpord */, X86::VPORDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33958 { 14743 /* vpord */, X86::VPORDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33959 { 14743 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33960 { 14743 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33961 { 14743 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33962 { 14743 /* vpord */, X86::VPORDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33963 { 14743 /* vpord */, X86::VPORDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33964 { 14743 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33965 { 14749 /* vporq */, X86::VPORQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33966 { 14749 /* vporq */, X86::VPORQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33967 { 14749 /* vporq */, X86::VPORQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33968 { 14749 /* vporq */, X86::VPORQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33969 { 14749 /* vporq */, X86::VPORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33970 { 14749 /* vporq */, X86::VPORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33971 { 14749 /* vporq */, X86::VPORQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33972 { 14749 /* vporq */, X86::VPORQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33973 { 14749 /* vporq */, X86::VPORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33974 { 14749 /* vporq */, X86::VPORQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33975 { 14749 /* vporq */, X86::VPORQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33976 { 14749 /* vporq */, X86::VPORQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33977 { 14749 /* vporq */, X86::VPORQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33978 { 14749 /* vporq */, X86::VPORQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33979 { 14749 /* vporq */, X86::VPORQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33980 { 14749 /* vporq */, X86::VPORQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33981 { 14749 /* vporq */, X86::VPORQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33982 { 14749 /* vporq */, X86::VPORQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33983 { 14749 /* vporq */, X86::VPORQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33984 { 14749 /* vporq */, X86::VPORQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33985 { 14749 /* vporq */, X86::VPORQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33986 { 14749 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33987 { 14749 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33988 { 14749 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33989 { 14749 /* vporq */, X86::VPORQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33990 { 14749 /* vporq */, X86::VPORQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33991 { 14749 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33992 { 14755 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
33993 { 14755 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33994 { 14755 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33995 { 14762 /* vprold */, X86::VPROLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33996 { 14762 /* vprold */, X86::VPROLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33997 { 14762 /* vprold */, X86::VPROLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33998 { 14762 /* vprold */, X86::VPROLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33999 { 14762 /* vprold */, X86::VPROLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34000 { 14762 /* vprold */, X86::VPROLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34001 { 14762 /* vprold */, X86::VPROLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34002 { 14762 /* vprold */, X86::VPROLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34003 { 14762 /* vprold */, X86::VPROLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34004 { 14762 /* vprold */, X86::VPROLDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34005 { 14762 /* vprold */, X86::VPROLDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34006 { 14762 /* vprold */, X86::VPROLDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34007 { 14762 /* vprold */, X86::VPROLDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34008 { 14762 /* vprold */, X86::VPROLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34009 { 14762 /* vprold */, X86::VPROLDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34010 { 14762 /* vprold */, X86::VPROLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34011 { 14762 /* vprold */, X86::VPROLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34012 { 14762 /* vprold */, X86::VPROLDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34013 { 14762 /* vprold */, X86::VPROLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34014 { 14762 /* vprold */, X86::VPROLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34015 { 14762 /* vprold */, X86::VPROLDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34016 { 14762 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34017 { 14762 /* vprold */, X86::VPROLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34018 { 14762 /* vprold */, X86::VPROLDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34019 { 14762 /* vprold */, X86::VPROLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34020 { 14762 /* vprold */, X86::VPROLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34021 { 14762 /* vprold */, X86::VPROLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34022 { 14769 /* vprolq */, X86::VPROLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34023 { 14769 /* vprolq */, X86::VPROLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34024 { 14769 /* vprolq */, X86::VPROLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34025 { 14769 /* vprolq */, X86::VPROLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34026 { 14769 /* vprolq */, X86::VPROLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34027 { 14769 /* vprolq */, X86::VPROLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34028 { 14769 /* vprolq */, X86::VPROLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34029 { 14769 /* vprolq */, X86::VPROLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34030 { 14769 /* vprolq */, X86::VPROLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34031 { 14769 /* vprolq */, X86::VPROLQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34032 { 14769 /* vprolq */, X86::VPROLQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34033 { 14769 /* vprolq */, X86::VPROLQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34034 { 14769 /* vprolq */, X86::VPROLQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34035 { 14769 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34036 { 14769 /* vprolq */, X86::VPROLQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34037 { 14769 /* vprolq */, X86::VPROLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34038 { 14769 /* vprolq */, X86::VPROLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34039 { 14769 /* vprolq */, X86::VPROLQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34040 { 14769 /* vprolq */, X86::VPROLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34041 { 14769 /* vprolq */, X86::VPROLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34042 { 14769 /* vprolq */, X86::VPROLQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34043 { 14769 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34044 { 14769 /* vprolq */, X86::VPROLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34045 { 14769 /* vprolq */, X86::VPROLQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34046 { 14769 /* vprolq */, X86::VPROLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34047 { 14769 /* vprolq */, X86::VPROLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34048 { 14769 /* vprolq */, X86::VPROLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34049 { 14776 /* vprolvd */, X86::VPROLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34050 { 14776 /* vprolvd */, X86::VPROLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34051 { 14776 /* vprolvd */, X86::VPROLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34052 { 14776 /* vprolvd */, X86::VPROLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34053 { 14776 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34054 { 14776 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34055 { 14776 /* vprolvd */, X86::VPROLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34056 { 14776 /* vprolvd */, X86::VPROLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34057 { 14776 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34058 { 14776 /* vprolvd */, X86::VPROLVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34059 { 14776 /* vprolvd */, X86::VPROLVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34060 { 14776 /* vprolvd */, X86::VPROLVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34061 { 14776 /* vprolvd */, X86::VPROLVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34062 { 14776 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34063 { 14776 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34064 { 14776 /* vprolvd */, X86::VPROLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34065 { 14776 /* vprolvd */, X86::VPROLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34066 { 14776 /* vprolvd */, X86::VPROLVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34067 { 14776 /* vprolvd */, X86::VPROLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34068 { 14776 /* vprolvd */, X86::VPROLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34069 { 14776 /* vprolvd */, X86::VPROLVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34070 { 14776 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34071 { 14776 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34072 { 14776 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34073 { 14776 /* vprolvd */, X86::VPROLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34074 { 14776 /* vprolvd */, X86::VPROLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34075 { 14776 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34076 { 14784 /* vprolvq */, X86::VPROLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34077 { 14784 /* vprolvq */, X86::VPROLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34078 { 14784 /* vprolvq */, X86::VPROLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34079 { 14784 /* vprolvq */, X86::VPROLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34080 { 14784 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34081 { 14784 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34082 { 14784 /* vprolvq */, X86::VPROLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34083 { 14784 /* vprolvq */, X86::VPROLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34084 { 14784 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34085 { 14784 /* vprolvq */, X86::VPROLVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34086 { 14784 /* vprolvq */, X86::VPROLVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34087 { 14784 /* vprolvq */, X86::VPROLVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34088 { 14784 /* vprolvq */, X86::VPROLVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34089 { 14784 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34090 { 14784 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34091 { 14784 /* vprolvq */, X86::VPROLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34092 { 14784 /* vprolvq */, X86::VPROLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34093 { 14784 /* vprolvq */, X86::VPROLVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34094 { 14784 /* vprolvq */, X86::VPROLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34095 { 14784 /* vprolvq */, X86::VPROLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34096 { 14784 /* vprolvq */, X86::VPROLVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34097 { 14784 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34098 { 14784 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34099 { 14784 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34100 { 14784 /* vprolvq */, X86::VPROLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34101 { 14784 /* vprolvq */, X86::VPROLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34102 { 14784 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34103 { 14792 /* vprord */, X86::VPRORDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34104 { 14792 /* vprord */, X86::VPRORDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34105 { 14792 /* vprord */, X86::VPRORDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34106 { 14792 /* vprord */, X86::VPRORDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34107 { 14792 /* vprord */, X86::VPRORDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34108 { 14792 /* vprord */, X86::VPRORDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34109 { 14792 /* vprord */, X86::VPRORDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34110 { 14792 /* vprord */, X86::VPRORDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34111 { 14792 /* vprord */, X86::VPRORDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34112 { 14792 /* vprord */, X86::VPRORDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34113 { 14792 /* vprord */, X86::VPRORDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34114 { 14792 /* vprord */, X86::VPRORDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34115 { 14792 /* vprord */, X86::VPRORDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34116 { 14792 /* vprord */, X86::VPRORDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34117 { 14792 /* vprord */, X86::VPRORDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34118 { 14792 /* vprord */, X86::VPRORDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34119 { 14792 /* vprord */, X86::VPRORDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34120 { 14792 /* vprord */, X86::VPRORDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34121 { 14792 /* vprord */, X86::VPRORDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34122 { 14792 /* vprord */, X86::VPRORDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34123 { 14792 /* vprord */, X86::VPRORDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34124 { 14792 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34125 { 14792 /* vprord */, X86::VPRORDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34126 { 14792 /* vprord */, X86::VPRORDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34127 { 14792 /* vprord */, X86::VPRORDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34128 { 14792 /* vprord */, X86::VPRORDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34129 { 14792 /* vprord */, X86::VPRORDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34130 { 14799 /* vprorq */, X86::VPRORQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34131 { 14799 /* vprorq */, X86::VPRORQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34132 { 14799 /* vprorq */, X86::VPRORQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34133 { 14799 /* vprorq */, X86::VPRORQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34134 { 14799 /* vprorq */, X86::VPRORQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34135 { 14799 /* vprorq */, X86::VPRORQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34136 { 14799 /* vprorq */, X86::VPRORQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34137 { 14799 /* vprorq */, X86::VPRORQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34138 { 14799 /* vprorq */, X86::VPRORQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34139 { 14799 /* vprorq */, X86::VPRORQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34140 { 14799 /* vprorq */, X86::VPRORQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34141 { 14799 /* vprorq */, X86::VPRORQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34142 { 14799 /* vprorq */, X86::VPRORQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34143 { 14799 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34144 { 14799 /* vprorq */, X86::VPRORQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34145 { 14799 /* vprorq */, X86::VPRORQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34146 { 14799 /* vprorq */, X86::VPRORQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34147 { 14799 /* vprorq */, X86::VPRORQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34148 { 14799 /* vprorq */, X86::VPRORQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34149 { 14799 /* vprorq */, X86::VPRORQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34150 { 14799 /* vprorq */, X86::VPRORQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34151 { 14799 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34152 { 14799 /* vprorq */, X86::VPRORQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34153 { 14799 /* vprorq */, X86::VPRORQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34154 { 14799 /* vprorq */, X86::VPRORQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34155 { 14799 /* vprorq */, X86::VPRORQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34156 { 14799 /* vprorq */, X86::VPRORQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34157 { 14806 /* vprorvd */, X86::VPRORVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34158 { 14806 /* vprorvd */, X86::VPRORVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34159 { 14806 /* vprorvd */, X86::VPRORVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34160 { 14806 /* vprorvd */, X86::VPRORVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34161 { 14806 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34162 { 14806 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34163 { 14806 /* vprorvd */, X86::VPRORVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34164 { 14806 /* vprorvd */, X86::VPRORVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34165 { 14806 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34166 { 14806 /* vprorvd */, X86::VPRORVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34167 { 14806 /* vprorvd */, X86::VPRORVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34168 { 14806 /* vprorvd */, X86::VPRORVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34169 { 14806 /* vprorvd */, X86::VPRORVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34170 { 14806 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34171 { 14806 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34172 { 14806 /* vprorvd */, X86::VPRORVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34173 { 14806 /* vprorvd */, X86::VPRORVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34174 { 14806 /* vprorvd */, X86::VPRORVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34175 { 14806 /* vprorvd */, X86::VPRORVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34176 { 14806 /* vprorvd */, X86::VPRORVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34177 { 14806 /* vprorvd */, X86::VPRORVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34178 { 14806 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34179 { 14806 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34180 { 14806 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34181 { 14806 /* vprorvd */, X86::VPRORVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34182 { 14806 /* vprorvd */, X86::VPRORVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34183 { 14806 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34184 { 14814 /* vprorvq */, X86::VPRORVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34185 { 14814 /* vprorvq */, X86::VPRORVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34186 { 14814 /* vprorvq */, X86::VPRORVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34187 { 14814 /* vprorvq */, X86::VPRORVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34188 { 14814 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34189 { 14814 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34190 { 14814 /* vprorvq */, X86::VPRORVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34191 { 14814 /* vprorvq */, X86::VPRORVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34192 { 14814 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34193 { 14814 /* vprorvq */, X86::VPRORVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34194 { 14814 /* vprorvq */, X86::VPRORVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34195 { 14814 /* vprorvq */, X86::VPRORVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34196 { 14814 /* vprorvq */, X86::VPRORVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34197 { 14814 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34198 { 14814 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34199 { 14814 /* vprorvq */, X86::VPRORVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34200 { 14814 /* vprorvq */, X86::VPRORVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34201 { 14814 /* vprorvq */, X86::VPRORVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34202 { 14814 /* vprorvq */, X86::VPRORVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34203 { 14814 /* vprorvq */, X86::VPRORVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34204 { 14814 /* vprorvq */, X86::VPRORVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34205 { 14814 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34206 { 14814 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34207 { 14814 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34208 { 14814 /* vprorvq */, X86::VPRORVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34209 { 14814 /* vprorvq */, X86::VPRORVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34210 { 14814 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34211 { 14822 /* vprotb */, X86::VPROTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34212 { 14822 /* vprotb */, X86::VPROTBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34213 { 14822 /* vprotb */, X86::VPROTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34214 { 14822 /* vprotb */, X86::VPROTBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34215 { 14822 /* vprotb */, X86::VPROTBmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34216 { 14829 /* vprotd */, X86::VPROTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34217 { 14829 /* vprotd */, X86::VPROTDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34218 { 14829 /* vprotd */, X86::VPROTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34219 { 14829 /* vprotd */, X86::VPROTDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34220 { 14829 /* vprotd */, X86::VPROTDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34221 { 14836 /* vprotq */, X86::VPROTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34222 { 14836 /* vprotq */, X86::VPROTQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34223 { 14836 /* vprotq */, X86::VPROTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34224 { 14836 /* vprotq */, X86::VPROTQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34225 { 14836 /* vprotq */, X86::VPROTQmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34226 { 14843 /* vprotw */, X86::VPROTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34227 { 14843 /* vprotw */, X86::VPROTWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34228 { 14843 /* vprotw */, X86::VPROTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34229 { 14843 /* vprotw */, X86::VPROTWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34230 { 14843 /* vprotw */, X86::VPROTWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34231 { 14850 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34232 { 14850 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34233 { 14850 /* vpsadbw */, X86::VPSADBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34234 { 14850 /* vpsadbw */, X86::VPSADBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34235 { 14850 /* vpsadbw */, X86::VPSADBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34236 { 14850 /* vpsadbw */, X86::VPSADBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34237 { 14850 /* vpsadbw */, X86::VPSADBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34238 { 14850 /* vpsadbw */, X86::VPSADBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34239 { 14850 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34240 { 14850 /* vpsadbw */, X86::VPSADBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34241 { 14858 /* vpscatterdd */, X86::VPSCATTERDDZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
34242 { 14858 /* vpscatterdd */, X86::VPSCATTERDDZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
34243 { 14858 /* vpscatterdd */, X86::VPSCATTERDDZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
34244 { 14870 /* vpscatterdq */, X86::VPSCATTERDQZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
34245 { 14870 /* vpscatterdq */, X86::VPSCATTERDQZ256mr, Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
34246 { 14870 /* vpscatterdq */, X86::VPSCATTERDQZmr, Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
34247 { 14882 /* vpscatterqd */, X86::VPSCATTERQDZ256mr, Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
34248 { 14882 /* vpscatterqd */, X86::VPSCATTERQDZmr, Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
34249 { 14882 /* vpscatterqd */, X86::VPSCATTERQDZ128mr, Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
34250 { 14894 /* vpscatterqq */, X86::VPSCATTERQQZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
34251 { 14894 /* vpscatterqq */, X86::VPSCATTERQQZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
34252 { 14894 /* vpscatterqq */, X86::VPSCATTERQQZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
34253 { 14906 /* vpshab */, X86::VPSHABrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34254 { 14906 /* vpshab */, X86::VPSHABrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34255 { 14906 /* vpshab */, X86::VPSHABmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34256 { 14913 /* vpshad */, X86::VPSHADrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34257 { 14913 /* vpshad */, X86::VPSHADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34258 { 14913 /* vpshad */, X86::VPSHADmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34259 { 14920 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34260 { 14920 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34261 { 14920 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34262 { 14927 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34263 { 14927 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34264 { 14927 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34265 { 14934 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34266 { 14934 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34267 { 14934 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34268 { 14941 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34269 { 14941 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34270 { 14941 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34271 { 14948 /* vpshldd */, X86::VPSHLDDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34272 { 14948 /* vpshldd */, X86::VPSHLDDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34273 { 14948 /* vpshldd */, X86::VPSHLDDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34274 { 14948 /* vpshldd */, X86::VPSHLDDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34275 { 14948 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34276 { 14948 /* vpshldd */, X86::VPSHLDDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34277 { 14948 /* vpshldd */, X86::VPSHLDDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34278 { 14948 /* vpshldd */, X86::VPSHLDDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34279 { 14948 /* vpshldd */, X86::VPSHLDDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34280 { 14948 /* vpshldd */, X86::VPSHLDDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34281 { 14948 /* vpshldd */, X86::VPSHLDDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34282 { 14948 /* vpshldd */, X86::VPSHLDDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34283 { 14948 /* vpshldd */, X86::VPSHLDDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34284 { 14948 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34285 { 14948 /* vpshldd */, X86::VPSHLDDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34286 { 14948 /* vpshldd */, X86::VPSHLDDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34287 { 14948 /* vpshldd */, X86::VPSHLDDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34288 { 14948 /* vpshldd */, X86::VPSHLDDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34289 { 14948 /* vpshldd */, X86::VPSHLDDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34290 { 14948 /* vpshldd */, X86::VPSHLDDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34291 { 14948 /* vpshldd */, X86::VPSHLDDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34292 { 14948 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34293 { 14948 /* vpshldd */, X86::VPSHLDDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34294 { 14948 /* vpshldd */, X86::VPSHLDDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34295 { 14948 /* vpshldd */, X86::VPSHLDDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34296 { 14948 /* vpshldd */, X86::VPSHLDDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34297 { 14948 /* vpshldd */, X86::VPSHLDDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34298 { 14956 /* vpshldq */, X86::VPSHLDQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34299 { 14956 /* vpshldq */, X86::VPSHLDQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34300 { 14956 /* vpshldq */, X86::VPSHLDQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34301 { 14956 /* vpshldq */, X86::VPSHLDQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34302 { 14956 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34303 { 14956 /* vpshldq */, X86::VPSHLDQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34304 { 14956 /* vpshldq */, X86::VPSHLDQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34305 { 14956 /* vpshldq */, X86::VPSHLDQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34306 { 14956 /* vpshldq */, X86::VPSHLDQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34307 { 14956 /* vpshldq */, X86::VPSHLDQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34308 { 14956 /* vpshldq */, X86::VPSHLDQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34309 { 14956 /* vpshldq */, X86::VPSHLDQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34310 { 14956 /* vpshldq */, X86::VPSHLDQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34311 { 14956 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34312 { 14956 /* vpshldq */, X86::VPSHLDQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34313 { 14956 /* vpshldq */, X86::VPSHLDQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34314 { 14956 /* vpshldq */, X86::VPSHLDQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34315 { 14956 /* vpshldq */, X86::VPSHLDQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34316 { 14956 /* vpshldq */, X86::VPSHLDQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34317 { 14956 /* vpshldq */, X86::VPSHLDQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34318 { 14956 /* vpshldq */, X86::VPSHLDQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34319 { 14956 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34320 { 14956 /* vpshldq */, X86::VPSHLDQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34321 { 14956 /* vpshldq */, X86::VPSHLDQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34322 { 14956 /* vpshldq */, X86::VPSHLDQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34323 { 14956 /* vpshldq */, X86::VPSHLDQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34324 { 14956 /* vpshldq */, X86::VPSHLDQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34325 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34326 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34327 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34328 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34329 { 14964 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34330 { 14964 /* vpshldvd */, X86::VPSHLDVDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34331 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34332 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34333 { 14964 /* vpshldvd */, X86::VPSHLDVDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34334 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34335 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34336 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34337 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34338 { 14964 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34339 { 14964 /* vpshldvd */, X86::VPSHLDVDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34340 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34341 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34342 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34343 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34344 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34345 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34346 { 14964 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34347 { 14964 /* vpshldvd */, X86::VPSHLDVDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34348 { 14964 /* vpshldvd */, X86::VPSHLDVDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34349 { 14964 /* vpshldvd */, X86::VPSHLDVDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34350 { 14964 /* vpshldvd */, X86::VPSHLDVDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34351 { 14964 /* vpshldvd */, X86::VPSHLDVDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34352 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34353 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34354 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34355 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34356 { 14973 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34357 { 14973 /* vpshldvq */, X86::VPSHLDVQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34358 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34359 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34360 { 14973 /* vpshldvq */, X86::VPSHLDVQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34361 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34362 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34363 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34364 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34365 { 14973 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34366 { 14973 /* vpshldvq */, X86::VPSHLDVQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34367 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34368 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34369 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34370 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34371 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34372 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34373 { 14973 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34374 { 14973 /* vpshldvq */, X86::VPSHLDVQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34375 { 14973 /* vpshldvq */, X86::VPSHLDVQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34376 { 14973 /* vpshldvq */, X86::VPSHLDVQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34377 { 14973 /* vpshldvq */, X86::VPSHLDVQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34378 { 14973 /* vpshldvq */, X86::VPSHLDVQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34379 { 14982 /* vpshldvw */, X86::VPSHLDVWZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34380 { 14982 /* vpshldvw */, X86::VPSHLDVWZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34381 { 14982 /* vpshldvw */, X86::VPSHLDVWZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34382 { 14982 /* vpshldvw */, X86::VPSHLDVWZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34383 { 14982 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34384 { 14982 /* vpshldvw */, X86::VPSHLDVWZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34385 { 14982 /* vpshldvw */, X86::VPSHLDVWZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34386 { 14982 /* vpshldvw */, X86::VPSHLDVWZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34387 { 14982 /* vpshldvw */, X86::VPSHLDVWZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34388 { 14982 /* vpshldvw */, X86::VPSHLDVWZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34389 { 14982 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34390 { 14982 /* vpshldvw */, X86::VPSHLDVWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34391 { 14982 /* vpshldvw */, X86::VPSHLDVWZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34392 { 14982 /* vpshldvw */, X86::VPSHLDVWZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34393 { 14982 /* vpshldvw */, X86::VPSHLDVWZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34394 { 14982 /* vpshldvw */, X86::VPSHLDVWZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34395 { 14982 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34396 { 14982 /* vpshldvw */, X86::VPSHLDVWZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34397 { 14991 /* vpshldw */, X86::VPSHLDWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34398 { 14991 /* vpshldw */, X86::VPSHLDWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34399 { 14991 /* vpshldw */, X86::VPSHLDWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34400 { 14991 /* vpshldw */, X86::VPSHLDWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34401 { 14991 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34402 { 14991 /* vpshldw */, X86::VPSHLDWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34403 { 14991 /* vpshldw */, X86::VPSHLDWZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34404 { 14991 /* vpshldw */, X86::VPSHLDWZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34405 { 14991 /* vpshldw */, X86::VPSHLDWZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34406 { 14991 /* vpshldw */, X86::VPSHLDWZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34407 { 14991 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34408 { 14991 /* vpshldw */, X86::VPSHLDWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34409 { 14991 /* vpshldw */, X86::VPSHLDWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34410 { 14991 /* vpshldw */, X86::VPSHLDWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34411 { 14991 /* vpshldw */, X86::VPSHLDWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34412 { 14991 /* vpshldw */, X86::VPSHLDWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34413 { 14991 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34414 { 14991 /* vpshldw */, X86::VPSHLDWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34415 { 14999 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34416 { 14999 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34417 { 14999 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34418 { 15006 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34419 { 15006 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34420 { 15006 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34421 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34422 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34423 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34424 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34425 { 15013 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34426 { 15013 /* vpshrdd */, X86::VPSHRDDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34427 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34428 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34429 { 15013 /* vpshrdd */, X86::VPSHRDDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34430 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34431 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34432 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34433 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34434 { 15013 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34435 { 15013 /* vpshrdd */, X86::VPSHRDDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34436 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34437 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34438 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34439 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34440 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34441 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34442 { 15013 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34443 { 15013 /* vpshrdd */, X86::VPSHRDDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34444 { 15013 /* vpshrdd */, X86::VPSHRDDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34445 { 15013 /* vpshrdd */, X86::VPSHRDDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34446 { 15013 /* vpshrdd */, X86::VPSHRDDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34447 { 15013 /* vpshrdd */, X86::VPSHRDDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34448 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34449 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34450 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34451 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34452 { 15021 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34453 { 15021 /* vpshrdq */, X86::VPSHRDQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34454 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34455 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34456 { 15021 /* vpshrdq */, X86::VPSHRDQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34457 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34458 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34459 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34460 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34461 { 15021 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34462 { 15021 /* vpshrdq */, X86::VPSHRDQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34463 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34464 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34465 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34466 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34467 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34468 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34469 { 15021 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34470 { 15021 /* vpshrdq */, X86::VPSHRDQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34471 { 15021 /* vpshrdq */, X86::VPSHRDQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34472 { 15021 /* vpshrdq */, X86::VPSHRDQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34473 { 15021 /* vpshrdq */, X86::VPSHRDQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34474 { 15021 /* vpshrdq */, X86::VPSHRDQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34475 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34476 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34477 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34478 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34479 { 15029 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34480 { 15029 /* vpshrdvd */, X86::VPSHRDVDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34481 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34482 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34483 { 15029 /* vpshrdvd */, X86::VPSHRDVDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34484 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34485 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34486 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34487 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34488 { 15029 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34489 { 15029 /* vpshrdvd */, X86::VPSHRDVDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34490 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34491 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34492 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34493 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34494 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34495 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34496 { 15029 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34497 { 15029 /* vpshrdvd */, X86::VPSHRDVDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34498 { 15029 /* vpshrdvd */, X86::VPSHRDVDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34499 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34500 { 15029 /* vpshrdvd */, X86::VPSHRDVDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34501 { 15029 /* vpshrdvd */, X86::VPSHRDVDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34502 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34503 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34504 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34505 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34506 { 15038 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34507 { 15038 /* vpshrdvq */, X86::VPSHRDVQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34508 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34509 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34510 { 15038 /* vpshrdvq */, X86::VPSHRDVQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34511 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34512 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34513 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34514 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34515 { 15038 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34516 { 15038 /* vpshrdvq */, X86::VPSHRDVQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34517 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34518 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34519 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34520 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34521 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34522 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34523 { 15038 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34524 { 15038 /* vpshrdvq */, X86::VPSHRDVQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34525 { 15038 /* vpshrdvq */, X86::VPSHRDVQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34526 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34527 { 15038 /* vpshrdvq */, X86::VPSHRDVQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34528 { 15038 /* vpshrdvq */, X86::VPSHRDVQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34529 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34530 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34531 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34532 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34533 { 15047 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34534 { 15047 /* vpshrdvw */, X86::VPSHRDVWZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34535 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34536 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34537 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34538 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34539 { 15047 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34540 { 15047 /* vpshrdvw */, X86::VPSHRDVWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34541 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34542 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34543 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34544 { 15047 /* vpshrdvw */, X86::VPSHRDVWZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34545 { 15047 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34546 { 15047 /* vpshrdvw */, X86::VPSHRDVWZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34547 { 15056 /* vpshrdw */, X86::VPSHRDWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34548 { 15056 /* vpshrdw */, X86::VPSHRDWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34549 { 15056 /* vpshrdw */, X86::VPSHRDWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34550 { 15056 /* vpshrdw */, X86::VPSHRDWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34551 { 15056 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34552 { 15056 /* vpshrdw */, X86::VPSHRDWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34553 { 15056 /* vpshrdw */, X86::VPSHRDWZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34554 { 15056 /* vpshrdw */, X86::VPSHRDWZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34555 { 15056 /* vpshrdw */, X86::VPSHRDWZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34556 { 15056 /* vpshrdw */, X86::VPSHRDWZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34557 { 15056 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34558 { 15056 /* vpshrdw */, X86::VPSHRDWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34559 { 15056 /* vpshrdw */, X86::VPSHRDWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34560 { 15056 /* vpshrdw */, X86::VPSHRDWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34561 { 15056 /* vpshrdw */, X86::VPSHRDWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34562 { 15056 /* vpshrdw */, X86::VPSHRDWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34563 { 15056 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34564 { 15056 /* vpshrdw */, X86::VPSHRDWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34565 { 15064 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34566 { 15064 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34567 { 15064 /* vpshufb */, X86::VPSHUFBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34568 { 15064 /* vpshufb */, X86::VPSHUFBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34569 { 15064 /* vpshufb */, X86::VPSHUFBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34570 { 15064 /* vpshufb */, X86::VPSHUFBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34571 { 15064 /* vpshufb */, X86::VPSHUFBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34572 { 15064 /* vpshufb */, X86::VPSHUFBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34573 { 15064 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34574 { 15064 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34575 { 15064 /* vpshufb */, X86::VPSHUFBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34576 { 15064 /* vpshufb */, X86::VPSHUFBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34577 { 15064 /* vpshufb */, X86::VPSHUFBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34578 { 15064 /* vpshufb */, X86::VPSHUFBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34579 { 15064 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34580 { 15064 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34581 { 15064 /* vpshufb */, X86::VPSHUFBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34582 { 15064 /* vpshufb */, X86::VPSHUFBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34583 { 15064 /* vpshufb */, X86::VPSHUFBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34584 { 15064 /* vpshufb */, X86::VPSHUFBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34585 { 15064 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34586 { 15064 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34587 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34588 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34589 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34590 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34591 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34592 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34593 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34594 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34595 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34596 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34597 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34598 { 15072 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34599 { 15085 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34600 { 15085 /* vpshufd */, X86::VPSHUFDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34601 { 15085 /* vpshufd */, X86::VPSHUFDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34602 { 15085 /* vpshufd */, X86::VPSHUFDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34603 { 15085 /* vpshufd */, X86::VPSHUFDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34604 { 15085 /* vpshufd */, X86::VPSHUFDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34605 { 15085 /* vpshufd */, X86::VPSHUFDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34606 { 15085 /* vpshufd */, X86::VPSHUFDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34607 { 15085 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34608 { 15085 /* vpshufd */, X86::VPSHUFDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34609 { 15085 /* vpshufd */, X86::VPSHUFDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34610 { 15085 /* vpshufd */, X86::VPSHUFDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34611 { 15085 /* vpshufd */, X86::VPSHUFDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34612 { 15085 /* vpshufd */, X86::VPSHUFDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34613 { 15085 /* vpshufd */, X86::VPSHUFDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34614 { 15085 /* vpshufd */, X86::VPSHUFDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34615 { 15085 /* vpshufd */, X86::VPSHUFDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34616 { 15085 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34617 { 15085 /* vpshufd */, X86::VPSHUFDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34618 { 15085 /* vpshufd */, X86::VPSHUFDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34619 { 15085 /* vpshufd */, X86::VPSHUFDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34620 { 15085 /* vpshufd */, X86::VPSHUFDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34621 { 15085 /* vpshufd */, X86::VPSHUFDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34622 { 15085 /* vpshufd */, X86::VPSHUFDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34623 { 15085 /* vpshufd */, X86::VPSHUFDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34624 { 15085 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34625 { 15085 /* vpshufd */, X86::VPSHUFDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34626 { 15085 /* vpshufd */, X86::VPSHUFDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34627 { 15085 /* vpshufd */, X86::VPSHUFDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34628 { 15085 /* vpshufd */, X86::VPSHUFDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34629 { 15085 /* vpshufd */, X86::VPSHUFDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34630 { 15093 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34631 { 15093 /* vpshufhw */, X86::VPSHUFHWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34632 { 15093 /* vpshufhw */, X86::VPSHUFHWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34633 { 15093 /* vpshufhw */, X86::VPSHUFHWYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34634 { 15093 /* vpshufhw */, X86::VPSHUFHWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34635 { 15093 /* vpshufhw */, X86::VPSHUFHWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34636 { 15093 /* vpshufhw */, X86::VPSHUFHWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34637 { 15093 /* vpshufhw */, X86::VPSHUFHWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34638 { 15093 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34639 { 15093 /* vpshufhw */, X86::VPSHUFHWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34640 { 15093 /* vpshufhw */, X86::VPSHUFHWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34641 { 15093 /* vpshufhw */, X86::VPSHUFHWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34642 { 15093 /* vpshufhw */, X86::VPSHUFHWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34643 { 15093 /* vpshufhw */, X86::VPSHUFHWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34644 { 15093 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34645 { 15093 /* vpshufhw */, X86::VPSHUFHWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34646 { 15093 /* vpshufhw */, X86::VPSHUFHWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34647 { 15093 /* vpshufhw */, X86::VPSHUFHWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34648 { 15093 /* vpshufhw */, X86::VPSHUFHWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34649 { 15093 /* vpshufhw */, X86::VPSHUFHWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34650 { 15093 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34651 { 15093 /* vpshufhw */, X86::VPSHUFHWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34652 { 15102 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34653 { 15102 /* vpshuflw */, X86::VPSHUFLWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34654 { 15102 /* vpshuflw */, X86::VPSHUFLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34655 { 15102 /* vpshuflw */, X86::VPSHUFLWYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34656 { 15102 /* vpshuflw */, X86::VPSHUFLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34657 { 15102 /* vpshuflw */, X86::VPSHUFLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34658 { 15102 /* vpshuflw */, X86::VPSHUFLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34659 { 15102 /* vpshuflw */, X86::VPSHUFLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34660 { 15102 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34661 { 15102 /* vpshuflw */, X86::VPSHUFLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34662 { 15102 /* vpshuflw */, X86::VPSHUFLWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34663 { 15102 /* vpshuflw */, X86::VPSHUFLWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34664 { 15102 /* vpshuflw */, X86::VPSHUFLWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34665 { 15102 /* vpshuflw */, X86::VPSHUFLWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34666 { 15102 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34667 { 15102 /* vpshuflw */, X86::VPSHUFLWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34668 { 15102 /* vpshuflw */, X86::VPSHUFLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34669 { 15102 /* vpshuflw */, X86::VPSHUFLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34670 { 15102 /* vpshuflw */, X86::VPSHUFLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34671 { 15102 /* vpshuflw */, X86::VPSHUFLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34672 { 15102 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34673 { 15102 /* vpshuflw */, X86::VPSHUFLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34674 { 15111 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34675 { 15111 /* vpsignb */, X86::VPSIGNBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34676 { 15111 /* vpsignb */, X86::VPSIGNBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34677 { 15111 /* vpsignb */, X86::VPSIGNBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34678 { 15119 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34679 { 15119 /* vpsignd */, X86::VPSIGNDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34680 { 15119 /* vpsignd */, X86::VPSIGNDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34681 { 15119 /* vpsignd */, X86::VPSIGNDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34682 { 15127 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34683 { 15127 /* vpsignw */, X86::VPSIGNWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34684 { 15127 /* vpsignw */, X86::VPSIGNWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34685 { 15127 /* vpsignw */, X86::VPSIGNWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34686 { 15135 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34687 { 15135 /* vpslld */, X86::VPSLLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34688 { 15135 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34689 { 15135 /* vpslld */, X86::VPSLLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34690 { 15135 /* vpslld */, X86::VPSLLDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34691 { 15135 /* vpslld */, X86::VPSLLDYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
34692 { 15135 /* vpslld */, X86::VPSLLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34693 { 15135 /* vpslld */, X86::VPSLLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34694 { 15135 /* vpslld */, X86::VPSLLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34695 { 15135 /* vpslld */, X86::VPSLLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34696 { 15135 /* vpslld */, X86::VPSLLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
34697 { 15135 /* vpslld */, X86::VPSLLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34698 { 15135 /* vpslld */, X86::VPSLLDZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
34699 { 15135 /* vpslld */, X86::VPSLLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34700 { 15135 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34701 { 15135 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34702 { 15135 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34703 { 15135 /* vpslld */, X86::VPSLLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34704 { 15135 /* vpslld */, X86::VPSLLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34705 { 15135 /* vpslld */, X86::VPSLLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34706 { 15135 /* vpslld */, X86::VPSLLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34707 { 15135 /* vpslld */, X86::VPSLLDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34708 { 15135 /* vpslld */, X86::VPSLLDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34709 { 15135 /* vpslld */, X86::VPSLLDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34710 { 15135 /* vpslld */, X86::VPSLLDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34711 { 15135 /* vpslld */, X86::VPSLLDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
34712 { 15135 /* vpslld */, X86::VPSLLDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34713 { 15135 /* vpslld */, X86::VPSLLDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
34714 { 15135 /* vpslld */, X86::VPSLLDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34715 { 15135 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34716 { 15135 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34717 { 15135 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34718 { 15135 /* vpslld */, X86::VPSLLDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34719 { 15135 /* vpslld */, X86::VPSLLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34720 { 15135 /* vpslld */, X86::VPSLLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34721 { 15135 /* vpslld */, X86::VPSLLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34722 { 15135 /* vpslld */, X86::VPSLLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34723 { 15135 /* vpslld */, X86::VPSLLDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34724 { 15135 /* vpslld */, X86::VPSLLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
34725 { 15135 /* vpslld */, X86::VPSLLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34726 { 15135 /* vpslld */, X86::VPSLLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
34727 { 15135 /* vpslld */, X86::VPSLLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34728 { 15135 /* vpslld */, X86::VPSLLDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34729 { 15135 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34730 { 15135 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34731 { 15135 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34732 { 15135 /* vpslld */, X86::VPSLLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34733 { 15135 /* vpslld */, X86::VPSLLDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34734 { 15135 /* vpslld */, X86::VPSLLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34735 { 15135 /* vpslld */, X86::VPSLLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34736 { 15135 /* vpslld */, X86::VPSLLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34737 { 15142 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34738 { 15142 /* vpslldq */, X86::VPSLLDQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34739 { 15142 /* vpslldq */, X86::VPSLLDQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34740 { 15142 /* vpslldq */, X86::VPSLLDQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34741 { 15142 /* vpslldq */, X86::VPSLLDQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34742 { 15142 /* vpslldq */, X86::VPSLLDQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34743 { 15142 /* vpslldq */, X86::VPSLLDQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34744 { 15142 /* vpslldq */, X86::VPSLLDQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34745 { 15150 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34746 { 15150 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34747 { 15150 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34748 { 15150 /* vpsllq */, X86::VPSLLQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34749 { 15150 /* vpsllq */, X86::VPSLLQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34750 { 15150 /* vpsllq */, X86::VPSLLQYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
34751 { 15150 /* vpsllq */, X86::VPSLLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34752 { 15150 /* vpsllq */, X86::VPSLLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34753 { 15150 /* vpsllq */, X86::VPSLLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34754 { 15150 /* vpsllq */, X86::VPSLLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34755 { 15150 /* vpsllq */, X86::VPSLLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
34756 { 15150 /* vpsllq */, X86::VPSLLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34757 { 15150 /* vpsllq */, X86::VPSLLQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
34758 { 15150 /* vpsllq */, X86::VPSLLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34759 { 15150 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34760 { 15150 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34761 { 15150 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34762 { 15150 /* vpsllq */, X86::VPSLLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34763 { 15150 /* vpsllq */, X86::VPSLLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34764 { 15150 /* vpsllq */, X86::VPSLLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34765 { 15150 /* vpsllq */, X86::VPSLLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34766 { 15150 /* vpsllq */, X86::VPSLLQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34767 { 15150 /* vpsllq */, X86::VPSLLQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34768 { 15150 /* vpsllq */, X86::VPSLLQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34769 { 15150 /* vpsllq */, X86::VPSLLQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34770 { 15150 /* vpsllq */, X86::VPSLLQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
34771 { 15150 /* vpsllq */, X86::VPSLLQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34772 { 15150 /* vpsllq */, X86::VPSLLQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
34773 { 15150 /* vpsllq */, X86::VPSLLQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34774 { 15150 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34775 { 15150 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34776 { 15150 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34777 { 15150 /* vpsllq */, X86::VPSLLQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34778 { 15150 /* vpsllq */, X86::VPSLLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34779 { 15150 /* vpsllq */, X86::VPSLLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34780 { 15150 /* vpsllq */, X86::VPSLLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34781 { 15150 /* vpsllq */, X86::VPSLLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34782 { 15150 /* vpsllq */, X86::VPSLLQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34783 { 15150 /* vpsllq */, X86::VPSLLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
34784 { 15150 /* vpsllq */, X86::VPSLLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34785 { 15150 /* vpsllq */, X86::VPSLLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
34786 { 15150 /* vpsllq */, X86::VPSLLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34787 { 15150 /* vpsllq */, X86::VPSLLQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34788 { 15150 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34789 { 15150 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34790 { 15150 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34791 { 15150 /* vpsllq */, X86::VPSLLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34792 { 15150 /* vpsllq */, X86::VPSLLQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34793 { 15150 /* vpsllq */, X86::VPSLLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34794 { 15150 /* vpsllq */, X86::VPSLLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34795 { 15150 /* vpsllq */, X86::VPSLLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34796 { 15157 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34797 { 15157 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34798 { 15157 /* vpsllvd */, X86::VPSLLVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34799 { 15157 /* vpsllvd */, X86::VPSLLVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34800 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34801 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34802 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34803 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34804 { 15157 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34805 { 15157 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34806 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34807 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34808 { 15157 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34809 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34810 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34811 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34812 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34813 { 15157 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34814 { 15157 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34815 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34816 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34817 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34818 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34819 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34820 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34821 { 15157 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34822 { 15157 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34823 { 15157 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34824 { 15157 /* vpsllvd */, X86::VPSLLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34825 { 15157 /* vpsllvd */, X86::VPSLLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34826 { 15157 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34827 { 15165 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34828 { 15165 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34829 { 15165 /* vpsllvq */, X86::VPSLLVQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34830 { 15165 /* vpsllvq */, X86::VPSLLVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34831 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34832 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34833 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34834 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34835 { 15165 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34836 { 15165 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34837 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34838 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34839 { 15165 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34840 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34841 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34842 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34843 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34844 { 15165 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34845 { 15165 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34846 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34847 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34848 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34849 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34850 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34851 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34852 { 15165 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34853 { 15165 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34854 { 15165 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34855 { 15165 /* vpsllvq */, X86::VPSLLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34856 { 15165 /* vpsllvq */, X86::VPSLLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34857 { 15165 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34858 { 15173 /* vpsllvw */, X86::VPSLLVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34859 { 15173 /* vpsllvw */, X86::VPSLLVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34860 { 15173 /* vpsllvw */, X86::VPSLLVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34861 { 15173 /* vpsllvw */, X86::VPSLLVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34862 { 15173 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34863 { 15173 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34864 { 15173 /* vpsllvw */, X86::VPSLLVWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34865 { 15173 /* vpsllvw */, X86::VPSLLVWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34866 { 15173 /* vpsllvw */, X86::VPSLLVWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34867 { 15173 /* vpsllvw */, X86::VPSLLVWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34868 { 15173 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34869 { 15173 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34870 { 15173 /* vpsllvw */, X86::VPSLLVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34871 { 15173 /* vpsllvw */, X86::VPSLLVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34872 { 15173 /* vpsllvw */, X86::VPSLLVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34873 { 15173 /* vpsllvw */, X86::VPSLLVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34874 { 15173 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34875 { 15173 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34876 { 15181 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34877 { 15181 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34878 { 15181 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34879 { 15181 /* vpsllw */, X86::VPSLLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34880 { 15181 /* vpsllw */, X86::VPSLLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34881 { 15181 /* vpsllw */, X86::VPSLLWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
34882 { 15181 /* vpsllw */, X86::VPSLLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34883 { 15181 /* vpsllw */, X86::VPSLLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34884 { 15181 /* vpsllw */, X86::VPSLLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34885 { 15181 /* vpsllw */, X86::VPSLLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34886 { 15181 /* vpsllw */, X86::VPSLLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
34887 { 15181 /* vpsllw */, X86::VPSLLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34888 { 15181 /* vpsllw */, X86::VPSLLWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
34889 { 15181 /* vpsllw */, X86::VPSLLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34890 { 15181 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34891 { 15181 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34892 { 15181 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34893 { 15181 /* vpsllw */, X86::VPSLLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34894 { 15181 /* vpsllw */, X86::VPSLLWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34895 { 15181 /* vpsllw */, X86::VPSLLWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34896 { 15181 /* vpsllw */, X86::VPSLLWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34897 { 15181 /* vpsllw */, X86::VPSLLWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34898 { 15181 /* vpsllw */, X86::VPSLLWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
34899 { 15181 /* vpsllw */, X86::VPSLLWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34900 { 15181 /* vpsllw */, X86::VPSLLWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
34901 { 15181 /* vpsllw */, X86::VPSLLWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34902 { 15181 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34903 { 15181 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34904 { 15181 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34905 { 15181 /* vpsllw */, X86::VPSLLWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34906 { 15181 /* vpsllw */, X86::VPSLLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34907 { 15181 /* vpsllw */, X86::VPSLLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34908 { 15181 /* vpsllw */, X86::VPSLLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34909 { 15181 /* vpsllw */, X86::VPSLLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34910 { 15181 /* vpsllw */, X86::VPSLLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
34911 { 15181 /* vpsllw */, X86::VPSLLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34912 { 15181 /* vpsllw */, X86::VPSLLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
34913 { 15181 /* vpsllw */, X86::VPSLLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34914 { 15181 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34915 { 15181 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34916 { 15181 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34917 { 15181 /* vpsllw */, X86::VPSLLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34918 { 15188 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34919 { 15188 /* vpsrad */, X86::VPSRADri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34920 { 15188 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34921 { 15188 /* vpsrad */, X86::VPSRADYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34922 { 15188 /* vpsrad */, X86::VPSRADYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34923 { 15188 /* vpsrad */, X86::VPSRADYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
34924 { 15188 /* vpsrad */, X86::VPSRADZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34925 { 15188 /* vpsrad */, X86::VPSRADZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34926 { 15188 /* vpsrad */, X86::VPSRADZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34927 { 15188 /* vpsrad */, X86::VPSRADZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34928 { 15188 /* vpsrad */, X86::VPSRADZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
34929 { 15188 /* vpsrad */, X86::VPSRADZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34930 { 15188 /* vpsrad */, X86::VPSRADZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
34931 { 15188 /* vpsrad */, X86::VPSRADZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34932 { 15188 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34933 { 15188 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34934 { 15188 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34935 { 15188 /* vpsrad */, X86::VPSRADZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34936 { 15188 /* vpsrad */, X86::VPSRADZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34937 { 15188 /* vpsrad */, X86::VPSRADZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34938 { 15188 /* vpsrad */, X86::VPSRADZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34939 { 15188 /* vpsrad */, X86::VPSRADZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34940 { 15188 /* vpsrad */, X86::VPSRADZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34941 { 15188 /* vpsrad */, X86::VPSRADZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34942 { 15188 /* vpsrad */, X86::VPSRADZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34943 { 15188 /* vpsrad */, X86::VPSRADZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
34944 { 15188 /* vpsrad */, X86::VPSRADZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34945 { 15188 /* vpsrad */, X86::VPSRADZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
34946 { 15188 /* vpsrad */, X86::VPSRADZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34947 { 15188 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34948 { 15188 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34949 { 15188 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34950 { 15188 /* vpsrad */, X86::VPSRADZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34951 { 15188 /* vpsrad */, X86::VPSRADZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34952 { 15188 /* vpsrad */, X86::VPSRADZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34953 { 15188 /* vpsrad */, X86::VPSRADZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34954 { 15188 /* vpsrad */, X86::VPSRADZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34955 { 15188 /* vpsrad */, X86::VPSRADZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34956 { 15188 /* vpsrad */, X86::VPSRADZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
34957 { 15188 /* vpsrad */, X86::VPSRADZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34958 { 15188 /* vpsrad */, X86::VPSRADZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
34959 { 15188 /* vpsrad */, X86::VPSRADZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34960 { 15188 /* vpsrad */, X86::VPSRADZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34961 { 15188 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34962 { 15188 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34963 { 15188 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34964 { 15188 /* vpsrad */, X86::VPSRADZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34965 { 15188 /* vpsrad */, X86::VPSRADZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34966 { 15188 /* vpsrad */, X86::VPSRADZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34967 { 15188 /* vpsrad */, X86::VPSRADZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34968 { 15188 /* vpsrad */, X86::VPSRADZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34969 { 15195 /* vpsraq */, X86::VPSRAQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34970 { 15195 /* vpsraq */, X86::VPSRAQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34971 { 15195 /* vpsraq */, X86::VPSRAQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34972 { 15195 /* vpsraq */, X86::VPSRAQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34973 { 15195 /* vpsraq */, X86::VPSRAQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
34974 { 15195 /* vpsraq */, X86::VPSRAQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34975 { 15195 /* vpsraq */, X86::VPSRAQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
34976 { 15195 /* vpsraq */, X86::VPSRAQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34977 { 15195 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34978 { 15195 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34979 { 15195 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34980 { 15195 /* vpsraq */, X86::VPSRAQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34981 { 15195 /* vpsraq */, X86::VPSRAQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34982 { 15195 /* vpsraq */, X86::VPSRAQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34983 { 15195 /* vpsraq */, X86::VPSRAQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34984 { 15195 /* vpsraq */, X86::VPSRAQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34985 { 15195 /* vpsraq */, X86::VPSRAQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34986 { 15195 /* vpsraq */, X86::VPSRAQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34987 { 15195 /* vpsraq */, X86::VPSRAQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34988 { 15195 /* vpsraq */, X86::VPSRAQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
34989 { 15195 /* vpsraq */, X86::VPSRAQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34990 { 15195 /* vpsraq */, X86::VPSRAQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
34991 { 15195 /* vpsraq */, X86::VPSRAQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34992 { 15195 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34993 { 15195 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34994 { 15195 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34995 { 15195 /* vpsraq */, X86::VPSRAQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34996 { 15195 /* vpsraq */, X86::VPSRAQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34997 { 15195 /* vpsraq */, X86::VPSRAQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34998 { 15195 /* vpsraq */, X86::VPSRAQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34999 { 15195 /* vpsraq */, X86::VPSRAQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35000 { 15195 /* vpsraq */, X86::VPSRAQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35001 { 15195 /* vpsraq */, X86::VPSRAQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
35002 { 15195 /* vpsraq */, X86::VPSRAQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35003 { 15195 /* vpsraq */, X86::VPSRAQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
35004 { 15195 /* vpsraq */, X86::VPSRAQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35005 { 15195 /* vpsraq */, X86::VPSRAQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35006 { 15195 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
35007 { 15195 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35008 { 15195 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
35009 { 15195 /* vpsraq */, X86::VPSRAQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35010 { 15195 /* vpsraq */, X86::VPSRAQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35011 { 15195 /* vpsraq */, X86::VPSRAQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35012 { 15195 /* vpsraq */, X86::VPSRAQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35013 { 15195 /* vpsraq */, X86::VPSRAQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35014 { 15202 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35015 { 15202 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35016 { 15202 /* vpsravd */, X86::VPSRAVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35017 { 15202 /* vpsravd */, X86::VPSRAVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35018 { 15202 /* vpsravd */, X86::VPSRAVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35019 { 15202 /* vpsravd */, X86::VPSRAVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35020 { 15202 /* vpsravd */, X86::VPSRAVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35021 { 15202 /* vpsravd */, X86::VPSRAVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35022 { 15202 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35023 { 15202 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35024 { 15202 /* vpsravd */, X86::VPSRAVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35025 { 15202 /* vpsravd */, X86::VPSRAVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35026 { 15202 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35027 { 15202 /* vpsravd */, X86::VPSRAVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35028 { 15202 /* vpsravd */, X86::VPSRAVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35029 { 15202 /* vpsravd */, X86::VPSRAVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35030 { 15202 /* vpsravd */, X86::VPSRAVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35031 { 15202 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35032 { 15202 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35033 { 15202 /* vpsravd */, X86::VPSRAVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35034 { 15202 /* vpsravd */, X86::VPSRAVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35035 { 15202 /* vpsravd */, X86::VPSRAVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35036 { 15202 /* vpsravd */, X86::VPSRAVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35037 { 15202 /* vpsravd */, X86::VPSRAVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35038 { 15202 /* vpsravd */, X86::VPSRAVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35039 { 15202 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35040 { 15202 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35041 { 15202 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35042 { 15202 /* vpsravd */, X86::VPSRAVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35043 { 15202 /* vpsravd */, X86::VPSRAVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35044 { 15202 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35045 { 15210 /* vpsravq */, X86::VPSRAVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35046 { 15210 /* vpsravq */, X86::VPSRAVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35047 { 15210 /* vpsravq */, X86::VPSRAVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35048 { 15210 /* vpsravq */, X86::VPSRAVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35049 { 15210 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35050 { 15210 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35051 { 15210 /* vpsravq */, X86::VPSRAVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35052 { 15210 /* vpsravq */, X86::VPSRAVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35053 { 15210 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35054 { 15210 /* vpsravq */, X86::VPSRAVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35055 { 15210 /* vpsravq */, X86::VPSRAVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35056 { 15210 /* vpsravq */, X86::VPSRAVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35057 { 15210 /* vpsravq */, X86::VPSRAVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35058 { 15210 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35059 { 15210 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35060 { 15210 /* vpsravq */, X86::VPSRAVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35061 { 15210 /* vpsravq */, X86::VPSRAVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35062 { 15210 /* vpsravq */, X86::VPSRAVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35063 { 15210 /* vpsravq */, X86::VPSRAVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35064 { 15210 /* vpsravq */, X86::VPSRAVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35065 { 15210 /* vpsravq */, X86::VPSRAVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35066 { 15210 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35067 { 15210 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35068 { 15210 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35069 { 15210 /* vpsravq */, X86::VPSRAVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35070 { 15210 /* vpsravq */, X86::VPSRAVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35071 { 15210 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35072 { 15218 /* vpsravw */, X86::VPSRAVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35073 { 15218 /* vpsravw */, X86::VPSRAVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35074 { 15218 /* vpsravw */, X86::VPSRAVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35075 { 15218 /* vpsravw */, X86::VPSRAVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35076 { 15218 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35077 { 15218 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35078 { 15218 /* vpsravw */, X86::VPSRAVWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35079 { 15218 /* vpsravw */, X86::VPSRAVWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35080 { 15218 /* vpsravw */, X86::VPSRAVWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35081 { 15218 /* vpsravw */, X86::VPSRAVWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35082 { 15218 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35083 { 15218 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35084 { 15218 /* vpsravw */, X86::VPSRAVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35085 { 15218 /* vpsravw */, X86::VPSRAVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35086 { 15218 /* vpsravw */, X86::VPSRAVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35087 { 15218 /* vpsravw */, X86::VPSRAVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35088 { 15218 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35089 { 15218 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35090 { 15226 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35091 { 15226 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35092 { 15226 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35093 { 15226 /* vpsraw */, X86::VPSRAWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
35094 { 15226 /* vpsraw */, X86::VPSRAWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35095 { 15226 /* vpsraw */, X86::VPSRAWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
35096 { 15226 /* vpsraw */, X86::VPSRAWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35097 { 15226 /* vpsraw */, X86::VPSRAWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35098 { 15226 /* vpsraw */, X86::VPSRAWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35099 { 15226 /* vpsraw */, X86::VPSRAWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35100 { 15226 /* vpsraw */, X86::VPSRAWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
35101 { 15226 /* vpsraw */, X86::VPSRAWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35102 { 15226 /* vpsraw */, X86::VPSRAWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
35103 { 15226 /* vpsraw */, X86::VPSRAWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35104 { 15226 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
35105 { 15226 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35106 { 15226 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
35107 { 15226 /* vpsraw */, X86::VPSRAWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35108 { 15226 /* vpsraw */, X86::VPSRAWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35109 { 15226 /* vpsraw */, X86::VPSRAWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35110 { 15226 /* vpsraw */, X86::VPSRAWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35111 { 15226 /* vpsraw */, X86::VPSRAWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35112 { 15226 /* vpsraw */, X86::VPSRAWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
35113 { 15226 /* vpsraw */, X86::VPSRAWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35114 { 15226 /* vpsraw */, X86::VPSRAWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
35115 { 15226 /* vpsraw */, X86::VPSRAWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35116 { 15226 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
35117 { 15226 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35118 { 15226 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
35119 { 15226 /* vpsraw */, X86::VPSRAWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35120 { 15226 /* vpsraw */, X86::VPSRAWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35121 { 15226 /* vpsraw */, X86::VPSRAWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35122 { 15226 /* vpsraw */, X86::VPSRAWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35123 { 15226 /* vpsraw */, X86::VPSRAWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35124 { 15226 /* vpsraw */, X86::VPSRAWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
35125 { 15226 /* vpsraw */, X86::VPSRAWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35126 { 15226 /* vpsraw */, X86::VPSRAWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
35127 { 15226 /* vpsraw */, X86::VPSRAWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35128 { 15226 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
35129 { 15226 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35130 { 15226 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
35131 { 15226 /* vpsraw */, X86::VPSRAWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35132 { 15233 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35133 { 15233 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35134 { 15233 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35135 { 15233 /* vpsrld */, X86::VPSRLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
35136 { 15233 /* vpsrld */, X86::VPSRLDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35137 { 15233 /* vpsrld */, X86::VPSRLDYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
35138 { 15233 /* vpsrld */, X86::VPSRLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35139 { 15233 /* vpsrld */, X86::VPSRLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35140 { 15233 /* vpsrld */, X86::VPSRLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35141 { 15233 /* vpsrld */, X86::VPSRLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35142 { 15233 /* vpsrld */, X86::VPSRLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
35143 { 15233 /* vpsrld */, X86::VPSRLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35144 { 15233 /* vpsrld */, X86::VPSRLDZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
35145 { 15233 /* vpsrld */, X86::VPSRLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35146 { 15233 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
35147 { 15233 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35148 { 15233 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
35149 { 15233 /* vpsrld */, X86::VPSRLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35150 { 15233 /* vpsrld */, X86::VPSRLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35151 { 15233 /* vpsrld */, X86::VPSRLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35152 { 15233 /* vpsrld */, X86::VPSRLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35153 { 15233 /* vpsrld */, X86::VPSRLDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35154 { 15233 /* vpsrld */, X86::VPSRLDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35155 { 15233 /* vpsrld */, X86::VPSRLDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35156 { 15233 /* vpsrld */, X86::VPSRLDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35157 { 15233 /* vpsrld */, X86::VPSRLDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
35158 { 15233 /* vpsrld */, X86::VPSRLDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35159 { 15233 /* vpsrld */, X86::VPSRLDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
35160 { 15233 /* vpsrld */, X86::VPSRLDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35161 { 15233 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
35162 { 15233 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35163 { 15233 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
35164 { 15233 /* vpsrld */, X86::VPSRLDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35165 { 15233 /* vpsrld */, X86::VPSRLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35166 { 15233 /* vpsrld */, X86::VPSRLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35167 { 15233 /* vpsrld */, X86::VPSRLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35168 { 15233 /* vpsrld */, X86::VPSRLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35169 { 15233 /* vpsrld */, X86::VPSRLDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35170 { 15233 /* vpsrld */, X86::VPSRLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
35171 { 15233 /* vpsrld */, X86::VPSRLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35172 { 15233 /* vpsrld */, X86::VPSRLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
35173 { 15233 /* vpsrld */, X86::VPSRLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35174 { 15233 /* vpsrld */, X86::VPSRLDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35175 { 15233 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
35176 { 15233 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35177 { 15233 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
35178 { 15233 /* vpsrld */, X86::VPSRLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35179 { 15233 /* vpsrld */, X86::VPSRLDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35180 { 15233 /* vpsrld */, X86::VPSRLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35181 { 15233 /* vpsrld */, X86::VPSRLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35182 { 15233 /* vpsrld */, X86::VPSRLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35183 { 15240 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35184 { 15240 /* vpsrldq */, X86::VPSRLDQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35185 { 15240 /* vpsrldq */, X86::VPSRLDQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35186 { 15240 /* vpsrldq */, X86::VPSRLDQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35187 { 15240 /* vpsrldq */, X86::VPSRLDQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35188 { 15240 /* vpsrldq */, X86::VPSRLDQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35189 { 15240 /* vpsrldq */, X86::VPSRLDQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35190 { 15240 /* vpsrldq */, X86::VPSRLDQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35191 { 15248 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35192 { 15248 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35193 { 15248 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35194 { 15248 /* vpsrlq */, X86::VPSRLQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
35195 { 15248 /* vpsrlq */, X86::VPSRLQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35196 { 15248 /* vpsrlq */, X86::VPSRLQYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
35197 { 15248 /* vpsrlq */, X86::VPSRLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35198 { 15248 /* vpsrlq */, X86::VPSRLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35199 { 15248 /* vpsrlq */, X86::VPSRLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35200 { 15248 /* vpsrlq */, X86::VPSRLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35201 { 15248 /* vpsrlq */, X86::VPSRLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
35202 { 15248 /* vpsrlq */, X86::VPSRLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35203 { 15248 /* vpsrlq */, X86::VPSRLQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
35204 { 15248 /* vpsrlq */, X86::VPSRLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35205 { 15248 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
35206 { 15248 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35207 { 15248 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
35208 { 15248 /* vpsrlq */, X86::VPSRLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35209 { 15248 /* vpsrlq */, X86::VPSRLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35210 { 15248 /* vpsrlq */, X86::VPSRLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35211 { 15248 /* vpsrlq */, X86::VPSRLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35212 { 15248 /* vpsrlq */, X86::VPSRLQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35213 { 15248 /* vpsrlq */, X86::VPSRLQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35214 { 15248 /* vpsrlq */, X86::VPSRLQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35215 { 15248 /* vpsrlq */, X86::VPSRLQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35216 { 15248 /* vpsrlq */, X86::VPSRLQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
35217 { 15248 /* vpsrlq */, X86::VPSRLQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35218 { 15248 /* vpsrlq */, X86::VPSRLQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
35219 { 15248 /* vpsrlq */, X86::VPSRLQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35220 { 15248 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
35221 { 15248 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35222 { 15248 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
35223 { 15248 /* vpsrlq */, X86::VPSRLQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35224 { 15248 /* vpsrlq */, X86::VPSRLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35225 { 15248 /* vpsrlq */, X86::VPSRLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35226 { 15248 /* vpsrlq */, X86::VPSRLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35227 { 15248 /* vpsrlq */, X86::VPSRLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35228 { 15248 /* vpsrlq */, X86::VPSRLQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35229 { 15248 /* vpsrlq */, X86::VPSRLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
35230 { 15248 /* vpsrlq */, X86::VPSRLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35231 { 15248 /* vpsrlq */, X86::VPSRLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
35232 { 15248 /* vpsrlq */, X86::VPSRLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35233 { 15248 /* vpsrlq */, X86::VPSRLQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35234 { 15248 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
35235 { 15248 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35236 { 15248 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
35237 { 15248 /* vpsrlq */, X86::VPSRLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35238 { 15248 /* vpsrlq */, X86::VPSRLQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35239 { 15248 /* vpsrlq */, X86::VPSRLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35240 { 15248 /* vpsrlq */, X86::VPSRLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35241 { 15248 /* vpsrlq */, X86::VPSRLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35242 { 15255 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35243 { 15255 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35244 { 15255 /* vpsrlvd */, X86::VPSRLVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35245 { 15255 /* vpsrlvd */, X86::VPSRLVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35246 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35247 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35248 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35249 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35250 { 15255 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35251 { 15255 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35252 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35253 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35254 { 15255 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35255 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35256 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35257 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35258 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35259 { 15255 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35260 { 15255 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35261 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35262 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35263 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35264 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35265 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35266 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35267 { 15255 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35268 { 15255 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35269 { 15255 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35270 { 15255 /* vpsrlvd */, X86::VPSRLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35271 { 15255 /* vpsrlvd */, X86::VPSRLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35272 { 15255 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35273 { 15263 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35274 { 15263 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35275 { 15263 /* vpsrlvq */, X86::VPSRLVQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35276 { 15263 /* vpsrlvq */, X86::VPSRLVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35277 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35278 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35279 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35280 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35281 { 15263 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35282 { 15263 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35283 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35284 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35285 { 15263 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35286 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35287 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35288 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35289 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35290 { 15263 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35291 { 15263 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35292 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35293 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35294 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35295 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35296 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35297 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35298 { 15263 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35299 { 15263 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35300 { 15263 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35301 { 15263 /* vpsrlvq */, X86::VPSRLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35302 { 15263 /* vpsrlvq */, X86::VPSRLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35303 { 15263 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35304 { 15271 /* vpsrlvw */, X86::VPSRLVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35305 { 15271 /* vpsrlvw */, X86::VPSRLVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35306 { 15271 /* vpsrlvw */, X86::VPSRLVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35307 { 15271 /* vpsrlvw */, X86::VPSRLVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35308 { 15271 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35309 { 15271 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35310 { 15271 /* vpsrlvw */, X86::VPSRLVWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35311 { 15271 /* vpsrlvw */, X86::VPSRLVWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35312 { 15271 /* vpsrlvw */, X86::VPSRLVWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35313 { 15271 /* vpsrlvw */, X86::VPSRLVWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35314 { 15271 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35315 { 15271 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35316 { 15271 /* vpsrlvw */, X86::VPSRLVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35317 { 15271 /* vpsrlvw */, X86::VPSRLVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35318 { 15271 /* vpsrlvw */, X86::VPSRLVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35319 { 15271 /* vpsrlvw */, X86::VPSRLVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35320 { 15271 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35321 { 15271 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35322 { 15279 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35323 { 15279 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35324 { 15279 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35325 { 15279 /* vpsrlw */, X86::VPSRLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
35326 { 15279 /* vpsrlw */, X86::VPSRLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35327 { 15279 /* vpsrlw */, X86::VPSRLWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
35328 { 15279 /* vpsrlw */, X86::VPSRLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35329 { 15279 /* vpsrlw */, X86::VPSRLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35330 { 15279 /* vpsrlw */, X86::VPSRLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35331 { 15279 /* vpsrlw */, X86::VPSRLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35332 { 15279 /* vpsrlw */, X86::VPSRLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
35333 { 15279 /* vpsrlw */, X86::VPSRLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35334 { 15279 /* vpsrlw */, X86::VPSRLWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
35335 { 15279 /* vpsrlw */, X86::VPSRLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35336 { 15279 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
35337 { 15279 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35338 { 15279 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
35339 { 15279 /* vpsrlw */, X86::VPSRLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35340 { 15279 /* vpsrlw */, X86::VPSRLWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35341 { 15279 /* vpsrlw */, X86::VPSRLWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35342 { 15279 /* vpsrlw */, X86::VPSRLWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35343 { 15279 /* vpsrlw */, X86::VPSRLWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35344 { 15279 /* vpsrlw */, X86::VPSRLWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
35345 { 15279 /* vpsrlw */, X86::VPSRLWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35346 { 15279 /* vpsrlw */, X86::VPSRLWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
35347 { 15279 /* vpsrlw */, X86::VPSRLWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35348 { 15279 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
35349 { 15279 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35350 { 15279 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
35351 { 15279 /* vpsrlw */, X86::VPSRLWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35352 { 15279 /* vpsrlw */, X86::VPSRLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35353 { 15279 /* vpsrlw */, X86::VPSRLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35354 { 15279 /* vpsrlw */, X86::VPSRLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35355 { 15279 /* vpsrlw */, X86::VPSRLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35356 { 15279 /* vpsrlw */, X86::VPSRLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
35357 { 15279 /* vpsrlw */, X86::VPSRLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35358 { 15279 /* vpsrlw */, X86::VPSRLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
35359 { 15279 /* vpsrlw */, X86::VPSRLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35360 { 15279 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
35361 { 15279 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35362 { 15279 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
35363 { 15279 /* vpsrlw */, X86::VPSRLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35364 { 15286 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35365 { 15286 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35366 { 15286 /* vpsubb */, X86::VPSUBBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35367 { 15286 /* vpsubb */, X86::VPSUBBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35368 { 15286 /* vpsubb */, X86::VPSUBBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35369 { 15286 /* vpsubb */, X86::VPSUBBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35370 { 15286 /* vpsubb */, X86::VPSUBBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35371 { 15286 /* vpsubb */, X86::VPSUBBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35372 { 15286 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35373 { 15286 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35374 { 15286 /* vpsubb */, X86::VPSUBBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35375 { 15286 /* vpsubb */, X86::VPSUBBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35376 { 15286 /* vpsubb */, X86::VPSUBBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35377 { 15286 /* vpsubb */, X86::VPSUBBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35378 { 15286 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35379 { 15286 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35380 { 15286 /* vpsubb */, X86::VPSUBBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35381 { 15286 /* vpsubb */, X86::VPSUBBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35382 { 15286 /* vpsubb */, X86::VPSUBBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35383 { 15286 /* vpsubb */, X86::VPSUBBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35384 { 15286 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35385 { 15286 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35386 { 15293 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35387 { 15293 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35388 { 15293 /* vpsubd */, X86::VPSUBDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35389 { 15293 /* vpsubd */, X86::VPSUBDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35390 { 15293 /* vpsubd */, X86::VPSUBDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35391 { 15293 /* vpsubd */, X86::VPSUBDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35392 { 15293 /* vpsubd */, X86::VPSUBDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35393 { 15293 /* vpsubd */, X86::VPSUBDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35394 { 15293 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35395 { 15293 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35396 { 15293 /* vpsubd */, X86::VPSUBDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35397 { 15293 /* vpsubd */, X86::VPSUBDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35398 { 15293 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35399 { 15293 /* vpsubd */, X86::VPSUBDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35400 { 15293 /* vpsubd */, X86::VPSUBDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35401 { 15293 /* vpsubd */, X86::VPSUBDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35402 { 15293 /* vpsubd */, X86::VPSUBDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35403 { 15293 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35404 { 15293 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35405 { 15293 /* vpsubd */, X86::VPSUBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35406 { 15293 /* vpsubd */, X86::VPSUBDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35407 { 15293 /* vpsubd */, X86::VPSUBDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35408 { 15293 /* vpsubd */, X86::VPSUBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35409 { 15293 /* vpsubd */, X86::VPSUBDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35410 { 15293 /* vpsubd */, X86::VPSUBDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35411 { 15293 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35412 { 15293 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35413 { 15293 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35414 { 15293 /* vpsubd */, X86::VPSUBDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35415 { 15293 /* vpsubd */, X86::VPSUBDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35416 { 15293 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35417 { 15300 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35418 { 15300 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35419 { 15300 /* vpsubq */, X86::VPSUBQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35420 { 15300 /* vpsubq */, X86::VPSUBQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35421 { 15300 /* vpsubq */, X86::VPSUBQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35422 { 15300 /* vpsubq */, X86::VPSUBQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35423 { 15300 /* vpsubq */, X86::VPSUBQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35424 { 15300 /* vpsubq */, X86::VPSUBQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35425 { 15300 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35426 { 15300 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35427 { 15300 /* vpsubq */, X86::VPSUBQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35428 { 15300 /* vpsubq */, X86::VPSUBQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35429 { 15300 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35430 { 15300 /* vpsubq */, X86::VPSUBQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35431 { 15300 /* vpsubq */, X86::VPSUBQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35432 { 15300 /* vpsubq */, X86::VPSUBQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35433 { 15300 /* vpsubq */, X86::VPSUBQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35434 { 15300 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35435 { 15300 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35436 { 15300 /* vpsubq */, X86::VPSUBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35437 { 15300 /* vpsubq */, X86::VPSUBQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35438 { 15300 /* vpsubq */, X86::VPSUBQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35439 { 15300 /* vpsubq */, X86::VPSUBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35440 { 15300 /* vpsubq */, X86::VPSUBQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35441 { 15300 /* vpsubq */, X86::VPSUBQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35442 { 15300 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35443 { 15300 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35444 { 15300 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35445 { 15300 /* vpsubq */, X86::VPSUBQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35446 { 15300 /* vpsubq */, X86::VPSUBQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35447 { 15300 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35448 { 15307 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35449 { 15307 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35450 { 15307 /* vpsubsb */, X86::VPSUBSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35451 { 15307 /* vpsubsb */, X86::VPSUBSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35452 { 15307 /* vpsubsb */, X86::VPSUBSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35453 { 15307 /* vpsubsb */, X86::VPSUBSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35454 { 15307 /* vpsubsb */, X86::VPSUBSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35455 { 15307 /* vpsubsb */, X86::VPSUBSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35456 { 15307 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35457 { 15307 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35458 { 15307 /* vpsubsb */, X86::VPSUBSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35459 { 15307 /* vpsubsb */, X86::VPSUBSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35460 { 15307 /* vpsubsb */, X86::VPSUBSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35461 { 15307 /* vpsubsb */, X86::VPSUBSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35462 { 15307 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35463 { 15307 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35464 { 15307 /* vpsubsb */, X86::VPSUBSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35465 { 15307 /* vpsubsb */, X86::VPSUBSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35466 { 15307 /* vpsubsb */, X86::VPSUBSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35467 { 15307 /* vpsubsb */, X86::VPSUBSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35468 { 15307 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35469 { 15307 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35470 { 15315 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35471 { 15315 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35472 { 15315 /* vpsubsw */, X86::VPSUBSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35473 { 15315 /* vpsubsw */, X86::VPSUBSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35474 { 15315 /* vpsubsw */, X86::VPSUBSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35475 { 15315 /* vpsubsw */, X86::VPSUBSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35476 { 15315 /* vpsubsw */, X86::VPSUBSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35477 { 15315 /* vpsubsw */, X86::VPSUBSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35478 { 15315 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35479 { 15315 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35480 { 15315 /* vpsubsw */, X86::VPSUBSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35481 { 15315 /* vpsubsw */, X86::VPSUBSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35482 { 15315 /* vpsubsw */, X86::VPSUBSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35483 { 15315 /* vpsubsw */, X86::VPSUBSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35484 { 15315 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35485 { 15315 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35486 { 15315 /* vpsubsw */, X86::VPSUBSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35487 { 15315 /* vpsubsw */, X86::VPSUBSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35488 { 15315 /* vpsubsw */, X86::VPSUBSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35489 { 15315 /* vpsubsw */, X86::VPSUBSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35490 { 15315 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35491 { 15315 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35492 { 15323 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35493 { 15323 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35494 { 15323 /* vpsubusb */, X86::VPSUBUSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35495 { 15323 /* vpsubusb */, X86::VPSUBUSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35496 { 15323 /* vpsubusb */, X86::VPSUBUSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35497 { 15323 /* vpsubusb */, X86::VPSUBUSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35498 { 15323 /* vpsubusb */, X86::VPSUBUSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35499 { 15323 /* vpsubusb */, X86::VPSUBUSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35500 { 15323 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35501 { 15323 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35502 { 15323 /* vpsubusb */, X86::VPSUBUSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35503 { 15323 /* vpsubusb */, X86::VPSUBUSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35504 { 15323 /* vpsubusb */, X86::VPSUBUSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35505 { 15323 /* vpsubusb */, X86::VPSUBUSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35506 { 15323 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35507 { 15323 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35508 { 15323 /* vpsubusb */, X86::VPSUBUSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35509 { 15323 /* vpsubusb */, X86::VPSUBUSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35510 { 15323 /* vpsubusb */, X86::VPSUBUSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35511 { 15323 /* vpsubusb */, X86::VPSUBUSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35512 { 15323 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35513 { 15323 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35514 { 15332 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35515 { 15332 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35516 { 15332 /* vpsubusw */, X86::VPSUBUSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35517 { 15332 /* vpsubusw */, X86::VPSUBUSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35518 { 15332 /* vpsubusw */, X86::VPSUBUSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35519 { 15332 /* vpsubusw */, X86::VPSUBUSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35520 { 15332 /* vpsubusw */, X86::VPSUBUSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35521 { 15332 /* vpsubusw */, X86::VPSUBUSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35522 { 15332 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35523 { 15332 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35524 { 15332 /* vpsubusw */, X86::VPSUBUSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35525 { 15332 /* vpsubusw */, X86::VPSUBUSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35526 { 15332 /* vpsubusw */, X86::VPSUBUSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35527 { 15332 /* vpsubusw */, X86::VPSUBUSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35528 { 15332 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35529 { 15332 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35530 { 15332 /* vpsubusw */, X86::VPSUBUSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35531 { 15332 /* vpsubusw */, X86::VPSUBUSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35532 { 15332 /* vpsubusw */, X86::VPSUBUSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35533 { 15332 /* vpsubusw */, X86::VPSUBUSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35534 { 15332 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35535 { 15332 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35536 { 15341 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35537 { 15341 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35538 { 15341 /* vpsubw */, X86::VPSUBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35539 { 15341 /* vpsubw */, X86::VPSUBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35540 { 15341 /* vpsubw */, X86::VPSUBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35541 { 15341 /* vpsubw */, X86::VPSUBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35542 { 15341 /* vpsubw */, X86::VPSUBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35543 { 15341 /* vpsubw */, X86::VPSUBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35544 { 15341 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35545 { 15341 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35546 { 15341 /* vpsubw */, X86::VPSUBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35547 { 15341 /* vpsubw */, X86::VPSUBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35548 { 15341 /* vpsubw */, X86::VPSUBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35549 { 15341 /* vpsubw */, X86::VPSUBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35550 { 15341 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35551 { 15341 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35552 { 15341 /* vpsubw */, X86::VPSUBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35553 { 15341 /* vpsubw */, X86::VPSUBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35554 { 15341 /* vpsubw */, X86::VPSUBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35555 { 15341 /* vpsubw */, X86::VPSUBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35556 { 15341 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35557 { 15341 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35558 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35559 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35560 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35561 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35562 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35563 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35564 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35565 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35566 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35567 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35568 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35569 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35570 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35571 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35572 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35573 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35574 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35575 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35576 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35577 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35578 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35579 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35580 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35581 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35582 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35583 { 15348 /* vpternlogd */, X86::VPTERNLOGDZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35584 { 15348 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35585 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35586 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35587 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35588 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35589 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35590 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35591 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35592 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35593 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35594 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35595 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35596 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35597 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35598 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35599 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35600 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35601 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35602 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35603 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35604 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35605 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35606 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35607 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35608 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35609 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35610 { 15359 /* vpternlogq */, X86::VPTERNLOGQZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35611 { 15359 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35612 { 15370 /* vptest */, X86::VPTESTrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
35613 { 15370 /* vptest */, X86::VPTESTrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
35614 { 15370 /* vptest */, X86::VPTESTYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
35615 { 15370 /* vptest */, X86::VPTESTYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
35616 { 15377 /* vptestmb */, X86::VPTESTMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
35617 { 15377 /* vptestmb */, X86::VPTESTMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
35618 { 15377 /* vptestmb */, X86::VPTESTMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
35619 { 15377 /* vptestmb */, X86::VPTESTMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
35620 { 15377 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35621 { 15377 /* vptestmb */, X86::VPTESTMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35622 { 15377 /* vptestmb */, X86::VPTESTMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35623 { 15377 /* vptestmb */, X86::VPTESTMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35624 { 15377 /* vptestmb */, X86::VPTESTMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35625 { 15377 /* vptestmb */, X86::VPTESTMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35626 { 15377 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35627 { 15377 /* vptestmb */, X86::VPTESTMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35628 { 15386 /* vptestmd */, X86::VPTESTMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
35629 { 15386 /* vptestmd */, X86::VPTESTMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
35630 { 15386 /* vptestmd */, X86::VPTESTMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
35631 { 15386 /* vptestmd */, X86::VPTESTMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
35632 { 15386 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35633 { 15386 /* vptestmd */, X86::VPTESTMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35634 { 15386 /* vptestmd */, X86::VPTESTMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35635 { 15386 /* vptestmd */, X86::VPTESTMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35636 { 15386 /* vptestmd */, X86::VPTESTMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35637 { 15386 /* vptestmd */, X86::VPTESTMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35638 { 15386 /* vptestmd */, X86::VPTESTMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35639 { 15386 /* vptestmd */, X86::VPTESTMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35640 { 15386 /* vptestmd */, X86::VPTESTMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35641 { 15386 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35642 { 15386 /* vptestmd */, X86::VPTESTMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35643 { 15386 /* vptestmd */, X86::VPTESTMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35644 { 15386 /* vptestmd */, X86::VPTESTMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35645 { 15386 /* vptestmd */, X86::VPTESTMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35646 { 15395 /* vptestmq */, X86::VPTESTMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
35647 { 15395 /* vptestmq */, X86::VPTESTMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
35648 { 15395 /* vptestmq */, X86::VPTESTMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
35649 { 15395 /* vptestmq */, X86::VPTESTMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
35650 { 15395 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35651 { 15395 /* vptestmq */, X86::VPTESTMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35652 { 15395 /* vptestmq */, X86::VPTESTMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35653 { 15395 /* vptestmq */, X86::VPTESTMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35654 { 15395 /* vptestmq */, X86::VPTESTMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35655 { 15395 /* vptestmq */, X86::VPTESTMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35656 { 15395 /* vptestmq */, X86::VPTESTMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35657 { 15395 /* vptestmq */, X86::VPTESTMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35658 { 15395 /* vptestmq */, X86::VPTESTMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35659 { 15395 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35660 { 15395 /* vptestmq */, X86::VPTESTMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35661 { 15395 /* vptestmq */, X86::VPTESTMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35662 { 15395 /* vptestmq */, X86::VPTESTMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35663 { 15395 /* vptestmq */, X86::VPTESTMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35664 { 15404 /* vptestmw */, X86::VPTESTMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
35665 { 15404 /* vptestmw */, X86::VPTESTMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
35666 { 15404 /* vptestmw */, X86::VPTESTMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
35667 { 15404 /* vptestmw */, X86::VPTESTMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
35668 { 15404 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35669 { 15404 /* vptestmw */, X86::VPTESTMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35670 { 15404 /* vptestmw */, X86::VPTESTMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35671 { 15404 /* vptestmw */, X86::VPTESTMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35672 { 15404 /* vptestmw */, X86::VPTESTMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35673 { 15404 /* vptestmw */, X86::VPTESTMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35674 { 15404 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35675 { 15404 /* vptestmw */, X86::VPTESTMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35676 { 15413 /* vptestnmb */, X86::VPTESTNMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
35677 { 15413 /* vptestnmb */, X86::VPTESTNMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
35678 { 15413 /* vptestnmb */, X86::VPTESTNMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
35679 { 15413 /* vptestnmb */, X86::VPTESTNMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
35680 { 15413 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35681 { 15413 /* vptestnmb */, X86::VPTESTNMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35682 { 15413 /* vptestnmb */, X86::VPTESTNMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35683 { 15413 /* vptestnmb */, X86::VPTESTNMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35684 { 15413 /* vptestnmb */, X86::VPTESTNMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35685 { 15413 /* vptestnmb */, X86::VPTESTNMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35686 { 15413 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35687 { 15413 /* vptestnmb */, X86::VPTESTNMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35688 { 15423 /* vptestnmd */, X86::VPTESTNMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
35689 { 15423 /* vptestnmd */, X86::VPTESTNMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
35690 { 15423 /* vptestnmd */, X86::VPTESTNMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
35691 { 15423 /* vptestnmd */, X86::VPTESTNMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
35692 { 15423 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35693 { 15423 /* vptestnmd */, X86::VPTESTNMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35694 { 15423 /* vptestnmd */, X86::VPTESTNMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35695 { 15423 /* vptestnmd */, X86::VPTESTNMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35696 { 15423 /* vptestnmd */, X86::VPTESTNMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35697 { 15423 /* vptestnmd */, X86::VPTESTNMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35698 { 15423 /* vptestnmd */, X86::VPTESTNMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35699 { 15423 /* vptestnmd */, X86::VPTESTNMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35700 { 15423 /* vptestnmd */, X86::VPTESTNMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35701 { 15423 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35702 { 15423 /* vptestnmd */, X86::VPTESTNMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35703 { 15423 /* vptestnmd */, X86::VPTESTNMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35704 { 15423 /* vptestnmd */, X86::VPTESTNMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35705 { 15423 /* vptestnmd */, X86::VPTESTNMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35706 { 15433 /* vptestnmq */, X86::VPTESTNMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
35707 { 15433 /* vptestnmq */, X86::VPTESTNMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
35708 { 15433 /* vptestnmq */, X86::VPTESTNMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
35709 { 15433 /* vptestnmq */, X86::VPTESTNMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
35710 { 15433 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35711 { 15433 /* vptestnmq */, X86::VPTESTNMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35712 { 15433 /* vptestnmq */, X86::VPTESTNMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35713 { 15433 /* vptestnmq */, X86::VPTESTNMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35714 { 15433 /* vptestnmq */, X86::VPTESTNMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35715 { 15433 /* vptestnmq */, X86::VPTESTNMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35716 { 15433 /* vptestnmq */, X86::VPTESTNMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35717 { 15433 /* vptestnmq */, X86::VPTESTNMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35718 { 15433 /* vptestnmq */, X86::VPTESTNMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35719 { 15433 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35720 { 15433 /* vptestnmq */, X86::VPTESTNMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35721 { 15433 /* vptestnmq */, X86::VPTESTNMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35722 { 15433 /* vptestnmq */, X86::VPTESTNMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35723 { 15433 /* vptestnmq */, X86::VPTESTNMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35724 { 15443 /* vptestnmw */, X86::VPTESTNMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
35725 { 15443 /* vptestnmw */, X86::VPTESTNMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
35726 { 15443 /* vptestnmw */, X86::VPTESTNMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
35727 { 15443 /* vptestnmw */, X86::VPTESTNMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
35728 { 15443 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35729 { 15443 /* vptestnmw */, X86::VPTESTNMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35730 { 15443 /* vptestnmw */, X86::VPTESTNMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35731 { 15443 /* vptestnmw */, X86::VPTESTNMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35732 { 15443 /* vptestnmw */, X86::VPTESTNMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35733 { 15443 /* vptestnmw */, X86::VPTESTNMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35734 { 15443 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35735 { 15443 /* vptestnmw */, X86::VPTESTNMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35736 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35737 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35738 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35739 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35740 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35741 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35742 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35743 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35744 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35745 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35746 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35747 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35748 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35749 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35750 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35751 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35752 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35753 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35754 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35755 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35756 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35757 { 15453 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35758 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35759 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35760 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35761 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35762 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35763 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35764 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35765 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35766 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35767 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35768 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35769 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35770 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35771 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35772 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35773 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35774 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35775 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35776 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35777 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35778 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35779 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35780 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35781 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35782 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35783 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35784 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35785 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35786 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35787 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35788 { 15464 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35789 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35790 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35791 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35792 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35793 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35794 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35795 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35796 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35797 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35798 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35799 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35800 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35801 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35802 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35803 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35804 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35805 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35806 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35807 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35808 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35809 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35810 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35811 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35812 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35813 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35814 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35815 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35816 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35817 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35818 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35819 { 15475 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35820 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35821 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35822 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35823 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35824 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35825 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35826 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35827 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35828 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35829 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35830 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35831 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35832 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35833 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35834 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35835 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35836 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35837 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35838 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35839 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35840 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35841 { 15487 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35842 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35843 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35844 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35845 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35846 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35847 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35848 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35849 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35850 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35851 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35852 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35853 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35854 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35855 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35856 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35857 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35858 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35859 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35860 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35861 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35862 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35863 { 15498 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35864 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35865 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35866 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35867 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35868 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35869 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35870 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35871 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35872 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35873 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35874 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35875 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35876 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35877 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35878 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35879 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35880 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35881 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35882 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35883 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35884 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35885 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35886 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35887 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35888 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35889 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35890 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35891 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35892 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35893 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35894 { 15509 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35895 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35896 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35897 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35898 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35899 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35900 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35901 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35902 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35903 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35904 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35905 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35906 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35907 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35908 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35909 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35910 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35911 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35912 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35913 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35914 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35915 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35916 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35917 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35918 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35919 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35920 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35921 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35922 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35923 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35924 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35925 { 15520 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35926 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35927 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35928 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35929 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35930 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35931 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35932 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35933 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35934 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35935 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35936 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35937 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35938 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35939 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35940 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35941 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35942 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35943 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35944 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35945 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35946 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35947 { 15532 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35948 { 15543 /* vpxor */, X86::VPXORrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35949 { 15543 /* vpxor */, X86::VPXORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35950 { 15543 /* vpxor */, X86::VPXORYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35951 { 15543 /* vpxor */, X86::VPXORYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35952 { 15549 /* vpxord */, X86::VPXORDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35953 { 15549 /* vpxord */, X86::VPXORDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35954 { 15549 /* vpxord */, X86::VPXORDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35955 { 15549 /* vpxord */, X86::VPXORDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35956 { 15549 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35957 { 15549 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35958 { 15549 /* vpxord */, X86::VPXORDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35959 { 15549 /* vpxord */, X86::VPXORDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35960 { 15549 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35961 { 15549 /* vpxord */, X86::VPXORDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35962 { 15549 /* vpxord */, X86::VPXORDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35963 { 15549 /* vpxord */, X86::VPXORDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35964 { 15549 /* vpxord */, X86::VPXORDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35965 { 15549 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35966 { 15549 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35967 { 15549 /* vpxord */, X86::VPXORDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35968 { 15549 /* vpxord */, X86::VPXORDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35969 { 15549 /* vpxord */, X86::VPXORDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35970 { 15549 /* vpxord */, X86::VPXORDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35971 { 15549 /* vpxord */, X86::VPXORDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35972 { 15549 /* vpxord */, X86::VPXORDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35973 { 15549 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35974 { 15549 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35975 { 15549 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35976 { 15549 /* vpxord */, X86::VPXORDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35977 { 15549 /* vpxord */, X86::VPXORDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35978 { 15549 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35979 { 15556 /* vpxorq */, X86::VPXORQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35980 { 15556 /* vpxorq */, X86::VPXORQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35981 { 15556 /* vpxorq */, X86::VPXORQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35982 { 15556 /* vpxorq */, X86::VPXORQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35983 { 15556 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35984 { 15556 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35985 { 15556 /* vpxorq */, X86::VPXORQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35986 { 15556 /* vpxorq */, X86::VPXORQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35987 { 15556 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35988 { 15556 /* vpxorq */, X86::VPXORQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35989 { 15556 /* vpxorq */, X86::VPXORQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35990 { 15556 /* vpxorq */, X86::VPXORQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35991 { 15556 /* vpxorq */, X86::VPXORQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35992 { 15556 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35993 { 15556 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35994 { 15556 /* vpxorq */, X86::VPXORQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35995 { 15556 /* vpxorq */, X86::VPXORQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35996 { 15556 /* vpxorq */, X86::VPXORQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35997 { 15556 /* vpxorq */, X86::VPXORQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35998 { 15556 /* vpxorq */, X86::VPXORQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35999 { 15556 /* vpxorq */, X86::VPXORQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36000 { 15556 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36001 { 15556 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36002 { 15556 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36003 { 15556 /* vpxorq */, X86::VPXORQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36004 { 15556 /* vpxorq */, X86::VPXORQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36005 { 15556 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36006 { 15563 /* vrangepd */, X86::VRANGEPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36007 { 15563 /* vrangepd */, X86::VRANGEPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36008 { 15563 /* vrangepd */, X86::VRANGEPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36009 { 15563 /* vrangepd */, X86::VRANGEPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36010 { 15563 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36011 { 15563 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36012 { 15563 /* vrangepd */, X86::VRANGEPDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
36013 { 15563 /* vrangepd */, X86::VRANGEPDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36014 { 15563 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36015 { 15563 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36016 { 15563 /* vrangepd */, X86::VRANGEPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36017 { 15563 /* vrangepd */, X86::VRANGEPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36018 { 15563 /* vrangepd */, X86::VRANGEPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36019 { 15563 /* vrangepd */, X86::VRANGEPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36020 { 15563 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36021 { 15563 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36022 { 15563 /* vrangepd */, X86::VRANGEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36023 { 15563 /* vrangepd */, X86::VRANGEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36024 { 15563 /* vrangepd */, X86::VRANGEPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
36025 { 15563 /* vrangepd */, X86::VRANGEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36026 { 15563 /* vrangepd */, X86::VRANGEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36027 { 15563 /* vrangepd */, X86::VRANGEPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36028 { 15563 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36029 { 15563 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36030 { 15563 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36031 { 15563 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36032 { 15563 /* vrangepd */, X86::VRANGEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
36033 { 15563 /* vrangepd */, X86::VRANGEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36034 { 15563 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36035 { 15563 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36036 { 15572 /* vrangeps */, X86::VRANGEPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36037 { 15572 /* vrangeps */, X86::VRANGEPSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36038 { 15572 /* vrangeps */, X86::VRANGEPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36039 { 15572 /* vrangeps */, X86::VRANGEPSZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36040 { 15572 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36041 { 15572 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36042 { 15572 /* vrangeps */, X86::VRANGEPSZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36043 { 15572 /* vrangeps */, X86::VRANGEPSZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36044 { 15572 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36045 { 15572 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36046 { 15572 /* vrangeps */, X86::VRANGEPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36047 { 15572 /* vrangeps */, X86::VRANGEPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36048 { 15572 /* vrangeps */, X86::VRANGEPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36049 { 15572 /* vrangeps */, X86::VRANGEPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36050 { 15572 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36051 { 15572 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36052 { 15572 /* vrangeps */, X86::VRANGEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36053 { 15572 /* vrangeps */, X86::VRANGEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36054 { 15572 /* vrangeps */, X86::VRANGEPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36055 { 15572 /* vrangeps */, X86::VRANGEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36056 { 15572 /* vrangeps */, X86::VRANGEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36057 { 15572 /* vrangeps */, X86::VRANGEPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36058 { 15572 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36059 { 15572 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36060 { 15572 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36061 { 15572 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36062 { 15572 /* vrangeps */, X86::VRANGEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36063 { 15572 /* vrangeps */, X86::VRANGEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36064 { 15572 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36065 { 15572 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36066 { 15581 /* vrangesd */, X86::VRANGESDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36067 { 15581 /* vrangesd */, X86::VRANGESDZrmi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
36068 { 15581 /* vrangesd */, X86::VRANGESDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36069 { 15581 /* vrangesd */, X86::VRANGESDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36070 { 15581 /* vrangesd */, X86::VRANGESDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
36071 { 15581 /* vrangesd */, X86::VRANGESDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36072 { 15581 /* vrangesd */, X86::VRANGESDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
36073 { 15581 /* vrangesd */, X86::VRANGESDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36074 { 15581 /* vrangesd */, X86::VRANGESDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36075 { 15590 /* vrangess */, X86::VRANGESSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36076 { 15590 /* vrangess */, X86::VRANGESSZrmi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
36077 { 15590 /* vrangess */, X86::VRANGESSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36078 { 15590 /* vrangess */, X86::VRANGESSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36079 { 15590 /* vrangess */, X86::VRANGESSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
36080 { 15590 /* vrangess */, X86::VRANGESSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36081 { 15590 /* vrangess */, X86::VRANGESSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
36082 { 15590 /* vrangess */, X86::VRANGESSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36083 { 15590 /* vrangess */, X86::VRANGESSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36084 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
36085 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
36086 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
36087 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
36088 { 15599 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36089 { 15599 /* vrcp14pd */, X86::VRCP14PDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36090 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36091 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36092 { 15599 /* vrcp14pd */, X86::VRCP14PDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36093 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
36094 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
36095 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
36096 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
36097 { 15599 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36098 { 15599 /* vrcp14pd */, X86::VRCP14PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36099 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
36100 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
36101 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
36102 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
36103 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
36104 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
36105 { 15599 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36106 { 15599 /* vrcp14pd */, X86::VRCP14PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36107 { 15599 /* vrcp14pd */, X86::VRCP14PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36108 { 15599 /* vrcp14pd */, X86::VRCP14PDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
36109 { 15599 /* vrcp14pd */, X86::VRCP14PDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
36110 { 15599 /* vrcp14pd */, X86::VRCP14PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36111 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
36112 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
36113 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
36114 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
36115 { 15608 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36116 { 15608 /* vrcp14ps */, X86::VRCP14PSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36117 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36118 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36119 { 15608 /* vrcp14ps */, X86::VRCP14PSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36120 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
36121 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
36122 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
36123 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
36124 { 15608 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36125 { 15608 /* vrcp14ps */, X86::VRCP14PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36126 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
36127 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
36128 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
36129 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
36130 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
36131 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
36132 { 15608 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36133 { 15608 /* vrcp14ps */, X86::VRCP14PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36134 { 15608 /* vrcp14ps */, X86::VRCP14PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36135 { 15608 /* vrcp14ps */, X86::VRCP14PSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
36136 { 15608 /* vrcp14ps */, X86::VRCP14PSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
36137 { 15608 /* vrcp14ps */, X86::VRCP14PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36138 { 15617 /* vrcp14sd */, X86::VRCP14SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36139 { 15617 /* vrcp14sd */, X86::VRCP14SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
36140 { 15617 /* vrcp14sd */, X86::VRCP14SDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36141 { 15617 /* vrcp14sd */, X86::VRCP14SDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
36142 { 15617 /* vrcp14sd */, X86::VRCP14SDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36143 { 15617 /* vrcp14sd */, X86::VRCP14SDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
36144 { 15626 /* vrcp14ss */, X86::VRCP14SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36145 { 15626 /* vrcp14ss */, X86::VRCP14SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
36146 { 15626 /* vrcp14ss */, X86::VRCP14SSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36147 { 15626 /* vrcp14ss */, X86::VRCP14SSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
36148 { 15626 /* vrcp14ss */, X86::VRCP14SSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36149 { 15626 /* vrcp14ss */, X86::VRCP14SSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
36150 { 15635 /* vrcp28pd */, X86::VRCP28PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36151 { 15635 /* vrcp28pd */, X86::VRCP28PDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36152 { 15635 /* vrcp28pd */, X86::VRCP28PDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
36153 { 15635 /* vrcp28pd */, X86::VRCP28PDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36154 { 15635 /* vrcp28pd */, X86::VRCP28PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36155 { 15635 /* vrcp28pd */, X86::VRCP28PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36156 { 15635 /* vrcp28pd */, X86::VRCP28PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36157 { 15635 /* vrcp28pd */, X86::VRCP28PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36158 { 15635 /* vrcp28pd */, X86::VRCP28PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
36159 { 15635 /* vrcp28pd */, X86::VRCP28PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36160 { 15635 /* vrcp28pd */, X86::VRCP28PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
36161 { 15635 /* vrcp28pd */, X86::VRCP28PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36162 { 15644 /* vrcp28ps */, X86::VRCP28PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36163 { 15644 /* vrcp28ps */, X86::VRCP28PSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36164 { 15644 /* vrcp28ps */, X86::VRCP28PSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
36165 { 15644 /* vrcp28ps */, X86::VRCP28PSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36166 { 15644 /* vrcp28ps */, X86::VRCP28PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36167 { 15644 /* vrcp28ps */, X86::VRCP28PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36168 { 15644 /* vrcp28ps */, X86::VRCP28PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36169 { 15644 /* vrcp28ps */, X86::VRCP28PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36170 { 15644 /* vrcp28ps */, X86::VRCP28PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
36171 { 15644 /* vrcp28ps */, X86::VRCP28PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36172 { 15644 /* vrcp28ps */, X86::VRCP28PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
36173 { 15644 /* vrcp28ps */, X86::VRCP28PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36174 { 15653 /* vrcp28sd */, X86::VRCP28SDZr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36175 { 15653 /* vrcp28sd */, X86::VRCP28SDZm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
36176 { 15653 /* vrcp28sd */, X86::VRCP28SDZrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
36177 { 15653 /* vrcp28sd */, X86::VRCP28SDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36178 { 15653 /* vrcp28sd */, X86::VRCP28SDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
36179 { 15653 /* vrcp28sd */, X86::VRCP28SDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36180 { 15653 /* vrcp28sd */, X86::VRCP28SDZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
36181 { 15653 /* vrcp28sd */, X86::VRCP28SDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
36182 { 15653 /* vrcp28sd */, X86::VRCP28SDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
36183 { 15662 /* vrcp28ss */, X86::VRCP28SSZr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36184 { 15662 /* vrcp28ss */, X86::VRCP28SSZm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
36185 { 15662 /* vrcp28ss */, X86::VRCP28SSZrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
36186 { 15662 /* vrcp28ss */, X86::VRCP28SSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36187 { 15662 /* vrcp28ss */, X86::VRCP28SSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
36188 { 15662 /* vrcp28ss */, X86::VRCP28SSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36189 { 15662 /* vrcp28ss */, X86::VRCP28SSZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
36190 { 15662 /* vrcp28ss */, X86::VRCP28SSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
36191 { 15662 /* vrcp28ss */, X86::VRCP28SSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
36192 { 15671 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36193 { 15671 /* vrcpps */, X86::VRCPPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
36194 { 15671 /* vrcpps */, X86::VRCPPSYr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
36195 { 15671 /* vrcpps */, X86::VRCPPSYm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
36196 { 15678 /* vrcpss */, X86::VRCPSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36197 { 15678 /* vrcpss */, X86::VRCPSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
36198 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36199 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36200 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36201 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36202 { 15685 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36203 { 15685 /* vreducepd */, X86::VREDUCEPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36204 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
36205 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36206 { 15685 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36207 { 15685 /* vreducepd */, X86::VREDUCEPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36208 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36209 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36210 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36211 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36212 { 15685 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36213 { 15685 /* vreducepd */, X86::VREDUCEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36214 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36215 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36216 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
36217 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36218 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36219 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36220 { 15685 /* vreducepd */, X86::VREDUCEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36221 { 15685 /* vreducepd */, X86::VREDUCEPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36222 { 15685 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36223 { 15685 /* vreducepd */, X86::VREDUCEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36224 { 15685 /* vreducepd */, X86::VREDUCEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
36225 { 15685 /* vreducepd */, X86::VREDUCEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36226 { 15685 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36227 { 15685 /* vreducepd */, X86::VREDUCEPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36228 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36229 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36230 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36231 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36232 { 15695 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36233 { 15695 /* vreduceps */, X86::VREDUCEPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36234 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36235 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36236 { 15695 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36237 { 15695 /* vreduceps */, X86::VREDUCEPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36238 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36239 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36240 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36241 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36242 { 15695 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36243 { 15695 /* vreduceps */, X86::VREDUCEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36244 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36245 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36246 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36247 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36248 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36249 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36250 { 15695 /* vreduceps */, X86::VREDUCEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36251 { 15695 /* vreduceps */, X86::VREDUCEPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36252 { 15695 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36253 { 15695 /* vreduceps */, X86::VREDUCEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36254 { 15695 /* vreduceps */, X86::VREDUCEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36255 { 15695 /* vreduceps */, X86::VREDUCEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36256 { 15695 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36257 { 15695 /* vreduceps */, X86::VREDUCEPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36258 { 15705 /* vreducesd */, X86::VREDUCESDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36259 { 15705 /* vreducesd */, X86::VREDUCESDZrmi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
36260 { 15705 /* vreducesd */, X86::VREDUCESDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36261 { 15705 /* vreducesd */, X86::VREDUCESDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36262 { 15705 /* vreducesd */, X86::VREDUCESDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
36263 { 15705 /* vreducesd */, X86::VREDUCESDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36264 { 15705 /* vreducesd */, X86::VREDUCESDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
36265 { 15705 /* vreducesd */, X86::VREDUCESDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36266 { 15705 /* vreducesd */, X86::VREDUCESDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36267 { 15715 /* vreducess */, X86::VREDUCESSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36268 { 15715 /* vreducess */, X86::VREDUCESSZrmi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
36269 { 15715 /* vreducess */, X86::VREDUCESSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36270 { 15715 /* vreducess */, X86::VREDUCESSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36271 { 15715 /* vreducess */, X86::VREDUCESSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
36272 { 15715 /* vreducess */, X86::VREDUCESSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36273 { 15715 /* vreducess */, X86::VREDUCESSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
36274 { 15715 /* vreducess */, X86::VREDUCESSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36275 { 15715 /* vreducess */, X86::VREDUCESSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36276 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36277 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36278 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36279 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36280 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36281 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36282 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
36283 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36284 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36285 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36286 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36287 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36288 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36289 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36290 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36291 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36292 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36293 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36294 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
36295 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36296 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36297 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36298 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36299 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36300 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36301 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36302 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
36303 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36304 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36305 { 15725 /* vrndscalepd */, X86::VRNDSCALEPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36306 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36307 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36308 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36309 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36310 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36311 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36312 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36313 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36314 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36315 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36316 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36317 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36318 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36319 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36320 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36321 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36322 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36323 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36324 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36325 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36326 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36327 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36328 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36329 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36330 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36331 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36332 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36333 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36334 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36335 { 15737 /* vrndscaleps */, X86::VRNDSCALEPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36336 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36337 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZm_Int, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
36338 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36339 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36340 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
36341 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36342 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
36343 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36344 { 15749 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36345 { 15761 /* vrndscaless */, X86::VRNDSCALESSZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36346 { 15761 /* vrndscaless */, X86::VRNDSCALESSZm_Int, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
36347 { 15761 /* vrndscaless */, X86::VRNDSCALESSZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36348 { 15761 /* vrndscaless */, X86::VRNDSCALESSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36349 { 15761 /* vrndscaless */, X86::VRNDSCALESSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
36350 { 15761 /* vrndscaless */, X86::VRNDSCALESSZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36351 { 15761 /* vrndscaless */, X86::VRNDSCALESSZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
36352 { 15761 /* vrndscaless */, X86::VRNDSCALESSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36353 { 15761 /* vrndscaless */, X86::VRNDSCALESSZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36354 { 15773 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36355 { 15773 /* vroundpd */, X86::VROUNDPDm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36356 { 15773 /* vroundpd */, X86::VROUNDPDYr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
36357 { 15773 /* vroundpd */, X86::VROUNDPDYm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36358 { 15782 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36359 { 15782 /* vroundps */, X86::VROUNDPSm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36360 { 15782 /* vroundps */, X86::VROUNDPSYr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
36361 { 15782 /* vroundps */, X86::VROUNDPSYm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36362 { 15791 /* vroundsd */, X86::VROUNDSDr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36363 { 15791 /* vroundsd */, X86::VROUNDSDm_Int, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
36364 { 15800 /* vroundss */, X86::VROUNDSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36365 { 15800 /* vroundss */, X86::VROUNDSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
36366 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
36367 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
36368 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
36369 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
36370 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36371 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36372 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36373 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36374 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36375 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
36376 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
36377 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
36378 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
36379 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36380 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36381 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
36382 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
36383 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
36384 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
36385 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
36386 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
36387 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36388 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36389 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36390 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
36391 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
36392 { 15809 /* vrsqrt14pd */, X86::VRSQRT14PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36393 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
36394 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
36395 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
36396 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
36397 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36398 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36399 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36400 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36401 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36402 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
36403 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
36404 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
36405 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
36406 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36407 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36408 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
36409 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
36410 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
36411 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
36412 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
36413 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
36414 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36415 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36416 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36417 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
36418 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
36419 { 15820 /* vrsqrt14ps */, X86::VRSQRT14PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36420 { 15831 /* vrsqrt14sd */, X86::VRSQRT14SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36421 { 15831 /* vrsqrt14sd */, X86::VRSQRT14SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
36422 { 15831 /* vrsqrt14sd */, X86::VRSQRT14SDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36423 { 15831 /* vrsqrt14sd */, X86::VRSQRT14SDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
36424 { 15831 /* vrsqrt14sd */, X86::VRSQRT14SDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36425 { 15831 /* vrsqrt14sd */, X86::VRSQRT14SDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
36426 { 15842 /* vrsqrt14ss */, X86::VRSQRT14SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36427 { 15842 /* vrsqrt14ss */, X86::VRSQRT14SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
36428 { 15842 /* vrsqrt14ss */, X86::VRSQRT14SSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36429 { 15842 /* vrsqrt14ss */, X86::VRSQRT14SSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
36430 { 15842 /* vrsqrt14ss */, X86::VRSQRT14SSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36431 { 15842 /* vrsqrt14ss */, X86::VRSQRT14SSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
36432 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36433 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36434 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
36435 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36436 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36437 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36438 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36439 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36440 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
36441 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36442 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
36443 { 15853 /* vrsqrt28pd */, X86::VRSQRT28PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36444 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36445 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36446 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
36447 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36448 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36449 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36450 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36451 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36452 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
36453 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36454 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
36455 { 15864 /* vrsqrt28ps */, X86::VRSQRT28PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36456 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36457 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
36458 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
36459 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36460 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
36461 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36462 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
36463 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
36464 { 15875 /* vrsqrt28sd */, X86::VRSQRT28SDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
36465 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36466 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
36467 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
36468 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36469 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
36470 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36471 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
36472 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
36473 { 15886 /* vrsqrt28ss */, X86::VRSQRT28SSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
36474 { 15897 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36475 { 15897 /* vrsqrtps */, X86::VRSQRTPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
36476 { 15897 /* vrsqrtps */, X86::VRSQRTPSYr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
36477 { 15897 /* vrsqrtps */, X86::VRSQRTPSYm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
36478 { 15906 /* vrsqrtss */, X86::VRSQRTSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36479 { 15906 /* vrsqrtss */, X86::VRSQRTSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
36480 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36481 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
36482 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
36483 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
36484 { 15915 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36485 { 15915 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36486 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36487 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36488 { 15915 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36489 { 15915 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36490 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36491 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
36492 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
36493 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
36494 { 15915 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36495 { 15915 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36496 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36497 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
36498 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36499 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
36500 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
36501 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36502 { 15915 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36503 { 15915 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36504 { 15915 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36505 { 15915 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36506 { 15915 /* vscalefpd */, X86::VSCALEFPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36507 { 15915 /* vscalefpd */, X86::VSCALEFPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36508 { 15915 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36509 { 15915 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36510 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36511 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
36512 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
36513 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
36514 { 15925 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36515 { 15925 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36516 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36517 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36518 { 15925 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36519 { 15925 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36520 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36521 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
36522 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
36523 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
36524 { 15925 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36525 { 15925 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36526 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36527 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
36528 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36529 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
36530 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
36531 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36532 { 15925 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36533 { 15925 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36534 { 15925 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36535 { 15925 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36536 { 15925 /* vscalefps */, X86::VSCALEFPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36537 { 15925 /* vscalefps */, X86::VSCALEFPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36538 { 15925 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36539 { 15925 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36540 { 15935 /* vscalefsd */, X86::VSCALEFSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36541 { 15935 /* vscalefsd */, X86::VSCALEFSDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
36542 { 15935 /* vscalefsd */, X86::VSCALEFSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36543 { 15935 /* vscalefsd */, X86::VSCALEFSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36544 { 15935 /* vscalefsd */, X86::VSCALEFSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
36545 { 15935 /* vscalefsd */, X86::VSCALEFSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36546 { 15935 /* vscalefsd */, X86::VSCALEFSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
36547 { 15935 /* vscalefsd */, X86::VSCALEFSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36548 { 15935 /* vscalefsd */, X86::VSCALEFSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36549 { 15945 /* vscalefss */, X86::VSCALEFSSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36550 { 15945 /* vscalefss */, X86::VSCALEFSSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
36551 { 15945 /* vscalefss */, X86::VSCALEFSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36552 { 15945 /* vscalefss */, X86::VSCALEFSSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36553 { 15945 /* vscalefss */, X86::VSCALEFSSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
36554 { 15945 /* vscalefss */, X86::VSCALEFSSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36555 { 15945 /* vscalefss */, X86::VSCALEFSSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
36556 { 15945 /* vscalefss */, X86::VSCALEFSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36557 { 15945 /* vscalefss */, X86::VSCALEFSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36558 { 15955 /* vscatterdpd */, X86::VSCATTERDPDZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
36559 { 15955 /* vscatterdpd */, X86::VSCATTERDPDZ256mr, Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
36560 { 15955 /* vscatterdpd */, X86::VSCATTERDPDZmr, Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36561 { 15967 /* vscatterdps */, X86::VSCATTERDPSZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
36562 { 15967 /* vscatterdps */, X86::VSCATTERDPSZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
36563 { 15967 /* vscatterdps */, X86::VSCATTERDPSZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36564 { 15979 /* vscatterpf0dpd */, X86::VSCATTERPF0DPDm, Convert__Reg1_1__Mem512_RC256X5_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
36565 { 15994 /* vscatterpf0dps */, X86::VSCATTERPF0DPSm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
36566 { 16009 /* vscatterpf0qpd */, X86::VSCATTERPF0QPDm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
36567 { 16024 /* vscatterpf0qps */, X86::VSCATTERPF0QPSm, Convert__Reg1_1__Mem256_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
36568 { 16039 /* vscatterpf1dpd */, X86::VSCATTERPF1DPDm, Convert__Reg1_1__Mem512_RC256X5_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
36569 { 16054 /* vscatterpf1dps */, X86::VSCATTERPF1DPSm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
36570 { 16069 /* vscatterpf1qpd */, X86::VSCATTERPF1QPDm, Convert__Reg1_1__Mem512_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
36571 { 16084 /* vscatterpf1qps */, X86::VSCATTERPF1QPSm, Convert__Reg1_1__Mem256_RC5125_3, AMFBS_None, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
36572 { 16099 /* vscatterqpd */, X86::VSCATTERQPDZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
36573 { 16099 /* vscatterqpd */, X86::VSCATTERQPDZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
36574 { 16099 /* vscatterqpd */, X86::VSCATTERQPDZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36575 { 16111 /* vscatterqps */, X86::VSCATTERQPSZ256mr, Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
36576 { 16111 /* vscatterqps */, X86::VSCATTERQPSZmr, Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
36577 { 16111 /* vscatterqps */, X86::VSCATTERQPSZ128mr, Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
36578 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36579 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36580 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36581 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36582 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36583 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36584 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36585 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36586 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36587 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36588 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36589 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36590 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36591 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36592 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36593 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36594 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36595 { 16123 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36596 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36597 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36598 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36599 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36600 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36601 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36602 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36603 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36604 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36605 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36606 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36607 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36608 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36609 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36610 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36611 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36612 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36613 { 16134 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36614 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36615 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36616 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36617 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36618 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36619 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36620 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36621 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36622 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36623 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36624 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36625 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36626 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36627 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36628 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36629 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36630 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36631 { 16145 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36632 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36633 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36634 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36635 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36636 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36637 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36638 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36639 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36640 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36641 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36642 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36643 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36644 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36645 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36646 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36647 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36648 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36649 { 16156 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36650 { 16167 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36651 { 16167 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36652 { 16167 /* vshufpd */, X86::VSHUFPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
36653 { 16167 /* vshufpd */, X86::VSHUFPDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36654 { 16167 /* vshufpd */, X86::VSHUFPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36655 { 16167 /* vshufpd */, X86::VSHUFPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36656 { 16167 /* vshufpd */, X86::VSHUFPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36657 { 16167 /* vshufpd */, X86::VSHUFPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36658 { 16167 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36659 { 16167 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36660 { 16167 /* vshufpd */, X86::VSHUFPDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
36661 { 16167 /* vshufpd */, X86::VSHUFPDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36662 { 16167 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36663 { 16167 /* vshufpd */, X86::VSHUFPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36664 { 16167 /* vshufpd */, X86::VSHUFPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36665 { 16167 /* vshufpd */, X86::VSHUFPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36666 { 16167 /* vshufpd */, X86::VSHUFPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36667 { 16167 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36668 { 16167 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36669 { 16167 /* vshufpd */, X86::VSHUFPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36670 { 16167 /* vshufpd */, X86::VSHUFPDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36671 { 16167 /* vshufpd */, X86::VSHUFPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
36672 { 16167 /* vshufpd */, X86::VSHUFPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36673 { 16167 /* vshufpd */, X86::VSHUFPDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36674 { 16167 /* vshufpd */, X86::VSHUFPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36675 { 16167 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36676 { 16167 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36677 { 16167 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36678 { 16167 /* vshufpd */, X86::VSHUFPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
36679 { 16167 /* vshufpd */, X86::VSHUFPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36680 { 16167 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36681 { 16175 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36682 { 16175 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36683 { 16175 /* vshufps */, X86::VSHUFPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
36684 { 16175 /* vshufps */, X86::VSHUFPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36685 { 16175 /* vshufps */, X86::VSHUFPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36686 { 16175 /* vshufps */, X86::VSHUFPSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36687 { 16175 /* vshufps */, X86::VSHUFPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36688 { 16175 /* vshufps */, X86::VSHUFPSZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36689 { 16175 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36690 { 16175 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36691 { 16175 /* vshufps */, X86::VSHUFPSZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36692 { 16175 /* vshufps */, X86::VSHUFPSZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36693 { 16175 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36694 { 16175 /* vshufps */, X86::VSHUFPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36695 { 16175 /* vshufps */, X86::VSHUFPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36696 { 16175 /* vshufps */, X86::VSHUFPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36697 { 16175 /* vshufps */, X86::VSHUFPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36698 { 16175 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36699 { 16175 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36700 { 16175 /* vshufps */, X86::VSHUFPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36701 { 16175 /* vshufps */, X86::VSHUFPSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36702 { 16175 /* vshufps */, X86::VSHUFPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36703 { 16175 /* vshufps */, X86::VSHUFPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36704 { 16175 /* vshufps */, X86::VSHUFPSZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
36705 { 16175 /* vshufps */, X86::VSHUFPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36706 { 16175 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36707 { 16175 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36708 { 16175 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36709 { 16175 /* vshufps */, X86::VSHUFPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
36710 { 16175 /* vshufps */, X86::VSHUFPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36711 { 16175 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36712 { 16183 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36713 { 16183 /* vsqrtpd */, X86::VSQRTPDm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
36714 { 16183 /* vsqrtpd */, X86::VSQRTPDYr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
36715 { 16183 /* vsqrtpd */, X86::VSQRTPDYm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
36716 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
36717 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
36718 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
36719 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
36720 { 16183 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36721 { 16183 /* vsqrtpd */, X86::VSQRTPDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36722 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36723 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256mb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36724 { 16183 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36725 { 16183 /* vsqrtpd */, X86::VSQRTPDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36726 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
36727 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
36728 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
36729 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
36730 { 16183 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36731 { 16183 /* vsqrtpd */, X86::VSQRTPDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36732 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
36733 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
36734 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
36735 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
36736 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
36737 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
36738 { 16183 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36739 { 16183 /* vsqrtpd */, X86::VSQRTPDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36740 { 16183 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
36741 { 16183 /* vsqrtpd */, X86::VSQRTPDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36742 { 16183 /* vsqrtpd */, X86::VSQRTPDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
36743 { 16183 /* vsqrtpd */, X86::VSQRTPDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
36744 { 16183 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
36745 { 16183 /* vsqrtpd */, X86::VSQRTPDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36746 { 16191 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36747 { 16191 /* vsqrtps */, X86::VSQRTPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
36748 { 16191 /* vsqrtps */, X86::VSQRTPSYr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
36749 { 16191 /* vsqrtps */, X86::VSQRTPSYm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
36750 { 16191 /* vsqrtps */, X86::VSQRTPSZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
36751 { 16191 /* vsqrtps */, X86::VSQRTPSZ128m, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32X, MCK_Mem128 }, },
36752 { 16191 /* vsqrtps */, X86::VSQRTPSZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR256X }, },
36753 { 16191 /* vsqrtps */, X86::VSQRTPSZ256m, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256X, MCK_Mem256 }, },
36754 { 16191 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36755 { 16191 /* vsqrtps */, X86::VSQRTPSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36756 { 16191 /* vsqrtps */, X86::VSQRTPSZ128mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36757 { 16191 /* vsqrtps */, X86::VSQRTPSZ256mb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36758 { 16191 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36759 { 16191 /* vsqrtps */, X86::VSQRTPSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36760 { 16191 /* vsqrtps */, X86::VSQRTPSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
36761 { 16191 /* vsqrtps */, X86::VSQRTPSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
36762 { 16191 /* vsqrtps */, X86::VSQRTPSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
36763 { 16191 /* vsqrtps */, X86::VSQRTPSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
36764 { 16191 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36765 { 16191 /* vsqrtps */, X86::VSQRTPSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36766 { 16191 /* vsqrtps */, X86::VSQRTPSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
36767 { 16191 /* vsqrtps */, X86::VSQRTPSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
36768 { 16191 /* vsqrtps */, X86::VSQRTPSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
36769 { 16191 /* vsqrtps */, X86::VSQRTPSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
36770 { 16191 /* vsqrtps */, X86::VSQRTPSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
36771 { 16191 /* vsqrtps */, X86::VSQRTPSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
36772 { 16191 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36773 { 16191 /* vsqrtps */, X86::VSQRTPSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36774 { 16191 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
36775 { 16191 /* vsqrtps */, X86::VSQRTPSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36776 { 16191 /* vsqrtps */, X86::VSQRTPSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
36777 { 16191 /* vsqrtps */, X86::VSQRTPSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
36778 { 16191 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
36779 { 16191 /* vsqrtps */, X86::VSQRTPSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36780 { 16199 /* vsqrtsd */, X86::VSQRTSDr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36781 { 16199 /* vsqrtsd */, X86::VSQRTSDm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
36782 { 16199 /* vsqrtsd */, X86::VSQRTSDZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36783 { 16199 /* vsqrtsd */, X86::VSQRTSDZm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
36784 { 16199 /* vsqrtsd */, X86::VSQRTSDZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36785 { 16199 /* vsqrtsd */, X86::VSQRTSDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36786 { 16199 /* vsqrtsd */, X86::VSQRTSDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
36787 { 16199 /* vsqrtsd */, X86::VSQRTSDZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36788 { 16199 /* vsqrtsd */, X86::VSQRTSDZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
36789 { 16199 /* vsqrtsd */, X86::VSQRTSDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36790 { 16199 /* vsqrtsd */, X86::VSQRTSDZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36791 { 16207 /* vsqrtss */, X86::VSQRTSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36792 { 16207 /* vsqrtss */, X86::VSQRTSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
36793 { 16207 /* vsqrtss */, X86::VSQRTSSZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36794 { 16207 /* vsqrtss */, X86::VSQRTSSZm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
36795 { 16207 /* vsqrtss */, X86::VSQRTSSZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36796 { 16207 /* vsqrtss */, X86::VSQRTSSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36797 { 16207 /* vsqrtss */, X86::VSQRTSSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
36798 { 16207 /* vsqrtss */, X86::VSQRTSSZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36799 { 16207 /* vsqrtss */, X86::VSQRTSSZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
36800 { 16207 /* vsqrtss */, X86::VSQRTSSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36801 { 16207 /* vsqrtss */, X86::VSQRTSSZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36802 { 16215 /* vstmxcsr */, X86::VSTMXCSR, Convert__Mem325_0, AMFBS_None, { MCK_Mem32 }, },
36803 { 16224 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36804 { 16224 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36805 { 16224 /* vsubpd */, X86::VSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
36806 { 16224 /* vsubpd */, X86::VSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
36807 { 16224 /* vsubpd */, X86::VSUBPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36808 { 16224 /* vsubpd */, X86::VSUBPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
36809 { 16224 /* vsubpd */, X86::VSUBPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
36810 { 16224 /* vsubpd */, X86::VSUBPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
36811 { 16224 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36812 { 16224 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36813 { 16224 /* vsubpd */, X86::VSUBPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36814 { 16224 /* vsubpd */, X86::VSUBPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36815 { 16224 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36816 { 16224 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36817 { 16224 /* vsubpd */, X86::VSUBPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36818 { 16224 /* vsubpd */, X86::VSUBPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
36819 { 16224 /* vsubpd */, X86::VSUBPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
36820 { 16224 /* vsubpd */, X86::VSUBPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
36821 { 16224 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36822 { 16224 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36823 { 16224 /* vsubpd */, X86::VSUBPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36824 { 16224 /* vsubpd */, X86::VSUBPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
36825 { 16224 /* vsubpd */, X86::VSUBPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36826 { 16224 /* vsubpd */, X86::VSUBPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
36827 { 16224 /* vsubpd */, X86::VSUBPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
36828 { 16224 /* vsubpd */, X86::VSUBPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36829 { 16224 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36830 { 16224 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36831 { 16224 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36832 { 16224 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36833 { 16224 /* vsubpd */, X86::VSUBPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36834 { 16224 /* vsubpd */, X86::VSUBPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36835 { 16224 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36836 { 16224 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36837 { 16231 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36838 { 16231 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36839 { 16231 /* vsubps */, X86::VSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
36840 { 16231 /* vsubps */, X86::VSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
36841 { 16231 /* vsubps */, X86::VSUBPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36842 { 16231 /* vsubps */, X86::VSUBPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
36843 { 16231 /* vsubps */, X86::VSUBPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
36844 { 16231 /* vsubps */, X86::VSUBPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
36845 { 16231 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36846 { 16231 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36847 { 16231 /* vsubps */, X86::VSUBPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36848 { 16231 /* vsubps */, X86::VSUBPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36849 { 16231 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36850 { 16231 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36851 { 16231 /* vsubps */, X86::VSUBPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36852 { 16231 /* vsubps */, X86::VSUBPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
36853 { 16231 /* vsubps */, X86::VSUBPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
36854 { 16231 /* vsubps */, X86::VSUBPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
36855 { 16231 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36856 { 16231 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36857 { 16231 /* vsubps */, X86::VSUBPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36858 { 16231 /* vsubps */, X86::VSUBPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
36859 { 16231 /* vsubps */, X86::VSUBPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36860 { 16231 /* vsubps */, X86::VSUBPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
36861 { 16231 /* vsubps */, X86::VSUBPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
36862 { 16231 /* vsubps */, X86::VSUBPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36863 { 16231 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36864 { 16231 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36865 { 16231 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36866 { 16231 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36867 { 16231 /* vsubps */, X86::VSUBPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36868 { 16231 /* vsubps */, X86::VSUBPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36869 { 16231 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36870 { 16231 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36871 { 16238 /* vsubsd */, X86::VSUBSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36872 { 16238 /* vsubsd */, X86::VSUBSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
36873 { 16238 /* vsubsd */, X86::VSUBSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36874 { 16238 /* vsubsd */, X86::VSUBSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
36875 { 16238 /* vsubsd */, X86::VSUBSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36876 { 16238 /* vsubsd */, X86::VSUBSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36877 { 16238 /* vsubsd */, X86::VSUBSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
36878 { 16238 /* vsubsd */, X86::VSUBSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36879 { 16238 /* vsubsd */, X86::VSUBSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
36880 { 16238 /* vsubsd */, X86::VSUBSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36881 { 16238 /* vsubsd */, X86::VSUBSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36882 { 16245 /* vsubss */, X86::VSUBSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36883 { 16245 /* vsubss */, X86::VSUBSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
36884 { 16245 /* vsubss */, X86::VSUBSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36885 { 16245 /* vsubss */, X86::VSUBSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
36886 { 16245 /* vsubss */, X86::VSUBSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36887 { 16245 /* vsubss */, X86::VSUBSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36888 { 16245 /* vsubss */, X86::VSUBSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
36889 { 16245 /* vsubss */, X86::VSUBSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36890 { 16245 /* vsubss */, X86::VSUBSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
36891 { 16245 /* vsubss */, X86::VSUBSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36892 { 16245 /* vsubss */, X86::VSUBSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
36893 { 16252 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36894 { 16252 /* vtestpd */, X86::VTESTPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
36895 { 16252 /* vtestpd */, X86::VTESTPDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
36896 { 16252 /* vtestpd */, X86::VTESTPDYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
36897 { 16260 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36898 { 16260 /* vtestps */, X86::VTESTPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
36899 { 16260 /* vtestps */, X86::VTESTPSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_VR256 }, },
36900 { 16260 /* vtestps */, X86::VTESTPSYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR256, MCK_Mem256 }, },
36901 { 16268 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36902 { 16268 /* vucomisd */, X86::VUCOMISDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
36903 { 16268 /* vucomisd */, X86::VUCOMISDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
36904 { 16268 /* vucomisd */, X86::VUCOMISDZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32X, MCK_Mem64 }, },
36905 { 16268 /* vucomisd */, X86::VUCOMISDZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
36906 { 16277 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36907 { 16277 /* vucomiss */, X86::VUCOMISSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
36908 { 16277 /* vucomiss */, X86::VUCOMISSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X }, },
36909 { 16277 /* vucomiss */, X86::VUCOMISSZrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32X, MCK_Mem32 }, },
36910 { 16277 /* vucomiss */, X86::VUCOMISSZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
36911 { 16286 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36912 { 16286 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36913 { 16286 /* vunpckhpd */, X86::VUNPCKHPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
36914 { 16286 /* vunpckhpd */, X86::VUNPCKHPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
36915 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36916 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
36917 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
36918 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
36919 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36920 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36921 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36922 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36923 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36924 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36925 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
36926 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
36927 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
36928 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36929 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36930 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36931 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
36932 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36933 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
36934 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
36935 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36936 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36937 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36938 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36939 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36940 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36941 { 16286 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36942 { 16296 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36943 { 16296 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36944 { 16296 /* vunpckhps */, X86::VUNPCKHPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
36945 { 16296 /* vunpckhps */, X86::VUNPCKHPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
36946 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36947 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
36948 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
36949 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
36950 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36951 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36952 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36953 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36954 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36955 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36956 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
36957 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
36958 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
36959 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36960 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36961 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36962 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
36963 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36964 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
36965 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
36966 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36967 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36968 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36969 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36970 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36971 { 16296 /* vunpckhps */, X86::VUNPCKHPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36972 { 16296 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36973 { 16306 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36974 { 16306 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36975 { 16306 /* vunpcklpd */, X86::VUNPCKLPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
36976 { 16306 /* vunpcklpd */, X86::VUNPCKLPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
36977 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36978 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
36979 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
36980 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
36981 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36982 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36983 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36984 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36985 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36986 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36987 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
36988 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
36989 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
36990 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36991 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36992 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36993 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
36994 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36995 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
36996 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
36997 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36998 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36999 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
37000 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
37001 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
37002 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
37003 { 16306 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
37004 { 16316 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
37005 { 16316 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
37006 { 16316 /* vunpcklps */, X86::VUNPCKLPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
37007 { 16316 /* vunpcklps */, X86::VUNPCKLPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
37008 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
37009 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
37010 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
37011 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
37012 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
37013 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
37014 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
37015 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
37016 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
37017 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
37018 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
37019 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
37020 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
37021 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
37022 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
37023 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
37024 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
37025 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
37026 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
37027 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
37028 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
37029 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
37030 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
37031 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
37032 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
37033 { 16316 /* vunpcklps */, X86::VUNPCKLPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
37034 { 16316 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
37035 { 16326 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
37036 { 16326 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
37037 { 16326 /* vxorpd */, X86::VXORPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
37038 { 16326 /* vxorpd */, X86::VXORPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
37039 { 16326 /* vxorpd */, X86::VXORPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
37040 { 16326 /* vxorpd */, X86::VXORPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
37041 { 16326 /* vxorpd */, X86::VXORPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
37042 { 16326 /* vxorpd */, X86::VXORPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
37043 { 16326 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
37044 { 16326 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
37045 { 16326 /* vxorpd */, X86::VXORPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
37046 { 16326 /* vxorpd */, X86::VXORPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
37047 { 16326 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
37048 { 16326 /* vxorpd */, X86::VXORPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
37049 { 16326 /* vxorpd */, X86::VXORPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
37050 { 16326 /* vxorpd */, X86::VXORPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
37051 { 16326 /* vxorpd */, X86::VXORPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
37052 { 16326 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
37053 { 16326 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
37054 { 16326 /* vxorpd */, X86::VXORPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
37055 { 16326 /* vxorpd */, X86::VXORPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
37056 { 16326 /* vxorpd */, X86::VXORPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
37057 { 16326 /* vxorpd */, X86::VXORPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
37058 { 16326 /* vxorpd */, X86::VXORPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
37059 { 16326 /* vxorpd */, X86::VXORPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
37060 { 16326 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
37061 { 16326 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
37062 { 16326 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
37063 { 16326 /* vxorpd */, X86::VXORPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
37064 { 16326 /* vxorpd */, X86::VXORPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
37065 { 16326 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
37066 { 16333 /* vxorps */, X86::VXORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
37067 { 16333 /* vxorps */, X86::VXORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
37068 { 16333 /* vxorps */, X86::VXORPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
37069 { 16333 /* vxorps */, X86::VXORPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
37070 { 16333 /* vxorps */, X86::VXORPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
37071 { 16333 /* vxorps */, X86::VXORPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
37072 { 16333 /* vxorps */, X86::VXORPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
37073 { 16333 /* vxorps */, X86::VXORPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
37074 { 16333 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
37075 { 16333 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
37076 { 16333 /* vxorps */, X86::VXORPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
37077 { 16333 /* vxorps */, X86::VXORPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
37078 { 16333 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
37079 { 16333 /* vxorps */, X86::VXORPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
37080 { 16333 /* vxorps */, X86::VXORPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
37081 { 16333 /* vxorps */, X86::VXORPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
37082 { 16333 /* vxorps */, X86::VXORPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
37083 { 16333 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
37084 { 16333 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
37085 { 16333 /* vxorps */, X86::VXORPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
37086 { 16333 /* vxorps */, X86::VXORPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
37087 { 16333 /* vxorps */, X86::VXORPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
37088 { 16333 /* vxorps */, X86::VXORPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
37089 { 16333 /* vxorps */, X86::VXORPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
37090 { 16333 /* vxorps */, X86::VXORPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
37091 { 16333 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
37092 { 16333 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
37093 { 16333 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
37094 { 16333 /* vxorps */, X86::VXORPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
37095 { 16333 /* vxorps */, X86::VXORPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
37096 { 16333 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
37097 { 16340 /* vzeroall */, X86::VZEROALL, Convert_NoOperands, AMFBS_None, { }, },
37098 { 16349 /* vzeroupper */, X86::VZEROUPPER, Convert_NoOperands, AMFBS_None, { }, },
37099 { 16360 /* wait */, X86::WAIT, Convert_NoOperands, AMFBS_None, { }, },
37100 { 16365 /* wbinvd */, X86::WBINVD, Convert_NoOperands, AMFBS_None, { }, },
37101 { 16372 /* wbnoinvd */, X86::WBNOINVD, Convert_NoOperands, AMFBS_None, { }, },
37102 { 16381 /* wrfsbase */, X86::WRFSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
37103 { 16381 /* wrfsbase */, X86::WRFSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
37104 { 16410 /* wrgsbase */, X86::WRGSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
37105 { 16410 /* wrgsbase */, X86::WRGSBASE64, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR64 }, },
37106 { 16439 /* wrmsr */, X86::WRMSR, Convert_NoOperands, AMFBS_None, { }, },
37107 { 16445 /* wrpkru */, X86::WRPKRUr, Convert_NoOperands, AMFBS_None, { }, },
37108 { 16452 /* wrssd */, X86::WRSSD, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
37109 { 16458 /* wrssq */, X86::WRSSQ, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
37110 { 16464 /* wrussd */, X86::WRUSSD, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
37111 { 16471 /* wrussq */, X86::WRUSSQ, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
37112 { 16478 /* xabort */, X86::XABORT, Convert__Imm1_0, AMFBS_None, { MCK_Imm }, },
37113 { 16485 /* xacquire */, X86::XACQUIRE_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
37114 { 16494 /* xadd */, X86::XADD16rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
37115 { 16494 /* xadd */, X86::XADD32rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
37116 { 16494 /* xadd */, X86::XADD64rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
37117 { 16494 /* xadd */, X86::XADD8rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
37118 { 16494 /* xadd */, X86::XADD16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
37119 { 16494 /* xadd */, X86::XADD32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
37120 { 16494 /* xadd */, X86::XADD64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
37121 { 16494 /* xadd */, X86::XADD8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
37122 { 16523 /* xbegin */, X86::XBEGIN_2, Convert__AbsMem161_0, AMFBS_None, { MCK_AbsMem16 }, },
37123 { 16523 /* xbegin */, X86::XBEGIN_4, Convert__AbsMem1_0, AMFBS_None, { MCK_AbsMem }, },
37124 { 16530 /* xchg */, X86::XCHG16ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_AX, MCK_GR16 }, },
37125 { 16530 /* xchg */, X86::XCHG32rr, Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1, AMFBS_In64BitMode, { MCK_EAX, MCK_EAX }, },
37126 { 16530 /* xchg */, X86::XCHG32ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_EAX, MCK_GR32 }, },
37127 { 16530 /* xchg */, X86::NOOP, Convert_NoOperands, AMFBS_None, { MCK_RAX, MCK_RAX }, },
37128 { 16530 /* xchg */, X86::XCHG64ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_RAX, MCK_GR64 }, },
37129 { 16530 /* xchg */, X86::XCHG16ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_AX }, },
37130 { 16530 /* xchg */, X86::XCHG16rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
37131 { 16530 /* xchg */, X86::XCHG16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
37132 { 16530 /* xchg */, X86::XCHG32ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_EAX }, },
37133 { 16530 /* xchg */, X86::XCHG32rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
37134 { 16530 /* xchg */, X86::XCHG32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
37135 { 16530 /* xchg */, X86::XCHG64ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64, MCK_RAX }, },
37136 { 16530 /* xchg */, X86::XCHG64rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
37137 { 16530 /* xchg */, X86::XCHG64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
37138 { 16530 /* xchg */, X86::XCHG8rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
37139 { 16530 /* xchg */, X86::XCHG8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
37140 { 16530 /* xchg */, X86::XCHG16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
37141 { 16530 /* xchg */, X86::XCHG32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
37142 { 16530 /* xchg */, X86::XCHG64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
37143 { 16530 /* xchg */, X86::XCHG8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
37144 { 16559 /* xcryptcbc */, X86::XCRYPTCBC, Convert_NoOperands, AMFBS_None, { }, },
37145 { 16569 /* xcryptcfb */, X86::XCRYPTCFB, Convert_NoOperands, AMFBS_None, { }, },
37146 { 16579 /* xcryptctr */, X86::XCRYPTCTR, Convert_NoOperands, AMFBS_None, { }, },
37147 { 16589 /* xcryptecb */, X86::XCRYPTECB, Convert_NoOperands, AMFBS_None, { }, },
37148 { 16599 /* xcryptofb */, X86::XCRYPTOFB, Convert_NoOperands, AMFBS_None, { }, },
37149 { 16609 /* xend */, X86::XEND, Convert_NoOperands, AMFBS_None, { }, },
37150 { 16614 /* xgetbv */, X86::XGETBV, Convert_NoOperands, AMFBS_None, { }, },
37151 { 16621 /* xlatb */, X86::XLAT, Convert_NoOperands, AMFBS_None, { }, },
37152 { 16627 /* xor */, X86::XOR8i8, Convert__Imm1_1, AMFBS_None, { MCK_AL, MCK_Imm }, },
37153 { 16627 /* xor */, X86::XOR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_AX, MCK_ImmSExti16i8 }, },
37154 { 16627 /* xor */, X86::XOR16i16, Convert__Imm1_1, AMFBS_None, { MCK_AX, MCK_Imm }, },
37155 { 16627 /* xor */, X86::XOR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_EAX, MCK_ImmSExti32i8 }, },
37156 { 16627 /* xor */, X86::XOR32i32, Convert__Imm1_1, AMFBS_None, { MCK_EAX, MCK_Imm }, },
37157 { 16627 /* xor */, X86::XOR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i8 }, },
37158 { 16627 /* xor */, X86::XOR64i32, Convert__ImmSExti64i321_1, AMFBS_None, { MCK_RAX, MCK_ImmSExti64i32 }, },
37159 { 16627 /* xor */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
37160 { 16627 /* xor */, X86::XOR16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
37161 { 16627 /* xor */, X86::XOR16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
37162 { 16627 /* xor */, X86::XOR16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
37163 { 16627 /* xor */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
37164 { 16627 /* xor */, X86::XOR32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
37165 { 16627 /* xor */, X86::XOR32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
37166 { 16627 /* xor */, X86::XOR32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
37167 { 16627 /* xor */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
37168 { 16627 /* xor */, X86::XOR64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i8 }, },
37169 { 16627 /* xor */, X86::XOR64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, },
37170 { 16627 /* xor */, X86::XOR64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
37171 { 16627 /* xor */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
37172 { 16627 /* xor */, X86::XOR8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
37173 { 16627 /* xor */, X86::XOR8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
37174 { 16627 /* xor */, X86::XOR16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
37175 { 16627 /* xor */, X86::XOR16mi8, Convert__Mem165_0__ImmSExti16i81_1, AMFBS_None, { MCK_Mem16, MCK_ImmSExti16i8 }, },
37176 { 16627 /* xor */, X86::XOR16mi, Convert__Mem165_0__Imm1_1, AMFBS_None, { MCK_Mem16, MCK_Imm }, },
37177 { 16627 /* xor */, X86::XOR32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
37178 { 16627 /* xor */, X86::XOR32mi8, Convert__Mem325_0__ImmSExti32i81_1, AMFBS_None, { MCK_Mem32, MCK_ImmSExti32i8 }, },
37179 { 16627 /* xor */, X86::XOR32mi, Convert__Mem325_0__Imm1_1, AMFBS_None, { MCK_Mem32, MCK_Imm }, },
37180 { 16627 /* xor */, X86::XOR64mr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
37181 { 16627 /* xor */, X86::XOR64mi8, Convert__Mem645_0__ImmSExti64i81_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
37182 { 16627 /* xor */, X86::XOR64mi32, Convert__Mem645_0__ImmSExti64i321_1, AMFBS_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
37183 { 16627 /* xor */, X86::XOR8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
37184 { 16627 /* xor */, X86::XOR8mi, Convert__Mem85_0__Imm1_1, AMFBS_None, { MCK_Mem8, MCK_Imm }, },
37185 { 16641 /* xorpd */, X86::XORPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
37186 { 16641 /* xorpd */, X86::XORPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
37187 { 16647 /* xorps */, X86::XORPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
37188 { 16647 /* xorps */, X86::XORPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
37189 { 16663 /* xrelease */, X86::XRELEASE_PREFIX, Convert_NoOperands, AMFBS_None, { }, },
37190 { 16672 /* xresldtrk */, X86::XRESLDTRK, Convert_NoOperands, AMFBS_None, { }, },
37191 { 16682 /* xrstor */, X86::XRSTOR, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
37192 { 16689 /* xrstor64 */, X86::XRSTOR64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
37193 { 16698 /* xrstors */, X86::XRSTORS, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
37194 { 16706 /* xrstors64 */, X86::XRSTORS64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
37195 { 16716 /* xsave */, X86::XSAVE, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
37196 { 16722 /* xsave64 */, X86::XSAVE64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
37197 { 16730 /* xsavec */, X86::XSAVEC, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
37198 { 16737 /* xsavec64 */, X86::XSAVEC64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
37199 { 16746 /* xsaveopt */, X86::XSAVEOPT, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
37200 { 16755 /* xsaveopt64 */, X86::XSAVEOPT64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
37201 { 16766 /* xsaves */, X86::XSAVES, Convert__Mem5_0, AMFBS_None, { MCK_Mem }, },
37202 { 16773 /* xsaves64 */, X86::XSAVES64, Convert__Mem5_0, AMFBS_In64BitMode, { MCK_Mem }, },
37203 { 16782 /* xsetbv */, X86::XSETBV, Convert_NoOperands, AMFBS_None, { }, },
37204 { 16789 /* xsha1 */, X86::XSHA1, Convert_NoOperands, AMFBS_None, { }, },
37205 { 16795 /* xsha256 */, X86::XSHA256, Convert_NoOperands, AMFBS_None, { }, },
37206 { 16803 /* xstore */, X86::XSTORE, Convert_NoOperands, AMFBS_None, { }, },
37207 { 16810 /* xstorerng */, X86::XSTORE, Convert_NoOperands, AMFBS_None, { }, },
37208 { 16820 /* xsusldtrk */, X86::XSUSLDTRK, Convert_NoOperands, AMFBS_None, { }, },
37209 { 16830 /* xtest */, X86::XTEST, Convert_NoOperands, AMFBS_None, { }, },
37210};
37211
37212#include "llvm/Support/Debug.h"
37213#include "llvm/Support/Format.h"
37214
37215unsigned X86AsmParser::
37216MatchInstructionImpl(const OperandVector &Operands,
37217 MCInst &Inst,
37218 uint64_t &ErrorInfo,
37219 FeatureBitset &MissingFeatures,
37220 bool matchingInlineAsm, unsigned VariantID) {
37221 // Eliminate obvious mismatches.
37222 if (Operands.size() > 10) {
37223 ErrorInfo = 10;
37224 return Match_InvalidOperand;
37225 }
37226
37227 // Get the current feature set.
37228 const FeatureBitset &AvailableFeatures = getAvailableFeatures();
37229
37230 // Get the instruction mnemonic, which is the first token.
37231 StringRef Mnemonic = ((X86Operand &)*Operands[0]).getToken();
37232
37233 // Process all MnemonicAliases to remap the mnemonic.
37234 applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);
37235
37236 // Some state to try to produce better error messages.
37237 bool HadMatchOtherThanFeatures = false;
37238 bool HadMatchOtherThanPredicate = false;
37239 unsigned RetCode = Match_InvalidOperand;
37240 MissingFeatures.set();
37241 // Set ErrorInfo to the operand that mismatches if it is
37242 // wrong for all instances of the instruction.
37243 ErrorInfo = ~0ULL;
37244 // Find the appropriate table for this asm variant.
37245 const MatchEntry *Start, *End;
37246 switch (VariantID) {
37247 default: llvm_unreachable("invalid variant!");
37248 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
37249 case 1: Start = std::begin(MatchTable1); End = std::end(MatchTable1); break;
37250 }
37251 // Search the table.
37252 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
37253
37254 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " <<
37255 std::distance(MnemonicRange.first, MnemonicRange.second) <<
37256 " encodings with mnemonic '" << Mnemonic << "'\n");
37257
37258 // Return a more specific error code if no mnemonics match.
37259 if (MnemonicRange.first == MnemonicRange.second)
37260 return Match_MnemonicFail;
37261
37262 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
37263 it != ie; ++it) {
37264 const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx];
37265 bool HasRequiredFeatures =
37266 (AvailableFeatures & RequiredFeatures) == RequiredFeatures;
37267 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode "
37268 << MII.getName(it->Opcode) << "\n");
37269 // equal_range guarantees that instruction mnemonic matches.
37270 assert(Mnemonic == it->getMnemonic());
37271 bool OperandsValid = true;
37272 for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 9; ++FormalIdx) {
37273 auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]);
37274 DEBUG_WITH_TYPE("asm-matcher",
37275 dbgs() << " Matching formal operand class " << getMatchClassName(Formal)
37276 << " against actual operand at index " << ActualIdx);
37277 if (ActualIdx < Operands.size())
37278 DEBUG_WITH_TYPE("asm-matcher", dbgs() << " (";
37279 Operands[ActualIdx]->print(dbgs()); dbgs() << "): ");
37280 else
37281 DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": ");
37282 if (ActualIdx >= Operands.size()) {
37283 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range ");
37284 OperandsValid = (Formal == InvalidMatchClass) || isSubclass(Formal, OptionalMatchClass);
37285 if (!OperandsValid) ErrorInfo = ActualIdx;
37286 break;
37287 }
37288 MCParsedAsmOperand &Actual = *Operands[ActualIdx];
37289 unsigned Diag = validateOperandClass(Actual, Formal);
37290 if (Diag == Match_Success) {
37291 DEBUG_WITH_TYPE("asm-matcher",
37292 dbgs() << "match success using generic matcher\n");
37293 ++ActualIdx;
37294 continue;
37295 }
37296 // If the generic handler indicates an invalid operand
37297 // failure, check for a special case.
37298 if (Diag != Match_Success) {
37299 unsigned TargetDiag = validateTargetOperandClass(Actual, Formal);
37300 if (TargetDiag == Match_Success) {
37301 DEBUG_WITH_TYPE("asm-matcher",
37302 dbgs() << "match success using target matcher\n");
37303 ++ActualIdx;
37304 continue;
37305 }
37306 // If the target matcher returned a specific error code use
37307 // that, else use the one from the generic matcher.
37308 if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures)
37309 Diag = TargetDiag;
37310 }
37311 // If current formal operand wasn't matched and it is optional
37312 // then try to match next formal operand
37313 if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) {
37314 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n");
37315 continue;
37316 }
37317 // If this operand is broken for all of the instances of this
37318 // mnemonic, keep track of it so we can report loc info.
37319 // If we already had a match that only failed due to a
37320 // target predicate, that diagnostic is preferred.
37321 if (!HadMatchOtherThanPredicate &&
37322 (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) {
37323 if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand))
37324 RetCode = Diag;
37325 ErrorInfo = ActualIdx;
37326 }
37327 // Otherwise, just reject this instance of the mnemonic.
37328 OperandsValid = false;
37329 break;
37330 }
37331
37332 if (!OperandsValid) {
37333 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple "
37334 "operand mismatches, ignoring "
37335 "this opcode\n");
37336 continue;
37337 }
37338 if (!HasRequiredFeatures) {
37339 HadMatchOtherThanFeatures = true;
37340 FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures;
37341 DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features:";
37342 for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I)
37343 if (NewMissingFeatures[I])
37344 dbgs() << ' ' << I;
37345 dbgs() << "\n");
37346 if (NewMissingFeatures.count() <=
37347 MissingFeatures.count())
37348 MissingFeatures = NewMissingFeatures;
37349 continue;
37350 }
37351
37352 Inst.clear();
37353
37354 Inst.setOpcode(it->Opcode);
37355 // We have a potential match but have not rendered the operands.
37356 // Check the target predicate to handle any context sensitive
37357 // constraints.
37358 // For example, Ties that are referenced multiple times must be
37359 // checked here to ensure the input is the same for each match
37360 // constraints. If we leave it any later the ties will have been
37361 // canonicalized
37362 unsigned MatchResult;
37363 if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) {
37364 Inst.clear();
37365 DEBUG_WITH_TYPE(
37366 "asm-matcher",
37367 dbgs() << "Early target match predicate failed with diag code "
37368 << MatchResult << "\n");
37369 RetCode = MatchResult;
37370 HadMatchOtherThanPredicate = true;
37371 continue;
37372 }
37373
37374 if (matchingInlineAsm) {
37375 convertToMapAndConstraints(it->ConvertFn, Operands);
37376 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo))
37377 return Match_InvalidTiedOperand;
37378
37379 return Match_Success;
37380 }
37381
37382 // We have selected a definite instruction, convert the parsed
37383 // operands into the appropriate MCInst.
37384 convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);
37385
37386 // We have a potential match. Check the target predicate to
37387 // handle any context sensitive constraints.
37388 if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) {
37389 DEBUG_WITH_TYPE("asm-matcher",
37390 dbgs() << "Target match predicate failed with diag code "
37391 << MatchResult << "\n");
37392 Inst.clear();
37393 RetCode = MatchResult;
37394 HadMatchOtherThanPredicate = true;
37395 continue;
37396 }
37397
37398 if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo))
37399 return Match_InvalidTiedOperand;
37400
37401 DEBUG_WITH_TYPE(
37402 "asm-matcher",
37403 dbgs() << "Opcode result: complete match, selecting this opcode\n");
37404 return Match_Success;
37405 }
37406
37407 // Okay, we had no match. Try to return a useful error code.
37408 if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)
37409 return RetCode;
37410
37411 ErrorInfo = 0;
37412 return Match_MissingFeature;
37413}
37414
37415#endif // GET_MATCHER_IMPLEMENTATION
37416
37417
37418#ifdef GET_MNEMONIC_SPELL_CHECKER
37419#undef GET_MNEMONIC_SPELL_CHECKER
37420
37421static std::string X86MnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) {
37422 const unsigned MaxEditDist = 2;
37423 std::vector<StringRef> Candidates;
37424 StringRef Prev = "";
37425
37426 // Find the appropriate table for this asm variant.
37427 const MatchEntry *Start, *End;
37428 switch (VariantID) {
37429 default: llvm_unreachable("invalid variant!");
37430 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
37431 case 1: Start = std::begin(MatchTable1); End = std::end(MatchTable1); break;
37432 }
37433
37434 for (auto I = Start; I < End; I++) {
37435 // Ignore unsupported instructions.
37436 const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx];
37437 if ((FBS & RequiredFeatures) != RequiredFeatures)
37438 continue;
37439
37440 StringRef T = I->getMnemonic();
37441 // Avoid recomputing the edit distance for the same string.
37442 if (T.equals(Prev))
37443 continue;
37444
37445 Prev = T;
37446 unsigned Dist = S.edit_distance(T, false, MaxEditDist);
37447 if (Dist <= MaxEditDist)
37448 Candidates.push_back(T);
37449 }
37450
37451 if (Candidates.empty())
37452 return "";
37453
37454 std::string Res = ", did you mean: ";
37455 unsigned i = 0;
37456 for (; i < Candidates.size() - 1; i++)
37457 Res += Candidates[i].str() + ", ";
37458 return Res + Candidates[i].str() + "?";
37459}
37460
37461#endif // GET_MNEMONIC_SPELL_CHECKER
37462
37463
37464#ifdef GET_MNEMONIC_CHECKER
37465#undef GET_MNEMONIC_CHECKER
37466
37467static bool X86CheckMnemonic(StringRef Mnemonic,
37468 const FeatureBitset &AvailableFeatures,
37469 unsigned VariantID) {
37470 // Process all MnemonicAliases to remap the mnemonic.
37471 applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);
37472
37473 // Find the appropriate table for this asm variant.
37474 const MatchEntry *Start, *End;
37475 switch (VariantID) {
37476 default: llvm_unreachable("invalid variant!");
37477 case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
37478 case 1: Start = std::begin(MatchTable1); End = std::end(MatchTable1); break;
37479 }
37480
37481 // Search the table.
37482 auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
37483
37484 if (MnemonicRange.first == MnemonicRange.second)
37485 return false;
37486
37487 for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
37488 it != ie; ++it) {
37489 const FeatureBitset &RequiredFeatures =
37490 FeatureBitsets[it->RequiredFeaturesIdx];
37491 if ((AvailableFeatures & RequiredFeatures) == RequiredFeatures)
37492 return true;
37493 }
37494 return false;
37495}
37496
37497#endif // GET_MNEMONIC_CHECKER
37498
37499